2026-02-08 03:30:36.583 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.152.20:5700'
2026-02-08 03:30:36.583 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.152.20:5802)
2026-02-08 03:30:36.583 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.152.20:5801)
2026-02-08 03:30:36.583 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.152.22:6700'
2026-02-08 03:30:36.583 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.152.22:6802)
2026-02-08 03:30:36.583 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.152.22:6801)
2026-02-08 03:30:36.583 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.152.20:5700/1'
2026-02-08 03:30:36.583 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.152.20:5804)
2026-02-08 03:30:36.583 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.152.20:5803)
2026-02-08 03:30:36.583 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.152.20:5700/2'
2026-02-08 03:30:36.583 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.152.20:5806)
2026-02-08 03:30:36.583 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.152.20:5805)
2026-02-08 03:30:36.583 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.152.20:5700/3'
2026-02-08 03:30:36.583 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.152.20:5808)
2026-02-08 03:30:36.583 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.152.20:5807)
2026-02-08 03:30:36.583 [INFO] fake_trx.py:429 Init complete
2026-02-08 03:30:36.583 [INFO] fake_trx.py:460 Setting real time process scheduler to SCHED_RR, priority 30
2026-02-08 03:30:37.159 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:30:37.160 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:30:37.160 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:30:37.160 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:30:37.160 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:30:37.160 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:30:41.142 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:30:41.144 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:30:41.144 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:30:41.144 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:30:41.144 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 0 -> 1
2026-02-08 03:30:41.151 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:30:41.151 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:30:41.151 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:30:41.151 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:30:41.151 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:30:41.152 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:30:41.152 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:30:41.152 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 0 -> 1
2026-02-08 03:30:41.158 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:30:41.158 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:30:41.158 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:30:41.158 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:30:41.158 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:30:41.158 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:30:41.158 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:30:41.159 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 0 -> 1
2026-02-08 03:30:41.164 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:30:41.164 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:30:41.164 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:30:41.164 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:30:41.164 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:30:41.164 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:30:41.165 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:30:41.165 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 0 -> 1
2026-02-08 03:30:41.169 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:30:41.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:30:41.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:30:41.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:30:41.169 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:30:41.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:30:41.170 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:30:41.170 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:30:41.170 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:30:41.170 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:30:41.170 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:30:41.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:30:41.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:30:41.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:30:41.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:30:41.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:30:41.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:30:41.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:30:41.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:30:41.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:30:41.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:30:41.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:30:41.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:30:41.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:30:41.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:30:41.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:30:41.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:30:41.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:30:41.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:30:41.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:30:41.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:30:41.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:30:41.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:30:41.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:30:41.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:30:41.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:30:41.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:30:41.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:30:41.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:30:41.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:30:41.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:30:41.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:30:41.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:30:41.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:30:41.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:30:41.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:30:41.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:30:41.175 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:30:41.653 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:30:41.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:41.709 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:30:41.711 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:30:41.712 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:30:41.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:41.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:41.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:30:41.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:41.723 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:41.723 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:41.723 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:30:41.723 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:30:41.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:41.926 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:41.926 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:41.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:41.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:42.125 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:30:42.176 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:30:42.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:30:42.177 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:30:42.179 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:30:42.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:42.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:42.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:42.330 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:42.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:42.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:42.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:30:42.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:42.350 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:42.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:42.350 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:30:42.350 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:30:42.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:42.423 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:42.424 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:42.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:42.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:42.597 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:30:42.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:42.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:42.820 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:42.820 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:42.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:42.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:42.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:30:42.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:42.835 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:42.835 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:42.835 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:30:42.835 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:30:42.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:43.068 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:30:43.102 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:43.102 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:43.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:43.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:43.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:30:43.178 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:30:43.178 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:30:43.180 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:30:43.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:43.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:43.507 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:43.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:43.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:43.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:43.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:30:43.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:43.527 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:43.527 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:43.528 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:30:43.528 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:30:43.540 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:30:43.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:43.601 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:43.601 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:43.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:43.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:43.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:43.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:43.997 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:43.997 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:44.006 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:44.006 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:44.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:30:44.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:44.007 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:44.007 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:44.007 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:30:44.007 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:30:44.013 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:30:44.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:44.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:30:44.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:30:44.179 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:30:44.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:30:44.285 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:44.285 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:44.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:44.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:44.486 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:30:44.959 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:30:45.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:45.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:45.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:45.027 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:45.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:45.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:45.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:30:45.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:45.041 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:45.041 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:45.041 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:30:45.041 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:30:45.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:45.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:30:45.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:30:45.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:30:45.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:30:45.232 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:45.232 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:45.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:45.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:45.432 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:30:45.903 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:30:46.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:46.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:46.047 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:46.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:46.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:46.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:46.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:30:46.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:46.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:46.065 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:46.065 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:30:46.065 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:30:46.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:46.173 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:46.174 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:46.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:46.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:46.376 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:30:46.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:46.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:46.588 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:46.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:46.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:46.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:46.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:30:46.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:46.607 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:46.607 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:46.607 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:30:46.607 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:30:46.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:30:46.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:46.847 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:30:46.879 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:46.879 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:46.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:46.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:47.318 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:30:47.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:47.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:47.606 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:47.606 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:47.624 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:47.624 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:47.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:30:47.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:47.626 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:47.626 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:47.626 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:30:47.626 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:30:47.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:47.787 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:30:47.821 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:47.821 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:47.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:47.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:48.261 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:30:48.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:48.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:48.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:48.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:48.652 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:48.652 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:48.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:30:48.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:48.653 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:48.653 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:48.654 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:30:48.654 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:30:48.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:30:48.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:48.733 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:30:48.768 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:48.768 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:48.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:48.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:49.203 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:30:49.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:49.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:49.529 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:49.529 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:49.546 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:49.546 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:49.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:30:49.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:49.547 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:49.547 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:49.547 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:30:49.547 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:30:49.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:49.674 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:30:49.711 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:49.711 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:49.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:49.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:50.142 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:30:50.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:50.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:50.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:50.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:50.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:50.510 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:50.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:30:50.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:50.511 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:50.511 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:50.511 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:30:50.511 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:30:50.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:50.613 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:30:50.648 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:50.648 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:50.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:50.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:51.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:51.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:51.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:51.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:51.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:51.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:51.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:30:51.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:51.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:51.052 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:51.052 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:30:51.052 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:30:51.084 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:30:51.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:51.146 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:51.146 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:51.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:51.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:51.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:51.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:51.242 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:51.242 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:51.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:51.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:51.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:30:51.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:51.263 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:51.263 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:51.263 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:30:51.263 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:30:51.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:51.382 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:51.382 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:51.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:51.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:51.557 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 03:30:51.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:51.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:51.731 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:51.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:51.749 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:51.749 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:51.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:30:51.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:51.751 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:51.751 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:51.751 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:30:51.751 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:30:51.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:51.852 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:51.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:51.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:51.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:52.030 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 03:30:52.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:52.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:52.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:52.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:52.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:52.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:52.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:30:52.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:52.248 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:52.248 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:52.248 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:30:52.248 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:30:52.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:52.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:52.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:52.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:52.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:52.502 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 03:30:52.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:52.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:52.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:52.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:52.736 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:52.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:52.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:30:52.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:52.738 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:52.738 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:52.738 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:30:52.738 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:30:52.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:52.973 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 03:30:53.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:53.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:53.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:53.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:53.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:53.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:53.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:53.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:53.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:53.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:53.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:30:53.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:53.386 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:53.386 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:53.386 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:30:53.386 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:30:53.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:53.443 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 03:30:53.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:53.479 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:53.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:53.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:53.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:53.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:53.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:53.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:53.865 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:53.865 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:53.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:30:53.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:53.866 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:53.866 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:53.866 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:30:53.867 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:30:53.914 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 03:30:53.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:53.977 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:53.977 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:53.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:53.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:54.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:54.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:54.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:54.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:54.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:54.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:54.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:30:54.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:54.362 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:54.362 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:54.362 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:30:54.362 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:30:54.385 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 03:30:54.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:54.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:30:54.448 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:30:54.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:54.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:54.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:30:54.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:30:54.834 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:30:54.834 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:30:54.840 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:30:54.840 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:30:54.840 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:30:54.840 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:30:54.841 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:30:54.841 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:30:54.841 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:30:54.841 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:30:54.841 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:30:54.841 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:30:54.841 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:30:54.841 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2957 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:30:54.841 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2957 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:30:54.841 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2957 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:30:54.841 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2957 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:30:54.841 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2957 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:30:54.841 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2957 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:30:54.841 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2957 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:30:59.850 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:30:59.850 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:30:59.850 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:30:59.850 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:30:59.850 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:30:59.850 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:30:59.858 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:30:59.859 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:30:59.859 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:30:59.859 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:30:59.859 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:30:59.863 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:30:59.863 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:30:59.863 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:30:59.863 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:30:59.863 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:30:59.863 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:30:59.863 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:30:59.863 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:30:59.867 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:30:59.867 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:30:59.867 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:30:59.867 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:30:59.867 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:30:59.867 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:30:59.868 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:30:59.868 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:30:59.872 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:30:59.872 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:30:59.872 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:30:59.872 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:30:59.872 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:30:59.872 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:30:59.872 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:30:59.873 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:30:59.877 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:30:59.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:30:59.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:30:59.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:30:59.877 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:30:59.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:30:59.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:30:59.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:30:59.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:30:59.878 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:30:59.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:30:59.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:30:59.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:30:59.878 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:30:59.878 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:30:59.878 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:30:59.878 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:30:59.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:30:59.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:30:59.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:30:59.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:30:59.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:30:59.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:30:59.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:30:59.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:30:59.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:30:59.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:30:59.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:30:59.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:30:59.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:30:59.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:30:59.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:30:59.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:30:59.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:30:59.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:30:59.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:30:59.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:30:59.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:30:59.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:30:59.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:30:59.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:30:59.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:30:59.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:30:59.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:30:59.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:30:59.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:30:59.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:30:59.883 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:31:00.360 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:31:00.404 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:31:00.406 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:31:00.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.408 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:31:00.430 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:31:00.430 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:31:00.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:31:00.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
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2026-02-08 03:31:00.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
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2026-02-08 03:31:00.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
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2026-02-08 03:31:00.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.825 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:31:00.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
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2026-02-08 03:31:00.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.881 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:31:00.881 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:31:00.882 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:31:00.882 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:31:00.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:00.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
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2026-02-08 03:31:01.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
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2026-02-08 03:31:01.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:01.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:01.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:01.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:01.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:01.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:01.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:01.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:01.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
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2026-02-08 03:31:01.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
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2026-02-08 03:31:01.291 [DEBUG] clck_gen.py:113 IND CLOCK 306
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2026-02-08 03:31:01.756 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:31:01.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:01.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
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2026-02-08 03:31:01.882 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:31:01.882 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:31:01.882 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:31:01.882 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:31:01.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:01.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
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2026-02-08 03:31:02.221 [DEBUG] clck_gen.py:113 IND CLOCK 510
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2026-02-08 03:31:02.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:02.677 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:31:02.677 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:31:02.677 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:31:02.677 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:31:02.678 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:31:02.678 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:31:02.678 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:31:02.678 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:31:02.678 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:31:02.678 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:31:02.678 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:31:02.678 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=611 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:02.678 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=611 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:02.678 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=611 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:02.678 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=611 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:02.678 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=611 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:02.678 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=611 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:07.695 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:31:07.695 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:31:07.695 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:31:07.695 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:31:07.695 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:31:07.695 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:31:07.702 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:31:07.703 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:31:07.703 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:31:07.703 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:31:07.703 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:31:07.707 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:31:07.707 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:31:07.707 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:31:07.708 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:31:07.708 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:31:07.708 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:31:07.708 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:31:07.708 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:31:07.711 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:31:07.712 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:31:07.712 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:31:07.712 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:31:07.712 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:31:07.712 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:31:07.712 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:31:07.712 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:31:07.715 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:31:07.715 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:31:07.715 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:31:07.715 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:31:07.715 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:31:07.716 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:31:07.716 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:31:07.716 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:31:07.720 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:31:07.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:31:07.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:31:07.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:31:07.720 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:31:07.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:31:07.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:31:07.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:31:07.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:31:07.720 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:31:07.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:31:07.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:31:07.720 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:31:07.720 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:31:07.720 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:31:07.721 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:31:07.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:31:07.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:31:07.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:31:07.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:31:07.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:31:07.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:31:07.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:31:07.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:31:07.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:31:07.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:31:07.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:31:07.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:31:07.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:31:07.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:31:07.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:31:07.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:31:07.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:31:07.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:31:07.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:31:07.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:31:07.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:31:07.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:31:07.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:31:07.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:31:07.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:31:07.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:31:07.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:31:07.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:31:07.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:31:07.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:31:07.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:31:07.725 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:31:08.198 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:31:08.242 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:31:08.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:08.244 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:31:08.245 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:31:08.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:31:08.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:31:08.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:31:08.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:08.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:08.313 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:31:08.313 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:31:08.313 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:31:08.313 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:31:08.319 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:31:08.320 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:31:08.320 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:31:08.320 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:31:08.321 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:31:08.321 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:31:08.321 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:31:08.321 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=129 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:08.321 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=129 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:08.321 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=129 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:08.322 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:08.322 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:08.322 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:08.322 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:08.322 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=130 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:08.322 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=130 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:08.322 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=130 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:08.322 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=130 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:08.322 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=130 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:08.322 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=130 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:08.322 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=130 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:08.323 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=130 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:13.330 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:31:13.330 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:31:13.330 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:31:13.330 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:31:13.330 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:31:13.330 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:31:13.338 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:31:13.339 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:31:13.339 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:31:13.340 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:31:13.340 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:31:13.342 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:31:13.343 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:31:13.343 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:31:13.343 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:31:13.343 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:31:13.343 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:31:13.343 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:31:13.343 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:31:13.346 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:31:13.346 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:31:13.346 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:31:13.347 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:31:13.347 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:31:13.347 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:31:13.347 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:31:13.347 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:31:13.350 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:31:13.350 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:31:13.350 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:31:13.350 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:31:13.350 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:31:13.350 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:31:13.350 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:31:13.350 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:31:13.354 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:31:13.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:31:13.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:31:13.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:31:13.354 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:31:13.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:31:13.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:31:13.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:31:13.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:31:13.354 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:31:13.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:31:13.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:31:13.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:31:13.354 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:31:13.354 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:31:13.354 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:31:13.354 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:31:13.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:31:13.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:31:13.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:31:13.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:31:13.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:31:13.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:31:13.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:31:13.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:31:13.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:31:13.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:31:13.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:31:13.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:31:13.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:31:13.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:31:13.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:31:13.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:31:13.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:31:13.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:31:13.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:31:13.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:31:13.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:31:13.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:31:13.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:31:13.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:31:13.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:31:13.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:31:13.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:31:13.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:31:13.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:31:13.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:31:13.359 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:31:13.831 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:31:13.872 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:31:13.873 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:31:13.873 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:31:13.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:13.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:31:13.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:31:13.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:31:13.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:31:13.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:31:13.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:31:13.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:31:13.941 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:31:13.941 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:31:13.942 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:31:13.942 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:31:13.942 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:31:13.942 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:31:13.942 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:31:13.942 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:13.942 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:13.943 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:13.943 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:13.943 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:13.943 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:13.943 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:13.943 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:13.943 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:13.943 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:13.943 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:13.943 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=127 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:13.943 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:13.944 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:13.944 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:13.944 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:13.944 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:13.944 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:13.944 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:18.944 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:31:18.944 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:31:18.944 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:31:18.944 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:31:18.944 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:31:18.944 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:31:18.951 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:31:18.951 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:31:18.951 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:31:18.952 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:31:18.952 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:31:18.955 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:31:18.955 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:31:18.955 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:31:18.956 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:31:18.956 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:31:18.956 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:31:18.956 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:31:18.956 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:31:18.960 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:31:18.960 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:31:18.961 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:31:18.961 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:31:18.961 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:31:18.961 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:31:18.961 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:31:18.961 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:31:18.965 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:31:18.965 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:31:18.965 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:31:18.965 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:31:18.965 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:31:18.965 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:31:18.965 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:31:18.965 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:31:18.971 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:31:18.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:31:18.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:31:18.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:31:18.971 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:31:18.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:31:18.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:31:18.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:31:18.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:31:18.971 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:31:18.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:31:18.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:31:18.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:31:18.972 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:31:18.972 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:31:18.972 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:31:18.972 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:31:18.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:31:18.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:31:18.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:31:18.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:31:18.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:31:18.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:31:18.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:31:18.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:31:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:31:18.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:31:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:31:18.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:31:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:31:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:31:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:31:18.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:31:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:31:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:31:18.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:31:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:31:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:31:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:31:18.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:31:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:31:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:31:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:31:18.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:31:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:31:18.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:31:18.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:31:18.976 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:31:19.449 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:31:19.492 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:31:19.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:19.495 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:31:19.498 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:31:19.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:31:19.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:31:19.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:31:19.562 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:31:19.562 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:31:19.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:31:19.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:31:19.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:31:19.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:31:19.577 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:31:19.577 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:31:19.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:31:19.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:31:19.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:31:19.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:31:19.595 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:31:19.595 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:31:19.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:31:19.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:31:19.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:31:19.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:31:19.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:31:19.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:31:19.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:31:19.616 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:31:19.616 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:31:19.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:31:19.624 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:31:19.624 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:31:19.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:31:19.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:31:19.631 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:31:19.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:31:19.638 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:31:19.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:31:19.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:31:19.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:31:19.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:31:19.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:31:19.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:31:19.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:31:19.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:31:19.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:31:19.653 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:31:19.654 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:31:19.654 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:31:19.654 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:31:19.654 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:31:19.654 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:31:19.654 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:31:19.654 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=148 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:19.654 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=148 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:19.654 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=148 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:19.654 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=148 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:19.654 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=148 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:19.654 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=148 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:19.654 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=148 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:31:24.668 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:31:24.668 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:31:24.668 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:31:24.668 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:31:24.668 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:31:24.668 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:31:24.676 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:31:24.677 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:31:24.677 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:31:24.677 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:31:24.677 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:31:24.679 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:31:24.679 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:31:24.679 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:31:24.679 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:31:24.679 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:31:24.679 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:31:24.679 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:31:24.679 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:31:24.682 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:31:24.682 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:31:24.682 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:31:24.682 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:31:24.682 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:31:24.682 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:31:24.682 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:31:24.682 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:31:24.684 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:31:24.684 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:31:24.684 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:31:24.684 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:31:24.684 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:31:24.684 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:31:24.684 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:31:24.684 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:31:24.687 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:31:24.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:31:24.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:31:24.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:31:24.687 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:31:24.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:31:24.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:31:24.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:31:24.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:31:24.687 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:31:24.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:31:24.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:31:24.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:31:24.688 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:31:24.688 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:31:24.688 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:31:24.688 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:31:24.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:31:24.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:31:24.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:31:24.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:31:24.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:31:24.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:31:24.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:31:24.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:31:24.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:31:24.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:31:24.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:31:24.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:31:24.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:31:24.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:31:24.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:31:24.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:31:24.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:31:24.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:31:24.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:31:24.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:31:24.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:31:24.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:31:24.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:31:24.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:31:24.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:31:24.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:31:24.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:31:24.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:31:24.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:31:24.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:31:24.692 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:31:25.165 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:31:25.201 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:31:25.202 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:31:25.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:25.203 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:31:25.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:31:25.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:31:25.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:31:25.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:31:25.221 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:31:25.221 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:31:25.221 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:31:25.221 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:31:25.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:25.271 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:31:25.271 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:31:25.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:31:25.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:31:25.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:25.636 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:31:25.690 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:31:25.690 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:31:25.690 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:31:25.692 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:31:26.108 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:31:26.581 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:31:26.691 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:31:26.691 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:31:26.691 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:31:26.693 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:31:27.048 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:31:27.515 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:31:27.692 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:31:27.692 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:31:27.692 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:31:27.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:31:27.980 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:31:28.446 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:31:28.693 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:31:28.693 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:31:28.693 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:31:28.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:31:28.920 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:31:29.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:29.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:31:29.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:31:29.373 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:31:29.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:31:29.391 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:31:29.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:31:29.392 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:31:29.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:31:29.393 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:31:29.393 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:31:29.393 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:31:29.393 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:31:29.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:29.448 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:31:29.448 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:31:29.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:31:29.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:31:29.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:29.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:31:29.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:31:29.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:31:29.696 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:31:29.860 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:31:30.326 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:31:30.795 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:31:31.269 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:31:31.742 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:31:32.209 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:31:32.674 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:31:33.139 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:31:33.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:33.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:31:33.616 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:31:33.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:31:33.622 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:31:33.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:31:33.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:31:33.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:31:33.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:31:33.637 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:31:33.637 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:31:33.638 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:31:33.638 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:31:33.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:33.678 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:31:33.678 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:31:33.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:31:33.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:31:34.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:34.094 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:31:34.565 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:31:35.038 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 03:31:35.511 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 03:31:35.984 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 03:31:36.457 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 03:31:36.929 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 03:31:37.401 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 03:31:37.872 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 03:31:38.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:38.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:31:38.067 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:31:38.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:31:38.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:31:38.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:31:38.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:31:38.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:31:38.085 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:31:38.085 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:31:38.085 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:31:38.085 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:31:38.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:38.112 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:31:38.113 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:31:38.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:31:38.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:31:38.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:38.343 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 03:31:38.816 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 03:31:39.289 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 03:31:39.761 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 03:31:40.231 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 03:31:40.703 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 03:31:41.174 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 03:31:41.645 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 03:31:42.118 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 03:31:42.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:42.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:31:42.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:31:42.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:31:42.347 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:31:42.347 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:31:42.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:31:42.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:31:42.348 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:31:42.349 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:31:42.349 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:31:42.349 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:31:42.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:42.406 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:31:42.406 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:31:42.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:31:42.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:31:42.588 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 03:31:42.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:43.062 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 03:31:43.534 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 03:31:44.005 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 03:31:44.478 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 03:31:44.951 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 03:31:45.424 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 03:31:45.894 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 03:31:46.368 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 03:31:46.841 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 03:31:46.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:46.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:31:46.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:31:46.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:31:46.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:31:46.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:31:46.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:31:46.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:31:46.947 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:31:46.947 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:31:46.947 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:31:46.947 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:31:46.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:46.977 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:31:46.977 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:31:46.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:31:46.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:31:47.311 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 03:31:47.782 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 03:31:47.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:48.253 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 03:31:48.724 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 03:31:49.195 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 03:31:49.666 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 03:31:50.136 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 03:31:50.610 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 03:31:51.083 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 03:31:51.555 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 03:31:51.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:51.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:31:51.811 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:31:51.811 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:31:51.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:31:51.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:31:51.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:31:51.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:31:51.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:31:51.833 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:31:51.833 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:31:51.833 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:31:51.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:51.892 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:31:51.892 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:31:51.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:31:51.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:31:52.029 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 03:31:52.501 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 03:31:52.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:52.972 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 03:31:53.445 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 03:31:53.917 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-08 03:31:54.391 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-08 03:31:54.863 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-08 03:31:55.334 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-08 03:31:55.806 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-08 03:31:56.279 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-08 03:31:56.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:56.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:31:56.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:31:56.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:31:56.696 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:31:56.696 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:31:56.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:31:56.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:31:56.697 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:31:56.697 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:31:56.697 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:31:56.697 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:31:56.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:31:56.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:56.751 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-08 03:31:56.758 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:31:56.758 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:31:56.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:31:56.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:31:57.218 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-08 03:31:57.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:31:57.690 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-08 03:31:58.164 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-08 03:31:58.636 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-08 03:31:59.109 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-08 03:31:59.582 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-08 03:32:00.054 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-08 03:32:00.527 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-08 03:32:01.001 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-08 03:32:01.473 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-08 03:32:01.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:01.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:01.552 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:32:01.552 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:32:01.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:32:01.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:32:01.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:32:01.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:01.571 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:32:01.571 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:32:01.571 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:32:01.571 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:32:01.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:01.623 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:32:01.624 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:32:01.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:01.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:01.944 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-08 03:32:02.416 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-08 03:32:02.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:02.889 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-08 03:32:03.359 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-08 03:32:03.828 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-08 03:32:04.301 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-08 03:32:04.774 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-08 03:32:05.244 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-08 03:32:05.715 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-08 03:32:06.186 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-08 03:32:06.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:06.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:06.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:32:06.425 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:32:06.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:32:06.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:32:06.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:32:06.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:06.439 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:32:06.439 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:32:06.439 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:32:06.439 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:32:06.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:32:06.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:06.472 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:32:06.472 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:32:06.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:06.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:06.657 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-08 03:32:07.128 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-08 03:32:07.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:07.598 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-08 03:32:08.064 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-02-08 03:32:08.530 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-02-08 03:32:08.996 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-02-08 03:32:09.461 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-02-08 03:32:09.927 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-02-08 03:32:10.392 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-02-08 03:32:10.861 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-02-08 03:32:11.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:11.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:11.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:32:11.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:32:11.186 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:32:11.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:32:11.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:32:11.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:11.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:32:11.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:32:11.188 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:32:11.188 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:32:11.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:11.246 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:32:11.247 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:32:11.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:11.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:11.329 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-02-08 03:32:11.797 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-02-08 03:32:11.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:12.266 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-02-08 03:32:12.734 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-02-08 03:32:13.199 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-02-08 03:32:13.665 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-02-08 03:32:14.130 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-02-08 03:32:14.595 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-02-08 03:32:15.064 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-02-08 03:32:15.532 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-02-08 03:32:15.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:15.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:15.936 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:32:15.936 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:32:15.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:32:15.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:32:15.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:32:15.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:15.951 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:32:15.951 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:32:15.951 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:32:15.951 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:32:16.003 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-02-08 03:32:16.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:16.012 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:32:16.012 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:32:16.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:16.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:16.476 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-02-08 03:32:16.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:16.948 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-02-08 03:32:17.421 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-02-08 03:32:17.892 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-02-08 03:32:18.365 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-02-08 03:32:18.834 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-02-08 03:32:19.304 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-02-08 03:32:19.778 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-02-08 03:32:20.250 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-02-08 03:32:20.720 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-02-08 03:32:20.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:20.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:20.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:32:20.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:32:20.783 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:32:20.783 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:32:20.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:32:20.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:20.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:32:20.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:32:20.784 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:32:20.784 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:32:20.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:20.809 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:32:20.809 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:32:20.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:20.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:20.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:21.187 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-02-08 03:32:21.653 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-02-08 03:32:22.119 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-02-08 03:32:22.587 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-02-08 03:32:23.052 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-02-08 03:32:23.521 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-02-08 03:32:23.985 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-02-08 03:32:24.452 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-02-08 03:32:24.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:24.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:24.877 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:32:24.877 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:32:24.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:32:24.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:32:24.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:32:24.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:24.901 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:32:24.901 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:32:24.901 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:32:24.901 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:32:24.918 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-02-08 03:32:24.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:24.925 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:32:24.925 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:32:24.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:24.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:25.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:25.386 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-02-08 03:32:25.851 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-02-08 03:32:26.320 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-02-08 03:32:26.794 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-02-08 03:32:27.266 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-02-08 03:32:27.739 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-02-08 03:32:28.209 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-02-08 03:32:28.680 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-02-08 03:32:29.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:29.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:29.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:32:29.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:32:29.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:32:29.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:32:29.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:32:29.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:29.115 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:32:29.115 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:32:29.115 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:32:29.115 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:32:29.153 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-02-08 03:32:29.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:29.156 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:32:29.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:32:29.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:29.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:29.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:29.626 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-02-08 03:32:30.098 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-02-08 03:32:30.569 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-02-08 03:32:31.041 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-02-08 03:32:31.510 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-02-08 03:32:31.981 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-02-08 03:32:32.450 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-02-08 03:32:32.921 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-02-08 03:32:33.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:33.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:33.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:32:33.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:32:33.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:32:33.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:32:33.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:32:33.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:33.367 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:32:33.367 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:32:33.367 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:32:33.367 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:32:33.392 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-02-08 03:32:33.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:33.399 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:32:33.399 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:32:33.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:33.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:33.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:33.864 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-02-08 03:32:34.337 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-02-08 03:32:34.810 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-02-08 03:32:35.283 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-02-08 03:32:35.756 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-02-08 03:32:36.228 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-02-08 03:32:36.701 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-02-08 03:32:37.172 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-02-08 03:32:37.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:37.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:37.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:32:37.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:32:37.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:32:37.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:32:37.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:32:37.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:37.627 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:32:37.627 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:32:37.627 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:32:37.627 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:32:37.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:37.641 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:32:37.641 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:32:37.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:37.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:37.644 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-02-08 03:32:38.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:38.115 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-02-08 03:32:38.588 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-02-08 03:32:39.061 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-02-08 03:32:39.531 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-02-08 03:32:40.002 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-02-08 03:32:40.473 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-02-08 03:32:40.946 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-02-08 03:32:41.418 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-02-08 03:32:41.890 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-02-08 03:32:42.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:42.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:42.037 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:32:42.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:32:42.056 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:32:42.056 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:32:42.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:32:42.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:42.058 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:32:42.058 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:32:42.058 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:32:42.058 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:32:42.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:42.077 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:32:42.077 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:32:42.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:42.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:42.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:42.361 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-02-08 03:32:42.832 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-02-08 03:32:43.306 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-02-08 03:32:43.778 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-02-08 03:32:44.250 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-02-08 03:32:44.717 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-02-08 03:32:45.189 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-02-08 03:32:45.662 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-02-08 03:32:46.133 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-02-08 03:32:46.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:46.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:46.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:32:46.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:32:46.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:32:46.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:32:46.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:32:46.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:46.325 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:32:46.325 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:32:46.325 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:32:46.325 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:32:46.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:46.381 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:32:46.381 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:32:46.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:46.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:46.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:46.603 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-02-08 03:32:47.074 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-02-08 03:32:47.545 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-02-08 03:32:48.019 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-02-08 03:32:48.491 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-02-08 03:32:48.963 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-02-08 03:32:49.436 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-02-08 03:32:49.909 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-02-08 03:32:50.381 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-02-08 03:32:50.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:50.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:50.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:32:50.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:32:50.582 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:32:50.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:32:50.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:32:50.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:50.583 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:32:50.583 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:32:50.583 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:32:50.583 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:32:50.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:50.626 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:32:50.626 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:32:50.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:50.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:50.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:50.852 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-02-08 03:32:51.325 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-02-08 03:32:51.797 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-02-08 03:32:52.269 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-02-08 03:32:52.741 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-02-08 03:32:53.214 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-02-08 03:32:53.686 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-02-08 03:32:54.159 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-02-08 03:32:54.630 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-02-08 03:32:54.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:32:54.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:32:54.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:32:54.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:32:54.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:32:54.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:32:54.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:32:54.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:32:54.850 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:32:54.850 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:32:54.850 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:32:54.850 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:32:54.850 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:32:54.850 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:32:54.850 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:32:54.850 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=19531 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:32:54.850 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=19532 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:32:54.850 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=19532 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:32:54.850 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=19532 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:32:54.850 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=19532 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:32:54.850 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=19532 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:32:54.850 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=19532 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:32:54.850 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=19532 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:32:54.850 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=19532 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:32:59.863 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:32:59.863 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:32:59.863 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:32:59.863 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:32:59.863 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:32:59.863 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:32:59.877 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:32:59.878 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:32:59.878 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:32:59.878 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:32:59.879 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:32:59.883 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:32:59.883 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:32:59.883 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:32:59.883 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:32:59.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:32:59.883 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:32:59.883 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:32:59.883 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:32:59.887 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:32:59.888 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:32:59.888 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:32:59.888 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:32:59.888 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:32:59.888 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:32:59.888 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:32:59.888 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:32:59.892 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:32:59.892 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:32:59.892 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:32:59.892 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:32:59.892 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:32:59.892 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:32:59.892 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:32:59.892 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:32:59.897 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:32:59.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:32:59.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:32:59.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:32:59.897 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:32:59.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:32:59.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:32:59.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:32:59.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:32:59.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:32:59.898 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:32:59.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:32:59.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:32:59.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:32:59.898 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:32:59.898 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:32:59.898 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:32:59.898 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:32:59.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:32:59.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:32:59.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:32:59.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:32:59.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:32:59.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:32:59.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:32:59.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:32:59.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:32:59.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:32:59.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:32:59.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:32:59.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:32:59.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:32:59.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:32:59.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:32:59.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:32:59.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:32:59.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:32:59.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:32:59.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:32:59.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:32:59.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:32:59.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:32:59.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:32:59.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:32:59.900 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:32:59.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:32:59.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:32:59.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:32:59.901 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:32:59.901 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:32:59.901 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:32:59.901 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:32:59.901 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:32:59.901 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:33:04.917 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:33:04.917 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:33:04.917 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:33:04.917 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:33:04.917 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:33:04.917 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:33:04.933 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:33:04.935 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:33:04.935 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:33:04.935 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:33:04.935 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:33:04.940 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:33:04.940 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:33:04.940 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:33:04.941 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:33:04.941 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:33:04.941 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:33:04.941 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:33:04.941 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:33:04.945 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:33:04.945 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:33:04.945 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:33:04.945 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:33:04.945 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:33:04.945 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:33:04.946 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:33:04.946 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:33:04.949 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:33:04.949 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:33:04.949 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:33:04.949 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:33:04.949 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:33:04.949 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:33:04.949 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:33:04.949 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:33:04.953 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:33:04.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:33:04.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:33:04.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:33:04.953 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:33:04.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:33:04.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:33:04.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:33:04.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:33:04.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:33:04.954 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:33:04.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:33:04.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:33:04.954 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:33:04.954 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:33:04.954 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:33:04.954 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:33:04.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:33:04.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:33:04.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:33:04.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:33:04.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:33:04.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:33:04.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:33:04.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:33:04.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:33:04.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:33:04.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:33:04.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:33:04.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:33:04.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:33:04.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:33:04.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:33:04.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:33:04.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:33:04.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:33:04.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:33:04.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:33:04.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:33:04.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:33:04.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:33:04.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:33:04.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:33:04.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:33:04.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:33:04.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:33:04.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:33:04.959 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:33:05.422 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:33:05.471 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:33:05.472 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:33:05.473 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:33:05.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:05.488 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:05.488 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:05.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:05.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:05.493 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:05.493 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:05.493 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:05.493 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:05.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:05.528 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:05.528 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:05.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:05.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:05.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:05.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:05.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:05.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:05.646 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:05.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:05.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:05.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:05.648 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:05.648 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:05.648 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:05.648 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:05.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:05.704 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:05.704 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:05.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:05.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:05.889 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:33:05.956 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:33:05.957 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:33:05.957 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:33:05.957 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:33:06.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:06.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:06.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:06.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:06.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:06.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:06.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:06.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:06.141 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:06.141 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:06.142 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:06.142 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:06.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:06.195 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:06.195 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:06.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:06.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:06.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:06.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:06.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:06.329 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:06.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:06.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:06.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:06.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:06.350 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:06.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:06.350 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:06.350 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:06.355 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:33:06.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:06.402 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:06.402 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:06.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:06.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:06.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:06.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:06.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:06.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:06.826 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:33:06.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:06.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:06.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:06.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:06.830 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:06.830 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:06.830 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:06.830 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:06.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:06.879 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:06.879 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:06.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:06.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:06.958 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:33:06.958 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:33:06.958 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:33:06.958 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:33:07.297 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:33:07.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:07.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:07.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:07.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:07.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:07.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:07.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:07.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:07.354 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:07.354 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:07.354 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:07.354 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:07.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:07.405 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:07.405 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:07.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:07.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:07.768 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:33:07.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:07.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:07.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:07.877 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:07.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:07.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:07.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:07.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:07.893 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:07.893 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:07.893 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:07.893 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:07.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:07.947 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:07.948 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:07.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:07.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:07.959 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:33:07.959 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:33:07.959 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:33:07.960 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:33:08.241 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:33:08.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:08.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:08.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:08.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:08.434 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:08.434 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:08.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:08.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:08.437 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:08.437 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:08.437 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:08.437 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:08.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:33:08.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:08.494 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:08.494 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:08.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:08.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:08.714 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:33:08.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:08.960 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:33:08.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:33:08.960 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:33:08.961 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:33:08.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:08.964 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:08.964 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:08.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:08.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:08.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:08.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:08.977 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:08.977 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:08.977 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:08.977 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:09.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:09.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:09.031 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:09.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:09.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:09.186 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:33:09.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:09.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:09.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:09.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:09.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:09.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:09.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:09.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:09.520 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:09.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:09.520 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:09.520 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:09.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:33:09.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:09.572 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:09.572 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:09.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:09.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:09.657 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:33:09.961 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:33:09.961 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:33:09.961 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:33:09.962 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:33:10.128 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:33:10.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:10.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:10.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:10.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:10.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:10.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:10.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:10.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:10.404 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:10.404 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:10.404 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:10.404 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:10.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:10.453 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:10.453 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:10.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:10.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:10.597 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:33:10.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:10.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:10.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:10.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:10.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:10.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:10.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:10.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:10.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:10.897 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:10.897 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:10.897 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:10.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:10.947 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:10.948 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:10.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:10.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:11.068 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:33:11.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:11.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:11.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:11.418 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:11.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:11.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:11.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:11.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:11.441 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:11.441 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:11.441 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:11.441 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:11.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:11.492 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:11.492 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:11.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:11.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:11.540 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:33:11.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:11.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:11.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:11.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:11.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:11.719 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:11.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:11.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:11.721 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:11.721 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:11.721 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:11.721 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:11.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:11.786 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:11.786 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:11.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:11.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:12.012 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:33:12.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:12.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:12.184 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:12.184 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:12.191 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:12.191 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:12.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:12.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:12.193 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:12.193 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:12.193 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:12.193 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:12.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:12.255 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:12.255 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:12.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:12.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:12.482 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:33:12.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:12.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:12.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:12.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:12.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:12.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:12.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:12.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:12.701 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:12.701 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:12.701 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:12.701 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:12.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:12.751 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:12.751 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:12.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:12.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:12.953 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:33:13.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:13.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:13.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:13.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:13.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:13.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:13.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:13.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:13.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:13.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:13.188 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:13.188 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:13.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:13.237 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:13.237 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:13.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:13.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:13.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:13.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:13.347 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:13.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:13.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:13.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:13.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:13.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:13.366 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:13.366 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:13.366 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:13.366 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:13.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:13.417 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:13.417 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:13.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:13.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:13.423 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:33:13.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:13.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:13.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:13.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:13.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:13.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:13.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:13.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:13.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:13.863 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:13.863 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:13.863 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:13.895 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:33:13.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:13.911 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:13.911 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:13.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:13.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:14.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:14.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:14.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:14.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:14.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:14.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:14.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:14.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:14.347 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:14.347 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:14.347 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:14.347 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:14.366 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:33:14.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:14.396 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:14.396 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:14.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:14.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:14.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:14.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:14.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:14.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:14.826 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:33:14.826 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:33:14.827 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:33:14.827 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:33:14.830 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:33:14.830 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:33:14.830 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:33:14.830 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:33:14.830 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:33:14.830 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:33:14.830 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:33:19.840 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:33:19.840 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:33:19.840 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:33:19.840 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:33:19.840 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:33:19.840 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:33:19.853 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:33:19.855 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:33:19.855 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:33:19.855 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:33:19.855 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:33:19.860 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:33:19.860 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:33:19.860 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:33:19.860 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:33:19.860 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:33:19.861 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:33:19.861 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:33:19.861 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:33:19.864 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:33:19.865 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:33:19.865 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:33:19.865 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:33:19.865 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:33:19.865 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:33:19.865 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:33:19.865 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:33:19.868 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:33:19.869 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:33:19.869 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:33:19.869 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:33:19.869 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:33:19.869 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:33:19.869 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:33:19.869 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:33:19.874 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:33:19.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:33:19.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:33:19.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:33:19.874 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:33:19.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:33:19.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:33:19.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:33:19.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:33:19.874 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:33:19.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:33:19.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:33:19.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:33:19.875 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:33:19.875 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:33:19.875 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:33:19.875 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:33:19.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:33:19.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:33:19.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:33:19.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:33:19.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:33:19.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:33:19.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:33:19.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:33:19.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:33:19.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:33:19.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:33:19.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:33:19.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:33:19.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:33:19.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:33:19.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:33:19.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:33:19.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:33:19.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:33:19.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:33:19.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:33:19.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:33:19.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:33:19.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:33:19.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:33:19.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:33:19.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:33:19.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:33:19.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:33:19.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:33:19.879 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:33:20.352 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:33:20.395 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:33:20.396 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:33:20.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:20.398 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:33:20.410 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:20.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:20.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:20.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:20.415 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:20.415 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:20.415 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:20.415 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:20.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:20.455 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:20.456 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:20.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:20.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:20.825 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:33:20.877 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:33:20.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:33:20.878 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:33:20.878 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:33:21.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:21.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:21.296 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:33:21.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:21.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:21.499 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:21.499 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:21.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:21.520 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:21.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:21.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:21.522 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:21.523 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:21.523 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:21.523 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:21.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:21.571 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:21.571 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:21.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:21.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:21.762 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:33:21.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:33:21.879 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:33:21.879 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:33:21.879 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:33:22.227 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:33:22.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:22.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:22.698 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:33:22.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:33:22.879 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:33:22.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:33:22.880 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:33:22.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:22.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:22.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:22.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:22.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:22.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:22.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:22.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:22.942 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:22.942 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:22.942 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:22.942 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:22.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:22.990 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:22.990 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:22.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:22.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:23.170 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:33:23.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:23.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:23.641 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:33:23.880 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:33:23.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:33:23.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:33:23.881 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:33:24.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:24.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:24.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:24.078 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:24.092 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:24.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:24.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:24.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:24.094 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:24.094 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:24.094 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:24.094 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:24.106 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:33:24.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:24.146 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:24.146 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:24.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:24.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:24.571 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:33:24.880 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:33:24.881 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:33:24.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:33:24.881 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:33:25.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:25.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:25.036 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:33:25.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:25.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:25.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:25.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:25.504 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:33:25.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:25.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:25.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:25.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:25.513 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:25.514 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:25.514 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:25.514 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:25.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:25.569 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:25.569 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:25.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:25.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:25.973 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:33:26.447 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:33:26.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:26.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:26.919 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:33:27.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:27.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:27.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:27.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:27.050 [WARNING] transceiver.py:257 (MS@172.18.152.22:6700) RX TRXD message (fn=1560 tn=6 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:27.050 [WARNING] transceiver.py:257 (MS@172.18.152.22:6700) RX TRXD message (fn=1560 tn=7 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:27.067 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:27.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:27.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:27.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:27.069 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:27.069 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:27.069 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:27.069 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:27.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:27.117 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:27.117 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:27.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:27.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:27.390 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:33:27.862 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:33:28.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:28.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:28.331 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:33:28.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:28.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:28.549 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:28.549 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:28.568 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:28.568 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:28.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:28.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:28.570 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:28.570 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:28.571 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:28.571 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:28.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:28.621 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:28.621 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:28.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:28.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:28.801 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:33:29.268 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:33:29.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:29.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:29.734 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:33:30.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:30.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:30.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:30.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:30.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:30.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:30.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:30.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:30.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:30.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:30.060 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:30.060 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:30.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:33:30.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:30.116 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:30.117 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:30.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:30.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:30.205 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 03:33:30.676 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 03:33:31.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:31.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:31.149 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 03:33:31.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:31.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:31.540 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:31.540 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:31.556 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:31.556 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:31.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:31.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:31.559 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:31.559 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:31.559 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:31.559 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:31.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:31.614 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:31.615 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:31.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:31.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:31.622 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 03:33:32.094 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 03:33:32.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:32.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:32.568 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 03:33:33.040 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 03:33:33.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:33.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:33.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:33.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:33.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:33.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:33.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:33.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:33.066 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:33.067 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:33.067 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:33.067 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:33.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:33:33.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:33.118 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:33.118 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:33.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:33.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:33.512 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 03:33:33.985 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 03:33:34.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:34.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:34.459 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 03:33:34.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:34.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:34.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:34.916 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:34.932 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 03:33:34.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:34.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:34.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:34.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:34.937 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:34.937 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:34.937 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:34.937 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:34.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:34.981 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:34.982 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:34.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:34.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:35.404 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 03:33:35.876 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 03:33:35.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:35.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:36.344 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 03:33:36.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:36.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:36.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:36.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:36.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:36.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:36.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:36.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:36.362 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:36.362 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:36.362 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:36.362 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:36.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:36.411 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:36.411 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:36.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:36.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:36.815 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 03:33:37.288 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 03:33:37.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:37.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:37.760 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 03:33:37.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:37.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:37.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:37.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:37.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:37.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:37.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:37.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:37.884 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:37.884 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:37.884 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:37.884 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:37.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:37.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:37.897 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:37.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:37.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:38.231 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 03:33:38.697 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 03:33:38.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:38.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:39.163 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 03:33:39.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:39.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:39.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:39.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:39.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:39.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:39.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:39.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:39.333 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:39.333 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:39.334 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:39.334 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:39.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:39.384 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:39.385 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:39.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:39.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:39.637 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 03:33:40.106 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 03:33:40.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:40.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:40.577 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 03:33:40.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:40.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:40.752 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:40.753 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:40.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:40.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:40.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:40.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:40.773 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:40.773 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:40.773 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:40.773 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:40.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:40.823 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:40.823 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:40.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:40.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:41.050 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 03:33:41.522 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 03:33:41.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:41.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:41.995 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 03:33:42.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:42.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:42.188 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:42.189 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:42.208 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:42.208 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:42.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:42.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:42.211 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:42.211 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:42.211 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:42.211 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:42.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:42.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:42.262 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:42.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:42.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:42.467 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 03:33:42.939 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 03:33:43.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:43.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:43.410 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 03:33:43.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:43.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:43.624 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:43.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:43.642 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:43.642 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:43.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:43.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:43.644 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:43.644 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:43.644 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:43.644 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:43.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:43.693 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:43.694 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:43.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:43.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:43.882 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 03:33:44.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:44.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:44.352 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 03:33:44.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:44.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:44.746 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:44.746 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:44.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:44.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:44.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:44.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:44.765 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:44.765 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:44.765 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:44.765 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:44.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:44.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:44.818 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:44.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:44.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:44.825 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 03:33:45.298 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 03:33:45.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:45.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:45.770 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 03:33:46.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:46.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:46.183 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:46.183 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:46.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:46.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:46.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:46.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:46.203 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:46.203 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:46.203 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:46.203 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:46.240 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 03:33:46.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:46.257 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:46.257 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:46.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:46.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:46.712 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 03:33:47.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:47.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:47.185 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 03:33:47.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:47.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:47.614 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:47.614 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:47.629 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:47.630 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:47.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:47.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:47.632 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:47.632 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:47.632 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:47.632 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:47.656 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 03:33:47.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:47.687 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:47.687 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:47.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:47.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:48.121 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 03:33:48.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:48.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:48.586 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 03:33:49.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:49.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:49.034 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:49.034 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:49.048 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:33:49.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:33:49.049 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:33:49.049 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:33:49.051 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-08 03:33:49.056 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:33:49.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:33:49.058 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:33:49.058 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:33:49.058 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:33:49.058 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:33:49.058 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:33:49.058 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6324 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:49.059 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6324 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:49.059 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6324 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:49.059 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6325 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:49.059 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6325 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:49.059 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6325 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:49.059 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6325 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:49.059 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6325 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:49.059 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6325 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:49.059 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6325 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:49.059 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6325 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:49.060 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6326 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:49.060 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6326 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:49.060 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6326 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:49.060 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6326 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:49.060 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6326 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:49.060 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6326 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:49.060 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6326 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:49.060 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6326 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:49.060 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6327 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:49.060 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6327 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:49.060 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6327 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:49.060 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6327 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:49.061 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6327 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:49.061 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6327 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:49.061 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6327 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:49.061 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6327 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:49.061 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6328 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:49.061 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6328 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:49.061 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6328 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:49.061 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6328 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:49.061 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6328 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:49.061 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6328 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:49.061 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6328 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:49.062 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6328 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:33:54.063 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:33:54.063 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:33:54.063 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:33:54.063 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:33:54.063 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:33:54.063 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:33:54.077 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:33:54.078 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:33:54.078 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:33:54.079 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:33:54.079 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:33:54.082 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:33:54.083 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:33:54.083 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:33:54.083 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:33:54.083 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:33:54.083 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:33:54.083 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:33:54.083 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:33:54.086 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:33:54.086 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:33:54.086 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:33:54.086 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:33:54.086 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:33:54.086 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:33:54.086 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:33:54.086 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:33:54.089 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:33:54.089 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:33:54.089 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:33:54.089 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:33:54.089 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:33:54.089 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:33:54.090 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:33:54.090 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:33:54.093 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:33:54.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:33:54.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:33:54.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:33:54.093 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:33:54.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:33:54.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:33:54.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:33:54.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:33:54.094 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:33:54.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:33:54.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:33:54.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:33:54.094 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:33:54.094 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:33:54.094 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:33:54.094 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:33:54.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:33:54.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:33:54.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:33:54.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:33:54.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:33:54.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:33:54.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:33:54.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:33:54.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:33:54.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:33:54.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:33:54.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:33:54.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:33:54.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:33:54.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:33:54.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:33:54.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:33:54.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:33:54.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:33:54.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:33:54.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:33:54.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:33:54.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:33:54.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:33:54.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:33:54.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:33:54.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:33:54.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:33:54.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:33:54.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:33:54.098 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:33:54.562 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:33:54.610 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:33:54.611 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:33:54.612 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:33:54.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:54.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:54.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:54.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:54.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:54.627 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:54.627 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:54.627 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:54.627 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:54.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:54.665 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:54.665 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:54.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:54.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:55.033 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:33:55.096 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:33:55.097 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:33:55.097 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:33:55.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:33:55.506 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:33:55.978 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:33:56.098 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:33:56.098 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:33:56.098 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:33:56.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:33:56.452 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:33:56.924 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:33:57.099 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:33:57.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:33:57.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:33:57.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:33:57.396 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:33:57.862 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:33:58.101 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:33:58.101 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:33:58.101 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:33:58.101 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:33:58.329 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:33:58.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:58.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:58.533 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:58.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:58.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:33:58.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:33:58.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:33:58.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:58.552 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:58.552 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:58.552 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:33:58.552 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:33:58.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:33:58.607 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:33:58.607 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:33:58.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:58.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:33:58.800 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:33:59.102 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:33:59.102 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:33:59.102 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:33:59.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:33:59.270 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:33:59.741 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:34:00.212 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:34:00.685 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:34:01.158 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:34:01.630 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:34:02.100 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:34:02.571 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:34:02.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:34:02.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:02.794 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:34:02.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:34:02.810 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:34:02.810 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:34:02.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:34:02.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:02.814 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:34:02.814 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:34:02.814 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:34:02.814 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:34:02.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:34:02.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:34:02.863 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:34:02.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:02.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:03.042 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:34:03.511 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:34:03.976 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:34:04.447 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 03:34:04.920 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 03:34:05.393 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 03:34:05.862 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 03:34:06.327 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 03:34:06.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:34:06.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:06.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:34:06.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:34:06.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:34:06.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:34:06.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:34:06.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:06.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:34:06.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:34:06.783 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:34:06.783 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:34:06.799 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 03:34:06.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:34:06.836 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:34:06.837 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:34:06.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:06.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:07.272 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 03:34:07.744 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 03:34:08.218 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 03:34:08.691 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 03:34:09.164 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 03:34:09.637 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 03:34:10.108 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 03:34:10.574 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 03:34:11.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:34:11.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:11.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:34:11.032 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:34:11.038 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:34:11.038 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:34:11.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:34:11.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:11.040 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:34:11.040 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:34:11.040 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:34:11.040 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:34:11.041 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 03:34:11.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:34:11.095 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:34:11.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:34:11.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:11.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:11.507 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 03:34:11.978 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 03:34:12.450 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 03:34:12.920 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 03:34:13.391 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 03:34:13.862 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 03:34:14.329 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 03:34:14.799 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 03:34:15.265 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 03:34:15.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:34:15.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:15.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:34:15.672 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:34:15.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:34:15.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:34:15.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:34:15.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:15.693 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:34:15.693 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:34:15.693 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:34:15.693 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:34:15.735 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 03:34:15.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:34:15.745 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:34:15.745 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:34:15.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:15.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:16.206 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 03:34:16.676 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 03:34:17.147 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 03:34:17.615 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 03:34:18.084 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 03:34:18.556 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 03:34:19.029 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 03:34:19.502 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 03:34:19.974 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 03:34:20.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:34:20.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:20.055 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:34:20.056 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:34:20.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:34:20.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:34:20.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:34:20.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:20.071 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:34:20.071 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:34:20.071 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:34:20.071 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:34:20.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:34:20.156 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:34:20.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:34:20.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:20.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:20.445 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 03:34:20.919 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 03:34:21.391 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 03:34:21.864 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 03:34:22.338 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 03:34:22.811 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 03:34:23.281 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-08 03:34:23.752 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-08 03:34:24.226 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-08 03:34:24.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:34:24.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:24.450 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:34:24.450 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:34:24.467 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:34:24.467 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:34:24.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:34:24.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:24.469 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:34:24.469 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:34:24.469 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:34:24.469 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:34:24.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:34:24.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:34:24.518 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:34:24.518 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:34:24.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:24.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:24.699 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-08 03:34:25.169 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-08 03:34:25.636 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-08 03:34:26.105 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-08 03:34:26.572 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-08 03:34:27.040 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-08 03:34:27.505 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-08 03:34:27.979 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-08 03:34:28.451 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-08 03:34:28.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:34:28.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:28.818 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:34:28.818 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:34:28.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:34:28.834 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:34:28.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:34:28.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:28.836 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:34:28.836 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:34:28.837 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:34:28.837 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:34:28.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:34:28.893 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:34:28.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:34:28.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:28.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:28.923 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-08 03:34:29.394 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-08 03:34:29.865 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-08 03:34:30.336 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-08 03:34:30.809 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-08 03:34:31.282 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-08 03:34:31.754 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-08 03:34:32.225 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-08 03:34:32.699 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-08 03:34:33.172 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-08 03:34:33.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:34:33.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:33.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:34:33.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:34:33.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:34:33.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:34:33.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:34:33.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:33.230 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:34:33.230 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:34:33.230 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:34:33.230 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:34:33.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:34:33.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:34:33.281 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:34:33.282 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:34:33.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:33.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:33.644 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-08 03:34:34.118 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-08 03:34:34.591 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-08 03:34:35.063 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-08 03:34:35.537 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-08 03:34:36.009 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-08 03:34:36.482 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-08 03:34:36.956 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-08 03:34:37.429 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-02-08 03:34:37.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:34:37.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:37.490 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:34:37.490 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:34:37.500 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:34:37.500 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:34:37.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:34:37.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:37.503 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:34:37.503 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:34:37.503 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:34:37.503 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:34:37.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:34:37.556 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:34:37.556 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:34:37.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:37.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:37.899 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-02-08 03:34:38.371 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-02-08 03:34:38.844 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-02-08 03:34:39.317 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-02-08 03:34:39.784 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-02-08 03:34:40.252 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-02-08 03:34:40.719 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-02-08 03:34:41.184 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-02-08 03:34:41.650 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-02-08 03:34:41.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:34:41.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:41.795 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:34:41.795 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:34:41.811 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:34:41.811 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:34:41.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:34:41.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:41.814 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:34:41.814 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:34:41.814 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:34:41.814 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:34:41.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:34:41.864 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:34:41.864 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:34:41.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:41.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:42.117 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-02-08 03:34:42.587 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-02-08 03:34:43.058 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-02-08 03:34:43.531 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-02-08 03:34:43.997 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-02-08 03:34:44.462 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-02-08 03:34:44.928 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-02-08 03:34:45.393 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-02-08 03:34:45.859 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-02-08 03:34:46.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:34:46.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:46.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:34:46.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:34:46.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:34:46.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:34:46.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:34:46.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:46.168 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:34:46.168 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:34:46.168 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:34:46.168 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:34:46.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:34:46.220 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:34:46.221 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:34:46.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:46.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:46.332 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-02-08 03:34:46.801 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-02-08 03:34:47.274 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-02-08 03:34:47.747 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-02-08 03:34:48.219 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-02-08 03:34:48.693 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-02-08 03:34:49.166 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-02-08 03:34:49.638 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-02-08 03:34:50.109 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-02-08 03:34:50.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:34:50.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:50.267 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:34:50.267 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:34:50.283 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:34:50.283 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:34:50.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:34:50.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:50.285 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:34:50.285 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:34:50.285 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:34:50.286 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:34:50.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:34:50.336 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:34:50.336 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:34:50.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:50.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:50.579 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-02-08 03:34:51.050 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-02-08 03:34:51.524 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-02-08 03:34:51.996 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-02-08 03:34:52.468 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-02-08 03:34:52.942 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-02-08 03:34:53.415 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-02-08 03:34:53.887 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-02-08 03:34:54.358 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-02-08 03:34:54.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:34:54.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:54.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:34:54.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:34:54.551 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:34:54.551 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:34:54.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:34:54.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:54.554 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:34:54.554 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:34:54.554 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:34:54.554 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:34:54.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:34:54.627 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:34:54.627 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:34:54.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:54.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:54.829 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-02-08 03:34:55.302 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-02-08 03:34:55.773 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-02-08 03:34:56.246 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-02-08 03:34:56.715 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-02-08 03:34:57.186 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-02-08 03:34:57.658 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-02-08 03:34:58.130 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-02-08 03:34:58.597 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-02-08 03:34:58.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:34:58.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:58.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:34:58.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:34:58.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:34:58.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:34:58.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:34:58.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:58.816 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:34:58.816 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:34:58.816 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:34:58.816 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:34:58.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:34:58.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:34:58.867 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:34:58.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:58.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:34:59.063 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-02-08 03:34:59.537 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-02-08 03:35:00.009 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-02-08 03:35:00.480 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-02-08 03:35:00.954 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-02-08 03:35:01.426 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-02-08 03:35:01.898 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-02-08 03:35:02.369 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-02-08 03:35:02.843 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-02-08 03:35:03.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:35:03.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:03.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:35:03.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:35:03.066 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:35:03.066 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:35:03.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:35:03.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:03.068 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:35:03.068 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:35:03.068 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:35:03.068 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:35:03.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:35:03.124 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:35:03.124 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:35:03.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:03.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:03.315 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-02-08 03:35:03.787 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-02-08 03:35:04.261 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-02-08 03:35:04.733 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-02-08 03:35:05.205 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-02-08 03:35:05.679 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-02-08 03:35:06.151 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-02-08 03:35:06.623 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-02-08 03:35:07.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:35:07.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:07.018 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:35:07.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:35:07.034 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:35:07.034 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:35:07.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:35:07.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:07.037 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:35:07.037 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:35:07.037 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:35:07.037 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:35:07.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:35:07.089 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:35:07.089 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:35:07.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:07.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:07.094 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-02-08 03:35:07.567 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-02-08 03:35:08.040 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-02-08 03:35:08.512 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-02-08 03:35:08.983 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-02-08 03:35:09.457 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-02-08 03:35:09.925 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-02-08 03:35:10.392 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-02-08 03:35:10.861 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-02-08 03:35:11.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:35:11.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:11.273 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:35:11.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:35:11.293 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:35:11.293 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:35:11.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:35:11.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:11.295 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:35:11.295 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:35:11.295 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:35:11.295 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:35:11.332 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-02-08 03:35:11.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:35:11.349 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:35:11.349 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:35:11.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:11.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:11.803 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-02-08 03:35:12.274 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-02-08 03:35:12.745 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-02-08 03:35:13.218 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-02-08 03:35:13.690 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-02-08 03:35:14.162 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-02-08 03:35:14.634 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-02-08 03:35:15.104 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-02-08 03:35:15.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:35:15.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:15.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:35:15.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:35:15.554 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:35:15.554 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:35:15.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:35:15.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:15.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:35:15.557 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:35:15.557 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:35:15.557 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:35:15.577 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-02-08 03:35:15.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:35:15.611 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:35:15.612 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:35:15.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:15.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:16.050 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-02-08 03:35:16.522 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-02-08 03:35:16.991 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-02-08 03:35:17.456 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-02-08 03:35:17.920 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-02-08 03:35:18.386 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-02-08 03:35:18.853 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-02-08 03:35:19.322 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-02-08 03:35:19.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:35:19.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:19.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:35:19.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:35:19.783 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:35:19.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:35:19.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:35:19.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:35:19.786 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:35:19.786 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:35:19.786 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:35:19.786 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:35:19.786 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:35:19.786 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:35:19.786 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:35:19.786 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=18565 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:35:19.786 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=18565 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:35:19.786 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=18565 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:35:19.786 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=18565 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:35:19.786 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=18565 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:35:19.786 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=18565 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:35:24.796 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:35:24.797 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:35:24.797 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:35:24.797 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:35:24.797 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:35:24.797 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:35:24.807 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:35:24.808 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:35:24.808 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:35:24.808 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:35:24.808 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:35:24.812 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:35:24.812 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:35:24.813 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:35:24.813 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:35:24.813 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:35:24.813 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:35:24.813 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:35:24.813 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:35:24.816 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:35:24.816 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:35:24.816 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:35:24.816 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:35:24.816 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:35:24.816 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:35:24.817 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:35:24.817 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:35:24.819 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:35:24.820 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:35:24.820 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:35:24.820 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:35:24.820 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:35:24.820 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:35:24.820 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:35:24.820 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:35:24.824 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:35:24.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:35:24.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:35:24.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:35:24.824 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:35:24.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:35:24.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:35:24.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:35:24.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:35:24.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:35:24.824 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:35:24.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:35:24.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:35:24.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:35:24.825 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:35:24.825 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:35:24.825 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:35:24.825 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:35:24.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:35:24.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:35:24.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:35:24.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:35:24.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:35:24.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:35:24.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:35:24.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:35:24.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:35:24.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:35:24.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:35:24.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:35:24.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:35:24.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:35:24.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:35:24.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:35:24.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:35:24.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:35:24.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:35:24.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:35:24.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:35:24.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:35:24.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:35:24.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:35:24.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:35:24.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:35:24.827 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:35:24.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:35:24.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:35:24.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:35:24.827 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:35:24.827 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:35:24.827 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:35:24.827 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:35:24.827 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:35:24.827 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:35:29.848 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:35:29.848 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:35:29.848 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:35:29.848 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:35:29.848 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:35:29.848 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:35:29.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:35:29.855 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:35:29.855 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:35:29.855 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:35:29.855 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:35:29.858 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:35:29.858 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:35:29.858 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:35:29.858 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:35:29.858 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:35:29.858 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:35:29.858 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:35:29.858 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:35:29.860 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:35:29.860 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:35:29.860 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:35:29.860 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:35:29.860 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:35:29.860 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:35:29.860 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:35:29.860 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:35:29.862 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:35:29.862 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:35:29.862 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:35:29.862 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:35:29.862 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:35:29.862 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:35:29.862 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:35:29.862 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:35:29.865 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:35:29.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:35:29.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:35:29.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:35:29.865 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:35:29.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:35:29.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:35:29.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:35:29.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:35:29.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:35:29.865 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:35:29.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:35:29.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:35:29.865 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:35:29.865 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:35:29.865 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:35:29.866 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:35:29.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:35:29.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:35:29.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:35:29.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:35:29.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:35:29.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:35:29.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:35:29.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:35:29.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:35:29.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:35:29.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:35:29.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:35:29.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:35:29.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:35:29.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:35:29.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:35:29.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:35:29.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:35:29.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:35:29.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:35:29.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:35:29.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:35:29.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:35:29.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:35:29.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:35:29.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:35:29.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:35:29.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:35:29.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:35:29.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:35:29.870 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:35:30.335 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:35:30.381 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:35:30.383 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:35:30.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:35:30.384 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:35:30.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:35:30.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:35:30.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:35:30.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:30.401 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:35:30.401 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:35:30.401 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:35:30.401 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:35:30.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:35:30.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:35:30.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:35:30.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:30.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:30.803 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:35:30.868 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:35:30.869 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:35:30.869 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:35:30.869 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:35:31.273 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:35:31.747 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:35:31.869 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:35:31.869 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:35:31.870 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:35:31.870 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:35:32.219 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:35:32.691 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:35:32.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:35:32.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:35:32.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:35:32.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:35:33.164 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:35:33.637 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:35:33.872 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:35:33.872 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:35:33.873 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:35:33.873 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:35:34.110 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:35:34.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:35:34.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:34.478 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:35:34.478 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:35:34.495 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:35:34.495 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:35:34.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:35:34.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:34.497 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:35:34.497 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:35:34.497 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:35:34.497 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:35:34.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:35:34.547 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:35:34.548 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:35:34.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:34.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:34.583 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:35:34.873 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:35:34.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:35:34.874 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:35:34.874 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:35:35.052 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:35:35.526 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:35:35.998 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:35:36.471 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:35:36.944 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:35:37.416 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:35:37.890 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:35:38.359 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:35:38.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:35:38.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:38.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:35:38.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:35:38.751 [WARNING] transceiver.py:257 (MS@172.18.152.22:6700) RX TRXD message (fn=1923 tn=5 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:35:38.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:35:38.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:35:38.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:35:38.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:38.771 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:35:38.771 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:35:38.771 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:35:38.771 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:35:38.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:35:38.820 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:35:38.821 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:35:38.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:38.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:38.830 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:35:39.303 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:35:39.776 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:35:40.247 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 03:35:40.717 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 03:35:41.188 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 03:35:41.662 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 03:35:42.134 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 03:35:42.607 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 03:35:43.077 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 03:35:43.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:35:43.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:43.219 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:35:43.219 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:35:43.236 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:35:43.236 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:35:43.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:35:43.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:43.238 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:35:43.238 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:35:43.238 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:35:43.238 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:35:43.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:35:43.287 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:35:43.288 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:35:43.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:43.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:43.543 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 03:35:44.014 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 03:35:44.488 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 03:35:44.960 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 03:35:45.433 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 03:35:45.904 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 03:35:46.378 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 03:35:46.848 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 03:35:47.321 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 03:35:47.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:35:47.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:47.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:35:47.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:35:47.492 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:35:47.492 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:35:47.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:35:47.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:47.495 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:35:47.495 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:35:47.495 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:35:47.495 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:35:47.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:35:47.548 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:35:47.549 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:35:47.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:47.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:47.792 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 03:35:48.263 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 03:35:48.736 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 03:35:49.209 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 03:35:49.682 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 03:35:50.152 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 03:35:50.623 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 03:35:51.097 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 03:35:51.570 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 03:35:52.042 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 03:35:52.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:35:52.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:52.094 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:35:52.094 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:35:52.111 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:35:52.111 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:35:52.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:35:52.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:52.113 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:35:52.113 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:35:52.113 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:35:52.113 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:35:52.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:35:52.165 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:35:52.165 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:35:52.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:52.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:52.513 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 03:35:52.984 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 03:35:53.456 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 03:35:53.929 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 03:35:54.402 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 03:35:54.873 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 03:35:55.343 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 03:35:55.817 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 03:35:56.290 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 03:35:56.764 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 03:35:56.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:35:56.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:56.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:35:56.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:35:56.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:35:56.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:35:56.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:35:56.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:56.993 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:35:56.993 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:35:56.993 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:35:56.993 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:35:57.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:35:57.045 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:35:57.045 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:35:57.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:57.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:35:57.233 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 03:35:57.704 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 03:35:58.176 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 03:35:58.647 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 03:35:59.120 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-08 03:35:59.591 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-08 03:36:00.063 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-08 03:36:00.534 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-08 03:36:01.008 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-08 03:36:01.481 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-08 03:36:01.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:36:01.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:01.841 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:36:01.841 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:36:01.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:36:01.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:36:01.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:36:01.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:01.859 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:36:01.859 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:36:01.859 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:36:01.859 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:36:01.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:36:01.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:36:01.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:36:01.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:36:01.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:01.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:01.952 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-08 03:36:02.423 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-08 03:36:02.893 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-08 03:36:03.364 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-08 03:36:03.837 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-08 03:36:04.310 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-08 03:36:04.783 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-08 03:36:05.257 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-08 03:36:05.729 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-08 03:36:06.196 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-08 03:36:06.667 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-08 03:36:06.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:36:06.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:06.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:36:06.711 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:36:06.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:36:06.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:36:06.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:36:06.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:06.730 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:36:06.730 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:36:06.730 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:36:06.730 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:36:06.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:36:06.779 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:36:06.780 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:36:06.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:06.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:07.138 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-08 03:36:07.609 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-08 03:36:08.080 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-08 03:36:08.553 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-08 03:36:09.025 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-08 03:36:09.496 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-08 03:36:09.969 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-08 03:36:10.441 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-08 03:36:10.912 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-08 03:36:11.383 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-08 03:36:11.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:36:11.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:11.579 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:36:11.579 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:36:11.595 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:36:11.595 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:36:11.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:36:11.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:11.598 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:36:11.598 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:36:11.598 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:36:11.598 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:36:11.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:36:11.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:36:11.652 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:36:11.653 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:36:11.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:11.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:11.852 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-08 03:36:12.320 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-08 03:36:12.785 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-08 03:36:13.257 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-02-08 03:36:13.730 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-02-08 03:36:14.203 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-02-08 03:36:14.676 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-02-08 03:36:15.148 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-02-08 03:36:15.621 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-02-08 03:36:16.094 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-02-08 03:36:16.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:36:16.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:16.317 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:36:16.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:36:16.334 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:36:16.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:36:16.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:36:16.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:16.337 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:36:16.337 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:36:16.337 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:36:16.337 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:36:16.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:36:16.391 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:36:16.391 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:36:16.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:16.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:16.567 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-02-08 03:36:17.040 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-02-08 03:36:17.512 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-02-08 03:36:17.983 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-02-08 03:36:18.457 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-02-08 03:36:18.929 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-02-08 03:36:19.402 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-02-08 03:36:19.874 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-02-08 03:36:20.347 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-02-08 03:36:20.820 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-02-08 03:36:21.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:36:21.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:21.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:36:21.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:36:21.156 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:36:21.156 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:36:21.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:36:21.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:21.158 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:36:21.158 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:36:21.158 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:36:21.158 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:36:21.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:36:21.211 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:36:21.212 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:36:21.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:21.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:21.293 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-02-08 03:36:21.765 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-02-08 03:36:22.238 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-02-08 03:36:22.711 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-02-08 03:36:23.184 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-02-08 03:36:23.656 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-02-08 03:36:24.128 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-02-08 03:36:24.598 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-02-08 03:36:25.069 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-02-08 03:36:25.542 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-02-08 03:36:26.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:36:26.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:26.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:36:26.015 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-02-08 03:36:26.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:36:26.015 [WARNING] transceiver.py:257 (MS@172.18.152.22:6700) RX TRXD message (fn=12141 tn=1 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:36:26.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:36:26.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:36:26.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:36:26.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:26.033 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:36:26.033 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:36:26.034 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:36:26.034 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:36:26.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:36:26.084 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:36:26.084 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:36:26.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:26.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:26.487 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-02-08 03:36:26.958 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-02-08 03:36:27.432 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-02-08 03:36:27.904 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-02-08 03:36:28.377 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-02-08 03:36:28.848 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-02-08 03:36:29.321 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-02-08 03:36:29.793 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-02-08 03:36:30.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:36:30.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:30.117 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:36:30.117 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:36:30.138 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:36:30.138 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:36:30.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:36:30.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:30.143 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:36:30.143 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:36:30.143 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:36:30.143 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:36:30.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:36:30.191 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:36:30.192 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:36:30.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:30.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:30.265 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-02-08 03:36:30.736 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-02-08 03:36:31.210 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-02-08 03:36:31.680 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-02-08 03:36:32.145 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-02-08 03:36:32.615 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-02-08 03:36:33.086 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-02-08 03:36:33.552 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-02-08 03:36:34.023 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-02-08 03:36:34.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:36:34.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:34.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:36:34.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:36:34.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:36:34.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:36:34.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:36:34.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:34.404 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:36:34.404 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:36:34.404 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:36:34.404 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:36:34.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:36:34.453 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:36:34.453 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:36:34.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:34.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:34.495 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-02-08 03:36:34.968 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-02-08 03:36:35.440 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-02-08 03:36:35.905 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-02-08 03:36:36.377 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-02-08 03:36:36.843 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-02-08 03:36:37.309 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-02-08 03:36:37.774 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-02-08 03:36:38.242 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-02-08 03:36:38.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:36:38.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:38.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:36:38.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:36:38.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:36:38.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:36:38.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:36:38.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:38.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:36:38.655 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:36:38.655 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:36:38.655 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:36:38.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:36:38.711 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-02-08 03:36:38.714 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:36:38.714 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:36:38.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:38.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:39.183 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-02-08 03:36:39.655 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-02-08 03:36:40.125 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-02-08 03:36:40.597 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-02-08 03:36:41.069 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-02-08 03:36:41.543 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-02-08 03:36:42.015 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-02-08 03:36:42.488 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-02-08 03:36:42.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:36:42.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:42.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:36:42.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:36:42.885 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:36:42.885 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:36:42.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:36:42.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:42.887 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:36:42.887 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:36:42.888 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:36:42.888 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:36:42.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:36:42.951 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:36:42.952 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:36:42.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:42.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:42.960 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-02-08 03:36:43.426 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-02-08 03:36:43.899 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-02-08 03:36:44.371 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-02-08 03:36:44.841 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-02-08 03:36:45.312 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-02-08 03:36:45.783 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-02-08 03:36:46.254 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-02-08 03:36:46.727 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-02-08 03:36:47.200 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-02-08 03:36:47.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:36:47.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:47.295 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:36:47.295 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:36:47.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:36:47.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:36:47.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:36:47.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:47.315 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:36:47.315 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:36:47.315 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:36:47.315 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:36:47.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:36:47.368 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:36:47.368 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:36:47.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:47.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:47.672 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-02-08 03:36:48.138 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-02-08 03:36:48.605 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-02-08 03:36:49.075 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-02-08 03:36:49.547 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-02-08 03:36:50.020 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-02-08 03:36:50.492 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-02-08 03:36:50.964 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-02-08 03:36:51.438 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-02-08 03:36:51.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:36:51.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:51.549 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:36:51.549 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:36:51.557 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:36:51.557 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:36:51.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:36:51.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:51.558 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:36:51.558 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:36:51.559 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:36:51.559 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:36:51.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:36:51.608 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:36:51.609 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:36:51.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:51.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:51.910 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-02-08 03:36:52.382 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-02-08 03:36:52.853 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-02-08 03:36:53.324 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-02-08 03:36:53.797 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-02-08 03:36:54.270 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-02-08 03:36:54.742 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-02-08 03:36:55.213 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-02-08 03:36:55.686 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-02-08 03:36:55.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:36:55.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:55.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:36:55.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:36:55.830 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:36:55.830 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:36:55.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:36:55.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:55.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:36:55.833 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:36:55.833 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:36:55.833 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:36:55.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:36:55.888 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:36:55.888 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:36:55.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:55.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:36:56.159 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-02-08 03:36:56.631 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-02-08 03:36:57.105 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-02-08 03:36:57.577 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-02-08 03:36:58.049 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-02-08 03:36:58.520 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-02-08 03:36:58.994 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-02-08 03:36:59.466 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-02-08 03:36:59.939 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-02-08 03:37:00.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:00.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:00.080 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:00.081 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:00.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:37:00.095 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:37:00.096 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:37:00.096 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:37:00.097 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:37:00.097 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:37:00.097 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:37:00.097 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:37:00.097 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:37:00.097 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:37:00.097 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:37:00.097 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=19517 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:37:00.097 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=19517 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:37:00.097 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=19517 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:37:00.097 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=19517 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:37:00.097 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=19518 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:37:00.097 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=19518 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:37:00.097 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=19518 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:37:00.097 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=19518 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:37:00.097 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=19518 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:37:00.097 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=19518 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:37:00.097 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=19518 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:37:00.097 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=19518 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:37:05.110 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:37:05.111 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:37:05.111 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:37:05.111 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:37:05.111 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:37:05.111 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:37:05.119 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:37:05.120 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:37:05.120 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:37:05.120 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:37:05.120 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:37:05.123 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:37:05.123 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:37:05.123 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:37:05.123 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:37:05.124 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:37:05.124 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:37:05.124 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:37:05.124 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:37:05.127 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:37:05.127 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:37:05.127 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:37:05.127 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:37:05.127 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:37:05.127 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:37:05.127 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:37:05.127 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:37:05.130 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:37:05.130 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:37:05.130 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:37:05.130 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:37:05.130 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:37:05.131 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:37:05.131 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:37:05.131 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:37:05.134 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:37:05.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:37:05.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:37:05.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:37:05.134 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:37:05.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:37:05.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:37:05.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:37:05.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:37:05.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:37:05.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:37:05.134 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:37:05.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:37:05.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:37:05.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:37:05.134 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:37:05.134 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:37:05.134 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:37:05.134 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:37:05.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:37:05.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:37:05.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:37:05.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:37:05.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:37:05.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:37:05.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:37:05.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:37:05.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:37:05.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:37:05.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:37:05.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:37:05.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:37:05.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:37:05.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:37:05.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:37:05.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:37:05.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:37:05.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:37:05.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:37:05.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:37:05.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:37:05.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:37:05.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:37:05.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:37:05.136 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:37:05.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:37:05.136 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:37:05.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:37:05.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:37:05.136 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:37:05.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:37:05.136 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:37:05.136 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:37:05.136 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:37:10.144 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:37:10.144 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:37:10.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:37:10.144 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:37:10.144 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:37:10.144 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:37:10.152 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:37:10.154 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:37:10.154 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:37:10.154 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:37:10.154 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:37:10.157 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:37:10.158 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:37:10.158 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:37:10.158 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:37:10.158 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:37:10.158 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:37:10.159 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:37:10.159 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:37:10.161 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:37:10.161 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:37:10.161 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:37:10.161 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:37:10.162 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:37:10.162 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:37:10.162 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:37:10.162 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:37:10.164 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:37:10.164 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:37:10.164 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:37:10.164 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:37:10.164 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:37:10.164 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:37:10.164 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:37:10.164 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:37:10.169 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:37:10.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:37:10.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:37:10.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:37:10.169 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:37:10.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:37:10.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:37:10.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:37:10.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:37:10.170 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:37:10.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:37:10.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:37:10.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:37:10.170 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:37:10.170 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:37:10.170 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:37:10.170 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:37:10.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:37:10.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:37:10.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:37:10.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:37:10.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:37:10.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:37:10.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:37:10.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:37:10.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:37:10.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:37:10.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:37:10.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:37:10.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:37:10.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:37:10.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:37:10.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:37:10.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:37:10.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:37:10.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:37:10.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:37:10.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:37:10.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:37:10.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:37:10.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:37:10.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:37:10.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:37:10.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:37:10.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:37:10.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:37:10.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:37:10.175 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:37:10.653 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:37:10.701 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:37:10.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:10.705 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:37:10.706 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:37:10.731 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:10.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:10.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:37:10.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:10.737 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:10.737 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:10.737 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:37:10.737 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:37:10.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:10.751 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:10.752 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:10.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:10.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:11.126 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:37:11.174 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:37:11.174 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:37:11.174 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:37:11.176 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:37:11.597 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:37:11.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:11.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:11.800 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:11.800 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:11.818 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:11.818 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:11.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:37:11.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:11.821 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:11.821 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:11.821 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:37:11.821 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:37:11.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:11.871 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:11.871 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:11.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:11.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:12.070 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:37:12.175 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:37:12.176 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:37:12.176 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:37:12.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:37:12.539 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:37:13.012 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:37:13.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:37:13.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:37:13.177 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:37:13.179 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:37:13.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:13.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:13.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:13.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:13.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:13.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:13.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:37:13.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:13.253 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:13.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:13.253 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:37:13.253 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:37:13.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:13.303 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:13.303 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:13.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:13.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:13.484 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:37:13.956 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:37:14.178 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:37:14.178 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:37:14.178 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:37:14.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:37:14.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:14.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:14.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:14.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:14.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:14.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:14.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:37:14.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:14.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:14.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:14.416 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:37:14.416 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:37:14.427 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:37:14.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:14.464 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:14.464 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:14.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:14.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:14.893 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:37:15.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:37:15.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:37:15.179 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:37:15.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:37:15.359 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:37:15.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:15.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:15.818 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:15.818 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:15.825 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:37:15.837 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:15.837 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:15.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:37:15.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:15.840 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:15.840 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:15.840 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:37:15.840 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:37:15.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:15.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:15.895 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:15.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:15.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:16.294 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:37:16.766 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:37:16.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:16.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:16.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:16.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:16.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:16.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:16.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:37:16.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:16.910 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:16.910 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:16.910 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:37:16.910 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:37:16.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:16.961 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:16.961 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:16.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:16.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:17.234 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:37:17.705 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:37:17.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:17.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:17.904 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:17.904 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:17.919 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:17.919 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:17.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:37:17.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:17.921 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:17.921 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:17.921 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:37:17.921 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:37:17.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:17.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:17.971 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:17.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:17.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:18.176 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:37:18.650 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:37:18.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:18.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:18.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:18.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:18.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:18.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:18.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:37:18.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:18.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:18.943 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:18.943 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:37:18.943 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:37:18.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:37:18.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:18.990 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:18.991 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:18.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:18.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:19.122 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:37:19.594 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:37:19.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:19.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:19.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:19.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:19.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:19.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:19.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:37:19.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:19.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:19.972 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:19.972 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:37:19.972 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:37:20.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:20.021 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:20.021 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:20.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:20.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:20.065 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:37:20.535 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 03:37:20.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:20.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:20.971 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:20.971 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:20.989 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:20.989 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:20.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:37:20.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:20.992 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:20.992 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:20.992 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:37:20.992 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:37:21.001 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 03:37:21.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:37:21.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:21.046 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:21.046 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:21.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:21.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:21.473 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 03:37:21.943 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 03:37:22.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:22.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:22.347 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:22.347 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:22.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:22.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:22.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:37:22.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:22.367 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:22.367 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:22.367 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:37:22.367 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:37:22.416 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 03:37:22.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:22.423 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:22.424 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:22.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:22.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:22.881 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 03:37:23.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:23.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:23.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:23.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:23.311 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:23.311 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:23.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:37:23.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:23.314 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:23.314 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:23.314 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:37:23.314 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:37:23.346 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 03:37:23.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:23.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:23.363 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:23.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:23.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:23.812 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 03:37:24.277 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 03:37:24.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:24.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:24.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:24.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:24.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:24.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:24.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:37:24.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:24.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:24.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:24.329 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:37:24.329 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:37:24.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:24.380 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:24.380 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:24.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:24.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:24.744 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 03:37:25.211 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 03:37:25.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:25.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:25.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:25.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:25.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:25.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:25.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:37:25.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:25.391 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:25.391 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:25.391 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:37:25.391 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:37:25.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:25.453 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:25.453 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:25.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:25.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:25.677 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 03:37:26.148 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 03:37:26.622 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 03:37:26.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:26.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:26.796 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:26.797 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:26.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:26.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:26.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:37:26.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:26.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:26.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:26.817 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:37:26.817 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:37:26.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:26.868 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:26.868 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:26.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:26.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:27.094 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 03:37:27.566 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 03:37:28.037 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 03:37:28.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:28.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:28.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:28.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:28.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:28.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:28.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:37:28.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:28.248 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:28.248 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:28.248 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:37:28.248 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:37:28.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:28.300 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:28.300 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:28.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:28.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:28.507 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 03:37:28.978 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 03:37:29.452 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 03:37:29.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:29.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:29.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:29.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:29.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:29.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:29.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:37:29.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:29.683 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:29.683 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:29.683 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:37:29.683 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:37:29.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:29.741 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:29.741 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:29.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:29.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:29.924 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 03:37:30.396 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 03:37:30.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:30.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:30.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:30.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:30.811 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:30.811 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:30.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:37:30.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:30.814 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:30.814 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:30.814 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:37:30.814 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:37:30.868 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 03:37:30.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:30.879 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:30.880 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:30.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:30.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:31.338 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 03:37:31.809 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 03:37:32.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:32.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:32.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:32.222 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:32.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:32.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:32.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:37:32.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:32.240 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:32.240 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:32.240 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:37:32.240 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:37:32.274 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 03:37:32.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:32.291 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:32.291 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:32.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:32.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:32.746 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 03:37:33.217 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 03:37:33.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:33.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:33.647 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:33.647 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:33.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:33.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:33.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:37:33.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:33.666 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:33.667 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:33.667 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:37:33.667 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:37:33.690 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 03:37:33.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:33.715 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:33.716 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:33.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:33.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:34.163 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 03:37:34.635 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 03:37:35.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:35.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:35.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:35.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:35.098 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:37:35.098 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:37:35.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:37:35.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:37:35.102 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:37:35.102 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:37:35.102 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:37:35.102 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:37:35.102 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:37:35.102 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:37:35.102 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:37:35.102 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5406 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:37:35.102 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5406 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:37:35.102 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5407 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:37:35.102 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5407 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:37:35.102 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5407 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:37:35.102 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5407 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:37:35.102 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5407 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:37:35.102 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5407 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:37:35.102 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5407 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:37:35.102 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5407 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:37:40.114 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:37:40.114 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:37:40.114 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:37:40.114 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:37:40.114 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:37:40.114 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:37:40.125 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:37:40.126 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:37:40.126 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:37:40.126 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:37:40.126 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:37:40.129 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:37:40.129 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:37:40.129 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:37:40.129 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:37:40.130 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:37:40.130 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:37:40.130 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:37:40.130 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:37:40.132 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:37:40.132 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:37:40.133 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:37:40.133 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:37:40.133 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:37:40.133 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:37:40.133 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:37:40.133 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:37:40.135 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:37:40.136 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:37:40.136 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:37:40.136 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:37:40.136 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:37:40.136 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:37:40.136 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:37:40.136 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:37:40.140 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:37:40.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:37:40.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:37:40.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:37:40.140 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:37:40.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:37:40.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:37:40.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:37:40.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:37:40.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:37:40.140 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:37:40.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:37:40.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:37:40.140 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:37:40.140 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:37:40.140 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:37:40.141 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:37:40.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:37:40.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:37:40.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:37:40.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:37:40.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:37:40.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:37:40.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:37:40.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:37:40.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:37:40.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:37:40.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:37:40.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:37:40.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:37:40.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:37:40.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:37:40.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:37:40.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:37:40.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:37:40.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:37:40.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:37:40.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:37:40.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:37:40.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:37:40.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:37:40.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:37:40.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:37:40.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:37:40.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:37:40.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:37:40.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:37:40.145 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:37:40.617 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:37:40.653 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:37:40.654 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:37:40.654 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:37:40.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:40.660 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:40.660 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:40.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:37:40.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:40.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:40.663 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:40.663 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:37:40.663 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:37:40.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:37:40.718 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:40.718 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:40.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:40.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:41.090 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:37:41.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:37:41.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:37:41.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:37:41.144 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:37:41.561 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:37:42.035 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:37:42.145 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:37:42.146 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:37:42.146 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:37:42.146 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:37:42.507 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:37:42.980 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:37:43.146 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:37:43.146 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:37:43.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:37:43.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:37:43.451 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:37:43.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:43.925 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:37:44.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:37:44.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:37:44.148 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:37:44.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:37:44.397 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:37:44.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:44.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:44.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:44.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:44.471 [WARNING] transceiver.py:257 (MS@172.18.152.22:6700) RX TRXD message (fn=936 tn=5 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:37:44.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:37:44.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:44.472 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:44.472 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:44.472 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:37:44.472 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:37:44.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:37:44.490 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:44.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:44.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:44.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:44.868 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:37:45.149 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:37:45.149 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:37:45.149 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:37:45.150 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:37:45.342 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:37:45.814 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:37:46.287 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:37:46.756 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:37:47.225 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:37:47.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:47.699 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:37:48.171 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:37:48.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:48.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:48.314 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:48.314 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:48.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:48.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:48.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:37:48.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:48.324 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:48.324 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:48.324 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:37:48.324 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:37:48.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:37:48.372 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:48.373 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:48.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:48.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:48.643 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:37:49.112 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:37:49.578 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:37:50.049 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:37:50.520 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 03:37:50.990 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 03:37:51.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:51.462 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 03:37:51.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:51.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:51.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:51.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:51.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:37:51.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:51.916 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:51.916 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:51.916 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:37:51.916 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:37:51.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:37:51.933 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 03:37:51.933 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:51.934 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:51.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:51.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:52.405 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 03:37:52.878 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 03:37:53.351 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 03:37:53.824 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 03:37:54.295 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 03:37:54.768 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 03:37:54.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:55.240 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 03:37:55.711 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 03:37:55.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:55.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:55.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:55.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:55.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:55.778 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:55.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:37:55.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:55.780 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:55.780 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:55.780 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:37:55.780 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:37:55.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:37:55.830 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:55.830 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:55.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:55.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:56.181 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 03:37:56.652 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 03:37:57.125 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 03:37:57.593 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 03:37:58.058 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 03:37:58.531 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 03:37:58.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:59.002 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 03:37:59.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:37:59.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:59.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:37:59.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:37:59.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:37:59.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:59.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:59.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:59.438 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:37:59.438 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:37:59.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:37:59.473 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:37:59.473 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:37:59.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:59.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:37:59.474 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 03:37:59.945 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 03:38:00.411 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 03:38:00.877 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 03:38:01.342 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 03:38:01.808 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 03:38:02.273 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 03:38:02.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:38:02.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:38:02.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:02.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:38:02.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:38:02.731 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:38:02.731 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:38:02.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:38:02.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:02.733 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:38:02.734 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:38:02.734 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:38:02.734 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:38:02.738 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 03:38:02.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:38:02.786 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:38:02.786 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:38:02.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:02.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:03.204 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 03:38:03.669 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 03:38:04.138 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 03:38:04.612 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 03:38:05.085 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 03:38:05.556 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 03:38:05.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:38:06.028 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 03:38:06.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:38:06.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:06.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:38:06.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:38:06.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:38:06.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:06.421 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:38:06.421 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:38:06.421 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:38:06.422 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:38:06.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:38:06.448 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:38:06.448 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:38:06.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:06.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:06.499 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 03:38:06.971 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 03:38:07.444 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 03:38:07.917 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 03:38:08.388 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 03:38:08.861 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 03:38:09.334 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-08 03:38:09.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:38:09.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:38:09.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:09.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:38:09.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:38:09.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:38:09.742 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:38:09.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:38:09.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:38:09.748 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:38:09.749 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:38:09.749 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:38:09.749 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:38:09.749 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:38:09.749 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:38:09.749 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:38:09.750 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6414 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:38:09.750 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6414 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:38:09.750 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6415 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:38:09.750 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6415 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:38:09.750 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6415 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:38:09.750 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6415 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:38:09.750 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6415 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:38:09.750 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6415 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:38:09.750 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6415 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:38:09.751 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6415 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:38:09.751 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6416 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:38:09.751 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6416 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:38:09.751 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6416 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:38:09.751 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6416 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:38:09.751 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6416 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:38:09.751 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6416 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:38:09.751 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6416 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:38:09.751 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6416 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:38:14.757 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:38:14.757 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:38:14.757 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:38:14.757 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:38:14.757 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:38:14.757 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:38:14.768 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:38:14.769 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:38:14.769 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:38:14.770 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:38:14.770 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:38:14.772 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:38:14.772 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:38:14.773 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:38:14.773 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:38:14.773 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:38:14.773 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:38:14.773 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:38:14.773 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:38:14.775 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:38:14.775 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:38:14.775 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:38:14.775 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:38:14.775 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:38:14.775 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:38:14.776 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:38:14.776 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:38:14.778 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:38:14.778 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:38:14.778 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:38:14.778 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:38:14.778 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:38:14.778 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:38:14.778 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:38:14.778 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:38:14.781 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:38:14.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:38:14.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:38:14.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:38:14.781 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:38:14.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:38:14.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:38:14.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:38:14.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:38:14.781 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:38:14.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:38:14.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:38:14.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:38:14.781 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:38:14.781 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:38:14.781 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:38:14.781 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:38:14.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:38:14.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:38:14.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:38:14.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:38:14.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:38:14.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:38:14.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:38:14.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:38:14.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:38:14.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:38:14.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:38:14.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:38:14.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:38:14.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:38:14.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:38:14.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:38:14.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:38:14.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:38:14.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:38:14.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:38:14.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:38:14.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:38:14.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:38:14.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:38:14.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:38:14.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:38:14.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:38:14.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:38:14.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:38:14.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:38:14.786 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:38:15.251 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:38:15.300 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:38:15.301 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:38:15.302 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:38:15.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:38:15.319 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:38:15.319 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:38:15.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:38:15.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:15.324 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:38:15.325 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:38:15.325 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:38:15.325 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:38:15.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:38:15.350 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:38:15.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:38:15.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:15.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:15.718 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:38:15.784 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:38:15.784 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:38:15.785 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:38:15.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:38:16.190 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:38:16.661 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:38:16.785 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:38:16.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:38:16.786 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:38:16.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:38:17.130 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:38:17.595 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:38:17.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:38:17.787 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:38:17.787 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:38:17.787 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:38:18.064 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:38:18.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:38:18.538 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:38:18.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:38:18.787 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:38:18.788 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:38:18.788 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:38:19.011 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:38:19.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:38:19.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:19.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:38:19.086 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:38:19.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:38:19.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:19.086 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:38:19.086 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:38:19.086 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:38:19.086 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:38:19.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:38:19.104 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:38:19.105 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:38:19.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:19.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:19.482 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:38:19.789 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:38:19.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:38:19.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:38:19.789 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:38:19.952 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:38:20.423 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:38:20.893 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:38:21.359 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:38:21.826 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:38:22.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:38:22.294 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:38:22.768 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:38:22.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:38:22.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:22.918 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:38:22.918 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:38:22.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:38:22.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:22.920 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:38:22.921 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:38:22.921 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:38:22.921 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:38:22.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:38:22.954 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:38:22.954 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:38:22.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:22.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:23.240 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:38:23.711 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:38:24.178 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:38:24.652 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:38:25.124 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 03:38:25.597 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 03:38:25.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:38:26.070 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 03:38:26.543 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 03:38:26.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:38:26.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:26.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:38:26.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:38:26.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:38:26.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:26.767 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:38:26.767 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:38:26.767 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:38:26.767 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:38:26.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:38:26.779 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:38:26.779 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:38:26.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:26.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:27.014 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 03:38:27.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:38:27.484 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 03:38:27.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:38:27.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:27.726 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:38:27.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:38:27.745 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:38:27.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:38:27.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:38:27.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:27.747 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:38:27.747 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:38:27.747 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:38:27.747 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:38:27.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:38:27.793 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:38:27.794 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:38:27.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:27.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:27.955 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 03:38:28.429 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 03:38:28.902 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 03:38:29.374 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 03:38:29.847 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 03:38:30.319 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 03:38:30.792 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 03:38:30.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:38:31.265 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 03:38:31.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:38:31.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:31.341 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:38:31.341 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:38:31.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:38:31.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:31.342 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:38:31.342 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:38:31.342 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:38:31.342 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:38:31.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:38:31.359 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:38:31.359 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:38:31.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:31.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:31.737 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 03:38:32.210 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 03:38:32.684 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 03:38:33.156 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 03:38:33.627 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 03:38:34.101 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 03:38:34.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:38:34.573 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 03:38:35.045 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 03:38:35.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:38:35.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:35.194 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:38:35.194 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:38:35.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:38:35.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:35.196 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:38:35.197 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:38:35.197 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:38:35.197 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:38:35.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:38:35.230 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:38:35.231 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:38:35.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:35.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:35.518 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 03:38:35.990 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 03:38:36.463 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 03:38:36.930 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 03:38:37.395 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 03:38:37.861 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 03:38:38.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:38:38.327 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 03:38:38.793 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 03:38:39.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:38:39.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:39.016 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:38:39.016 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:38:39.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:38:39.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:39.018 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:38:39.018 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:38:39.018 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:38:39.018 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:38:39.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:38:39.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:38:39.029 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:38:39.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:39.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:39.261 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 03:38:39.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:38:39.733 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 03:38:39.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:38:39.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:39.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:38:39.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:38:39.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:38:39.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:38:39.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:38:39.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:39.996 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:38:39.996 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:38:39.996 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:38:39.996 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:38:40.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:38:40.048 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:38:40.049 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:38:40.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:40.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:40.203 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 03:38:40.676 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 03:38:41.149 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 03:38:41.620 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 03:38:42.090 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 03:38:42.555 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 03:38:43.019 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 03:38:43.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:38:43.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:38:43.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:43.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:38:43.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:38:43.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:38:43.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:43.458 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:38:43.458 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:38:43.458 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:38:43.458 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:38:43.484 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 03:38:43.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:38:43.490 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:38:43.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:38:43.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:43.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:43.950 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-08 03:38:44.417 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-08 03:38:44.884 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-08 03:38:45.349 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-08 03:38:45.814 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-08 03:38:46.278 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-08 03:38:46.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:38:46.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:38:46.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:46.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:38:46.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:38:46.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:38:46.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:46.716 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:38:46.716 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:38:46.717 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:38:46.717 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:38:46.743 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-08 03:38:46.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:38:46.749 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:38:46.750 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:38:46.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:46.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:47.208 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-08 03:38:47.680 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-08 03:38:48.148 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-08 03:38:48.613 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-08 03:38:49.082 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-08 03:38:49.553 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-08 03:38:49.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:38:49.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:38:49.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:49.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:38:49.993 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:38:49.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:38:49.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:49.993 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:38:49.993 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:38:49.993 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:38:49.993 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:38:50.021 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-08 03:38:50.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:38:50.025 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:38:50.026 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:38:50.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:50.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:50.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:38:50.490 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-08 03:38:50.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:38:50.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:50.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:38:50.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:38:50.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:38:50.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:38:50.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:38:50.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:50.947 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:38:50.947 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:38:50.947 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:38:50.947 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:38:50.961 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-08 03:38:50.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:38:50.995 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:38:50.995 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:38:50.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:50.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:51.429 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-08 03:38:51.898 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-08 03:38:52.367 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-08 03:38:52.835 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-08 03:38:53.306 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-08 03:38:53.779 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-08 03:38:54.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:38:54.252 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-08 03:38:54.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:38:54.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:54.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:38:54.649 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:38:54.650 [WARNING] transceiver.py:257 (MS@172.18.152.22:6700) RX TRXD message (fn=8656 tn=0 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:38:54.650 [WARNING] transceiver.py:257 (MS@172.18.152.22:6700) RX TRXD message (fn=8656 tn=1 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:38:54.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:38:54.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:54.650 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:38:54.650 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:38:54.650 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:38:54.651 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:38:54.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:38:54.674 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:38:54.674 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:38:54.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:54.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:54.724 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-08 03:38:55.197 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-08 03:38:55.670 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-08 03:38:56.136 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-08 03:38:56.608 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-08 03:38:57.079 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-08 03:38:57.553 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-08 03:38:57.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:38:57.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:38:57.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:57.943 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:38:57.943 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:38:57.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:38:57.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:57.944 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:38:57.944 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:38:57.944 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:38:57.944 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:38:57.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:38:57.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:38:57.972 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:38:57.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:57.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:38:58.025 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-02-08 03:38:58.498 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-02-08 03:38:58.971 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-02-08 03:38:59.444 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-02-08 03:38:59.916 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-02-08 03:39:00.387 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-02-08 03:39:00.859 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-02-08 03:39:00.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:39:01.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:39:01.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:39:01.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:39:01.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:39:01.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:39:01.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:39:01.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:39:01.252 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:39:01.253 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:39:01.253 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:39:01.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:39:01.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:39:01.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:39:01.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:39:01.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:39:01.332 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-02-08 03:39:01.805 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-02-08 03:39:01.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:39:02.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:39:02.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:39:02.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:39:02.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:39:02.213 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:39:02.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:39:02.213 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:39:02.213 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:39:02.219 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:39:02.220 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:39:02.220 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:39:02.220 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:39:02.221 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:39:02.221 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:39:02.221 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:39:02.221 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=10290 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:02.221 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=10291 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:02.221 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=10291 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:02.221 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=10291 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:02.221 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=10291 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:02.222 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=10291 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:02.222 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=10291 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:02.222 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=10291 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:02.222 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=10291 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:02.222 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=10292 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:02.222 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=10292 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:02.222 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=10292 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:02.222 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=10292 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:02.222 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=10292 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:02.222 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=10292 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:02.222 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=10292 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:02.222 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=10292 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:07.228 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:39:07.228 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:39:07.228 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:39:07.229 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:39:07.229 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:39:07.229 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:39:07.235 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:39:07.235 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:39:07.235 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:39:07.236 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:39:07.236 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:39:07.237 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:39:07.237 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:39:07.237 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:39:07.237 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:39:07.237 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:39:07.237 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:39:07.237 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:39:07.237 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:39:07.239 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:39:07.239 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:39:07.239 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:39:07.239 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:39:07.239 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:39:07.239 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:39:07.239 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:39:07.239 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:39:07.240 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:39:07.240 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:39:07.240 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:39:07.241 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:39:07.241 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:39:07.241 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:39:07.241 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:39:07.241 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:39:07.243 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:39:07.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:39:07.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:39:07.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:39:07.243 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:39:07.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:39:07.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:39:07.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:39:07.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:39:07.243 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:39:07.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:39:07.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:39:07.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:39:07.243 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:39:07.243 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:39:07.243 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:39:07.243 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:39:07.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:39:07.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:39:07.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:39:07.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:39:07.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:39:07.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:39:07.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:39:07.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:39:07.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:39:07.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:39:07.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:39:07.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:39:07.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:39:07.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:39:07.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:39:07.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:39:07.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:39:07.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:39:07.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:39:07.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:39:07.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:39:07.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:39:07.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:39:07.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:39:07.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:39:07.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:39:07.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:39:07.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:39:07.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:39:07.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:39:07.248 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:39:07.721 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:39:07.757 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:39:07.758 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:39:07.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:39:07.759 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:39:07.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:39:07.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:39:07.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:39:07.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:39:07.763 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:39:07.764 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:39:07.764 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:39:07.764 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:39:08.187 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:39:08.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:39:08.246 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:39:08.246 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:39:08.246 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:39:08.655 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:39:09.125 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:39:09.247 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:39:09.247 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:39:09.247 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:39:09.247 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:39:09.591 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:39:10.060 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:39:10.247 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:39:10.247 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:39:10.248 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:39:10.248 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:39:10.528 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:39:10.994 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:39:11.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:39:11.249 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:39:11.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:39:11.249 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:39:11.459 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:39:11.926 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:39:12.249 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:39:12.249 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:39:12.250 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:39:12.250 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:39:12.393 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:39:12.862 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:39:13.329 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:39:13.799 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:39:14.263 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:39:14.728 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:39:15.199 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:39:15.669 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:39:16.136 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:39:16.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:39:16.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:39:16.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:39:16.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:39:16.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:39:16.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:39:16.514 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:39:16.514 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:39:16.515 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:39:16.515 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:39:16.515 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:39:16.515 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:39:16.515 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:39:16.515 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2020 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:16.516 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2020 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:16.516 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2020 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:16.516 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2020 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:16.516 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2020 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:16.516 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2021 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:16.516 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2021 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:16.516 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2021 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:16.516 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2021 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:16.516 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2021 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:16.516 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2021 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:16.517 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2021 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:16.517 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2021 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:16.517 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2022 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:16.517 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2022 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:16.517 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2022 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:16.517 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2022 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:16.517 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2022 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:16.517 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2022 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:16.517 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2022 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:16.517 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2022 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:21.525 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:39:21.525 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:39:21.525 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:39:21.525 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:39:21.525 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:39:21.525 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:39:21.531 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:39:21.532 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:39:21.532 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:39:21.532 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:39:21.532 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:39:21.533 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:39:21.533 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:39:21.533 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:39:21.533 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:39:21.533 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:39:21.533 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:39:21.533 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:39:21.533 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:39:21.535 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:39:21.535 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:39:21.535 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:39:21.535 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:39:21.535 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:39:21.535 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:39:21.535 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:39:21.535 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:39:21.537 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:39:21.537 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:39:21.537 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:39:21.537 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:39:21.537 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:39:21.537 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:39:21.537 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:39:21.537 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:39:21.539 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:39:21.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:39:21.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:39:21.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:39:21.539 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:39:21.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:39:21.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:39:21.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:39:21.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:39:21.540 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:39:21.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:39:21.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:39:21.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:39:21.540 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:39:21.540 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:39:21.540 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:39:21.540 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:39:21.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:39:21.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:39:21.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:39:21.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:39:21.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:39:21.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:39:21.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:39:21.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:39:21.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:39:21.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:39:21.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:39:21.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:39:21.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:39:21.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:39:21.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:39:21.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:39:21.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:39:21.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:39:21.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:39:21.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:39:21.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:39:21.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:39:21.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:39:21.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:39:21.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:39:21.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:39:21.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:39:21.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:39:21.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:39:21.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:39:21.544 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:39:22.007 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:39:22.061 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:39:22.062 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:39:22.062 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:39:22.064 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:39:22.064 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:39:22.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:39:22.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:39:22.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:39:22.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:39:22.064 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:39:22.065 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:39:22.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:39:22.473 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:39:22.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:39:22.542 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:39:22.543 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:39:22.543 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:39:22.941 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:39:23.407 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:39:23.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:39:23.544 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:39:23.544 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:39:23.544 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:39:23.873 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:39:24.339 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:39:24.545 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:39:24.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:39:24.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:39:24.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:39:24.811 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:39:25.281 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:39:25.546 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:39:25.547 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:39:25.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:39:25.547 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:39:25.750 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:39:26.216 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:39:26.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:39:26.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:39:26.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:39:26.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:39:26.683 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:39:27.150 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:39:27.621 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:39:28.091 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:39:28.558 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:39:29.024 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:39:29.495 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:39:29.962 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:39:30.432 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:39:30.871 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:39:30.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:39:30.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:39:30.879 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:39:30.879 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:39:30.879 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:39:30.880 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:39:30.880 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:39:30.880 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:39:30.880 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:39:30.880 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:39:30.880 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:39:30.880 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:39:30.880 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2036 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:30.880 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2036 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:30.880 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2036 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:30.880 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2036 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:30.880 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2037 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:30.880 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2037 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:30.880 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2037 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:30.880 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2037 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:30.880 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2037 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:30.880 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2037 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:30.880 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2037 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:30.880 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2037 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:39:35.893 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:39:35.893 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:39:35.894 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:39:35.894 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:39:35.894 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:39:35.894 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:39:35.901 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:39:35.902 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:39:35.902 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:39:35.903 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:39:35.903 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:39:35.907 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:39:35.907 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:39:35.907 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:39:35.907 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:39:35.907 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:39:35.908 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:39:35.908 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:39:35.908 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:39:35.911 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:39:35.911 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:39:35.911 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:39:35.911 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:39:35.911 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:39:35.912 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:39:35.912 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:39:35.912 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:39:35.914 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:39:35.914 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:39:35.914 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:39:35.914 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:39:35.914 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:39:35.914 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:39:35.914 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:39:35.914 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:39:35.918 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:39:35.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:39:35.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:39:35.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:39:35.919 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:39:35.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:39:35.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:39:35.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:39:35.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:39:35.919 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:39:35.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:39:35.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:39:35.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:39:35.919 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:39:35.919 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:39:35.919 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:39:35.919 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:39:35.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:39:35.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:39:35.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:39:35.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:39:35.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:39:35.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:39:35.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:39:35.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:39:35.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:39:35.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:39:35.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:39:35.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:39:35.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:39:35.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:39:35.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:39:35.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:39:35.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:39:35.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:39:35.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:39:35.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:39:35.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:39:35.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:39:35.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:39:35.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:39:35.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:39:35.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:39:35.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:39:35.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:39:35.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:39:35.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:39:35.924 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:39:36.389 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:39:36.447 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:39:36.449 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:39:36.451 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:39:36.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:39:36.454 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:39:36.454 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:39:36.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:39:36.852 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:39:36.922 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:39:36.922 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:39:36.922 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:39:36.923 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:39:37.316 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:39:37.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:39:37.456 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:39:37.456 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:39:37.456 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:39:37.456 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:39:37.785 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:39:37.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:39:37.923 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:39:37.923 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:39:37.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:39:38.255 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:39:38.727 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:39:38.924 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:39:38.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:39:38.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:39:38.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:39:39.197 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:39:39.668 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:39:39.926 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:39:39.926 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:39:39.927 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:39:39.931 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:39:40.139 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:39:40.610 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:39:40.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:39:40.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:39:40.928 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:39:40.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:39:41.080 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:39:41.551 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:39:42.022 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:39:42.495 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:39:42.968 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:39:43.440 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:39:43.911 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:39:44.382 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:39:44.852 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:39:45.323 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:39:45.796 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:39:46.262 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 03:39:46.726 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 03:39:47.191 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 03:39:47.660 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 03:39:48.133 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 03:39:48.605 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 03:39:49.076 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 03:39:49.318 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:39:49.318 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:39:49.322 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:39:49.322 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:39:49.322 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:39:49.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:39:49.323 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:39:49.323 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:39:49.323 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:39:49.323 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:39:49.323 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:39:49.323 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:39:49.323 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:39:54.330 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:39:54.330 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:39:54.330 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:39:54.330 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:39:54.330 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:39:54.330 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:39:54.339 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:39:54.340 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:39:54.340 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:39:54.340 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:39:54.340 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:39:54.343 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:39:54.343 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:39:54.343 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:39:54.343 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:39:54.344 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:39:54.344 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:39:54.344 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:39:54.344 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:39:54.347 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:39:54.347 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:39:54.347 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:39:54.348 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:39:54.348 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:39:54.348 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:39:54.348 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:39:54.348 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:39:54.352 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:39:54.352 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:39:54.352 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:39:54.352 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:39:54.352 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:39:54.352 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:39:54.352 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:39:54.352 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:39:54.357 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:39:54.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:39:54.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:39:54.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:39:54.358 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:39:54.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:39:54.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:39:54.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:39:54.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:39:54.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:39:54.358 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:39:54.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:39:54.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:39:54.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:39:54.358 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:39:54.358 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:39:54.358 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:39:54.358 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:39:54.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:39:54.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:39:54.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:39:54.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:39:54.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:39:54.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:39:54.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:39:54.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:39:54.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:39:54.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:39:54.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:39:54.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:39:54.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:39:54.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:39:54.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:39:54.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:39:54.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:39:54.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:39:54.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:39:54.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:39:54.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:39:54.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:39:54.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:39:54.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:39:54.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:39:54.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:39:54.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:39:54.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:39:54.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:39:54.363 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:39:54.841 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:39:54.887 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:39:54.889 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:39:54.892 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:39:54.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:39:54.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:39:54.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:39:54.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:39:54.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:39:54.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:39:54.895 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:39:54.895 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:39:54.895 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:39:55.313 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:39:55.362 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:39:55.363 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:39:55.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:39:55.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:39:55.784 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:39:55.931 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:39:56.258 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:39:56.364 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:39:56.364 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:39:56.364 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:39:56.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:39:56.456 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:39:56.730 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:39:56.979 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:39:57.202 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:39:57.365 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:39:57.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:39:57.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:39:57.365 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:39:57.667 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:39:58.129 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:39:58.365 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:39:58.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:39:58.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:39:58.365 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:39:58.594 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:39:58.993 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:39:59.067 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:39:59.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:39:59.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:39:59.367 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:39:59.367 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:39:59.504 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:39:59.539 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:40:00.010 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:40:00.022 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:40:00.483 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:40:00.539 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:40:00.956 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:40:01.428 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:40:01.899 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:40:02.372 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:40:02.546 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:40:02.845 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:40:03.317 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:40:03.788 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:40:04.259 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:40:04.558 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:04.558 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:04.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:40:04.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:40:04.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:40:04.567 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:40:04.570 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:40:04.570 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:40:04.570 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:40:04.570 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:40:04.570 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:40:04.570 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:40:04.570 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:40:04.570 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2210 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:40:04.570 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2210 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:40:04.570 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2210 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:40:04.570 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2210 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:40:04.570 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2210 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:40:04.570 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2211 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:40:04.570 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2211 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:40:04.570 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2211 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:40:04.570 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2211 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:40:04.570 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2211 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:40:04.570 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2211 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:40:04.570 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2211 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:40:04.570 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2211 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:40:09.581 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:40:09.581 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:40:09.582 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:40:09.582 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:40:09.582 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:40:09.582 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:40:09.595 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:40:09.596 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:40:09.596 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:40:09.596 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:40:09.596 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:40:09.599 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:40:09.599 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:40:09.600 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:40:09.600 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:40:09.600 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:40:09.600 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:40:09.600 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:40:09.600 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:40:09.603 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:40:09.603 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:40:09.603 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:40:09.603 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:40:09.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:40:09.603 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:40:09.603 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:40:09.603 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:40:09.606 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:40:09.606 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:40:09.606 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:40:09.606 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:40:09.606 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:40:09.606 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:40:09.606 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:40:09.606 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:40:09.610 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:40:09.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:40:09.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:40:09.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:40:09.610 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:40:09.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:40:09.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:40:09.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:40:09.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:40:09.610 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:40:09.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:09.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:09.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:09.610 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:40:09.610 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:40:09.610 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:40:09.610 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:40:09.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:09.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:09.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:09.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:40:09.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:09.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:09.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:09.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:09.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:09.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:09.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:09.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:09.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:09.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:09.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:09.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:09.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:09.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:09.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:09.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:09.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:09.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:09.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:09.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:09.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:09.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:09.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:09.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:09.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:09.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:09.615 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:40:10.088 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:40:10.135 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:40:10.137 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:40:10.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:10.138 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:40:10.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:10.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:10.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:40:10.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:10.158 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:10.158 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:10.159 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:40:10.159 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:40:10.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:40:10.190 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:10.190 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:10.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:10.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:10.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:10.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:10.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:10.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:10.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:10.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:10.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:10.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:40:10.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:10.276 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:10.276 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:10.276 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:40:10.276 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:40:10.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:40:10.335 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:10.335 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:10.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:10.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:10.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:10.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:10.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:10.513 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:10.513 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:10.527 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:10.527 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:10.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:40:10.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:10.529 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:10.529 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:10.529 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:40:10.529 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:40:10.555 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:40:10.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:40:10.561 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:10.561 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:10.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:10.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:10.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:40:10.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:40:10.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:40:10.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:40:10.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:10.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:10.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:10.774 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:10.774 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:10.786 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:10.786 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:10.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:40:10.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:10.787 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:10.787 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:10.787 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:40:10.787 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:40:10.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:40:10.843 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:10.843 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:10.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:10.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:11.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:11.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:11.025 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:11.026 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:40:11.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:11.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:11.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:40:11.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.044 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:11.044 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:11.044 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:40:11.044 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:40:11.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:40:11.078 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:11.078 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:11.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:11.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:11.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.087 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:11.087 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:11.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:11.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:11.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:40:11.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.101 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:11.101 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:11.101 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:40:11.101 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:40:11.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:40:11.120 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:11.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:11.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:11.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:11.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:11.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:11.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:11.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:11.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:40:11.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.136 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:11.136 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:11.136 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:40:11.136 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:40:11.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:40:11.166 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:11.167 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:11.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:11.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:11.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.175 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:11.175 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:11.192 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:11.192 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:11.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:40:11.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.194 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:11.194 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:11.194 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:40:11.194 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:40:11.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:11.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:40:11.213 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:11.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:11.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:11.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:11.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:11.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:11.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:11.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:11.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:40:11.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.253 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:11.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:11.253 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:40:11.253 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:40:11.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:40:11.258 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:11.258 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:11.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:11.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:11.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:11.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:11.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:11.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:11.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:40:11.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.300 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:11.300 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:11.300 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:40:11.300 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:40:11.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:11.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:40:11.310 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:11.310 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:11.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:11.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:11.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.316 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:11.316 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:11.330 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:11.330 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:11.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:40:11.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.332 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:11.332 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:11.332 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:40:11.332 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:40:11.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:40:11.354 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:11.354 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:11.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:11.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:11.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:11.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:11.381 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:11.381 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:11.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:40:11.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.382 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:11.383 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:11.383 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:40:11.383 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:40:11.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:40:11.398 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:11.398 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:11.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:11.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:11.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:11.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:11.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:11.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:11.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:40:11.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.429 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:11.429 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:11.429 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:40:11.429 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:40:11.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:40:11.446 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:11.446 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:11.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.493 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:40:11.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:11.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:11.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.562 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:11.562 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:11.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:11.580 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:11.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:40:11.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.581 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:11.581 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:11.581 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:40:11.581 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:40:11.615 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:40:11.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:40:11.615 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:40:11.615 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:40:11.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:40:11.640 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:11.640 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:11.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:11.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:11.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:11.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:11.836 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:11.836 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:11.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:40:11.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.838 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:11.838 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:11.838 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:40:11.838 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:40:11.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:40:11.873 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:11.873 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:11.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:11.964 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:40:12.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:12.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:12.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:12.070 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:12.070 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:12.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:12.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:12.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:40:12.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:12.087 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:12.087 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:12.087 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:40:12.087 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:40:12.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:40:12.098 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:12.098 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:12.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:12.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:12.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:12.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:12.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:12.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:12.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:12.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:12.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:12.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:40:12.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:12.339 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:12.339 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:12.339 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:40:12.339 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:40:12.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:40:12.391 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:12.391 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:12.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:12.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:12.434 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:40:12.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:12.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:12.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:12.577 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:12.577 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:12.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:12.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:12.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:40:12.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:12.596 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:12.596 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:12.596 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:40:12.596 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:40:12.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:40:12.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:40:12.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:40:12.616 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:40:12.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:40:12.621 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:12.621 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:12.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:12.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:12.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:12.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:12.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:12.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:12.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:12.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:12.846 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:12.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:40:12.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:12.847 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:12.847 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:12.847 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:40:12.847 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:40:12.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:40:12.851 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:12.851 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:12.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:12.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:12.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:12.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:12.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:12.855 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:12.855 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:12.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:12.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:12.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:40:12.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:12.861 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:12.861 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:12.861 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:40:12.861 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:40:12.904 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:40:12.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:40:12.910 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:12.911 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:12.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:12.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:13.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:13.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:13.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:13.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:13.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:13.104 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:40:13.105 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:40:13.105 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:40:13.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:40:13.106 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:40:13.106 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:40:13.106 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:40:13.106 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:40:13.106 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:40:13.106 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:40:13.106 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:40:18.124 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:40:18.124 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:40:18.124 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:40:18.124 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:40:18.124 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:40:18.124 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:40:18.134 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:40:18.136 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:40:18.136 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:40:18.136 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:40:18.137 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:40:18.142 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:40:18.143 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:40:18.143 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:40:18.143 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:40:18.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:40:18.144 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:40:18.145 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:40:18.145 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:40:18.148 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:40:18.148 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:40:18.148 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:40:18.148 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:40:18.149 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:40:18.149 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:40:18.150 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:40:18.150 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:40:18.152 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:40:18.153 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:40:18.153 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:40:18.153 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:40:18.153 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:40:18.153 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:40:18.153 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:40:18.153 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:40:18.157 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:40:18.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:40:18.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:40:18.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:40:18.157 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:40:18.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:40:18.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:40:18.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:40:18.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:40:18.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:18.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:18.158 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:40:18.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:18.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:18.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:18.158 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:40:18.158 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:40:18.158 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:40:18.158 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:40:18.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:18.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:18.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:18.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:40:18.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:18.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:18.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:18.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:18.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:18.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:18.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:18.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:18.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:18.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:18.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:18.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:18.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:18.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:18.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:18.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:18.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:18.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:18.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:18.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:18.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:18.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:18.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:18.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:18.163 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:40:18.637 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:40:18.675 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:40:18.676 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:40:18.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:18.677 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:40:18.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:18.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:18.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:40:18.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:18.686 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:18.686 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:18.686 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:40:18.686 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:40:18.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 03:40:18.740 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:18.740 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:18.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:18.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:18.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:19.103 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:40:19.162 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:40:19.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:40:19.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:40:19.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:40:19.568 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:40:20.033 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:40:20.164 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:40:20.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:40:20.164 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:40:20.164 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:40:20.498 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:40:20.798 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:20.798 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:20.805 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:40:20.805 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:40:20.805 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:40:20.805 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:40:20.811 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:40:20.812 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:40:20.812 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:40:20.812 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:40:20.812 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:40:20.812 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:40:20.812 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:40:20.812 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=579 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:40:20.812 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=579 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:40:20.812 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=579 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:40:20.813 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=579 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:40:20.813 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=579 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:40:20.813 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=579 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:40:20.813 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=580 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:40:20.813 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=580 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:40:20.813 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=580 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:40:20.813 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=580 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:40:20.813 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=580 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:40:20.813 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=580 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:40:20.813 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=580 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:40:20.813 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=580 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:40:25.819 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:40:25.819 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:40:25.819 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:40:25.819 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:40:25.819 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:40:25.819 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:40:25.829 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:40:25.830 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:40:25.830 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:40:25.830 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:40:25.830 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:40:25.832 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:40:25.832 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:40:25.832 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:40:25.832 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:40:25.833 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:40:25.833 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:40:25.833 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:40:25.833 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:40:25.836 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:40:25.836 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:40:25.836 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:40:25.836 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:40:25.836 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:40:25.836 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:40:25.836 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:40:25.836 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:40:25.838 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:40:25.838 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:40:25.839 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:40:25.839 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:40:25.839 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:40:25.839 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:40:25.839 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:40:25.839 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:40:25.842 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:40:25.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:40:25.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:40:25.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:40:25.842 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:40:25.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:40:25.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:40:25.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:40:25.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:40:25.842 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:40:25.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:25.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:25.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:25.842 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:40:25.842 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:40:25.842 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:40:25.842 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:40:25.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:25.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:25.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:25.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:40:25.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:25.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:25.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:25.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:25.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:25.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:25.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:25.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:25.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:25.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:25.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:25.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:25.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:25.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:25.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:25.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:25.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:25.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:25.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:25.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:25.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:25.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:25.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:25.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:25.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:25.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:25.844 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:40:25.844 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:40:25.844 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:40:25.844 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:40:25.844 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:40:25.844 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:40:25.844 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:40:30.861 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:40:30.861 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:40:30.861 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:40:30.862 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:40:30.862 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:40:30.862 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:40:30.870 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:40:30.871 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:40:30.871 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:40:30.871 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:40:30.871 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:40:30.874 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:40:30.875 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:40:30.875 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:40:30.875 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:40:30.875 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:40:30.875 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:40:30.875 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:40:30.875 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:40:30.878 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:40:30.878 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:40:30.878 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:40:30.878 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:40:30.878 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:40:30.878 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:40:30.878 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:40:30.878 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:40:30.881 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:40:30.881 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:40:30.881 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:40:30.881 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:40:30.881 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:40:30.881 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:40:30.882 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:40:30.882 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:40:30.885 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:40:30.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:40:30.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:40:30.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:40:30.885 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:40:30.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:40:30.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:40:30.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:40:30.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:40:30.886 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:40:30.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:30.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:30.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:30.886 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:40:30.886 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:40:30.886 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:40:30.886 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:40:30.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:30.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:30.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:30.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:40:30.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:30.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:30.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:30.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:30.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:30.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:30.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:30.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:30.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:30.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:30.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:30.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:30.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:30.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:30.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:30.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:30.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:30.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:30.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:30.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:30.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:30.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:30.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:30.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:30.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:30.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:30.891 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:40:31.360 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:40:31.401 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:40:31.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:31.402 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:40:31.403 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:40:31.823 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:40:31.888 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:40:31.888 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:40:31.889 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:40:31.889 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:40:32.286 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:40:32.750 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:40:32.890 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:40:32.890 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:40:32.890 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:40:32.890 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:40:33.214 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:40:33.678 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:40:33.891 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:40:33.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:40:33.892 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:40:33.892 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:40:34.141 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:40:34.605 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:40:34.893 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:40:34.893 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:40:34.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:40:34.893 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:40:35.071 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:40:35.535 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:40:35.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:40:35.895 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:40:35.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:40:35.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:40:36.003 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:40:36.468 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:40:36.909 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:40:36.909 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:40:36.909 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:40:36.909 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:40:36.915 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:40:36.916 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:40:36.916 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:40:36.916 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:40:36.916 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:40:36.916 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:40:36.916 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:40:36.916 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1323 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:40:36.917 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1323 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:40:36.917 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1323 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:40:36.917 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1323 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:40:36.917 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1323 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:40:36.917 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1323 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:40:41.924 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:40:41.924 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:40:41.924 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:40:41.924 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:40:41.924 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:40:41.924 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:40:41.933 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:40:41.935 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:40:41.935 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:40:41.935 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:40:41.935 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:40:41.939 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:40:41.940 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:40:41.940 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:40:41.940 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:40:41.941 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:40:41.941 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:40:41.941 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:40:41.941 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:40:41.943 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:40:41.943 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:40:41.944 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:40:41.944 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:40:41.944 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:40:41.944 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:40:41.944 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:40:41.944 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:40:41.947 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:40:41.947 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:40:41.947 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:40:41.947 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:40:41.947 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:40:41.947 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:40:41.947 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:40:41.947 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:40:41.951 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:40:41.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:40:41.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:40:41.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:40:41.951 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:40:41.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:40:41.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:40:41.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:40:41.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:40:41.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:41.951 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:40:41.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:41.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:41.952 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:40:41.952 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:40:41.952 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:40:41.952 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:40:41.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:41.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:41.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:41.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:40:41.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:41.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:41.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:41.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:41.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:41.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:41.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:41.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:41.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:41.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:41.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:41.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:41.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:41.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:41.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:41.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:41.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:41.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:41.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:41.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:41.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:41.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:41.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:41.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:41.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:41.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:41.956 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:40:42.427 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:40:42.463 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:40:42.463 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:40:42.464 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:40:42.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:42.899 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:40:42.954 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:40:42.954 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:40:42.955 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:40:42.955 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:40:43.372 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:40:43.845 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:40:43.955 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:40:43.955 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:40:43.956 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:40:43.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:40:44.317 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:40:44.790 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:40:44.957 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:40:44.957 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:40:44.957 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:40:44.957 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:40:45.262 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:40:45.734 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:40:45.958 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:40:45.958 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:40:45.959 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:40:45.959 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:40:46.206 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:40:46.671 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:40:46.960 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:40:46.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:40:46.960 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:40:46.960 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:40:47.137 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:40:47.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:40:47.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:40:47.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:40:47.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:40:47.476 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:40:47.476 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:40:47.476 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:40:47.476 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:40:47.476 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:40:47.477 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:40:47.477 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:40:52.494 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:40:52.494 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:40:52.494 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:40:52.494 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:40:52.494 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:40:52.494 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:40:52.502 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:40:52.503 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:40:52.503 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:40:52.503 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:40:52.503 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:40:52.507 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:40:52.507 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:40:52.507 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:40:52.507 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:40:52.507 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:40:52.508 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:40:52.508 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:40:52.508 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:40:52.511 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:40:52.511 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:40:52.511 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:40:52.511 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:40:52.511 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:40:52.511 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:40:52.511 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:40:52.511 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:40:52.514 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:40:52.514 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:40:52.515 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:40:52.515 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:40:52.515 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:40:52.515 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:40:52.515 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:40:52.515 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:40:52.519 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:40:52.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:40:52.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:40:52.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:40:52.519 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:40:52.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:40:52.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:40:52.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:40:52.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:40:52.519 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:40:52.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:52.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:52.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:52.519 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:40:52.519 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:40:52.519 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:40:52.519 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:40:52.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:52.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:52.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:52.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:40:52.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:52.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:52.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:52.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:52.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:52.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:52.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:52.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:52.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:52.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:52.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:52.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:52.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:52.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:52.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:52.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:52.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:52.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:52.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:52.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:52.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:52.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:52.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:52.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:52.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:52.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:52.521 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:40:52.521 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:40:52.521 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:40:52.521 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:40:52.521 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:40:52.521 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:40:52.521 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:40:57.540 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:40:57.540 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:40:57.540 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:40:57.540 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:40:57.540 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:40:57.540 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:40:57.547 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:40:57.547 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:40:57.547 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:40:57.547 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:40:57.547 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:40:57.550 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:40:57.550 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:40:57.550 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:40:57.550 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:40:57.550 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:40:57.550 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:40:57.550 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:40:57.550 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:40:57.552 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:40:57.552 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:40:57.552 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:40:57.552 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:40:57.552 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:40:57.553 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:40:57.553 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:40:57.553 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:40:57.554 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:40:57.554 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:40:57.554 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:40:57.554 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:40:57.555 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:40:57.555 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:40:57.555 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:40:57.555 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:40:57.557 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:40:57.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:40:57.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:40:57.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:40:57.557 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:40:57.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:40:57.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:40:57.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:40:57.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:40:57.558 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:40:57.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:57.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:57.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:57.558 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:40:57.558 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:40:57.558 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:40:57.558 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:40:57.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:57.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:57.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:57.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:40:57.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:57.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:57.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:57.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:57.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:57.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:57.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:57.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:57.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:57.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:57.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:57.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:57.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:57.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:57.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:57.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:57.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:57.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:57.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:57.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:40:57.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:57.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:57.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:57.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:40:57.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:40:57.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:40:57.562 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:40:58.025 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:40:58.080 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:40:58.081 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:40:58.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:40:58.083 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:40:58.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:40:58.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:40:58.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:40:58.489 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:40:58.560 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:40:58.561 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:40:58.561 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:40:58.561 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:40:58.952 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:40:59.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:40:59.086 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:40:59.087 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:40:59.087 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:40:59.087 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:40:59.421 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:40:59.562 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:40:59.562 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:40:59.562 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:40:59.563 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:40:59.892 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:41:00.362 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:41:00.563 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:41:00.563 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:41:00.563 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:41:00.563 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:41:00.833 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:41:01.304 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:41:01.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:41:01.565 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:41:01.565 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:41:01.565 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:41:01.775 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:41:02.246 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:41:02.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:41:02.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:41:02.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:41:02.566 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:41:02.717 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:41:03.187 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:41:03.658 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:41:04.129 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:41:04.602 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:41:05.075 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:41:05.545 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:41:06.013 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:41:06.479 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:41:06.950 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:41:07.421 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:41:07.892 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 03:41:08.363 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 03:41:08.833 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 03:41:09.307 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 03:41:09.773 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 03:41:10.240 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 03:41:10.712 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 03:41:11.182 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 03:41:11.653 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 03:41:12.124 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 03:41:12.595 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 03:41:12.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:41:12.961 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:41:12.968 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:41:12.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:41:12.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:41:12.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:41:12.974 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:41:12.975 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:41:12.975 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:41:12.975 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:41:12.976 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:41:12.976 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:41:12.976 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:41:12.976 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3348 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:41:12.976 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3348 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:41:12.976 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3348 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:41:12.976 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3348 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:41:12.977 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3348 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:41:12.977 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3348 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:41:17.983 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:41:17.983 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:41:17.983 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:41:17.983 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:41:17.983 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:41:17.983 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:41:17.995 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:41:17.996 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:41:17.996 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:41:17.996 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:41:17.996 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:41:17.998 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:41:17.998 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:41:17.998 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:41:17.998 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:41:17.998 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:41:17.998 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:41:17.998 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:41:17.998 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:41:18.000 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:41:18.000 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:41:18.000 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:41:18.000 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:41:18.000 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:41:18.000 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:41:18.000 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:41:18.000 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:41:18.002 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:41:18.002 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:41:18.002 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:41:18.002 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:41:18.002 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:41:18.002 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:41:18.002 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:41:18.002 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:41:18.005 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:41:18.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:41:18.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:41:18.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:41:18.005 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:41:18.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:41:18.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:41:18.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:41:18.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:41:18.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:41:18.005 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:41:18.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:41:18.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:41:18.005 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:41:18.005 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:41:18.005 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:41:18.005 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:41:18.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:41:18.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:41:18.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:41:18.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:41:18.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:41:18.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:41:18.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:41:18.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:41:18.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:41:18.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:41:18.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:41:18.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:41:18.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:41:18.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:41:18.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:41:18.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:41:18.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:41:18.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:41:18.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:41:18.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:41:18.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:41:18.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:41:18.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:41:18.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:41:18.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:41:18.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:41:18.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:41:18.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:41:18.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:41:18.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:41:18.010 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:41:18.478 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:41:18.523 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:41:18.524 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:41:18.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:41:18.525 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:41:18.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:41:18.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:41:18.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:41:18.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:41:18.541 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:41:18.541 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:41:18.541 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:41:18.541 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:41:18.572 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:41:18.577 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:41:18.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:41:18.587 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:41:18.587 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:41:18.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:41:18.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:41:18.946 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:41:19.009 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:41:19.009 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:41:19.009 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:41:19.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:41:19.420 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:41:19.893 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:41:20.010 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:41:20.010 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:41:20.010 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:41:20.010 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:41:20.365 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:41:20.839 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:41:21.011 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:41:21.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:41:21.011 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:41:21.011 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:41:21.307 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:41:21.778 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:41:22.012 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:41:22.013 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:41:22.013 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:41:22.013 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:41:22.250 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:41:22.720 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:41:23.014 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:41:23.014 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:41:23.014 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:41:23.014 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:41:23.193 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:41:23.665 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:41:24.136 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:41:24.608 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:41:25.081 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:41:25.553 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:41:26.027 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:41:26.499 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:41:26.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:41:26.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:41:26.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:41:26.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:41:26.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:41:26.606 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:41:26.606 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:41:26.607 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:41:26.613 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:41:26.614 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:41:26.614 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:41:26.614 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:41:26.614 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:41:26.614 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:41:26.614 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:41:26.614 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1862 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:41:26.615 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:41:26.615 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1862 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:41:26.615 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1862 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:41:26.615 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:41:26.615 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:41:26.615 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1863 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:41:26.615 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1863 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:41:26.615 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1863 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:41:26.615 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1863 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:41:26.615 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1863 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:41:26.615 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1863 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:41:26.615 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1863 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:41:26.615 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1863 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:41:31.619 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:41:31.619 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:41:31.619 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:41:31.619 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:41:31.620 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:41:31.620 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:41:31.627 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:41:31.628 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:41:31.628 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:41:31.629 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:41:31.629 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:41:31.632 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:41:31.632 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:41:31.632 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:41:31.632 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:41:31.633 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:41:31.633 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:41:31.633 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:41:31.633 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:41:31.636 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:41:31.636 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:41:31.637 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:41:31.637 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:41:31.637 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:41:31.637 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:41:31.637 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:41:31.637 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:41:31.639 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:41:31.639 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:41:31.639 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:41:31.639 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:41:31.639 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:41:31.639 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:41:31.639 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:41:31.639 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:41:31.643 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:41:31.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:41:31.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:41:31.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:41:31.643 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:41:31.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:41:31.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:41:31.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:41:31.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:41:31.643 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:41:31.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:41:31.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:41:31.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:41:31.643 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:41:31.643 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:41:31.643 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:41:31.643 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:41:31.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:41:31.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:41:31.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:41:31.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:41:31.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:41:31.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:41:31.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:41:31.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:41:31.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:41:31.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:41:31.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:41:31.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:41:31.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:41:31.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:41:31.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:41:31.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:41:31.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:41:31.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:41:31.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:41:31.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:41:31.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:41:31.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:41:31.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:41:31.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:41:31.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:41:31.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:41:31.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:41:31.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:41:31.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:41:31.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:41:31.648 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:41:32.121 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:41:32.164 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:41:32.165 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:41:32.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:41:32.166 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:41:32.181 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:41:32.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:41:32.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:41:32.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:41:32.184 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:41:32.184 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:41:32.184 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:41:32.184 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:41:32.214 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:41:32.217 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:41:32.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:41:32.224 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:41:32.224 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:41:32.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:41:32.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:41:32.591 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:41:32.647 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:41:32.647 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:41:32.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:41:32.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:41:33.064 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:41:33.537 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:41:33.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:41:33.649 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:41:33.649 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:41:33.649 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:41:34.007 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:41:34.478 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:41:34.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:41:34.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:41:34.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:41:34.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:41:34.948 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:41:35.413 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:41:35.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:41:35.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:41:35.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:41:35.651 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:41:35.880 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:41:36.345 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:41:36.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:41:36.651 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:41:36.651 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:41:36.652 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:41:36.811 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:41:37.276 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:41:37.743 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:41:38.213 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:41:38.679 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:41:39.144 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:41:39.610 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:41:40.076 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:41:40.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:41:40.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:41:40.230 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:41:40.230 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:41:40.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:41:40.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:41:40.244 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:41:40.244 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:41:40.246 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:41:40.246 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:41:40.246 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:41:40.246 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:41:40.246 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:41:40.246 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:41:40.246 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:41:40.246 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1875 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:41:40.246 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1875 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:41:40.246 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1875 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:41:40.246 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1875 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:41:40.246 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1875 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:41:40.246 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1875 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:41:40.246 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1875 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:41:40.246 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1875 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:41:45.256 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:41:45.256 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:41:45.256 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:41:45.256 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:41:45.256 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:41:45.256 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:41:45.271 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:41:45.271 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:41:45.272 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:41:45.272 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:41:45.272 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:41:45.274 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:41:45.274 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:41:45.274 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:41:45.274 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:41:45.274 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:41:45.275 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:41:45.275 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:41:45.275 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:41:45.276 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:41:45.276 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:41:45.276 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:41:45.276 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:41:45.276 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:41:45.276 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:41:45.276 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:41:45.276 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:41:45.278 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:41:45.278 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:41:45.278 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:41:45.278 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:41:45.278 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:41:45.278 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:41:45.278 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:41:45.278 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:41:45.281 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:41:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:41:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:41:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:41:45.281 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:41:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:41:45.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:41:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:41:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:41:45.281 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:41:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:41:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:41:45.281 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:41:45.281 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:41:45.281 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:41:45.281 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:41:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:41:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:41:45.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:41:45.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:41:45.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:41:45.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:41:45.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:41:45.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:41:45.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:41:45.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:41:45.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:41:45.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:41:45.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:41:45.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:41:45.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:41:45.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:41:45.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:41:45.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:41:45.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:41:45.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:41:45.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:41:45.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:41:45.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:41:45.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:41:45.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:41:45.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:41:45.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:41:45.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:41:45.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:41:45.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:41:45.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:41:45.286 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:41:45.759 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:41:45.796 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:41:45.796 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:41:45.797 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:41:45.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:41:45.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:41:45.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:41:45.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:41:45.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:41:45.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:41:45.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:41:45.817 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:41:45.817 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:41:45.851 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:41:45.854 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:41:45.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:41:45.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:41:45.867 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:41:45.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:41:45.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:41:46.229 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:41:46.285 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:41:46.285 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:41:46.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:41:46.286 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:41:46.701 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:41:47.174 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:41:47.286 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:41:47.286 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:41:47.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:41:47.287 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:41:47.642 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:41:48.108 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:41:48.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:41:48.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:41:48.287 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:41:48.288 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:41:48.576 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:41:49.047 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:41:49.288 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:41:49.289 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:41:49.289 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:41:49.289 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:41:49.519 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:41:49.992 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:41:50.289 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:41:50.290 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:41:50.290 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:41:50.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:41:50.465 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:41:50.936 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:41:51.407 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:41:51.880 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:41:52.353 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:41:52.825 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:41:53.296 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:41:53.767 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:41:53.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:41:53.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:41:53.873 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:41:53.873 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:41:53.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:41:53.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:41:53.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:41:53.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:41:53.891 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:41:53.891 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:41:53.891 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:41:53.891 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:41:53.901 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:41:53.902 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:41:53.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:41:53.908 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:41:53.908 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:41:53.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:41:53.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:41:54.236 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:41:54.704 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:41:55.175 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:41:55.646 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 03:41:56.116 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 03:41:56.587 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 03:41:57.058 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 03:41:57.529 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 03:41:58.000 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 03:41:58.471 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 03:41:58.944 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 03:41:59.417 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 03:41:59.891 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 03:42:00.363 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 03:42:00.835 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 03:42:01.308 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 03:42:01.776 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 03:42:01.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:42:01.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:42:01.913 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:42:01.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:42:01.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:42:01.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:42:01.927 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:42:01.928 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:42:01.934 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:42:01.934 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:42:01.935 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:42:01.935 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:42:01.935 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:42:01.935 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:42:01.935 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:42:01.936 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3604 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:01.936 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3604 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:01.936 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3604 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:01.936 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3604 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:01.936 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3605 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:01.936 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3605 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:01.936 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3605 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:01.936 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3605 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:01.936 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3605 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:01.936 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3605 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:01.937 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3605 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:01.937 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3605 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:01.937 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3606 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:01.937 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3606 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:01.937 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3606 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:01.937 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3606 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:01.937 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3606 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:01.937 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3606 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:01.937 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3606 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:01.937 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3606 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:06.934 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:42:06.934 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:42:06.934 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:42:06.934 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:42:06.934 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:42:06.934 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:42:06.943 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:42:06.944 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:42:06.944 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:42:06.945 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:42:06.945 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:42:06.949 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:42:06.949 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:42:06.950 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:42:06.950 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:42:06.950 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:42:06.951 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:42:06.951 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:42:06.951 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:42:06.954 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:42:06.954 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:42:06.955 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:42:06.955 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:42:06.955 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:42:06.956 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:42:06.956 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:42:06.956 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:42:06.959 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:42:06.959 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:42:06.959 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:42:06.959 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:42:06.960 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:42:06.960 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:42:06.960 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:42:06.960 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:42:06.965 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:42:06.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:42:06.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:42:06.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:42:06.965 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:42:06.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:42:06.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:42:06.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:42:06.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:42:06.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:42:06.966 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:42:06.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:42:06.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:42:06.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:42:06.966 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:42:06.966 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:42:06.966 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:42:06.966 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:42:06.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:42:06.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:42:06.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:42:06.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:42:06.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:42:06.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:42:06.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:42:06.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:42:06.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:42:06.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:42:06.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:42:06.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:42:06.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:42:06.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:42:06.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:42:06.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:42:06.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:42:06.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:42:06.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:42:06.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:42:06.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:42:06.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:42:06.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:42:06.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:42:06.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:42:06.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:42:06.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:42:06.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:42:06.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:42:06.971 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:42:07.446 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:42:07.495 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:42:07.497 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:42:07.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:42:07.500 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:42:07.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:42:07.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:42:07.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:42:07.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:42:07.531 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:42:07.531 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:42:07.531 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:42:07.531 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:42:07.539 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:42:07.542 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:42:07.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:42:07.549 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:42:07.549 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:42:07.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:42:07.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:42:07.918 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:42:07.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:42:07.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:42:07.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:42:07.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:42:08.390 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:42:08.860 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:42:08.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:42:08.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:42:08.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:42:08.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:42:09.331 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:42:09.804 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:42:09.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:42:09.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:42:09.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:42:09.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:42:10.272 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:42:10.743 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:42:10.973 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:42:10.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:42:10.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:42:10.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:42:11.210 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:42:11.682 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:42:11.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:42:11.975 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:42:11.975 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:42:11.975 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:42:12.148 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:42:12.620 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:42:13.090 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:42:13.563 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:42:14.036 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:42:14.509 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:42:14.982 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:42:15.454 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:42:15.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:42:15.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:42:15.557 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:42:15.557 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:42:15.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:42:15.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:42:15.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:42:15.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:42:15.575 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:42:15.576 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:42:15.576 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:42:15.576 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:42:15.588 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:42:15.590 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:42:15.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:42:15.596 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:42:15.596 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:42:15.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:42:15.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:42:15.925 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:42:16.396 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:42:16.869 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:42:17.342 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 03:42:17.814 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 03:42:18.284 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 03:42:18.756 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 03:42:19.227 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 03:42:19.700 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 03:42:20.170 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 03:42:20.635 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 03:42:21.100 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 03:42:21.570 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 03:42:22.036 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 03:42:22.507 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 03:42:22.979 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 03:42:23.450 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 03:42:23.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:42:23.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:42:23.598 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:42:23.599 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:42:23.605 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:42:23.605 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:42:23.605 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:42:23.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:42:23.610 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:42:23.610 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:42:23.610 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:42:23.610 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:42:23.610 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:42:23.611 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:42:23.611 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:42:23.611 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3606 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:23.611 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3606 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:23.611 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3607 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:23.611 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3607 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:23.611 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3607 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:23.611 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3607 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:23.611 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3607 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:23.611 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3607 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:23.611 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3607 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:23.611 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3607 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:28.621 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:42:28.621 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:42:28.621 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:42:28.621 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:42:28.621 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:42:28.621 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:42:28.630 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:42:28.631 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:42:28.631 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:42:28.632 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:42:28.632 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:42:28.635 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:42:28.636 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:42:28.636 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:42:28.636 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:42:28.636 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:42:28.636 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:42:28.636 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:42:28.636 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:42:28.640 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:42:28.640 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:42:28.640 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:42:28.640 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:42:28.640 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:42:28.640 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:42:28.640 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:42:28.640 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:42:28.643 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:42:28.644 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:42:28.644 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:42:28.644 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:42:28.644 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:42:28.644 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:42:28.644 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:42:28.644 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:42:28.648 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:42:28.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:42:28.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:42:28.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:42:28.648 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:42:28.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:42:28.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:42:28.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:42:28.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:42:28.649 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:42:28.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:42:28.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:42:28.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:42:28.649 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:42:28.649 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:42:28.649 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:42:28.649 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:42:28.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:42:28.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:42:28.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:42:28.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:42:28.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:42:28.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:42:28.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:42:28.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:42:28.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:42:28.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:42:28.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:42:28.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:42:28.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:42:28.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:42:28.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:42:28.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:42:28.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:42:28.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:42:28.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:42:28.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:42:28.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:42:28.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:42:28.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:42:28.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:42:28.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:42:28.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:42:28.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:42:28.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:42:28.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:42:28.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:42:28.654 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:42:29.124 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:42:29.165 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:42:29.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:42:29.167 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:42:29.168 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:42:29.183 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:42:29.183 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:42:29.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:42:29.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:42:29.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:42:29.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:42:29.188 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:42:29.188 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:42:29.215 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:42:29.218 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:42:29.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:42:29.232 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:42:29.232 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:42:29.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:42:29.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:42:29.590 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:42:29.651 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:42:29.652 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:42:29.652 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:42:29.653 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:42:30.056 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:42:30.526 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:42:30.652 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:42:30.653 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:42:30.653 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:42:30.653 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:42:30.995 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:42:31.466 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:42:31.653 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:42:31.653 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:42:31.653 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:42:31.654 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:42:31.935 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:42:32.408 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:42:32.654 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:42:32.654 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:42:32.655 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:42:32.655 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:42:32.881 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:42:33.351 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:42:33.655 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:42:33.655 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:42:33.656 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:42:33.656 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:42:33.822 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:42:34.296 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:42:34.768 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:42:35.241 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:42:35.714 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:42:36.186 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:42:36.659 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:42:37.132 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:42:37.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:42:37.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:42:37.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:42:37.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:42:37.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:42:37.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:42:37.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:42:37.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:42:37.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:42:37.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:42:37.260 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:42:37.260 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:42:37.263 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:42:37.264 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:42:37.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:42:37.268 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:42:37.268 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:42:37.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:42:37.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:42:37.601 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:42:38.074 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:42:38.547 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:42:39.019 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 03:42:39.493 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 03:42:39.965 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 03:42:40.437 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 03:42:40.909 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 03:42:41.382 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 03:42:41.854 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 03:42:42.327 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 03:42:42.800 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 03:42:43.273 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 03:42:43.745 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 03:42:44.216 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 03:42:44.687 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 03:42:45.158 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 03:42:45.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:42:45.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:42:45.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:42:45.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:42:45.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:42:45.288 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:42:45.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:42:45.288 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:42:45.293 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:42:45.294 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:42:45.294 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:42:45.294 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:42:45.294 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:42:45.294 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:42:45.294 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:42:45.295 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3600 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:45.295 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3600 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:45.295 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3601 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:45.295 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3601 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:45.295 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3601 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:45.295 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3601 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:45.295 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3601 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:45.295 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3601 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:45.296 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3601 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:45.296 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3601 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:45.296 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3602 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:45.296 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3602 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:45.296 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3602 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:45.296 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3602 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:45.296 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3602 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:42:50.296 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:42:50.296 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:42:50.296 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:42:50.296 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:42:50.296 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:42:50.296 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:42:50.305 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:42:50.307 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:42:50.307 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:42:50.308 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:42:50.308 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:42:50.313 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:42:50.313 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:42:50.314 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:42:50.314 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:42:50.314 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:42:50.315 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:42:50.315 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:42:50.315 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:42:50.318 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:42:50.318 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:42:50.319 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:42:50.319 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:42:50.319 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:42:50.320 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:42:50.320 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:42:50.320 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:42:50.322 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:42:50.323 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:42:50.323 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:42:50.323 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:42:50.323 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:42:50.323 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:42:50.323 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:42:50.323 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:42:50.328 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:42:50.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:42:50.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:42:50.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:42:50.328 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:42:50.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:42:50.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:42:50.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:42:50.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:42:50.328 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:42:50.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:42:50.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:42:50.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:42:50.328 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:42:50.328 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:42:50.328 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:42:50.328 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:42:50.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:42:50.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:42:50.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:42:50.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:42:50.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:42:50.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:42:50.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:42:50.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:42:50.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:42:50.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:42:50.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:42:50.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:42:50.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:42:50.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:42:50.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:42:50.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:42:50.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:42:50.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:42:50.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:42:50.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:42:50.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:42:50.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:42:50.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:42:50.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:42:50.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:42:50.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:42:50.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:42:50.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:42:50.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:42:50.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:42:50.333 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:42:50.810 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:42:50.851 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:42:50.852 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:42:50.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:42:50.854 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:42:50.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:42:50.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:42:50.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:42:50.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:42:50.876 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:42:50.876 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:42:50.876 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:42:50.876 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:42:50.902 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:42:50.906 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:42:50.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:42:50.918 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:42:50.918 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:42:50.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:42:50.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:42:51.281 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:42:51.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:42:51.332 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:42:51.332 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:42:51.332 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:42:51.754 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:42:52.226 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:42:52.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:42:52.333 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:42:52.333 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:42:52.333 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:42:52.697 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:42:53.171 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:42:53.333 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:42:53.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:42:53.334 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:42:53.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:42:53.641 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:42:54.109 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:42:54.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:42:54.335 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:42:54.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:42:54.335 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:42:54.580 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:42:55.051 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:42:55.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:42:55.337 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:42:55.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:42:55.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:42:55.521 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:42:55.991 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:42:56.463 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:42:56.934 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:42:57.405 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:42:57.872 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:42:58.341 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:42:58.812 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:42:58.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:42:58.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:42:58.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:42:58.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:42:58.941 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:42:58.941 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:42:58.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:42:58.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:42:58.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:42:58.943 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:42:58.943 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:42:58.943 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:42:58.945 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:42:58.946 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:42:58.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:42:58.949 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:42:58.949 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:42:58.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:42:58.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:42:59.278 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:42:59.749 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:43:00.222 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:43:00.695 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 03:43:01.168 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 03:43:01.641 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 03:43:02.111 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 03:43:02.585 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 03:43:03.057 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 03:43:03.528 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 03:43:03.999 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 03:43:04.473 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 03:43:04.945 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 03:43:05.418 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 03:43:05.891 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 03:43:06.363 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 03:43:06.828 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 03:43:06.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:43:06.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:43:06.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:43:06.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:43:06.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:43:06.974 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:43:06.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:43:06.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:43:06.976 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:43:06.976 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:43:06.976 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:43:06.976 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:43:07.009 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:43:07.013 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:43:07.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:43:07.020 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:43:07.020 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:43:07.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:43:07.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:43:07.297 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 03:43:07.767 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 03:43:08.239 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 03:43:08.712 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 03:43:09.179 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 03:43:09.646 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 03:43:10.117 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 03:43:10.583 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 03:43:11.053 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 03:43:11.520 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 03:43:11.991 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 03:43:12.462 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 03:43:12.932 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 03:43:13.400 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 03:43:13.865 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 03:43:14.331 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 03:43:14.797 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 03:43:15.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:43:15.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:43:15.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:43:15.025 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:43:15.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:43:15.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:43:15.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:43:15.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:43:15.042 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:43:15.042 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:43:15.042 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:43:15.042 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:43:15.077 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:43:15.081 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:43:15.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:43:15.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:43:15.089 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:43:15.089 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:43:15.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:43:15.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:43:15.267 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 03:43:15.737 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 03:43:16.202 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 03:43:16.669 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 03:43:17.137 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 03:43:17.606 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 03:43:18.074 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 03:43:18.545 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 03:43:19.016 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 03:43:19.489 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-08 03:43:19.962 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-08 03:43:20.435 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-08 03:43:20.908 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-08 03:43:21.381 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-08 03:43:21.855 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-08 03:43:22.324 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-08 03:43:22.797 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-08 03:43:23.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:43:23.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:43:23.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:43:23.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:43:23.107 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:43:23.108 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:43:23.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:43:23.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:43:23.109 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:43:23.109 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:43:23.109 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:43:23.109 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:43:23.109 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:43:23.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:43:23.109 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:43:28.121 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:43:28.121 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:43:28.121 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:43:28.121 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:43:28.121 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:43:28.121 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:43:28.133 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:43:28.134 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:43:28.134 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:43:28.134 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:43:28.134 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:43:28.138 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:43:28.138 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:43:28.139 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:43:28.139 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:43:28.139 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:43:28.139 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:43:28.139 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:43:28.139 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:43:28.143 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:43:28.143 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:43:28.144 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:43:28.144 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:43:28.144 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:43:28.144 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:43:28.144 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:43:28.144 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:43:28.147 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:43:28.147 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:43:28.147 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:43:28.148 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:43:28.148 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:43:28.148 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:43:28.148 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:43:28.148 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:43:28.152 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:43:28.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:43:28.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:43:28.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:43:28.153 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:43:28.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:43:28.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:43:28.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:43:28.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:43:28.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:43:28.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:43:28.153 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:43:28.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:43:28.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:43:28.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:43:28.153 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:43:28.153 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:43:28.153 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:43:28.153 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:43:28.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:43:28.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:43:28.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:43:28.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:43:28.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:43:28.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:43:28.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:43:28.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:43:28.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:43:28.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:43:28.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:43:28.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:43:28.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:43:28.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:43:28.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:43:28.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:43:28.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:43:28.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:43:28.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:43:28.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:43:28.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:43:28.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:43:28.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:43:28.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:43:28.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:43:28.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:43:28.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:43:28.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:43:28.158 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:43:28.630 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:43:28.678 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:43:28.679 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:43:28.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:43:28.680 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:43:28.696 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:43:28.696 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:43:28.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:43:28.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:43:28.700 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:43:28.700 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:43:28.700 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:43:28.700 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:43:28.724 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:43:28.725 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:43:28.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:43:28.731 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:43:28.731 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:43:28.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:43:28.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:43:29.098 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:43:29.156 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:43:29.157 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:43:29.157 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:43:29.158 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:43:29.572 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:43:30.044 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:43:30.157 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:43:30.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:43:30.158 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:43:30.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:43:30.517 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:43:30.990 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:43:31.158 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:43:31.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:43:31.159 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:43:31.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:43:31.462 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:43:31.935 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:43:32.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:43:32.159 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:43:32.160 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:43:32.161 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:43:32.406 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:43:32.880 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:43:33.161 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:43:33.161 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:43:33.161 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:43:33.161 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:43:33.352 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:43:33.823 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:43:34.297 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:43:34.770 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:43:35.242 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:43:35.712 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:43:36.184 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:43:36.657 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:43:36.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:43:36.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:43:36.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:43:36.738 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:43:36.755 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:43:36.755 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:43:36.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:43:36.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:43:36.757 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:43:36.757 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:43:36.757 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:43:36.757 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:43:36.789 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:43:36.793 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:43:36.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:43:36.802 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:43:36.802 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:43:36.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:43:36.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:43:37.129 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:43:37.602 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:43:38.075 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:43:38.548 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 03:43:39.018 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 03:43:39.490 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 03:43:39.963 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 03:43:40.433 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 03:43:40.904 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 03:43:41.375 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 03:43:41.847 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 03:43:42.320 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 03:43:42.792 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 03:43:43.263 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 03:43:43.737 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 03:43:44.209 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 03:43:44.681 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 03:43:44.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:43:44.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:43:44.808 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:43:44.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:43:44.821 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:43:44.821 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:43:44.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:43:44.821 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:43:44.826 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:43:44.827 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:43:44.827 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:43:44.827 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:43:44.827 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:43:44.827 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:43:44.828 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:43:44.828 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3602 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:43:44.828 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3602 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:43:44.828 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3603 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:43:44.828 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3603 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:43:44.828 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3603 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:43:44.829 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3603 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:43:44.829 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3603 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:43:44.829 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3603 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:43:44.829 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3603 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:43:44.829 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3603 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:43:44.829 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3604 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:43:44.829 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3604 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:43:44.829 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3604 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:43:44.829 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3604 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:43:44.829 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3604 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:43:49.828 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:43:49.828 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:43:49.828 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:43:49.828 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:43:49.828 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:43:49.828 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:43:49.839 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:43:49.840 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:43:49.840 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:43:49.841 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:43:49.841 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:43:49.845 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:43:49.845 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:43:49.845 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:43:49.845 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:43:49.846 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:43:49.846 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:43:49.846 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:43:49.846 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:43:49.850 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:43:49.850 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:43:49.850 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:43:49.850 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:43:49.850 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:43:49.850 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:43:49.850 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:43:49.850 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:43:49.854 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:43:49.854 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:43:49.854 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:43:49.854 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:43:49.854 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:43:49.854 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:43:49.854 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:43:49.854 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:43:49.859 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:43:49.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:43:49.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:43:49.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:43:49.859 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:43:49.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:43:49.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:43:49.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:43:49.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:43:49.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:43:49.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:43:49.860 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:43:49.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:43:49.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:43:49.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:43:49.860 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:43:49.860 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:43:49.860 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:43:49.860 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:43:49.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:43:49.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:43:49.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:43:49.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:43:49.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:43:49.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:43:49.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:43:49.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:43:49.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:43:49.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:43:49.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:43:49.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:43:49.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:43:49.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:43:49.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:43:49.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:43:49.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:43:49.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:43:49.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:43:49.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:43:49.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:43:49.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:43:49.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:43:49.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:43:49.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:43:49.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:43:49.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:43:49.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:43:49.865 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:43:50.343 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:43:50.389 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:43:50.390 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:43:50.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:43:50.391 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:43:50.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:43:50.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:43:50.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:43:50.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:43:50.421 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:43:50.422 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:43:50.422 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:43:50.422 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:43:50.435 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:43:50.439 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:43:50.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:43:50.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:43:50.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:43:50.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:43:50.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:43:50.814 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:43:50.863 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:43:50.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:43:50.864 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:43:50.864 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:43:51.286 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:43:51.759 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:43:51.864 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:43:51.865 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:43:51.865 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:43:51.865 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:43:52.230 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:43:52.702 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:43:52.866 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:43:52.866 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:43:52.866 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:43:52.866 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:43:53.175 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:43:53.647 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:43:53.867 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:43:53.867 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:43:53.867 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:43:53.867 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:43:54.121 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:43:54.593 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:43:54.868 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:43:54.868 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:43:54.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:43:54.868 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:43:55.063 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:43:55.535 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:43:56.003 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:43:56.474 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:43:56.947 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:43:57.420 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:43:57.893 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:43:58.366 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:43:58.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:43:58.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:43:58.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:43:58.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:43:58.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:43:58.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:43:58.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:43:58.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:43:58.472 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:43:58.472 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:43:58.472 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:43:58.472 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:43:58.501 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:43:58.507 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:43:58.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:43:58.517 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:43:58.517 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:43:58.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:43:58.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:43:58.837 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:43:59.309 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:43:59.781 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:44:00.252 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 03:44:00.725 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 03:44:01.198 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 03:44:01.669 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 03:44:02.140 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 03:44:02.611 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 03:44:03.082 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 03:44:03.553 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 03:44:04.026 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 03:44:04.499 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 03:44:04.971 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 03:44:05.445 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 03:44:05.918 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 03:44:06.389 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 03:44:06.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:44:06.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:44:06.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:44:06.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:44:06.540 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:44:06.540 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:44:06.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:44:06.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:44:06.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:44:06.542 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:44:06.543 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:44:06.543 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:44:06.573 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:44:06.577 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:44:06.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:44:06.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:44:06.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:44:06.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:44:06.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:44:06.861 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 03:44:07.332 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 03:44:07.805 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 03:44:08.277 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 03:44:08.749 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 03:44:09.220 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 03:44:09.691 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 03:44:10.161 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 03:44:10.632 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 03:44:11.103 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 03:44:11.577 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 03:44:12.049 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 03:44:12.522 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 03:44:12.993 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 03:44:13.464 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 03:44:13.943 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 03:44:14.415 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 03:44:14.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:44:14.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:44:14.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:44:14.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:44:14.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:44:14.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:44:14.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:44:14.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:44:14.613 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:44:14.614 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:44:14.614 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:44:14.614 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:44:14.650 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:44:14.655 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:44:14.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:44:14.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:44:14.663 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:44:14.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:44:14.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:44:14.886 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 03:44:15.357 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 03:44:15.828 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 03:44:16.298 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 03:44:16.769 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 03:44:17.240 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 03:44:17.711 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 03:44:18.183 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 03:44:18.657 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 03:44:19.129 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-08 03:44:19.600 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-08 03:44:20.073 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-08 03:44:20.545 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-08 03:44:21.017 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-08 03:44:21.489 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-08 03:44:21.960 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-08 03:44:22.432 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-08 03:44:22.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:44:22.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:44:22.670 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:44:22.670 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:44:22.683 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:44:22.683 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:44:22.683 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:44:22.683 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:44:22.686 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:44:22.686 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:44:22.686 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:44:22.686 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:44:22.686 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:44:22.686 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:44:22.686 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:44:22.687 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7094 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:44:22.687 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7094 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:44:22.687 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7094 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:44:22.687 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7094 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:44:22.687 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7094 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:44:22.687 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7095 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:44:22.687 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7095 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:44:22.687 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7095 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:44:22.687 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7095 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:44:22.687 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7095 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:44:22.687 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7095 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:44:22.687 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7095 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:44:22.687 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7095 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:44:27.690 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:44:27.690 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:44:27.690 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:44:27.690 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:44:27.690 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:44:27.690 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:44:27.699 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:44:27.700 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:44:27.700 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:44:27.701 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:44:27.701 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:44:27.704 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:44:27.704 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:44:27.705 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:44:27.705 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:44:27.705 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:44:27.706 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:44:27.706 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:44:27.706 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:44:27.709 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:44:27.709 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:44:27.709 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:44:27.709 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:44:27.710 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:44:27.710 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:44:27.710 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:44:27.710 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:44:27.712 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:44:27.712 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:44:27.713 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:44:27.713 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:44:27.713 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:44:27.713 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:44:27.713 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:44:27.713 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:44:27.718 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:44:27.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:44:27.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:44:27.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:44:27.718 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:44:27.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:44:27.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:44:27.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:44:27.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:44:27.719 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:44:27.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:44:27.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:44:27.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:44:27.719 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:44:27.719 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:44:27.719 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:44:27.719 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:44:27.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:44:27.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:44:27.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:44:27.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:44:27.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:44:27.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:44:27.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:44:27.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:44:27.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:44:27.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:44:27.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:44:27.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:44:27.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:44:27.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:44:27.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:44:27.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:44:27.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:44:27.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:44:27.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:44:27.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:44:27.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:44:27.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:44:27.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:44:27.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:44:27.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:44:27.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:44:27.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:44:27.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:44:27.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:44:27.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:44:27.724 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:44:28.201 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:44:28.236 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:44:28.236 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:44:28.237 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:44:28.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:44:28.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:44:28.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:44:28.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:44:28.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:44:28.247 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:44:28.247 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:44:28.247 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:44:28.247 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:44:28.293 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:44:28.295 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:44:28.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:44:28.299 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:44:28.299 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:44:28.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:44:28.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:44:28.672 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:44:28.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:44:28.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:44:28.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:44:28.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:44:29.144 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:44:29.614 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:44:29.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:44:29.725 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:44:29.726 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:44:29.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:44:30.087 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:44:30.559 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:44:30.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:44:30.727 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:44:30.727 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:44:30.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:44:31.030 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:44:31.501 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:44:31.728 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:44:31.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:44:31.729 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:44:31.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:44:31.974 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:44:32.446 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:44:32.729 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:44:32.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:44:32.729 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:44:32.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:44:32.917 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:44:33.389 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:44:33.861 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:44:34.332 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:44:34.803 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:44:35.272 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:44:35.744 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:44:36.216 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:44:36.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:44:36.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:44:36.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:44:36.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:44:36.305 [WARNING] transceiver.py:257 (MS@172.18.152.22:6700) RX TRXD message (fn=1857 tn=5 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:44:36.324 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:44:36.324 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:44:36.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:44:36.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:44:36.326 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:44:36.326 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:44:36.327 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:44:36.327 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:44:36.353 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:44:36.357 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:44:36.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:44:36.365 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:44:36.365 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:44:36.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:44:36.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:44:36.687 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:44:37.158 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:44:37.629 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:44:38.102 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 03:44:38.574 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 03:44:39.047 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 03:44:39.517 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 03:44:39.988 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 03:44:40.459 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 03:44:40.928 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 03:44:41.400 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 03:44:41.873 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 03:44:42.346 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 03:44:42.818 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 03:44:43.291 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 03:44:43.761 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 03:44:44.232 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 03:44:44.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:44:44.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:44:44.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:44:44.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:44:44.388 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:44:44.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:44:44.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:44:44.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:44:44.390 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:44:44.390 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:44:44.390 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:44:44.390 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:44:44.414 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:44:44.418 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:44:44.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:44:44.428 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:44:44.429 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:44:44.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:44:44.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:44:44.703 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 03:44:45.174 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 03:44:45.647 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 03:44:46.118 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 03:44:46.586 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 03:44:47.059 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 03:44:47.532 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 03:44:48.003 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 03:44:48.475 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 03:44:48.948 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 03:44:49.420 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 03:44:49.891 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 03:44:50.363 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 03:44:50.836 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 03:44:51.306 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 03:44:51.777 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 03:44:52.245 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 03:44:52.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:44:52.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:44:52.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:44:52.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:44:52.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:44:52.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:44:52.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:44:52.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:44:52.455 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:44:52.455 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:44:52.455 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:44:52.455 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:44:52.476 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:44:52.481 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:44:52.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:44:52.491 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:44:52.492 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:44:52.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:44:52.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:44:52.717 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 03:44:53.189 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 03:44:53.661 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 03:44:54.135 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 03:44:54.607 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 03:44:55.080 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 03:44:55.550 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 03:44:56.021 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 03:44:56.494 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 03:44:56.967 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-08 03:44:57.438 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-08 03:44:57.907 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-08 03:44:58.380 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-08 03:44:58.852 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-08 03:44:59.323 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-08 03:44:59.797 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-08 03:45:00.269 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-08 03:45:00.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:45:00.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:45:00.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:45:00.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:45:00.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:45:00.516 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:45:00.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:45:00.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:45:00.518 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:45:00.518 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:45:00.518 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:45:00.519 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:45:00.552 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:45:00.556 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:45:00.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:45:00.569 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:45:00.569 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:45:00.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:45:00.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:45:00.741 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-08 03:45:01.212 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-08 03:45:01.685 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-08 03:45:02.158 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-08 03:45:02.630 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-08 03:45:03.101 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-08 03:45:03.570 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-08 03:45:04.043 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-08 03:45:04.516 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-08 03:45:04.988 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-08 03:45:05.460 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-08 03:45:05.932 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-08 03:45:06.405 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-08 03:45:06.876 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-08 03:45:07.348 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-08 03:45:07.820 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-08 03:45:08.292 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-08 03:45:08.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:45:08.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:45:08.575 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:45:08.575 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:45:08.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:45:08.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:45:08.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:45:08.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:45:08.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:45:08.588 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:45:08.588 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:45:08.588 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:45:08.618 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:45:08.622 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:45:08.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:45:08.630 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:45:08.630 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:45:08.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:45:08.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:45:08.764 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-08 03:45:09.237 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-08 03:45:09.710 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-08 03:45:10.183 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-08 03:45:10.655 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-08 03:45:11.127 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-02-08 03:45:11.599 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-02-08 03:45:12.070 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-02-08 03:45:12.541 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-02-08 03:45:13.015 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-02-08 03:45:13.487 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-02-08 03:45:13.958 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-02-08 03:45:14.431 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-02-08 03:45:14.904 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-02-08 03:45:15.376 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-02-08 03:45:15.847 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-02-08 03:45:16.318 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-02-08 03:45:16.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:45:16.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:45:16.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:45:16.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:45:16.654 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:45:16.654 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:45:16.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:45:16.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:45:16.656 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:45:16.656 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:45:16.656 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:45:16.656 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:45:16.691 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:45:16.696 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:45:16.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:45:16.704 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:45:16.704 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:45:16.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:45:16.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:45:16.790 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-02-08 03:45:17.263 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-02-08 03:45:17.735 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-02-08 03:45:18.201 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-02-08 03:45:18.672 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-02-08 03:45:19.143 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-02-08 03:45:19.614 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-02-08 03:45:20.085 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-02-08 03:45:20.556 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-02-08 03:45:21.029 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-02-08 03:45:21.502 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-02-08 03:45:21.972 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-02-08 03:45:22.444 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-02-08 03:45:22.917 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-02-08 03:45:23.388 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-02-08 03:45:23.858 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-02-08 03:45:24.326 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-02-08 03:45:24.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:45:24.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:45:24.710 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:45:24.710 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:45:24.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:45:24.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:45:24.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:45:24.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:45:24.730 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:45:24.731 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:45:24.731 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:45:24.731 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:45:24.740 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:45:24.741 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:45:24.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:45:24.746 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:45:24.746 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:45:24.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:45:24.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:45:24.791 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-02-08 03:45:25.261 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-02-08 03:45:25.726 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-02-08 03:45:26.196 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-02-08 03:45:26.669 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-02-08 03:45:27.139 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-02-08 03:45:27.603 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-02-08 03:45:28.076 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-02-08 03:45:28.548 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-02-08 03:45:29.018 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-02-08 03:45:29.482 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-02-08 03:45:29.948 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-02-08 03:45:30.413 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-02-08 03:45:30.878 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-02-08 03:45:31.343 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-02-08 03:45:31.808 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-02-08 03:45:32.276 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-02-08 03:45:32.745 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-02-08 03:45:32.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:45:32.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:45:32.752 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:45:32.752 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:45:32.766 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:45:32.766 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:45:32.766 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:45:32.766 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:45:32.767 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:45:32.767 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:45:32.768 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:45:32.768 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:45:32.768 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:45:32.768 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:45:32.768 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:45:32.768 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=14083 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:45:32.768 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=14083 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:45:32.768 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=14083 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:45:32.768 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=14083 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:45:32.768 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=14083 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:45:32.768 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=14083 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:45:37.781 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:45:37.781 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:45:37.781 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:45:37.781 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:45:37.781 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:45:37.781 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:45:37.788 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:45:37.789 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:45:37.789 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:45:37.789 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:45:37.789 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:45:37.790 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:45:37.790 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:45:37.790 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:45:37.790 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:45:37.790 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:45:37.791 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:45:37.791 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:45:37.791 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:45:37.792 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:45:37.792 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:45:37.792 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:45:37.792 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:45:37.792 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:45:37.792 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:45:37.793 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:45:37.793 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:45:37.794 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:45:37.795 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:45:37.795 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:45:37.795 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:45:37.795 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:45:37.795 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:45:37.795 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:45:37.795 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:45:37.798 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:45:37.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:45:37.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:45:37.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:45:37.798 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:45:37.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:45:37.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:45:37.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:45:37.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:45:37.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:45:37.798 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:45:37.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:45:37.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:45:37.798 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:45:37.798 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:45:37.798 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:45:37.798 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:45:37.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:45:37.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:45:37.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:45:37.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:45:37.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:45:37.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:45:37.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:45:37.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:45:37.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:45:37.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:45:37.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:45:37.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:45:37.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:45:37.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:45:37.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:45:37.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:45:37.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:45:37.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:45:37.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:45:37.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:45:37.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:45:37.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:45:37.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:45:37.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:45:37.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:45:37.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:45:37.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:45:37.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:45:37.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:45:37.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:45:37.803 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:45:38.271 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:45:38.314 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:45:38.315 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:45:38.316 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:45:38.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:45:38.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:45:38.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:45:38.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:45:38.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:45:38.333 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:45:38.333 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:45:38.333 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:45:38.333 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:45:38.362 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:45:38.366 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:45:38.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:45:38.384 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:45:38.384 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:45:38.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:45:38.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:45:38.741 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:45:38.802 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:45:38.802 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:45:38.802 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:45:38.802 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:45:39.206 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:45:39.676 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:45:39.803 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:45:39.803 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:45:39.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:45:39.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:45:40.146 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:45:40.617 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:45:40.804 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:45:40.805 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:45:40.805 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:45:40.805 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:45:41.088 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:45:41.559 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:45:41.806 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:45:41.806 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:45:41.806 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:45:41.806 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:45:42.032 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:45:42.505 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:45:42.807 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:45:42.807 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:45:42.807 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:45:42.807 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:45:42.973 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:45:43.444 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:45:43.917 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:45:44.387 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:45:44.860 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:45:45.328 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:45:45.798 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:45:46.269 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:45:46.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:45:46.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:45:46.390 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:45:46.390 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:45:46.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:45:46.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:45:46.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:45:46.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:45:46.411 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:45:46.411 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:45:46.411 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:45:46.411 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:45:46.448 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:45:46.449 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:45:46.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:45:46.452 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:45:46.452 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:45:46.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:45:46.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:45:46.739 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:45:47.211 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:45:47.681 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:45:48.152 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 03:45:48.620 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 03:45:49.089 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 03:45:49.560 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 03:45:50.032 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 03:45:50.503 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 03:45:50.973 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 03:45:51.442 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 03:45:51.909 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 03:45:52.380 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 03:45:52.850 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 03:45:53.321 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 03:45:53.792 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 03:45:54.270 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 03:45:54.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:45:54.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:45:54.458 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:45:54.459 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:45:54.472 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:45:54.472 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:45:54.472 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:45:54.472 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:45:54.473 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:45:54.473 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:45:54.473 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:45:54.473 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:45:54.473 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:45:54.473 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:45:54.473 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:45:59.475 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:45:59.475 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:45:59.475 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:45:59.475 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:45:59.475 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:45:59.475 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:45:59.480 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:45:59.480 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:45:59.480 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:45:59.480 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:45:59.480 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:45:59.481 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:45:59.481 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:45:59.482 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:45:59.482 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:45:59.482 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:45:59.482 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:45:59.482 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:45:59.482 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:45:59.483 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:45:59.483 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:45:59.483 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:45:59.483 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:45:59.484 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:45:59.484 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:45:59.484 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:45:59.484 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:45:59.485 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:45:59.485 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:45:59.485 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:45:59.485 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:45:59.485 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:45:59.486 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:45:59.486 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:45:59.486 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:45:59.488 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:45:59.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:45:59.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:45:59.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:45:59.488 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:45:59.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:45:59.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:45:59.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:45:59.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:45:59.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:45:59.488 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:45:59.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:45:59.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:45:59.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:45:59.488 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:45:59.488 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:45:59.489 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:45:59.489 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:45:59.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:45:59.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:45:59.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:45:59.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:45:59.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:45:59.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:45:59.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:45:59.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:45:59.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:45:59.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:45:59.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:45:59.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:45:59.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:45:59.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:45:59.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:45:59.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:45:59.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:45:59.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:45:59.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:45:59.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:45:59.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:45:59.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:45:59.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:45:59.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:45:59.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:45:59.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:45:59.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:45:59.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:45:59.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:45:59.493 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:45:59.959 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:46:00.004 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:46:00.005 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:46:00.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:46:00.006 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:46:00.011 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:46:00.011 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:46:00.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:46:00.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:46:00.012 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:46:00.013 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:46:00.013 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:46:00.013 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:46:00.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:46:00.051 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:46:00.051 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:46:00.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:46:00.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:46:00.423 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:46:00.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:46:00.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:46:00.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:46:00.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:46:00.887 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:46:01.351 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:46:01.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:46:01.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:46:01.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:46:01.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:46:01.814 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:46:02.277 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:46:02.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:46:02.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:46:02.493 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:46:02.494 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:46:02.740 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:46:03.204 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:46:03.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:46:03.494 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:46:03.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:46:03.495 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:46:03.668 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:46:04.134 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:46:04.495 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:46:04.495 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:46:04.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:46:04.496 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:46:04.604 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:46:05.073 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:46:05.540 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:46:06.006 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:46:06.473 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:46:06.940 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:46:07.407 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:46:07.869 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:46:08.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:46:08.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:46:08.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:46:08.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:46:08.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:46:08.059 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:46:08.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:46:08.059 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:46:08.060 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:46:08.060 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:46:08.060 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:46:08.060 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:46:08.060 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:46:08.060 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:46:08.060 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:46:08.061 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1880 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:46:08.061 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1880 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:46:08.061 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1880 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:46:08.061 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1880 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:46:08.061 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1880 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:46:08.061 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1880 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:46:13.064 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:46:13.064 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:46:13.064 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:46:13.064 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:46:13.064 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:46:13.064 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:46:13.070 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:46:13.070 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:46:13.070 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:46:13.070 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:46:13.070 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:46:13.072 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:46:13.072 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:46:13.072 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:46:13.072 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:46:13.072 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:46:13.072 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:46:13.072 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:46:13.072 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:46:13.074 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:46:13.074 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:46:13.074 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:46:13.074 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:46:13.074 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:46:13.074 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:46:13.074 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:46:13.074 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:46:13.076 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:46:13.076 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:46:13.076 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:46:13.076 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:46:13.076 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:46:13.076 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:46:13.076 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:46:13.076 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:46:13.079 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:46:13.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:46:13.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:46:13.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:46:13.079 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:46:13.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:46:13.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:46:13.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:13.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:46:13.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:46:13.079 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:46:13.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:13.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:13.079 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:46:13.079 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:46:13.079 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:46:13.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:13.079 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:46:13.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:13.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:13.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:46:13.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:13.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:13.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:13.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:13.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:13.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:13.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:13.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:13.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:13.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:13.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:13.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:13.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:13.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:13.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:13.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:13.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:13.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:13.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:13.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:13.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:13.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:13.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:13.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:13.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:13.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:13.084 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:46:13.548 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:46:13.591 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:46:13.592 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:46:13.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:46:13.592 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:46:13.598 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:46:13.598 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:46:13.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:46:13.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:46:13.599 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:46:13.599 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:46:13.599 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:46:13.599 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:46:13.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:46:13.639 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:46:13.639 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:46:13.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:46:13.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:46:14.010 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:46:14.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:46:14.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:46:14.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:46:14.083 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:46:14.473 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:46:14.938 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:46:15.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:46:15.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:46:15.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:46:15.083 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:46:15.400 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:46:15.863 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:46:16.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:46:16.084 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:46:16.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:46:16.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:46:16.326 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:46:16.790 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:46:17.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:46:17.084 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:46:17.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:46:17.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:46:17.252 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:46:17.716 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:46:18.085 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:46:18.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:46:18.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:46:18.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:46:18.181 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:46:18.649 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:46:19.114 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:46:19.577 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:46:20.040 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:46:20.505 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:46:20.972 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:46:21.436 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:46:21.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:46:21.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:46:21.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:46:21.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:46:21.644 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:46:21.644 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:46:21.644 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:46:21.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:46:21.645 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:46:21.645 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:46:21.645 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:46:21.645 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:46:21.645 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:46:21.645 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:46:21.645 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:46:26.653 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:46:26.653 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:46:26.653 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:46:26.653 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:46:26.653 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:46:26.653 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:46:26.657 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:46:26.657 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:46:26.657 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:46:26.657 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:46:26.657 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:46:26.659 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:46:26.659 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:46:26.659 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:46:26.659 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:46:26.659 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:46:26.659 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:46:26.659 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:46:26.659 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:46:26.660 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:46:26.660 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:46:26.661 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:46:26.661 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:46:26.661 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:46:26.661 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:46:26.661 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:46:26.661 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:46:26.662 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:46:26.662 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:46:26.662 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:46:26.662 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:46:26.663 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:46:26.663 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:46:26.663 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:46:26.663 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:46:26.665 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:46:26.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:46:26.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:46:26.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:46:26.665 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:46:26.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:46:26.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:46:26.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:26.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:46:26.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:46:26.665 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:46:26.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:26.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:26.665 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:46:26.665 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:46:26.665 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:46:26.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:26.666 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:46:26.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:26.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:26.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:46:26.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:26.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:26.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:26.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:26.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:26.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:26.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:26.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:26.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:26.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:26.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:26.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:26.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:26.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:26.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:26.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:26.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:26.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:26.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:26.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:26.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:26.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:26.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:26.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:26.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:26.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:26.670 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:46:27.150 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:46:27.191 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:46:27.193 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:46:27.195 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:46:27.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:46:27.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:46:27.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:46:27.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:46:27.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:46:27.221 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:46:27.221 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:46:27.221 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:46:27.221 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:46:27.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:46:27.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:46:27.409 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:46:27.409 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:46:27.409 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:46:27.409 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:46:27.410 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:46:27.410 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:46:27.410 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:46:27.410 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:46:27.410 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:46:27.410 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:46:27.410 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:46:27.410 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=159 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:46:27.410 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=159 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:46:27.410 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=159 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:46:27.410 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=159 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:46:27.410 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=159 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:46:27.410 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=160 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:46:27.410 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=160 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:46:27.410 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=160 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:46:27.410 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=160 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:46:27.410 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=160 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:46:27.410 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=160 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:46:27.410 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=160 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:46:27.410 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=160 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:46:32.431 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:46:32.431 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:46:32.431 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:46:32.431 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:46:32.431 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:46:32.431 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:46:32.440 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:46:32.442 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:46:32.442 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:46:32.443 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:46:32.443 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:46:32.448 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:46:32.448 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:46:32.448 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:46:32.448 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:46:32.448 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:46:32.449 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:46:32.449 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:46:32.449 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:46:32.453 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:46:32.453 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:46:32.453 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:46:32.453 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:46:32.453 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:46:32.454 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:46:32.454 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:46:32.454 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:46:32.458 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:46:32.458 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:46:32.458 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:46:32.458 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:46:32.458 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:46:32.458 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:46:32.458 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:46:32.458 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:46:32.464 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:46:32.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:46:32.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:46:32.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:46:32.464 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:46:32.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:46:32.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:46:32.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:46:32.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:46:32.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:32.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:32.465 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:46:32.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:32.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:32.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:32.465 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:46:32.465 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:46:32.465 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:46:32.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:32.465 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:46:32.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:32.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:32.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:46:32.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:32.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:32.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:32.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:32.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:32.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:32.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:32.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:32.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:32.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:32.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:32.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:32.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:32.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:32.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:32.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:32.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:32.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:32.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:32.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:32.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:32.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:32.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:32.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:32.470 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:46:32.948 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:46:32.999 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:46:33.002 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:46:33.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:46:33.005 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:46:33.026 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:46:33.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:46:33.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:46:33.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:46:33.036 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:46:33.036 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:46:33.037 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:46:33.037 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:46:33.420 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:46:33.471 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:46:33.471 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:46:33.471 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:46:33.472 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:46:33.891 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:46:34.362 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:46:34.472 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:46:34.472 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:46:34.472 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:46:34.473 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:46:34.836 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:46:35.308 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:46:35.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:46:35.474 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:46:35.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:46:35.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:46:35.780 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:46:36.250 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:46:36.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:46:36.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:46:36.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:46:36.476 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:46:36.722 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:46:37.195 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:46:37.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:46:37.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:46:37.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:46:37.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:46:37.668 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:46:37.691 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:46:37.691 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:46:37.691 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:46:37.691 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:46:37.693 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:46:37.693 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:46:37.693 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:46:37.693 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:46:37.693 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:46:37.693 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:46:37.693 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:46:38.147 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:46:38.628 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:46:39.109 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:46:39.590 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:46:40.070 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:46:40.551 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:46:41.031 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:46:41.512 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:46:41.992 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:46:42.473 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:46:42.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:46:42.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:46:42.697 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:46:42.702 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:46:42.702 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:46:42.702 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:46:42.703 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:46:42.703 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:46:42.703 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:46:42.707 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:46:42.708 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:46:42.708 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:46:42.708 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:46:42.708 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:46:42.709 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:46:42.709 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:46:42.709 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:46:42.709 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:46:42.709 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:46:42.710 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:46:42.710 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:46:42.710 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:46:42.711 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:46:42.711 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:46:42.711 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:46:42.711 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:46:42.712 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:46:42.712 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:46:42.712 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:46:42.712 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:46:42.713 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:46:42.713 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:46:42.714 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:46:42.714 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:46:42.714 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:46:42.714 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:46:42.714 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:46:42.714 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:46:42.716 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:46:42.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:46:42.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:46:42.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:46:42.716 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:46:42.717 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:46:42.717 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:46:42.717 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:42.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:42.719 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:46:42.719 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:46:42.719 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:46:42.719 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:46:42.719 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:46:42.719 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:46:42.719 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:46:47.728 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:46:47.728 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:46:47.728 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:46:47.728 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:46:47.728 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:46:47.728 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:46:47.740 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:46:47.741 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:46:47.741 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:46:47.741 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:46:47.741 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:46:47.743 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:46:47.743 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:46:47.743 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:46:47.743 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:46:47.743 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:46:47.744 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:46:47.744 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:46:47.744 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:46:47.745 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:46:47.745 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:46:47.745 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:46:47.745 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:46:47.745 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:46:47.745 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:46:47.745 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:46:47.745 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:46:47.747 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:46:47.747 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:46:47.747 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:46:47.747 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:46:47.747 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:46:47.747 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:46:47.747 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:46:47.747 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:46:47.750 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:46:47.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:46:47.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:46:47.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:46:47.750 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:46:47.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:46:47.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:46:47.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:47.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:46:47.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:46:47.750 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:46:47.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:47.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:47.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:47.750 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:46:47.750 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:46:47.750 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:46:47.750 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:46:47.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:47.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:47.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:47.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:46:47.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:47.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:47.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:47.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:47.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:47.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:47.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:47.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:47.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:47.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:47.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:47.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:47.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:47.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:47.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:47.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:46:47.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:47.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:47.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:47.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:47.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:47.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:47.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:46:47.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:46:47.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:46:47.755 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:46:48.233 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:46:48.278 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:46:48.280 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:46:48.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:46:48.282 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:46:48.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:46:48.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:46:48.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:46:48.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:46:48.312 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:46:48.312 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:46:48.312 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:46:48.312 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:46:48.706 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:46:48.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:46:48.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:46:48.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:46:48.754 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:46:49.177 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:46:49.650 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:46:49.755 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:46:49.755 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:46:49.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:46:49.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:46:50.123 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:46:50.595 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:46:50.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:46:50.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:46:50.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:46:50.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:46:51.066 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:46:51.539 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:46:51.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:46:51.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:46:51.758 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:46:51.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:46:52.012 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:46:52.484 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:46:52.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:46:52.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:46:52.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:46:52.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:46:52.955 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:46:53.425 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:46:53.896 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:46:53.974 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:46:54.370 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:46:54.842 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:46:54.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:46:55.314 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:46:55.785 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:46:55.977 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:46:56.256 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:46:56.729 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:46:56.978 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:46:57.202 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:46:57.674 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:46:57.979 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:46:57.980 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:46:58.146 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 03:46:58.620 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 03:46:59.092 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 03:46:59.566 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 03:47:00.038 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 03:47:00.510 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 03:47:00.984 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 03:47:01.223 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:47:01.457 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 03:47:01.928 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 03:47:02.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:47:02.400 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 03:47:02.873 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 03:47:03.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:47:03.345 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 03:47:03.818 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 03:47:04.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:47:04.289 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 03:47:04.762 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 03:47:05.227 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:47:05.235 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 03:47:05.707 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 03:47:06.180 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 03:47:06.228 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:47:06.653 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 03:47:07.125 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 03:47:07.596 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 03:47:08.069 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 03:47:08.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:47:08.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:47:08.436 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:47:08.436 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:47:08.436 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:47:08.436 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:47:08.437 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:47:08.437 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:47:08.437 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:47:08.437 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:47:08.437 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:47:08.437 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:47:08.437 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:47:13.445 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:47:13.445 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:47:13.445 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:47:13.445 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:47:13.445 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:47:13.445 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:47:13.458 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:47:13.460 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:47:13.460 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:47:13.461 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:47:13.461 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:47:13.467 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:47:13.468 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:47:13.468 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:47:13.468 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:47:13.469 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:47:13.469 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:47:13.470 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:47:13.470 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:47:13.473 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:47:13.473 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:47:13.474 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:47:13.474 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:47:13.474 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:47:13.475 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:47:13.475 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:47:13.475 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:47:13.478 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:47:13.478 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:47:13.479 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:47:13.479 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:47:13.479 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:47:13.479 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:47:13.479 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:47:13.479 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:47:13.484 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:47:13.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:47:13.485 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:47:13.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:47:13.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:47:13.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:47:13.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:47:13.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:47:13.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:47:13.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:47:13.485 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:47:13.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:47:13.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:47:13.485 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:47:13.485 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:47:13.485 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:47:13.485 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:47:13.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:47:13.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:47:13.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:47:13.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:47:13.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:47:13.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:47:13.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:47:13.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:47:13.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:47:13.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:47:13.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:47:13.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:47:13.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:47:13.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:47:13.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:47:13.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:47:13.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:47:13.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:47:13.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:47:13.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:47:13.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:47:13.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:47:13.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:47:13.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:47:13.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:47:13.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:47:13.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:47:13.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:47:13.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:47:13.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:47:13.490 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:47:13.968 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:47:14.014 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:47:14.017 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:47:14.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:47:14.019 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:47:14.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:47:14.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:47:14.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:47:14.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:47:14.049 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:47:14.049 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:47:14.049 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:47:14.049 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:47:14.059 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:47:14.062 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:47:14.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD NOHANDOVER
2026-02-08 03:47:14.067 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:47:14.067 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:47:14.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:47:14.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:47:14.436 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:47:14.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:47:14.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:47:14.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:47:14.496 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:47:14.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD NOHANDOVER
2026-02-08 03:47:14.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:47:14.871 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:47:14.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:47:14.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:47:14.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:47:14.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:47:14.880 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:47:14.883 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:47:14.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:47:14.883 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:47:14.883 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:47:14.883 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:47:14.884 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:47:14.884 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:47:14.884 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=302 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:47:14.884 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=302 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:47:14.884 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=303 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:47:14.884 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=303 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:47:14.884 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=303 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:47:14.884 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=303 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:47:14.884 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=303 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:47:14.884 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=303 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:47:14.884 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=303 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:47:14.884 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=303 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:47:19.887 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:47:19.887 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:47:19.887 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:47:19.887 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:47:19.887 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:47:19.887 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:47:19.895 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:47:19.896 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:47:19.896 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:47:19.896 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:47:19.896 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:47:19.899 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:47:19.899 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:47:19.900 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:47:19.900 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:47:19.900 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:47:19.900 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:47:19.900 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:47:19.900 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:47:19.904 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:47:19.905 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:47:19.905 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:47:19.905 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:47:19.905 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:47:19.905 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:47:19.905 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:47:19.905 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:47:19.909 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:47:19.909 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:47:19.909 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:47:19.909 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:47:19.909 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:47:19.910 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:47:19.910 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:47:19.910 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:47:19.915 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:47:19.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:47:19.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:47:19.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:47:19.915 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:47:19.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:47:19.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:47:19.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:47:19.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:47:19.916 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:47:19.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:47:19.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:47:19.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:47:19.916 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:47:19.916 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:47:19.916 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:47:19.916 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:47:19.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:47:19.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:47:19.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:47:19.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:47:19.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:47:19.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:47:19.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:47:19.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:47:19.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:47:19.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:47:19.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:47:19.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:47:19.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:47:19.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:47:19.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:47:19.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:47:19.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:47:19.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:47:19.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:47:19.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:47:19.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:47:19.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:47:19.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:47:19.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:47:19.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:47:19.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:47:19.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:47:19.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:47:19.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:47:19.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:47:19.921 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:47:20.400 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:47:20.451 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:47:20.453 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:47:20.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:47:20.456 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:47:20.477 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:47:20.477 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:47:20.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:47:20.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:47:20.481 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:47:20.481 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:47:20.481 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:47:20.481 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:47:20.491 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:47:20.493 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:47:20.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD NOHANDOVER
2026-02-08 03:47:20.498 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:47:20.498 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:47:20.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:47:20.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:47:20.869 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:47:20.921 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:47:20.922 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:47:20.922 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:47:20.922 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:47:21.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD NOHANDOVER
2026-02-08 03:47:21.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:47:21.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:47:21.304 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:47:21.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:47:21.315 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:47:21.315 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:47:21.315 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:47:21.316 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:47:21.316 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:47:21.316 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:47:21.316 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:47:21.316 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:47:21.316 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:47:21.316 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:47:21.316 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=302 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:47:21.316 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=302 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:47:21.316 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=302 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:47:21.316 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=302 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:47:21.316 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=302 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:47:21.316 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=303 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:47:21.317 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=303 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:47:21.317 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=303 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:47:21.317 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=303 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:47:21.317 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=303 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:47:21.317 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=303 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:47:21.317 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=303 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:47:21.317 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=303 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:47:26.324 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:47:26.324 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:47:26.324 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:47:26.324 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:47:26.324 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:47:26.324 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:47:26.333 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:47:26.335 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:47:26.335 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:47:26.336 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:47:26.336 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:47:26.342 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:47:26.342 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:47:26.342 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:47:26.342 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:47:26.343 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:47:26.343 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:47:26.344 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:47:26.344 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:47:26.347 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:47:26.347 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:47:26.348 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:47:26.348 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:47:26.348 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:47:26.348 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:47:26.349 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:47:26.349 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:47:26.351 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:47:26.352 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:47:26.352 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:47:26.352 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:47:26.352 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:47:26.353 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:47:26.353 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:47:26.353 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:47:26.357 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:47:26.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:47:26.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:47:26.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:47:26.357 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:47:26.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:47:26.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:47:26.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:47:26.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:47:26.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:47:26.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:47:26.358 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:47:26.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:47:26.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:47:26.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:47:26.358 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:47:26.358 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:47:26.358 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:47:26.358 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:47:26.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:47:26.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:47:26.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:47:26.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:47:26.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:47:26.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:47:26.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:47:26.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:47:26.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:47:26.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:47:26.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:47:26.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:47:26.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:47:26.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:47:26.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:47:26.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:47:26.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:47:26.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:47:26.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:47:26.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:47:26.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:47:26.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:47:26.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:47:26.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:47:26.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:47:26.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:47:26.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:47:26.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:47:26.363 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:47:26.840 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:47:26.889 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:47:26.891 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:47:26.891 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:47:26.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:47:26.910 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:47:26.910 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:47:26.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:47:26.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:47:26.916 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:47:26.916 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:47:26.917 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:47:26.917 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:47:26.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:47:26.945 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:47:26.945 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:47:26.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:47:26.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:47:27.313 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:47:27.363 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:47:27.364 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:47:27.364 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:47:27.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:47:27.784 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:47:28.257 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:47:28.365 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:47:28.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:47:28.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:47:28.365 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:47:28.730 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:47:29.203 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:47:29.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:47:29.366 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:47:29.366 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:47:29.366 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:47:29.676 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:47:30.149 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:47:30.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:47:30.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:47:30.367 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:47:30.367 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:47:30.621 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:47:31.095 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:47:31.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:47:31.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:47:31.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:47:31.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:47:31.567 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:47:32.040 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:47:32.514 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:47:32.986 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:47:33.459 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:47:33.932 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:47:34.405 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:47:34.877 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:47:35.348 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:47:35.819 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:47:36.292 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:47:36.765 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 03:47:37.237 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 03:47:37.708 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 03:47:38.181 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 03:47:38.654 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 03:47:39.127 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 03:47:39.600 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 03:47:40.073 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 03:47:40.545 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 03:47:41.017 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 03:47:41.490 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 03:47:41.963 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 03:47:42.435 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 03:47:42.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:47:42.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:47:42.744 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:47:42.744 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:47:42.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:47:42.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:47:42.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:47:42.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:47:42.759 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:47:42.759 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:47:42.759 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:47:42.759 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:47:42.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:47:42.819 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:47:42.819 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:47:42.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:47:42.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:47:42.906 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 03:47:43.377 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 03:47:43.850 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 03:47:44.323 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 03:47:44.795 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 03:47:45.268 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 03:47:45.741 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 03:47:46.214 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 03:47:46.685 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 03:47:47.158 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 03:47:47.631 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 03:47:48.104 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 03:47:48.582 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 03:47:49.055 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 03:47:49.528 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 03:47:50.001 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 03:47:50.474 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 03:47:50.947 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 03:47:51.420 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 03:47:51.892 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 03:47:52.366 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 03:47:52.838 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 03:47:53.311 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 03:47:53.784 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 03:47:54.257 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 03:47:54.730 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 03:47:55.203 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 03:47:55.676 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-08 03:47:56.149 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-08 03:47:56.622 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-08 03:47:57.095 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-08 03:47:57.567 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-08 03:47:58.041 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-08 03:47:58.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:47:58.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:47:58.231 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:47:58.231 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:47:58.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:47:58.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:47:58.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:47:58.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:47:58.246 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:47:58.246 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:47:58.246 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:47:58.246 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:47:58.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:47:58.280 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:47:58.280 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:47:58.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:47:58.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:47:58.513 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-08 03:47:58.986 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-08 03:47:59.457 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-08 03:47:59.930 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-08 03:48:00.403 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-08 03:48:00.875 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-08 03:48:01.346 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-08 03:48:01.819 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-08 03:48:02.292 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-08 03:48:02.765 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-08 03:48:03.238 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-08 03:48:03.711 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-08 03:48:04.183 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-08 03:48:04.657 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-08 03:48:05.130 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-08 03:48:05.602 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-08 03:48:06.075 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-08 03:48:06.548 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-08 03:48:07.021 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-08 03:48:07.492 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-08 03:48:07.965 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-08 03:48:08.438 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-08 03:48:08.911 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-08 03:48:09.384 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-08 03:48:09.857 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-02-08 03:48:10.329 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-02-08 03:48:10.802 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-02-08 03:48:11.276 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-02-08 03:48:11.748 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-02-08 03:48:12.222 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-02-08 03:48:12.694 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-02-08 03:48:13.167 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-02-08 03:48:13.640 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-02-08 03:48:13.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:48:13.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:48:13.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:48:13.716 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:48:13.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:48:13.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:48:13.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:48:13.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:48:13.731 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:48:13.731 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:48:13.731 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:48:13.731 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:48:13.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:48:13.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:48:13.786 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:48:13.786 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:48:13.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:48:13.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:48:14.113 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-02-08 03:48:14.586 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-02-08 03:48:15.059 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-02-08 03:48:15.532 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-02-08 03:48:16.005 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-02-08 03:48:16.477 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-02-08 03:48:16.950 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-02-08 03:48:17.423 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-02-08 03:48:17.896 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-02-08 03:48:18.369 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-02-08 03:48:18.841 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-02-08 03:48:19.314 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-02-08 03:48:19.787 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-02-08 03:48:20.260 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-02-08 03:48:20.733 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-02-08 03:48:21.206 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-02-08 03:48:21.678 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-02-08 03:48:22.152 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-02-08 03:48:22.624 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-02-08 03:48:23.097 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-02-08 03:48:23.568 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-02-08 03:48:24.041 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-02-08 03:48:24.514 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-02-08 03:48:24.987 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-02-08 03:48:25.460 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-02-08 03:48:25.933 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-02-08 03:48:26.405 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-02-08 03:48:26.876 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-02-08 03:48:27.350 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-02-08 03:48:27.823 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-02-08 03:48:28.295 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-02-08 03:48:28.769 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-02-08 03:48:29.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:48:29.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:48:29.196 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:48:29.197 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:48:29.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:48:29.200 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:48:29.200 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:48:29.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:48:29.201 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:48:29.201 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:48:29.201 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:48:29.201 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:48:29.201 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:48:29.201 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:48:29.201 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:48:34.210 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:48:34.210 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:48:34.210 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:48:34.210 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:48:34.210 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:48:34.210 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:48:34.218 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:48:34.219 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:48:34.220 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:48:34.220 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:48:34.220 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:48:34.224 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:48:34.224 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:48:34.224 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:48:34.224 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:48:34.225 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:48:34.225 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:48:34.225 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:48:34.225 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:48:34.229 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:48:34.230 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:48:34.230 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:48:34.230 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:48:34.230 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:48:34.230 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:48:34.230 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:48:34.230 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:48:34.234 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:48:34.234 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:48:34.234 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:48:34.234 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:48:34.235 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:48:34.235 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:48:34.235 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:48:34.235 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:48:34.241 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:48:34.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:48:34.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:48:34.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:48:34.241 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:48:34.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:48:34.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:48:34.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:48:34.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:48:34.241 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:48:34.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:48:34.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:48:34.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:48:34.242 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:48:34.242 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:48:34.242 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:48:34.242 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:48:34.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:48:34.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:48:34.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:48:34.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:48:34.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:48:34.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:48:34.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:48:34.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:48:34.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:48:34.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:48:34.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:48:34.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:48:34.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:48:34.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:48:34.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:48:34.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:48:34.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:48:34.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:48:34.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:48:34.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:48:34.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:48:34.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:48:34.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:48:34.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:48:34.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:48:34.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:48:34.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:48:34.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:48:34.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:48:34.245 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:48:34.245 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:48:34.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:48:34.245 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:48:34.245 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:48:34.245 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:48:34.245 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:48:34.245 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:48:39.251 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:48:39.251 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:48:39.252 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:48:39.252 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:48:39.252 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:48:39.252 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:48:39.260 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:48:39.261 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:48:39.261 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:48:39.261 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:48:39.262 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:48:39.266 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:48:39.266 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:48:39.267 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:48:39.267 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:48:39.267 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:48:39.267 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:48:39.268 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:48:39.268 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:48:39.271 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:48:39.271 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:48:39.271 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:48:39.271 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:48:39.272 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:48:39.272 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:48:39.272 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:48:39.272 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:48:39.274 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:48:39.275 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:48:39.275 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:48:39.275 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:48:39.275 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:48:39.275 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:48:39.276 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:48:39.276 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:48:39.279 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:48:39.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:48:39.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:48:39.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:48:39.279 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:48:39.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:48:39.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:48:39.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:48:39.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:48:39.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:48:39.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:48:39.280 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:48:39.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:48:39.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:48:39.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:48:39.280 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:48:39.280 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:48:39.280 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:48:39.280 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:48:39.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:48:39.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:48:39.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:48:39.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:48:39.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:48:39.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:48:39.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:48:39.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:48:39.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:48:39.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:48:39.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:48:39.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:48:39.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:48:39.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:48:39.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:48:39.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:48:39.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:48:39.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:48:39.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:48:39.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:48:39.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:48:39.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:48:39.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:48:39.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:48:39.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:48:39.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:48:39.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:48:39.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:48:39.285 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:48:39.763 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:48:39.803 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:48:39.805 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:48:39.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:48:39.807 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:48:39.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:48:39.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:48:39.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:48:39.830 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:48:39.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:48:39.832 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:48:39.832 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:48:39.833 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:48:39.833 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:48:39.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:48:39.866 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:48:39.866 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:48:39.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:48:39.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:48:40.234 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:48:40.282 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:48:40.283 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:48:40.283 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:48:40.285 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:48:40.707 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:48:41.180 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:48:41.283 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:48:41.284 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:48:41.284 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:48:41.285 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:48:41.650 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:48:42.124 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:48:42.284 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:48:42.284 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:48:42.285 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:48:42.286 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:48:42.597 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:48:43.069 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:48:43.285 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:48:43.285 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:48:43.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:48:43.287 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:48:43.540 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:48:44.013 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:48:44.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:48:44.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:48:44.287 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:48:44.288 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:48:44.486 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:48:44.958 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:48:45.432 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:48:45.905 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:48:46.377 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:48:46.850 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:48:47.323 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:48:47.795 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:48:48.266 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:48:48.740 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:48:49.213 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:48:49.685 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 03:48:50.156 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 03:48:50.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:48:50.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:48:50.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:48:50.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:48:50.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:48:50.246 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:48:50.246 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:48:50.246 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:48:50.247 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:48:50.247 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:48:50.247 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:48:50.247 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:48:50.247 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:48:50.247 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:48:50.247 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:48:50.247 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2368 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:48:50.247 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2368 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:48:50.247 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2368 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:48:50.247 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2368 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:48:50.247 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2368 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:48:50.247 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2368 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:48:55.255 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:48:55.255 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:48:55.255 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:48:55.255 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:48:55.255 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:48:55.255 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:48:55.263 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:48:55.264 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:48:55.264 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:48:55.265 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:48:55.265 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:48:55.269 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:48:55.269 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:48:55.269 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:48:55.269 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:48:55.270 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:48:55.270 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:48:55.271 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:48:55.271 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:48:55.273 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:48:55.274 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:48:55.274 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:48:55.274 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:48:55.274 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:48:55.275 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:48:55.275 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:48:55.275 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:48:55.277 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:48:55.277 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:48:55.277 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:48:55.277 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:48:55.278 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:48:55.278 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:48:55.278 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:48:55.278 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:48:55.282 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:48:55.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:48:55.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:48:55.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:48:55.282 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:48:55.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:48:55.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:48:55.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:48:55.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:48:55.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:48:55.282 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:48:55.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:48:55.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:48:55.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:48:55.282 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:48:55.282 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:48:55.282 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:48:55.282 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:48:55.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:48:55.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:48:55.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:48:55.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:48:55.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:48:55.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:48:55.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:48:55.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:48:55.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:48:55.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:48:55.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:48:55.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:48:55.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:48:55.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:48:55.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:48:55.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:48:55.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:48:55.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:48:55.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:48:55.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:48:55.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:48:55.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:48:55.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:48:55.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:48:55.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:48:55.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:48:55.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:48:55.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:48:55.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:48:55.287 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:48:55.764 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:48:55.807 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:48:55.808 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:48:55.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:48:55.809 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:48:55.840 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:48:55.840 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:48:55.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:48:55.847 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:48:55.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:48:55.850 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:48:55.850 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:48:55.850 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:48:55.850 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:48:55.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:48:55.860 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:48:55.860 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:48:55.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:48:55.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:48:56.237 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:48:56.286 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:48:56.286 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:48:56.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:48:56.286 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:48:56.711 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:48:57.183 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:48:57.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:48:57.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:48:57.287 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:48:57.287 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:48:57.656 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:48:58.129 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:48:58.288 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:48:58.289 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:48:58.289 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:48:58.289 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:48:58.602 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:48:59.074 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:48:59.289 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:48:59.289 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:48:59.290 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:48:59.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:48:59.545 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:49:00.019 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:49:00.290 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:49:00.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:49:00.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:49:00.291 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:49:00.492 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:49:00.965 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:49:01.438 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:49:01.911 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:49:02.384 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:49:02.857 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:49:03.329 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:49:03.800 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:49:04.273 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:49:04.746 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:49:05.219 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:49:05.690 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 03:49:06.163 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 03:49:06.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:49:06.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:49:06.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:49:06.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:49:06.262 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:49:06.262 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:49:06.262 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:49:06.262 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:49:06.265 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:49:06.265 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:49:06.265 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:49:06.265 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:49:06.265 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:49:06.265 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:49:06.265 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:49:06.265 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2371 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:49:06.265 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2371 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:49:06.265 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2371 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:49:06.265 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2371 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:49:06.265 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2371 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:49:06.265 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2371 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:49:06.265 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2371 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:49:06.265 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2371 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:49:11.270 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:49:11.270 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:49:11.270 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:49:11.270 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:49:11.270 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:49:11.270 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:49:11.279 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:49:11.280 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:49:11.280 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:49:11.281 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:49:11.281 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:49:11.284 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:49:11.285 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:49:11.285 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:49:11.285 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:49:11.285 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:49:11.286 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:49:11.286 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:49:11.286 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:49:11.289 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:49:11.289 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:49:11.289 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:49:11.289 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:49:11.289 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:49:11.290 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:49:11.290 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:49:11.290 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:49:11.292 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:49:11.292 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:49:11.292 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:49:11.293 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:49:11.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:49:11.293 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:49:11.293 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:49:11.293 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:49:11.296 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:49:11.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:49:11.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:49:11.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:49:11.296 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:49:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:49:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:49:11.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:49:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:49:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:49:11.297 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:49:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:49:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:49:11.297 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:49:11.297 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:49:11.297 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:49:11.297 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:49:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:49:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:49:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:49:11.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:49:11.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:49:11.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:49:11.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:49:11.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:49:11.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:49:11.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:49:11.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:49:11.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:49:11.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:49:11.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:49:11.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:49:11.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:49:11.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:49:11.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:49:11.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:49:11.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:49:11.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:49:11.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:49:11.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:49:11.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:49:11.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:49:11.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:49:11.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:49:11.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:49:11.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:49:11.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:49:11.302 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:49:11.780 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:49:11.822 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:49:11.824 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:49:11.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:49:11.827 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:49:11.859 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:49:11.859 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:49:11.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:49:11.866 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:49:11.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:49:11.868 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:49:11.868 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:49:11.868 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:49:11.868 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:49:11.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:49:11.874 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:49:11.874 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:49:11.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:49:11.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:49:12.252 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:49:12.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:49:12.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:49:12.300 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:49:12.300 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:49:12.724 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:49:12.738 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 03:49:13.197 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:49:13.300 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:49:13.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:49:13.300 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:49:13.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:49:13.670 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:49:14.142 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:49:14.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:49:14.302 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:49:14.302 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:49:14.302 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:49:14.616 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:49:15.088 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:49:15.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:49:15.303 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:49:15.303 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:49:15.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:49:15.561 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:49:16.035 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:49:16.303 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:49:16.304 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:49:16.304 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:49:16.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:49:16.507 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:49:16.979 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:49:17.450 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:49:17.924 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:49:18.396 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:49:18.869 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:49:19.342 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:49:19.815 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:49:20.287 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:49:20.758 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:49:21.232 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:49:21.705 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 03:49:22.176 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 03:49:22.649 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 03:49:23.122 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 03:49:23.593 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 03:49:24.065 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 03:49:24.539 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 03:49:25.012 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 03:49:25.485 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 03:49:25.958 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 03:49:26.430 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 03:49:26.903 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 03:49:27.376 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 03:49:27.841 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 03:49:28.314 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 03:49:28.787 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 03:49:29.260 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 03:49:29.733 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 03:49:30.205 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 03:49:30.679 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 03:49:31.151 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 03:49:31.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:49:31.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:49:31.469 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:49:31.469 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:49:31.482 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:49:31.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:49:31.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:49:31.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:49:31.488 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:49:31.488 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:49:31.488 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:49:31.488 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:49:31.488 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:49:31.488 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:49:31.488 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:49:31.489 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4358 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:49:31.489 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4358 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:49:31.489 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4358 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:49:31.489 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4358 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:49:31.489 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4358 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:49:31.489 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4358 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:49:31.489 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4359 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:49:31.490 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4359 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:49:31.490 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4359 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:49:31.490 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4359 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:49:31.490 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4359 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:49:31.490 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4359 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:49:31.490 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4359 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:49:31.490 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4359 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:49:36.490 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:49:36.491 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:49:36.491 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:49:36.491 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:49:36.491 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:49:36.491 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:49:36.498 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:49:36.499 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:49:36.499 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:49:36.499 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:49:36.499 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:49:36.502 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:49:36.502 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:49:36.503 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:49:36.503 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:49:36.503 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:49:36.503 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:49:36.504 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:49:36.504 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:49:36.505 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:49:36.506 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:49:36.506 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:49:36.506 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:49:36.506 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:49:36.506 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:49:36.506 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:49:36.506 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:49:36.508 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:49:36.508 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:49:36.508 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:49:36.508 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:49:36.508 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:49:36.508 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:49:36.509 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:49:36.509 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:49:36.512 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:49:36.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:49:36.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:49:36.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:49:36.512 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:49:36.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:49:36.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:49:36.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:49:36.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:49:36.512 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:49:36.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:49:36.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:49:36.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:49:36.512 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:49:36.512 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:49:36.512 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:49:36.512 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:49:36.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:49:36.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:49:36.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:49:36.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:49:36.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:49:36.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:49:36.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:49:36.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:49:36.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:49:36.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:49:36.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:49:36.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:49:36.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:49:36.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:49:36.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:49:36.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:49:36.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:49:36.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:49:36.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:49:36.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:49:36.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:49:36.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:49:36.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:49:36.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:49:36.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:49:36.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:49:36.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:49:36.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:49:36.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:49:36.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:49:36.517 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:49:36.994 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:49:37.036 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:49:37.039 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:49:37.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:49:37.041 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:49:37.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:49:37.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:49:37.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:49:37.073 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:49:37.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:49:37.075 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:49:37.075 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:49:37.075 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:49:37.075 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:49:37.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:49:37.100 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:49:37.101 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:49:37.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:49:37.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:49:37.467 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:49:37.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:49:37.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:49:37.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:49:37.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:49:37.938 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:49:37.952 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 03:49:38.411 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:49:38.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:49:38.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:49:38.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:49:38.517 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:49:38.884 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:49:38.919 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 03:49:39.357 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:49:39.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:49:39.518 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:49:39.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:49:39.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:49:39.830 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:49:39.878 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 03:49:40.303 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:49:40.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:49:40.519 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:49:40.519 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:49:40.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:49:40.775 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:49:40.845 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 03:49:41.249 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:49:41.520 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:49:41.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:49:41.520 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:49:41.521 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:49:41.721 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:49:41.811 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 03:49:42.194 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:49:42.665 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:49:42.771 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 03:49:43.136 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:49:43.608 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:49:43.731 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 03:49:44.081 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:49:44.554 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:49:44.697 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 03:49:45.027 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:49:45.500 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:49:45.664 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 03:49:45.973 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:49:46.447 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:49:46.629 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 03:49:46.919 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 03:49:47.390 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 03:49:47.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:49:47.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:49:47.480 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:49:47.480 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:49:47.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:49:47.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:49:47.490 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:49:47.490 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:49:47.491 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:49:47.491 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:49:47.491 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:49:47.491 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:49:47.491 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:49:47.491 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:49:47.491 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:49:52.499 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:49:52.499 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:49:52.499 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:49:52.499 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:49:52.499 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:49:52.499 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:49:52.511 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:49:52.512 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:49:52.512 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:49:52.512 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:49:52.512 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:49:52.514 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:49:52.514 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:49:52.514 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:49:52.514 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:49:52.514 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:49:52.514 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:49:52.514 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:49:52.514 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:49:52.516 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:49:52.516 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:49:52.516 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:49:52.516 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:49:52.517 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:49:52.517 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:49:52.517 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:49:52.517 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:49:52.518 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:49:52.518 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:49:52.518 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:49:52.518 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:49:52.518 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:49:52.518 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:49:52.518 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:49:52.518 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:49:52.521 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:49:52.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:49:52.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:49:52.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:49:52.521 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:49:52.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:49:52.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:49:52.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:49:52.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:49:52.522 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:49:52.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:49:52.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:49:52.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:49:52.522 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:49:52.522 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:49:52.522 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:49:52.522 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:49:52.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:49:52.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:49:52.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:49:52.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:49:52.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:49:52.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:49:52.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:49:52.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:49:52.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:49:52.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:49:52.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:49:52.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:49:52.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:49:52.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:49:52.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:49:52.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:49:52.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:49:52.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:49:52.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:49:52.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:49:52.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:49:52.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:49:52.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:49:52.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:49:52.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:49:52.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:49:52.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:49:52.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:49:52.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:49:52.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:49:52.527 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:49:53.005 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:49:53.049 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:49:53.051 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:49:53.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:49:53.054 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:49:53.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:49:53.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:49:53.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:49:53.079 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:49:53.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:49:53.081 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:49:53.081 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:49:53.081 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:49:53.081 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:49:53.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:49:53.109 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:49:53.109 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:49:53.109 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:49:53.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:49:53.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:49:53.477 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:49:53.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:49:53.525 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:49:53.525 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:49:53.526 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:49:53.949 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:49:53.963 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 03:49:54.423 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:49:54.525 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:49:54.526 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:49:54.526 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:49:54.527 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:49:54.895 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:49:55.368 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:49:55.526 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:49:55.527 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:49:55.527 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:49:55.527 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:49:55.839 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:49:56.309 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:49:56.528 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:49:56.528 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:49:56.529 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:49:56.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:49:56.780 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:49:57.254 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:49:57.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:49:57.529 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:49:57.529 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:49:57.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:49:57.727 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:49:58.198 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:49:58.672 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:49:59.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:49:59.114 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:49:59.118 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:49:59.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:49:59.118 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:49:59.118 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:49:59.119 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:49:59.119 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:49:59.119 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:49:59.119 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:49:59.119 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:49:59.119 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:49:59.119 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:50:04.125 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:50:04.125 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:50:04.125 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:50:04.125 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:50:04.125 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:50:04.126 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:50:04.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:50:04.139 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:50:04.139 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:50:04.139 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:50:04.139 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:50:04.145 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:50:04.145 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:50:04.145 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:50:04.145 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:50:04.145 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:50:04.145 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:50:04.145 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:50:04.145 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:50:04.150 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:50:04.150 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:50:04.150 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:50:04.150 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:50:04.150 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:50:04.150 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:50:04.150 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:50:04.150 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:50:04.154 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:50:04.154 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:50:04.154 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:50:04.155 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:50:04.155 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:50:04.155 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:50:04.155 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:50:04.155 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:50:04.160 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:50:04.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:50:04.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:50:04.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:50:04.160 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:50:04.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:50:04.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:50:04.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:50:04.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:50:04.161 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:50:04.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:04.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:04.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:04.161 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:50:04.161 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:50:04.161 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:50:04.161 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:50:04.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:04.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:04.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:04.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:50:04.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:04.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:04.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:04.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:04.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:04.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:04.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:04.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:04.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:04.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:04.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:04.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:04.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:04.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:04.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:04.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:04.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:04.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:04.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:04.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:04.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:04.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:04.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:04.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:04.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:04.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:04.166 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:50:04.644 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:50:04.688 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:50:04.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:50:04.692 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:50:04.694 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:50:04.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:50:04.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:50:04.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:50:04.732 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:50:04.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:04.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:50:04.734 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:50:04.734 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:50:04.734 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:50:04.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:50:04.799 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:50:04.800 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:50:04.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:04.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:05.116 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:50:05.165 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:50:05.165 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:50:05.166 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:50:05.167 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:50:05.588 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:50:06.061 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:50:06.082 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 03:50:06.166 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:50:06.167 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:50:06.167 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:50:06.169 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:50:06.534 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:50:07.007 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:50:07.167 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:50:07.168 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:50:07.168 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:50:07.170 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:50:07.480 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:50:07.953 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:50:08.168 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:50:08.168 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:50:08.169 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:50:08.171 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:50:08.425 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:50:08.899 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:50:09.169 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:50:09.169 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:50:09.169 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:50:09.172 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:50:09.372 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:50:09.846 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:50:10.319 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:50:10.791 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:50:11.260 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:50:11.733 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:50:12.206 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:50:12.679 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:50:13.150 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:50:13.623 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:50:14.096 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:50:14.567 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 03:50:14.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:50:14.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:14.805 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:50:14.805 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:50:14.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:50:14.819 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:50:14.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:50:14.819 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:50:14.824 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:50:14.825 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:50:14.825 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:50:14.825 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:50:14.826 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:50:14.826 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:50:14.826 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:50:14.826 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2300 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:50:14.826 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2300 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:50:14.826 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2301 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:50:14.826 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2301 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:50:14.826 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2301 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:50:14.827 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2301 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:50:14.827 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2301 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:50:14.827 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2301 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:50:14.827 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2301 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:50:14.827 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2301 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:50:14.827 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2302 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:50:14.827 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2302 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:50:14.827 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2302 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:50:14.827 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2302 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:50:14.827 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2302 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:50:14.827 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2302 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:50:14.827 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2302 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:50:14.828 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2302 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:50:19.825 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:50:19.825 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:50:19.826 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:50:19.826 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:50:19.826 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:50:19.826 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:50:19.833 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:50:19.833 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:50:19.833 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:50:19.834 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:50:19.834 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:50:19.837 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:50:19.837 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:50:19.838 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:50:19.838 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:50:19.838 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:50:19.838 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:50:19.839 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:50:19.839 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:50:19.841 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:50:19.841 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:50:19.841 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:50:19.841 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:50:19.842 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:50:19.842 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:50:19.842 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:50:19.842 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:50:19.844 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:50:19.844 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:50:19.844 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:50:19.844 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:50:19.844 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:50:19.844 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:50:19.844 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:50:19.844 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:50:19.848 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:50:19.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:50:19.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:50:19.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:50:19.848 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:50:19.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:50:19.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:50:19.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:50:19.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:50:19.848 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:50:19.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:19.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:19.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:19.848 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:50:19.848 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:50:19.848 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:50:19.848 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:50:19.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:19.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:19.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:19.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:50:19.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:19.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:19.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:19.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:19.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:19.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:19.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:19.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:19.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:19.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:19.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:19.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:19.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:19.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:19.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:19.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:19.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:19.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:19.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:19.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:19.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:19.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:19.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:19.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:19.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:19.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:19.853 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:50:20.331 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:50:20.373 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:50:20.375 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:50:20.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:50:20.376 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:50:20.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:50:20.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:50:20.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:50:20.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:20.401 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:50:20.401 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:50:20.401 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:50:20.401 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:50:20.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:50:20.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:50:20.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:50:20.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:20.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:20.804 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:50:20.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:50:20.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:20.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:50:20.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:50:20.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:50:20.831 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:50:20.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:50:20.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:20.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:50:20.833 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:50:20.833 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:50:20.833 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:50:20.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:50:20.851 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:50:20.851 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:50:20.851 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:50:20.851 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:50:20.852 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:50:20.852 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:50:20.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:20.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:21.275 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:50:21.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:50:21.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:21.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:50:21.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:50:21.555 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:50:21.555 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:50:21.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:50:21.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:21.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:50:21.557 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:50:21.557 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:50:21.557 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:50:21.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:50:21.609 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:50:21.609 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:50:21.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:21.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:21.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:50:21.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:21.714 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:50:21.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:50:21.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:50:21.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:50:21.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:50:21.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:21.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:50:21.734 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:50:21.734 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:50:21.734 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:50:21.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:50:21.744 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:50:21.744 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:50:21.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:21.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:21.748 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:50:21.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:50:21.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:50:21.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:50:21.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:50:22.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:50:22.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:22.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:50:22.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:50:22.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:50:22.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:50:22.151 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:50:22.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:50:22.153 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:50:22.153 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:50:22.153 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:50:22.153 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:50:22.153 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:50:22.153 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:50:22.153 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:50:22.153 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=497 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:50:22.153 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=497 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:50:22.153 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=497 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:50:22.153 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:50:22.153 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=498 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:50:22.153 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=498 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:50:22.153 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=498 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:50:22.153 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=498 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:50:22.153 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=498 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:50:22.153 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=498 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:50:22.153 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=498 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:50:22.153 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=498 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:50:27.159 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:50:27.159 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:50:27.159 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:50:27.159 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:50:27.159 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:50:27.159 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:50:27.167 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:50:27.168 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:50:27.168 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:50:27.168 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:50:27.168 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:50:27.171 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:50:27.171 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:50:27.171 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:50:27.171 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:50:27.172 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:50:27.172 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:50:27.172 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:50:27.172 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:50:27.174 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:50:27.174 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:50:27.174 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:50:27.174 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:50:27.174 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:50:27.174 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:50:27.174 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:50:27.174 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:50:27.176 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:50:27.177 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:50:27.177 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:50:27.177 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:50:27.177 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:50:27.177 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:50:27.177 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:50:27.177 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:50:27.180 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:50:27.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:50:27.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:50:27.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:50:27.180 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:50:27.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:50:27.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:50:27.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:50:27.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:50:27.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:27.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:27.180 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:50:27.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:27.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:27.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:27.180 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:50:27.180 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:50:27.180 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:50:27.180 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:50:27.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:27.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:27.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:27.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:50:27.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:27.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:27.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:27.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:27.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:27.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:27.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:27.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:27.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:27.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:27.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:27.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:27.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:27.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:27.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:27.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:27.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:27.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:27.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:27.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:27.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:27.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:27.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:27.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:27.185 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:50:27.664 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:50:27.701 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:50:27.702 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:50:27.703 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:50:27.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:50:27.720 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:50:27.720 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:50:27.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:50:27.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:27.728 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:50:27.728 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:50:27.728 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:50:27.729 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:50:27.756 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:50:27.760 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 03:50:27.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:50:27.772 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:50:27.773 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:50:27.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:27.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:28.136 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:50:28.183 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:50:28.183 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:50:28.184 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:50:28.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:50:28.607 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:50:28.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:50:28.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:28.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:50:28.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:50:28.637 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:50:28.637 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:50:28.637 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:50:28.637 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:50:28.638 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:50:28.639 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:50:28.639 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:50:28.639 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:50:28.639 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:50:28.639 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:50:28.639 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:50:28.639 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=315 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:50:28.639 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=315 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:50:28.639 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=315 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:50:28.639 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=315 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:50:28.639 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=315 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:50:28.639 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=315 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:50:33.645 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:50:33.645 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:50:33.645 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:50:33.645 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:50:33.645 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:50:33.645 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:50:33.653 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:50:33.655 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:50:33.655 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:50:33.655 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:50:33.655 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:50:33.659 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:50:33.659 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:50:33.659 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:50:33.659 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:50:33.660 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:50:33.660 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:50:33.660 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:50:33.660 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:50:33.662 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:50:33.662 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:50:33.663 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:50:33.663 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:50:33.663 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:50:33.663 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:50:33.663 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:50:33.663 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:50:33.665 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:50:33.665 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:50:33.665 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:50:33.665 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:50:33.666 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:50:33.666 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:50:33.666 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:50:33.666 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:50:33.669 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:50:33.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:50:33.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:50:33.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:50:33.669 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:50:33.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:50:33.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:50:33.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:50:33.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:50:33.669 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:50:33.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:33.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:33.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:33.669 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:50:33.669 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:50:33.669 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:50:33.670 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:50:33.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:33.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:33.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:33.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:50:33.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:33.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:33.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:33.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:33.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:33.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:33.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:33.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:33.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:33.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:33.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:33.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:33.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:33.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:33.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:33.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:33.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:33.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:33.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:33.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:33.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:33.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:33.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:33.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:33.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:33.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:33.674 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:50:34.152 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:50:34.190 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:50:34.191 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:50:34.192 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:50:34.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:50:34.213 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:50:34.213 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:50:34.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:50:34.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:34.218 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:50:34.218 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:50:34.218 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:50:34.219 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:50:34.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:50:34.258 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:50:34.258 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:50:34.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:34.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:34.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:50:34.625 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:50:34.672 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:50:34.672 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:50:34.672 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:50:34.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:50:35.096 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:50:35.570 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:50:35.673 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:50:35.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:50:35.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:50:35.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:50:36.042 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:50:36.515 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:50:36.674 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:50:36.675 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:50:36.675 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:50:36.675 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:50:36.986 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:50:37.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:50:37.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:37.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:50:37.381 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:50:37.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:50:37.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:50:37.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:50:37.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:37.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:50:37.408 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:50:37.408 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:50:37.408 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:50:37.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:50:37.459 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:50:37.465 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:50:37.466 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:50:37.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:37.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:37.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:50:37.676 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:50:37.676 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:50:37.676 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:50:37.676 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:50:37.932 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:50:38.404 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:50:38.678 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:50:38.678 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:50:38.678 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:50:38.678 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:50:38.875 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:50:39.348 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:50:39.821 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:50:40.293 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:50:40.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:50:40.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:40.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:50:40.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:50:40.648 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:50:40.648 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:50:40.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:50:40.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:40.649 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:50:40.649 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:50:40.649 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:50:40.649 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:50:40.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:50:40.668 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:50:40.668 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:50:40.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:40.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:40.764 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:50:40.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:50:41.235 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:50:41.706 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:50:42.179 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:50:42.652 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:50:43.124 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:50:43.595 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:50:43.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:50:43.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:44.001 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:50:44.002 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:50:44.019 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:50:44.019 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:50:44.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:50:44.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:44.020 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:50:44.021 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:50:44.021 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:50:44.021 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:50:44.065 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 03:50:44.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:50:44.075 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:50:44.075 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:50:44.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:44.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:44.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:50:44.536 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 03:50:45.010 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 03:50:45.482 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 03:50:45.954 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 03:50:46.425 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 03:50:46.899 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 03:50:47.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:50:47.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:47.228 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:50:47.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:50:47.242 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:50:47.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:50:47.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:50:47.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:50:47.243 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:50:47.243 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:50:47.243 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:50:47.243 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:50:47.243 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:50:47.243 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:50:47.243 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:50:52.251 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:50:52.251 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:50:52.251 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:50:52.251 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:50:52.251 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:50:52.251 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:50:52.259 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:50:52.259 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:50:52.259 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:50:52.260 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:50:52.260 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:50:52.263 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:50:52.263 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:50:52.264 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:50:52.264 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:50:52.264 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:50:52.265 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:50:52.265 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:50:52.265 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:50:52.268 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:50:52.268 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:50:52.268 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:50:52.268 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:50:52.269 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:50:52.269 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:50:52.269 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:50:52.270 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:50:52.272 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:50:52.272 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:50:52.272 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:50:52.272 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:50:52.272 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:50:52.272 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:50:52.272 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:50:52.273 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:50:52.277 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:50:52.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:50:52.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:50:52.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:50:52.277 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:50:52.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:50:52.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:50:52.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:50:52.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:50:52.278 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:50:52.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:52.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:52.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:52.278 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:50:52.278 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:50:52.278 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:50:52.278 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:50:52.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:52.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:52.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:52.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:50:52.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:52.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:52.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:52.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:52.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:52.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:52.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:52.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:52.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:52.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:52.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:52.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:52.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:52.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:52.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:52.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:52.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:52.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:52.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:52.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:52.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:52.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:50:52.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:50:52.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:50:52.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:52.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:50:52.283 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:50:52.761 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:50:52.806 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:50:52.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:50:52.810 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:50:52.814 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:50:52.819 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:50:52.819 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:50:52.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:50:52.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:50:52.821 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:50:52.821 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:50:52.821 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:50:52.822 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:50:53.233 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:50:53.282 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:50:53.282 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:50:53.282 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:50:53.283 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:50:53.704 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:50:54.177 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:50:54.284 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:50:54.284 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:50:54.284 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:50:54.284 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:50:54.650 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:50:55.122 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:50:55.285 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:50:55.286 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:50:55.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:50:55.286 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:50:55.593 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:50:56.066 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:50:56.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:50:56.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:50:56.287 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:50:56.287 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:50:56.539 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:50:57.011 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:50:57.288 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:50:57.288 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:50:57.289 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:50:57.289 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:50:57.482 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:50:57.956 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:50:58.428 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:50:58.901 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:50:59.374 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:50:59.846 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:51:00.319 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:51:00.790 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:51:01.263 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:51:01.735 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:51:02.208 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:51:02.679 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 03:51:03.152 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 03:51:03.625 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 03:51:04.096 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 03:51:04.568 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 03:51:05.038 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 03:51:05.512 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 03:51:05.984 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 03:51:06.456 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 03:51:06.742 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:51:06.742 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:51:06.746 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:51:06.746 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:51:06.746 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:51:06.746 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:51:06.747 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:51:06.747 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:51:06.747 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:51:06.747 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:51:06.747 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:51:06.747 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:51:06.747 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:51:11.754 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:51:11.755 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:51:11.755 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:51:11.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:51:11.755 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:51:11.755 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:51:11.763 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:51:11.763 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:51:11.763 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:51:11.764 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:51:11.764 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:51:11.767 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:51:11.767 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:51:11.767 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:51:11.768 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:51:11.768 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:51:11.768 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:51:11.768 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:51:11.768 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:51:11.771 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:51:11.771 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:51:11.771 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:51:11.772 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:51:11.772 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:51:11.772 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:51:11.772 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:51:11.772 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:51:11.774 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:51:11.775 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:51:11.775 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:51:11.775 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:51:11.775 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:51:11.775 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:51:11.775 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:51:11.775 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:51:11.779 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:51:11.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:51:11.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:51:11.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:51:11.779 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:51:11.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:51:11.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:51:11.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:51:11.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:51:11.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:51:11.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:51:11.779 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:51:11.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:51:11.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:51:11.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:51:11.779 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:51:11.779 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:51:11.779 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:51:11.779 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:51:11.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:51:11.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:51:11.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:51:11.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:51:11.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:51:11.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:51:11.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:51:11.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:51:11.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:51:11.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:51:11.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:51:11.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:51:11.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:51:11.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:51:11.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:51:11.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:51:11.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:51:11.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:51:11.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:51:11.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:51:11.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:51:11.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:51:11.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:51:11.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:51:11.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:51:11.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:51:11.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:51:11.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:51:11.784 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:51:12.263 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:51:12.302 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:51:12.303 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:51:12.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:51:12.304 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:51:12.317 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:51:12.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:51:12.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:51:12.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:51:12.320 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:51:12.320 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:51:12.320 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:51:12.320 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:51:12.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:51:12.372 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:51:12.372 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:51:12.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:51:12.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:51:12.735 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:51:12.783 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:51:12.784 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:51:12.784 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:51:12.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:51:13.206 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:51:13.680 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:51:13.785 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:51:13.785 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:51:13.785 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:51:13.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:51:14.152 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:51:14.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:51:14.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:51:14.373 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:51:14.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:51:14.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:51:14.377 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:51:14.378 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:51:14.378 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:51:14.378 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:51:14.624 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:51:14.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:51:14.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:51:14.786 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:51:14.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:51:15.095 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:51:15.569 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:51:15.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:51:15.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:51:15.788 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:51:15.788 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:51:16.041 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:51:16.514 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:51:16.789 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:51:16.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:51:16.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:51:16.789 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:51:16.984 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:51:17.458 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:51:17.930 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:51:18.403 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:51:18.873 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:51:19.347 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:51:19.819 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:51:20.292 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:51:20.765 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:51:21.238 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:51:21.710 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:51:22.181 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 03:51:22.655 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 03:51:23.127 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 03:51:23.599 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 03:51:24.073 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 03:51:24.545 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 03:51:25.017 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 03:51:25.488 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 03:51:25.962 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 03:51:26.434 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 03:51:26.906 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 03:51:27.377 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 03:51:27.848 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 03:51:28.321 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 03:51:28.793 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 03:51:29.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:51:29.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:51:29.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:51:29.096 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:51:29.096 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:51:29.096 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:51:29.096 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:51:29.098 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:51:29.098 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:51:29.098 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:51:29.098 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:51:29.098 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:51:29.098 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:51:29.098 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:51:29.098 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3740 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:51:29.098 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3740 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:51:29.098 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3740 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:51:29.098 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3740 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:51:29.098 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3740 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:51:34.102 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:51:34.103 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:51:34.103 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:51:34.103 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:51:34.103 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:51:34.103 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:51:34.115 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:51:34.116 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:51:34.116 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:51:34.116 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:51:34.116 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:51:34.118 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:51:34.118 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:51:34.118 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:51:34.118 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:51:34.118 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:51:34.119 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:51:34.119 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:51:34.119 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:51:34.120 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:51:34.120 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:51:34.120 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:51:34.120 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:51:34.120 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:51:34.120 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:51:34.120 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:51:34.120 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:51:34.122 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:51:34.122 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:51:34.122 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:51:34.122 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:51:34.122 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:51:34.122 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:51:34.122 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:51:34.122 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:51:34.125 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:51:34.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:51:34.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:51:34.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:51:34.125 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:51:34.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:51:34.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:51:34.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:51:34.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:51:34.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:51:34.125 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:51:34.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:51:34.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:51:34.125 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:51:34.125 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:51:34.125 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:51:34.125 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:51:34.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:51:34.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:51:34.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:51:34.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:51:34.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:51:34.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:51:34.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:51:34.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:51:34.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:51:34.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:51:34.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:51:34.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:51:34.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:51:34.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:51:34.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:51:34.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:51:34.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:51:34.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:51:34.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:51:34.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:51:34.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:51:34.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:51:34.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:51:34.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:51:34.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:51:34.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:51:34.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:51:34.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:51:34.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:51:34.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:51:34.130 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:51:34.608 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:51:34.655 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:51:34.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:51:34.659 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:51:34.661 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:51:34.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:51:34.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:51:34.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:51:34.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:51:34.665 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:51:34.665 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:51:34.666 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:51:34.666 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:51:35.080 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:51:35.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:51:35.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:51:35.131 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:51:35.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:51:35.551 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:51:36.025 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:51:36.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:51:36.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:51:36.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:51:36.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:51:36.497 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:51:36.969 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:51:37.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:51:37.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:51:37.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:51:37.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:51:37.440 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:51:37.911 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:51:38.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:51:38.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:51:38.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:51:38.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:51:38.385 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:51:38.857 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:51:39.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:51:39.134 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:51:39.134 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:51:39.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:51:39.329 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:51:39.800 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:51:40.274 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:51:40.746 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:51:41.218 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:51:41.689 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:51:42.163 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:51:42.635 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:51:43.107 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:51:43.578 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:51:44.051 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:51:44.524 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 03:51:44.996 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 03:51:45.467 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 03:51:45.940 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 03:51:46.413 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 03:51:46.885 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 03:51:47.356 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 03:51:47.829 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 03:51:48.302 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 03:51:48.774 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 03:51:49.245 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 03:51:49.718 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 03:51:50.191 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 03:51:50.663 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 03:51:51.134 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 03:51:51.607 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 03:51:52.080 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 03:51:52.552 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 03:51:53.025 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 03:51:53.498 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 03:51:53.970 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 03:51:54.441 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 03:51:54.914 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 03:51:55.387 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 03:51:55.859 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 03:51:56.141 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:51:56.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:51:56.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:51:56.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:51:56.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:51:56.144 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:51:56.145 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:51:56.145 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:51:56.145 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:51:56.145 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:51:56.145 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:51:56.145 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:51:56.145 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:51:56.145 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4756 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:51:56.145 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4756 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:51:56.145 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4756 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:51:56.145 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4756 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:52:01.153 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:52:01.153 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:52:01.153 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:52:01.153 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:52:01.153 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:52:01.153 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:52:01.161 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:52:01.162 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:52:01.162 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:52:01.163 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:52:01.163 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:52:01.167 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:52:01.167 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:52:01.167 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:52:01.167 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:52:01.168 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:52:01.168 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:52:01.169 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:52:01.169 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:52:01.171 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:52:01.171 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:52:01.171 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:52:01.171 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:52:01.172 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:52:01.172 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:52:01.172 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:52:01.172 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:52:01.174 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:52:01.175 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:52:01.175 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:52:01.175 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:52:01.175 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:52:01.175 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:52:01.175 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:52:01.175 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:52:01.179 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:52:01.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:52:01.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:52:01.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:52:01.179 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:52:01.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:52:01.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:52:01.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:52:01.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:52:01.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:52:01.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:52:01.179 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:52:01.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:52:01.179 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:52:01.179 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:52:01.179 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:52:01.179 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:52:01.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:52:01.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:52:01.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:52:01.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:52:01.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:52:01.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:52:01.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:52:01.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:52:01.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:52:01.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:52:01.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:52:01.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:52:01.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:52:01.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:52:01.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:52:01.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:52:01.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:52:01.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:52:01.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:52:01.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:52:01.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:52:01.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:52:01.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:52:01.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:52:01.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:52:01.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:52:01.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:52:01.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:52:01.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:52:01.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:52:01.184 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:52:01.661 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:52:01.703 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:52:01.705 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:52:01.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:52:01.707 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:52:01.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:52:01.711 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:52:01.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:52:01.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:52:01.711 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:52:01.711 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:52:01.712 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:52:01.712 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:52:02.133 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:52:02.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:52:02.182 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:52:02.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:52:02.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:52:02.605 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:52:03.078 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:52:03.183 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:52:03.183 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:52:03.184 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:52:03.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:52:03.551 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:52:04.023 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:52:04.184 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:52:04.185 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:52:04.185 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:52:04.185 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:52:04.494 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:52:04.967 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:52:05.185 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:52:05.186 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:52:05.186 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:52:05.186 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:52:05.439 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:52:05.911 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:52:06.187 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:52:06.187 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:52:06.187 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:52:06.187 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:52:06.383 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:52:06.856 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:52:07.328 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:52:07.800 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:52:08.272 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:52:08.744 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:52:09.218 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:52:09.690 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:52:10.161 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:52:10.634 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:52:11.107 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:52:11.579 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 03:52:12.050 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 03:52:12.523 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 03:52:12.996 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 03:52:13.468 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 03:52:13.939 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 03:52:14.412 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 03:52:14.884 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 03:52:15.357 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 03:52:15.828 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 03:52:16.301 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 03:52:16.773 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 03:52:17.245 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 03:52:17.716 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 03:52:18.190 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 03:52:18.662 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 03:52:19.134 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 03:52:19.605 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 03:52:20.079 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 03:52:20.551 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 03:52:21.023 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 03:52:21.494 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 03:52:21.968 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 03:52:22.440 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 03:52:22.912 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 03:52:23.196 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:52:23.196 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:52:23.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:52:23.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:52:23.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:52:23.203 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:52:23.208 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:52:23.208 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:52:23.208 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:52:23.209 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:52:23.209 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:52:23.209 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:52:23.209 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:52:23.209 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4756 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:52:23.209 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4756 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:52:23.210 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4756 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:52:23.210 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4756 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:52:23.210 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4757 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:52:23.210 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4757 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:52:23.210 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4757 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:52:23.210 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4757 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:52:23.210 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4757 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:52:23.210 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4757 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:52:23.210 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4757 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:52:23.210 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4757 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:52:23.210 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4758 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:52:23.210 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4758 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:52:23.210 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4758 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:52:23.210 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4758 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:52:23.210 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4758 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:52:23.211 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4758 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:52:23.211 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4758 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:52:23.211 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4758 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:52:28.209 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:52:28.210 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:52:28.210 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:52:28.210 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:52:28.210 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:52:28.210 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:52:28.217 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:52:28.218 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:52:28.218 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:52:28.218 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:52:28.218 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:52:28.221 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:52:28.222 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:52:28.222 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:52:28.222 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:52:28.222 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:52:28.222 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:52:28.222 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:52:28.222 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:52:28.226 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:52:28.226 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:52:28.226 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:52:28.226 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:52:28.226 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:52:28.226 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:52:28.226 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:52:28.226 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:52:28.230 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:52:28.230 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:52:28.230 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:52:28.230 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:52:28.230 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:52:28.230 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:52:28.230 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:52:28.230 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:52:28.235 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:52:28.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:52:28.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:52:28.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:52:28.235 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:52:28.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:52:28.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:52:28.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:52:28.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:52:28.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:52:28.236 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:52:28.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:52:28.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:52:28.236 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:52:28.236 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:52:28.236 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:52:28.236 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:52:28.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:52:28.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:52:28.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:52:28.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:52:28.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:52:28.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:52:28.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:52:28.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:52:28.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:52:28.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:52:28.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:52:28.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:52:28.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:52:28.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:52:28.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:52:28.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:52:28.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:52:28.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:52:28.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:52:28.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:52:28.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:52:28.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:52:28.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:52:28.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:52:28.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:52:28.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:52:28.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:52:28.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:52:28.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:52:28.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:52:28.241 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:52:28.719 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:52:28.763 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:52:28.765 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:52:28.767 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:52:28.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:52:28.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:52:28.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:52:28.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:52:28.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:52:28.771 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:52:28.771 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:52:28.771 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:52:28.771 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:52:29.190 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:52:29.239 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:52:29.239 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:52:29.239 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:52:29.240 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:52:29.662 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:52:30.133 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:52:30.241 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:52:30.241 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:52:30.241 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:52:30.241 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:52:30.606 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:52:31.079 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:52:31.242 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:52:31.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:52:31.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:52:31.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:52:31.551 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:52:32.024 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:52:32.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:52:32.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:52:32.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:52:32.244 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:52:32.497 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:52:32.970 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:52:33.244 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:52:33.245 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:52:33.245 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:52:33.245 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:52:33.443 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:52:33.916 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:52:34.388 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:52:34.859 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:52:35.332 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:52:35.805 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:52:36.277 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:52:36.748 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:52:37.221 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:52:37.693 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:52:38.166 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:52:38.637 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 03:52:39.110 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 03:52:39.582 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 03:52:40.055 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 03:52:40.528 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 03:52:41.001 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 03:52:41.473 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 03:52:41.944 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 03:52:42.418 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 03:52:42.890 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 03:52:43.362 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 03:52:43.833 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 03:52:44.304 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 03:52:44.777 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 03:52:45.250 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 03:52:45.722 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 03:52:46.196 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 03:52:46.668 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 03:52:47.140 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 03:52:47.611 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 03:52:48.085 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 03:52:48.557 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 03:52:49.029 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 03:52:49.500 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 03:52:49.973 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 03:52:50.446 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 03:52:50.918 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 03:52:51.389 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 03:52:51.862 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 03:52:52.335 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 03:52:52.807 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 03:52:53.278 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 03:52:53.749 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 03:52:54.222 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 03:52:54.695 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 03:52:55.167 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 03:52:55.638 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 03:52:56.112 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 03:52:56.584 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 03:52:57.056 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 03:52:57.527 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-08 03:52:58.000 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-08 03:52:58.473 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-08 03:52:58.945 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-08 03:52:59.416 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-08 03:52:59.887 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-08 03:53:00.357 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-08 03:53:00.831 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-08 03:53:01.303 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-08 03:53:01.775 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-08 03:53:02.246 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-08 03:53:02.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:53:02.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:53:02.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:53:02.265 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:53:02.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:53:02.265 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:53:02.266 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:53:02.266 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:53:02.266 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:53:02.266 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:53:02.266 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:53:02.266 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:53:02.266 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:53:07.273 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:53:07.273 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:53:07.273 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:53:07.273 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:53:07.273 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:53:07.273 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:53:07.280 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:53:07.282 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:53:07.282 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:53:07.282 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:53:07.282 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:53:07.285 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:53:07.286 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:53:07.286 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:53:07.286 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:53:07.286 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:53:07.286 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:53:07.287 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:53:07.287 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:53:07.289 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:53:07.289 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:53:07.289 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:53:07.289 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:53:07.289 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:53:07.290 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:53:07.290 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:53:07.290 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:53:07.292 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:53:07.292 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:53:07.292 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:53:07.292 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:53:07.292 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:53:07.292 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:53:07.292 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:53:07.292 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:53:07.295 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:53:07.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:53:07.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:53:07.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:53:07.295 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:53:07.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:53:07.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:53:07.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:53:07.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:53:07.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:07.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:07.296 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:53:07.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:07.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:07.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:07.296 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:53:07.296 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:53:07.296 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:53:07.296 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:53:07.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:07.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:07.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:07.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:53:07.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:07.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:07.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:07.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:07.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:07.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:07.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:07.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:07.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:07.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:07.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:07.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:07.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:07.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:07.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:07.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:07.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:07.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:07.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:07.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:07.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:07.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:07.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:07.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:07.300 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:53:07.779 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:53:07.820 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:53:07.822 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:53:07.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:53:07.824 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:53:07.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:53:07.827 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:53:07.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:53:07.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:53:07.828 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:53:07.828 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:53:07.828 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:53:07.828 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:53:08.250 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:53:08.298 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:53:08.298 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:53:08.298 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:53:08.299 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:53:08.722 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:53:09.193 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:53:09.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:53:09.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:53:09.299 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:53:09.299 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:53:09.666 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:53:10.139 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:53:10.300 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:53:10.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:53:10.300 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:53:10.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:53:10.611 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:53:11.082 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:53:11.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:53:11.302 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:53:11.302 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:53:11.302 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:53:11.555 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:53:12.028 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:53:12.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:53:12.302 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:53:12.303 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:53:12.303 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:53:12.500 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:53:12.971 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:53:13.445 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:53:13.917 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:53:14.390 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:53:14.861 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:53:15.334 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:53:15.807 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:53:16.279 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:53:16.750 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:53:17.223 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:53:17.696 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 03:53:18.168 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 03:53:18.641 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 03:53:19.114 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 03:53:19.587 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 03:53:20.060 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 03:53:20.532 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 03:53:21.005 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 03:53:21.478 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 03:53:21.950 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 03:53:22.423 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 03:53:22.894 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 03:53:23.367 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 03:53:23.839 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 03:53:24.312 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 03:53:24.782 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 03:53:25.253 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 03:53:25.726 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 03:53:26.199 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 03:53:26.671 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 03:53:27.145 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 03:53:27.617 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 03:53:28.085 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 03:53:28.556 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 03:53:29.029 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 03:53:29.501 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 03:53:29.974 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 03:53:30.447 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 03:53:30.920 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 03:53:31.392 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 03:53:31.863 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 03:53:32.336 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 03:53:32.809 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 03:53:33.281 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 03:53:33.752 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 03:53:34.225 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 03:53:34.698 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 03:53:35.170 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 03:53:35.314 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:53:35.315 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:53:35.321 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:53:35.321 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:53:35.321 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:53:35.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:53:35.322 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:53:35.322 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:53:35.322 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:53:35.322 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:53:35.322 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:53:35.322 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:53:35.322 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:53:40.328 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:53:40.328 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:53:40.328 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:53:40.328 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:53:40.328 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:53:40.328 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:53:40.335 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:53:40.336 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:53:40.336 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:53:40.336 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:53:40.336 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:53:40.338 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:53:40.339 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:53:40.339 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:53:40.339 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:53:40.339 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:53:40.340 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:53:40.340 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:53:40.340 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:53:40.342 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:53:40.342 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:53:40.343 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:53:40.343 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:53:40.343 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:53:40.343 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:53:40.343 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:53:40.343 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:53:40.346 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:53:40.346 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:53:40.347 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:53:40.347 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:53:40.347 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:53:40.347 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:53:40.347 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:53:40.347 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:53:40.353 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:53:40.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:53:40.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:53:40.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:53:40.353 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:53:40.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:53:40.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:53:40.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:53:40.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:53:40.353 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:53:40.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:40.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:40.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:40.354 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:53:40.354 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:53:40.354 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:53:40.354 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:53:40.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:40.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:40.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:40.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:53:40.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:40.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:40.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:40.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:40.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:40.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:40.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:40.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:40.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:40.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:40.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:40.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:40.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:40.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:40.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:40.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:40.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:40.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:40.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:40.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:40.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:40.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:40.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:40.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:40.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:40.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:40.358 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:53:40.836 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:53:40.884 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:53:40.885 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:53:40.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:53:40.886 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:53:40.895 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:53:40.895 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:53:40.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:53:40.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:53:40.898 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:53:40.898 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:53:40.898 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:53:40.898 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:53:40.898 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:53:40.898 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:53:40.898 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:53:40.899 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:40.899 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:40.899 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:40.899 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:40.899 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=117 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:40.899 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:40.899 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:40.899 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:40.899 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:40.899 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:40.899 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:40.899 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:45.904 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:53:45.904 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:53:45.904 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:53:45.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:53:45.904 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:53:45.904 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:53:45.916 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:53:45.917 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:53:45.917 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:53:45.918 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:53:45.918 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:53:45.923 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:53:45.923 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:53:45.923 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:53:45.923 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:53:45.923 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:53:45.923 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:53:45.924 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:53:45.924 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:53:45.928 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:53:45.928 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:53:45.928 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:53:45.928 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:53:45.928 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:53:45.929 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:53:45.929 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:53:45.929 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:53:45.932 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:53:45.933 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:53:45.933 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:53:45.933 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:53:45.933 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:53:45.933 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:53:45.933 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:53:45.933 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:53:45.938 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:53:45.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:53:45.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:53:45.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:53:45.939 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:53:45.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:53:45.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:53:45.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:53:45.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:53:45.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:45.939 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:53:45.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:45.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:45.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:45.939 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:53:45.939 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:53:45.939 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:53:45.940 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:53:45.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:45.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:45.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:45.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:53:45.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:45.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:45.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:45.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:45.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:45.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:45.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:45.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:45.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:45.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:45.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:45.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:45.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:45.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:45.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:45.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:45.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:45.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:45.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:45.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:45.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:45.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:45.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:45.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:45.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:45.944 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:53:46.422 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:53:46.468 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:53:46.470 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:53:46.472 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:53:46.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:53:46.528 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:53:46.528 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:53:46.528 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:53:46.528 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:53:46.529 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:53:46.529 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:53:46.529 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:53:46.529 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:53:46.529 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:53:46.529 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:53:46.530 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:53:46.530 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:46.530 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=127 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:46.530 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:46.530 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:46.530 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:46.530 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:46.530 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:46.530 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:46.530 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:51.537 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:53:51.537 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:53:51.537 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:53:51.537 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:53:51.537 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:53:51.537 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:53:51.544 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:53:51.545 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:53:51.545 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:53:51.545 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:53:51.545 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:53:51.548 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:53:51.548 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:53:51.548 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:53:51.548 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:53:51.549 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:53:51.549 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:53:51.549 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:53:51.549 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:53:51.551 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:53:51.551 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:53:51.551 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:53:51.551 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:53:51.551 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:53:51.551 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:53:51.552 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:53:51.552 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:53:51.553 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:53:51.553 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:53:51.553 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:53:51.553 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:53:51.553 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:53:51.553 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:53:51.553 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:53:51.553 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:53:51.556 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:53:51.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:53:51.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:53:51.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:53:51.556 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:53:51.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:53:51.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:53:51.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:53:51.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:53:51.557 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:53:51.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:51.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:51.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:51.557 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:53:51.557 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:53:51.557 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:53:51.557 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:53:51.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:51.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:51.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:51.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:53:51.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:51.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:51.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:51.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:51.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:51.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:51.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:51.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:51.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:51.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:51.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:51.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:51.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:51.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:51.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:51.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:51.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:51.561 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:53:52.040 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:53:52.082 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:53:52.085 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:53:52.087 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:53:52.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:53:52.103 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:53:52.103 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:53:52.103 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:53:52.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:53:52.109 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:53:52.110 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:53:52.110 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:53:52.110 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:53:52.110 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:53:52.111 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:53:52.111 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:53:52.111 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:52.111 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:52.111 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=118 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:52.111 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:52.111 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:52.111 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:52.111 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:52.111 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:52.111 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:52.111 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:52.111 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=119 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:52.111 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:52.112 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:52.112 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:52.112 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:52.112 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:52.112 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:52.112 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:53:57.111 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:53:57.111 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:53:57.111 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:53:57.111 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:53:57.111 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:53:57.111 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:53:57.119 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:53:57.120 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:53:57.120 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:53:57.120 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:53:57.120 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:53:57.123 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:53:57.123 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:53:57.123 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:53:57.123 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:53:57.124 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:53:57.124 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:53:57.125 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:53:57.125 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:53:57.127 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:53:57.127 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:53:57.128 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:53:57.128 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:53:57.128 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:53:57.129 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:53:57.129 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:53:57.129 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:53:57.131 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:53:57.131 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:53:57.132 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:53:57.132 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:53:57.132 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:53:57.132 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:53:57.132 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:53:57.132 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:53:57.137 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:53:57.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:53:57.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:53:57.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:53:57.137 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:53:57.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:53:57.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:53:57.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:53:57.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:53:57.137 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:53:57.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:57.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:57.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:57.137 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:53:57.137 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:53:57.137 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:53:57.138 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:53:57.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:57.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:57.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:57.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:53:57.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:57.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:57.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:57.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:57.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:57.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:57.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:57.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:57.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:57.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:57.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:57.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:57.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:57.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:57.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:57.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:57.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:57.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:57.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:57.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:57.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:53:57.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:57.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:57.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:53:57.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:53:57.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:53:57.142 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:53:57.621 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:53:57.662 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:53:57.664 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:53:57.666 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:53:57.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:53:57.670 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:53:57.670 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:53:57.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:53:57.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:53:57.671 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:53:57.672 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:53:57.672 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:53:57.673 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:53:58.093 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:53:58.141 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:53:58.142 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:53:58.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:53:58.145 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:53:58.564 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:53:59.038 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:53:59.143 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:53:59.143 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:53:59.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:53:59.146 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:53:59.510 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:53:59.982 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:54:00.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:54:00.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:54:00.146 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:54:00.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:54:00.453 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:54:00.927 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:54:01.145 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:54:01.145 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:54:01.148 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:54:01.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:54:01.399 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:54:01.871 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:54:02.146 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:54:02.146 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:54:02.148 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:54:02.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:54:02.342 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:54:02.816 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:54:03.288 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:54:03.760 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:54:04.231 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:54:04.705 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:54:05.177 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:54:05.650 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:54:05.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:54:05.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:54:05.728 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:54:05.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:54:05.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:54:05.728 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:54:05.730 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:54:05.730 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:54:05.730 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:54:05.730 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:54:05.730 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:54:05.730 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:54:05.730 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:54:05.730 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:05.731 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:05.731 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:05.731 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:10.736 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:54:10.737 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:54:10.737 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:54:10.737 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:54:10.737 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:54:10.737 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:54:10.743 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:54:10.744 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:54:10.744 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:54:10.744 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:54:10.744 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:54:10.746 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:54:10.747 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:54:10.747 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:54:10.747 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:54:10.747 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:54:10.747 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:54:10.748 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:54:10.748 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:54:10.751 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:54:10.751 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:54:10.751 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:54:10.751 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:54:10.751 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:54:10.752 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:54:10.752 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:54:10.752 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:54:10.755 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:54:10.755 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:54:10.755 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:54:10.755 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:54:10.755 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:54:10.755 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:54:10.755 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:54:10.755 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:54:10.760 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:54:10.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:54:10.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:54:10.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:54:10.760 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:54:10.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:54:10.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:54:10.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:54:10.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:54:10.761 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:54:10.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:54:10.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:54:10.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:54:10.761 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:54:10.761 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:54:10.761 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:54:10.761 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:54:10.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:54:10.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:54:10.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:54:10.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:54:10.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:54:10.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:54:10.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:54:10.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:54:10.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:54:10.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:54:10.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:54:10.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:54:10.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:54:10.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:54:10.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:54:10.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:54:10.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:54:10.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:54:10.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:54:10.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:54:10.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:54:10.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:54:10.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:54:10.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:54:10.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:54:10.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:54:10.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:54:10.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:54:10.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:54:10.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:54:10.766 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:54:11.244 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:54:11.285 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:54:11.286 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:54:11.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:54:11.288 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:54:11.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:54:11.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:54:11.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:54:11.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:54:11.292 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:54:11.292 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:54:11.292 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:54:11.292 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:54:11.717 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:54:11.765 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:54:11.765 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:54:11.765 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:54:11.766 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:54:12.188 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:54:12.661 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:54:12.766 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:54:12.766 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:54:12.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:54:12.767 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:54:13.134 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:54:13.605 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:54:13.767 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:54:13.768 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:54:13.768 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:54:13.768 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:54:14.077 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:54:14.550 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:54:14.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:54:14.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:54:14.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:54:14.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:54:15.023 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:54:15.495 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:54:15.770 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:54:15.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:54:15.770 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:54:15.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:54:15.966 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:54:16.439 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:54:16.911 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:54:17.383 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:54:17.855 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:54:18.328 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:54:18.800 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:54:19.272 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:54:19.340 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:54:19.340 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:54:19.345 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:54:19.345 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:54:19.345 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:54:19.345 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:54:19.348 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:54:19.348 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:54:19.348 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:54:19.348 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:54:19.348 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:54:19.348 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:54:19.348 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:54:19.348 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1853 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:19.348 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1853 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:19.348 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1853 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:19.348 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1853 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:19.348 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:19.348 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:19.348 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:19.348 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:19.349 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:19.349 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:19.349 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:19.349 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:24.352 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:54:24.352 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:54:24.353 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:54:24.353 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:54:24.353 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:54:24.353 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:54:24.361 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:54:24.362 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:54:24.362 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:54:24.363 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:54:24.363 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:54:24.366 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:54:24.367 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:54:24.367 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:54:24.367 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:54:24.368 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:54:24.368 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:54:24.368 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:54:24.368 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:54:24.370 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:54:24.371 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:54:24.371 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:54:24.371 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:54:24.371 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:54:24.371 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:54:24.371 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:54:24.371 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:54:24.373 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:54:24.374 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:54:24.374 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:54:24.374 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:54:24.374 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:54:24.374 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:54:24.374 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:54:24.374 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:54:24.377 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:54:24.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:54:24.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:54:24.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:54:24.377 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:54:24.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:54:24.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:54:24.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:54:24.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:54:24.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:54:24.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:54:24.378 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:54:24.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:54:24.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:54:24.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:54:24.378 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:54:24.378 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:54:24.378 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:54:24.378 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:54:24.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:54:24.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:54:24.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:54:24.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:54:24.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:54:24.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:54:24.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:54:24.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:54:24.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:54:24.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:54:24.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:54:24.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:54:24.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:54:24.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:54:24.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:54:24.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:54:24.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:54:24.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:54:24.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:54:24.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:54:24.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:54:24.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:54:24.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:54:24.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:54:24.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:54:24.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:54:24.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:54:24.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:54:24.383 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:54:24.861 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:54:24.899 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:54:24.901 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:54:24.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:54:24.904 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:54:24.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:54:24.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:54:24.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:54:24.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:54:24.909 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:54:24.909 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:54:24.909 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:54:24.909 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:54:25.334 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:54:25.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:54:25.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:54:25.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:54:25.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:54:25.805 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:54:26.276 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:54:26.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:54:26.382 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:54:26.382 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:54:26.382 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:54:26.749 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:54:27.221 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:54:27.382 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:54:27.382 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:54:27.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:54:27.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:54:27.693 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:54:28.164 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:54:28.384 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:54:28.384 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:54:28.384 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:54:28.384 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:54:28.638 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:54:29.110 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:54:29.385 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:54:29.385 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:54:29.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:54:29.385 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:54:29.582 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:54:30.053 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:54:30.526 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:54:30.999 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:54:31.471 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:54:31.942 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:54:32.414 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:54:32.881 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:54:32.962 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:54:32.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:54:32.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:54:32.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:54:32.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:54:32.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:54:32.974 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:54:32.975 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:54:32.975 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:54:32.975 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:54:32.976 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:54:32.976 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:54:32.976 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:54:32.976 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1857 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:32.976 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1857 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:32.976 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1857 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:32.976 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1857 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:32.976 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1858 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:32.977 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1858 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:32.977 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1858 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:32.977 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1858 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:32.977 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1858 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:32.977 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1858 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:32.977 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1858 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:32.977 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1858 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:32.977 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1859 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:32.977 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1859 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:32.977 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1859 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:32.977 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1859 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:32.977 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1859 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:32.978 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1859 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:32.978 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1859 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:32.978 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1859 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:37.977 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:54:37.977 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:54:37.977 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:54:37.977 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:54:37.977 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:54:37.977 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:54:37.986 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:54:37.988 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:54:37.988 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:54:37.988 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:54:37.988 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:54:37.992 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:54:37.993 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:54:37.993 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:54:37.993 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:54:37.993 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:54:37.994 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:54:37.994 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:54:37.994 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:54:37.996 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:54:37.996 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:54:37.996 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:54:37.996 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:54:37.996 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:54:37.997 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:54:37.997 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:54:37.997 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:54:37.999 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:54:37.999 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:54:37.999 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:54:37.999 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:54:37.999 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:54:37.999 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:54:38.000 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:54:38.000 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:54:38.003 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:54:38.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:54:38.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:54:38.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:54:38.003 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:54:38.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:54:38.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:54:38.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:54:38.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:54:38.004 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:54:38.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:54:38.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:54:38.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:54:38.004 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:54:38.004 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:54:38.004 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:54:38.004 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:54:38.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:54:38.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:54:38.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:54:38.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:54:38.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:54:38.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:54:38.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:54:38.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:54:38.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:54:38.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:54:38.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:54:38.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:54:38.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:54:38.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:54:38.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:54:38.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:54:38.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:54:38.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:54:38.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:54:38.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:54:38.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:54:38.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:54:38.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:54:38.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:54:38.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:54:38.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:54:38.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:54:38.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:54:38.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:54:38.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:54:38.009 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:54:38.488 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:54:38.535 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:54:38.537 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:54:38.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:54:38.539 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:54:38.542 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:54:38.542 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:54:38.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:54:38.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:54:38.543 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:54:38.543 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:54:38.543 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:54:38.543 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:54:38.960 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:54:39.008 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:54:39.008 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:54:39.008 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:54:39.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:54:39.431 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:54:39.905 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:54:40.009 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:54:40.010 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:54:40.010 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:54:40.010 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:54:40.377 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:54:40.849 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:54:41.010 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:54:41.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:54:41.011 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:54:41.011 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:54:41.320 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:54:41.794 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:54:42.012 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:54:42.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:54:42.012 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:54:42.013 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:54:42.266 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:54:42.738 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:54:43.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:54:43.014 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:54:43.014 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:54:43.014 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:54:43.209 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:54:43.683 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:54:44.155 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:54:44.627 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:54:45.098 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:54:45.571 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:54:46.044 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:54:46.516 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:54:46.584 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:54:46.584 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:54:46.590 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:54:46.590 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:54:46.590 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:54:46.590 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:54:46.592 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:54:46.592 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:54:46.592 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:54:46.592 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:54:46.592 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:54:46.592 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:54:46.592 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:54:46.592 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:54:51.598 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:54:51.598 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:54:51.598 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:54:51.598 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:54:51.598 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:54:51.598 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:54:51.606 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:54:51.607 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:54:51.607 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:54:51.607 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:54:51.608 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:54:51.611 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:54:51.611 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:54:51.611 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:54:51.612 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:54:51.612 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:54:51.612 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:54:51.613 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:54:51.613 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:54:51.616 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:54:51.616 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:54:51.617 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:54:51.617 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:54:51.617 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:54:51.618 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:54:51.618 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:54:51.618 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:54:51.621 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:54:51.621 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:54:51.622 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:54:51.622 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:54:51.622 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:54:51.622 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:54:51.622 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:54:51.622 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:54:51.628 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:54:51.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:54:51.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:54:51.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:54:51.628 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:54:51.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:54:51.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:54:51.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:54:51.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:54:51.628 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:54:51.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:54:51.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:54:51.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:54:51.628 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:54:51.629 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:54:51.629 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:54:51.629 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:54:51.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:54:51.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:54:51.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:54:51.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:54:51.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:54:51.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:54:51.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:54:51.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:54:51.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:54:51.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:54:51.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:54:51.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:54:51.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:54:51.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:54:51.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:54:51.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:54:51.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:54:51.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:54:51.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:54:51.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:54:51.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:54:51.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:54:51.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:54:51.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:54:51.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:54:51.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:54:51.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:54:51.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:54:51.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:54:51.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:54:51.633 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:54:52.112 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:54:52.158 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:54:52.160 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:54:52.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:54:52.162 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:54:52.166 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:54:52.167 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:54:52.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:54:52.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:54:52.168 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:54:52.168 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:54:52.168 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:54:52.168 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:54:52.584 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:54:52.632 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:54:52.632 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:54:52.632 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:54:52.634 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:54:53.055 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:54:53.529 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:54:53.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:54:53.633 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:54:53.633 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:54:53.636 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:54:54.001 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:54:54.473 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:54:54.634 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:54:54.635 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:54:54.635 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:54:54.637 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:54:54.944 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:54:55.418 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:54:55.636 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:54:55.636 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:54:55.637 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:54:55.638 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:54:55.890 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:54:56.362 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:54:56.637 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:54:56.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:54:56.638 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:54:56.639 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:54:56.833 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:54:57.306 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:54:57.779 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:54:58.251 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:54:58.722 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:54:59.196 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:54:59.668 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:55:00.140 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:55:00.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:55:00.212 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:55:00.218 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:55:00.218 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:55:00.218 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:55:00.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:55:00.220 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:55:00.220 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:55:00.220 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:55:00.220 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:55:00.220 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:55:00.220 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:55:00.220 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:55:00.220 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:55:00.220 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:55:00.220 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:55:00.220 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:55:00.220 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:55:00.220 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:55:00.220 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:55:00.220 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:55:00.220 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:55:00.220 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:55:00.220 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:55:00.220 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:55:00.220 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:55:05.226 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:55:05.226 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:55:05.226 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:55:05.226 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:55:05.226 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:55:05.226 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:55:05.235 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:55:05.237 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:55:05.237 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:55:05.237 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:55:05.237 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:55:05.240 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:55:05.240 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:55:05.241 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:55:05.241 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:55:05.241 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:55:05.241 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:55:05.241 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:55:05.241 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:55:05.245 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:55:05.245 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:55:05.245 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:55:05.245 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:55:05.246 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:55:05.246 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:55:05.246 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:55:05.246 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:55:05.248 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:55:05.248 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:55:05.249 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:55:05.249 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:55:05.249 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:55:05.249 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:55:05.249 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:55:05.249 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:55:05.252 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:55:05.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:55:05.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:55:05.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:55:05.252 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:55:05.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:55:05.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:55:05.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:55:05.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:55:05.253 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:55:05.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:55:05.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:55:05.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:55:05.253 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:55:05.253 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:55:05.253 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:55:05.253 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:55:05.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:55:05.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:55:05.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:55:05.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:55:05.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:55:05.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:55:05.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:55:05.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:55:05.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:55:05.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:55:05.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:55:05.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:55:05.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:55:05.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:55:05.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:55:05.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:55:05.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:55:05.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:55:05.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:55:05.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:55:05.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:55:05.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:55:05.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:55:05.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:55:05.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:55:05.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:55:05.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:55:05.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:55:05.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:55:05.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:55:05.258 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:55:05.736 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:55:05.778 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:55:05.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:55:05.782 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:55:05.784 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:55:05.786 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:55:05.786 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:55:05.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:55:05.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:55:05.787 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:55:05.787 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:55:05.787 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:55:05.787 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:55:06.207 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:55:06.255 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:55:06.255 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:55:06.256 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:55:06.256 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:55:06.680 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:55:07.152 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:55:07.256 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:55:07.256 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:55:07.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:55:07.257 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:55:07.623 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:55:08.096 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:55:08.257 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:55:08.258 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:55:08.258 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:55:08.258 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:55:08.568 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:55:09.041 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:55:09.259 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:55:09.260 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:55:09.260 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:55:09.260 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:55:09.512 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:55:09.985 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:55:10.261 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:55:10.261 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:55:10.261 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:55:10.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:55:10.457 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:55:10.930 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:55:11.401 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:55:11.874 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:55:12.346 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:55:12.819 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:55:13.290 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:55:13.763 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:55:14.236 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:55:14.708 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:55:15.179 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:55:15.652 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 03:55:16.125 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 03:55:16.597 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 03:55:17.068 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 03:55:17.542 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 03:55:18.014 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 03:55:18.486 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 03:55:18.957 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 03:55:19.431 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 03:55:19.903 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 03:55:20.375 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 03:55:20.846 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 03:55:21.317 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 03:55:21.790 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 03:55:21.840 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:55:21.840 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:55:21.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:55:21.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:55:21.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:55:21.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:55:21.852 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:55:21.853 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:55:21.853 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:55:21.853 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:55:21.853 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:55:21.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:55:21.853 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:55:21.854 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3586 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:55:21.854 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3586 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:55:21.854 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3586 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:55:21.854 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3586 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:55:21.854 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3586 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:55:21.854 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3586 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:55:21.854 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3586 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:55:26.853 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:55:26.853 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:55:26.853 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:55:26.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:55:26.853 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:55:26.853 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:55:26.862 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:55:26.864 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:55:26.864 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:55:26.864 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:55:26.864 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:55:26.869 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:55:26.869 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:55:26.869 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:55:26.870 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:55:26.870 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:55:26.870 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:55:26.871 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:55:26.871 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:55:26.873 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:55:26.873 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:55:26.873 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:55:26.873 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:55:26.874 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:55:26.874 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:55:26.874 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:55:26.874 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:55:26.876 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:55:26.877 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:55:26.877 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:55:26.877 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:55:26.877 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:55:26.878 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:55:26.878 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:55:26.878 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:55:26.881 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:55:26.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:55:26.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:55:26.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:55:26.881 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:55:26.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:55:26.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:55:26.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:55:26.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:55:26.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:55:26.881 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:55:26.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:55:26.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:55:26.881 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:55:26.881 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:55:26.881 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:55:26.881 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:55:26.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:55:26.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:55:26.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:55:26.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:55:26.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:55:26.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:55:26.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:55:26.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:55:26.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:55:26.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:55:26.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:55:26.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:55:26.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:55:26.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:55:26.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:55:26.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:55:26.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:55:26.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:55:26.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:55:26.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:55:26.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:55:26.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:55:26.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:55:26.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:55:26.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:55:26.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:55:26.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:55:26.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:55:26.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:55:26.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:55:26.886 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:55:27.364 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:55:27.405 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:55:27.407 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:55:27.409 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:55:27.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:55:27.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:55:27.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:55:27.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:55:27.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:55:27.423 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:55:27.423 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:55:27.423 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:55:27.423 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:55:27.837 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:55:27.885 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:55:27.885 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:55:27.885 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:55:27.885 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:55:28.308 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:55:28.781 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:55:28.886 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:55:28.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:55:28.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:55:28.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:55:29.254 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:55:29.726 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:55:29.888 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:55:29.888 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:55:29.888 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:55:29.888 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:55:30.197 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:55:30.668 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:55:30.889 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:55:30.889 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:55:30.890 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:55:30.890 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:55:31.141 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:55:31.614 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:55:31.890 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:55:31.891 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:55:31.891 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:55:31.891 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:55:32.086 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:55:32.557 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:55:33.030 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:55:33.503 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:55:33.975 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:55:34.448 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:55:34.921 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:55:35.393 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:55:35.465 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:55:35.465 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:55:35.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:55:35.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:55:35.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:55:35.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:55:35.479 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:55:35.479 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:55:35.479 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:55:35.479 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:55:35.479 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:55:35.479 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:55:35.479 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:55:40.499 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:55:40.499 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:55:40.499 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:55:40.499 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:55:40.500 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:55:40.500 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:55:40.508 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:55:40.510 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:55:40.511 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:55:40.511 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:55:40.511 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:55:40.517 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:55:40.518 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:55:40.518 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:55:40.518 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:55:40.519 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:55:40.519 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:55:40.520 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:55:40.520 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:55:40.523 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:55:40.524 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:55:40.524 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:55:40.524 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:55:40.525 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:55:40.525 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:55:40.525 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:55:40.526 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:55:40.528 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:55:40.529 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:55:40.529 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:55:40.529 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:55:40.529 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:55:40.530 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:55:40.530 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:55:40.530 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:55:40.534 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:55:40.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:55:40.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:55:40.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:55:40.534 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:55:40.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:55:40.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:55:40.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:55:40.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:55:40.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:55:40.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:55:40.535 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:55:40.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:55:40.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:55:40.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:55:40.535 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:55:40.535 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:55:40.535 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:55:40.535 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:55:40.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:55:40.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:55:40.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:55:40.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:55:40.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:55:40.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:55:40.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:55:40.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:55:40.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:55:40.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:55:40.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:55:40.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:55:40.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:55:40.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:55:40.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:55:40.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:55:40.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:55:40.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:55:40.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:55:40.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:55:40.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:55:40.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:55:40.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:55:40.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:55:40.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:55:40.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:55:40.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:55:40.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:55:40.540 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:55:41.018 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:55:41.062 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:55:41.065 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:55:41.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:55:41.067 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:55:41.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:55:41.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:55:41.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:55:41.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:55:41.077 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:55:41.077 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:55:41.077 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:55:41.077 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:55:41.490 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:55:41.538 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:55:41.538 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:55:41.539 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:55:41.539 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:55:41.961 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:55:42.435 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:55:42.540 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:55:42.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:55:42.540 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:55:42.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:55:42.907 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:55:43.379 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:55:43.541 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:55:43.541 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:55:43.541 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:55:43.541 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:55:43.850 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:55:44.324 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:55:44.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:55:44.542 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:55:44.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:55:44.542 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:55:44.796 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:55:45.268 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:55:45.543 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:55:45.543 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:55:45.543 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:55:45.544 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:55:45.739 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:55:46.212 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:55:46.685 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:55:47.157 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:55:47.628 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:55:48.101 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:55:48.574 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:55:49.046 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:55:49.517 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:55:49.991 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:55:50.463 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:55:50.935 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 03:55:51.406 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 03:55:51.877 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 03:55:52.348 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 03:55:52.821 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 03:55:53.294 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 03:55:53.766 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 03:55:54.237 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 03:55:54.710 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 03:55:55.183 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 03:55:55.655 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 03:55:56.126 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 03:55:56.599 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 03:55:57.072 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 03:55:57.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:55:57.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:55:57.135 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:55:57.136 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:55:57.136 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:55:57.136 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:55:57.138 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:55:57.139 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:55:57.139 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:55:57.139 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:55:57.139 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:55:57.139 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:55:57.139 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:55:57.140 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3586 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:55:57.140 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3586 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:55:57.140 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3586 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:55:57.140 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3586 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:55:57.140 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3586 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:55:57.140 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3586 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:02.143 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:56:02.143 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:56:02.143 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:56:02.143 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:56:02.143 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:56:02.144 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:56:02.156 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:56:02.158 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:56:02.158 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:56:02.159 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:56:02.159 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:56:02.165 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:56:02.166 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:56:02.166 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:56:02.166 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:56:02.167 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:56:02.167 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:56:02.168 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:56:02.168 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:56:02.171 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:56:02.171 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:56:02.171 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:56:02.171 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:56:02.172 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:56:02.172 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:56:02.173 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:56:02.173 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:56:02.175 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:56:02.176 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:56:02.176 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:56:02.176 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:56:02.177 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:56:02.177 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:56:02.177 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:56:02.177 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:56:02.182 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:56:02.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:56:02.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:56:02.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:56:02.182 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:56:02.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:56:02.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:56:02.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:56:02.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:02.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:56:02.182 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:56:02.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:02.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:02.183 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:56:02.183 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:56:02.183 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:56:02.183 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:56:02.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:02.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:02.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:02.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:56:02.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:02.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:02.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:02.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:02.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:02.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:02.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:02.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:02.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:02.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:02.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:02.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:02.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:02.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:02.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:02.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:02.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:02.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:02.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:02.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:02.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:02.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:02.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:02.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:02.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:02.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:02.187 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:56:02.666 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:56:02.713 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:56:02.715 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:56:02.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:56:02.718 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:56:02.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:56:02.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:56:02.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:56:02.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:56:02.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:56:02.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:56:02.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:56:02.758 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:56:02.758 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:56:02.758 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:56:02.758 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:56:02.758 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:56:02.758 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:56:02.758 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:56:02.759 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:02.759 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:02.759 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:02.759 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:02.759 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:02.759 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:02.759 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:07.775 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:56:07.775 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:56:07.775 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:56:07.775 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:56:07.775 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:56:07.775 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:56:07.783 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:56:07.784 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:56:07.785 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:56:07.785 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:56:07.785 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:56:07.789 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:56:07.789 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:56:07.789 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:56:07.789 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:56:07.790 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:56:07.790 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:56:07.790 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:56:07.790 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:56:07.792 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:56:07.793 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:56:07.793 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:56:07.793 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:56:07.793 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:56:07.793 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:56:07.794 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:56:07.794 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:56:07.795 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:56:07.796 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:56:07.796 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:56:07.796 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:56:07.796 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:56:07.796 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:56:07.796 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:56:07.796 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:56:07.799 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:56:07.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:56:07.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:56:07.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:56:07.799 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:56:07.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:56:07.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:56:07.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:56:07.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:56:07.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:07.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:07.800 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:56:07.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:07.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:07.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:07.800 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:56:07.800 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:56:07.800 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:56:07.800 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:56:07.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:07.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:07.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:07.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:56:07.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:07.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:07.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:07.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:07.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:07.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:07.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:07.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:07.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:07.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:07.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:07.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:07.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:07.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:07.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:07.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:07.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:07.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:07.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:07.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:07.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:07.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:07.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:07.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:07.805 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:56:08.283 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:56:08.325 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:56:08.327 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:56:08.329 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:56:08.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:56:08.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:56:08.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:56:08.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:56:08.390 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:56:08.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:56:08.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:56:08.390 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:56:08.391 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:56:08.391 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:56:08.391 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:56:08.391 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:56:08.391 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:56:08.391 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:56:08.391 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:56:13.399 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:56:13.399 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:56:13.399 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:56:13.399 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:56:13.399 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:56:13.399 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:56:13.408 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:56:13.410 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:56:13.410 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:56:13.410 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:56:13.410 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:56:13.416 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:56:13.416 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:56:13.416 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:56:13.416 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:56:13.416 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:56:13.417 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:56:13.417 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:56:13.417 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:56:13.421 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:56:13.421 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:56:13.422 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:56:13.422 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:56:13.422 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:56:13.422 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:56:13.422 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:56:13.422 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:56:13.426 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:56:13.426 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:56:13.426 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:56:13.426 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:56:13.427 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:56:13.427 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:56:13.427 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:56:13.427 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:56:13.432 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:56:13.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:56:13.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:56:13.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:56:13.432 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:56:13.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:56:13.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:56:13.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:56:13.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:13.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:56:13.432 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:56:13.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:13.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:13.432 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:56:13.432 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:56:13.432 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:56:13.433 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:56:13.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:13.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:13.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:13.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:56:13.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:13.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:13.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:13.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:13.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:13.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:13.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:13.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:13.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:13.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:13.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:13.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:13.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:13.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:13.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:13.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:13.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:13.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:13.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:13.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:13.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:13.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:13.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:13.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:13.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:13.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:13.437 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:56:13.915 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:56:13.961 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:56:13.963 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:56:13.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:56:13.966 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:56:13.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:56:13.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:56:13.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:56:14.034 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:56:14.034 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:56:14.034 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:56:14.034 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:56:14.036 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:56:14.036 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:56:14.036 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:56:14.036 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:56:14.036 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:56:14.036 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:56:14.036 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:56:14.036 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:14.036 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=130 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:14.036 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=130 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:14.036 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=130 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:14.036 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=130 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:14.036 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=130 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:14.036 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=130 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:14.036 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=130 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:14.036 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=130 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:19.044 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:56:19.044 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:56:19.044 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:56:19.044 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:56:19.044 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:56:19.044 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:56:19.054 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:56:19.057 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:56:19.057 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:56:19.058 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:56:19.058 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:56:19.063 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:56:19.063 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:56:19.063 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:56:19.063 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:56:19.063 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:56:19.064 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:56:19.064 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:56:19.064 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:56:19.068 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:56:19.069 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:56:19.069 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:56:19.069 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:56:19.069 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:56:19.069 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:56:19.069 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:56:19.069 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:56:19.073 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:56:19.073 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:56:19.073 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:56:19.074 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:56:19.074 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:56:19.074 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:56:19.074 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:56:19.074 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:56:19.079 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:56:19.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:56:19.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:56:19.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:56:19.080 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:56:19.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:56:19.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:56:19.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:56:19.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:56:19.080 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:56:19.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:19.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:19.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:19.080 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:56:19.080 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:56:19.080 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:56:19.081 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:56:19.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:19.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:19.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:19.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:56:19.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:19.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:19.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:19.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:19.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:19.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:19.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:19.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:19.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:19.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:19.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:19.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:19.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:19.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:19.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:19.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:19.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:19.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:19.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:19.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:19.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:19.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:19.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:19.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:19.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:19.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:19.085 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:56:19.563 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:56:19.608 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:56:19.610 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:56:19.612 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:56:19.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:56:19.633 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:56:19.633 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:56:19.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:56:19.685 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:56:19.685 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:56:19.685 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:56:19.686 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:56:19.691 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:56:19.692 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:56:19.692 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:56:19.692 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:56:19.692 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:56:19.692 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:56:19.693 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:56:19.693 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=130 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:19.693 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=130 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:19.693 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=130 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:19.693 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=130 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:19.693 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=130 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:19.694 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=130 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:19.694 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=130 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:19.694 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=130 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:19.694 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=131 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:19.694 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=131 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:19.694 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=131 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:19.694 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=131 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:19.694 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=131 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:19.694 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=131 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:19.694 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=131 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:19.694 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=131 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:24.694 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:56:24.694 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:56:24.694 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:56:24.694 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:56:24.694 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:56:24.694 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:56:24.703 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:56:24.705 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:56:24.705 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:56:24.705 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:56:24.705 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:56:24.709 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:56:24.710 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:56:24.710 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:56:24.710 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:56:24.710 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:56:24.710 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:56:24.710 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:56:24.710 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:56:24.714 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:56:24.714 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:56:24.714 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:56:24.714 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:56:24.715 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:56:24.715 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:56:24.715 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:56:24.715 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:56:24.719 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:56:24.719 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:56:24.719 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:56:24.719 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:56:24.719 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:56:24.719 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:56:24.719 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:56:24.719 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:56:24.724 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:56:24.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:56:24.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:56:24.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:56:24.725 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:56:24.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:56:24.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:56:24.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:56:24.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:56:24.725 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:56:24.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:24.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:24.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:24.725 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:56:24.725 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:56:24.725 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:56:24.726 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:56:24.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:24.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:24.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:24.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:56:24.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:24.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:24.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:24.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:24.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:24.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:24.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:24.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:24.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:24.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:24.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:24.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:24.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:24.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:24.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:24.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:24.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:24.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:24.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:24.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:24.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:24.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:24.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:24.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:24.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:24.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:24.730 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:56:25.208 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:56:25.254 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:56:25.256 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:56:25.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:56:25.258 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:56:25.278 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:56:25.278 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:56:25.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:56:25.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:56:25.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:56:25.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:56:25.331 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:56:25.331 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:56:25.331 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:56:25.331 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:56:25.333 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:56:25.333 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:56:25.333 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:56:25.333 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:56:25.333 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:56:25.333 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:56:25.333 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:56:25.333 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=131 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:25.334 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=131 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:25.334 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=131 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:25.334 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=131 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:25.334 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=131 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:25.334 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=131 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:56:30.340 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:56:30.340 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:56:30.340 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:56:30.340 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:56:30.340 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:56:30.340 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:56:30.347 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:56:30.348 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:56:30.348 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:56:30.348 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:56:30.348 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:56:30.350 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:56:30.351 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:56:30.351 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:56:30.351 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:56:30.351 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:56:30.352 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:56:30.352 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:56:30.352 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:56:30.354 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:56:30.354 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:56:30.355 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:56:30.355 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:56:30.355 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:56:30.355 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:56:30.355 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:56:30.355 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:56:30.358 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:56:30.358 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:56:30.358 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:56:30.358 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:56:30.358 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:56:30.358 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:56:30.359 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:56:30.359 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:56:30.363 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:56:30.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:56:30.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:56:30.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:56:30.363 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:56:30.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:56:30.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:56:30.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:56:30.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:56:30.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:30.364 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:56:30.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:30.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:30.364 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:56:30.364 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:56:30.364 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:56:30.364 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:56:30.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:30.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:30.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:30.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:56:30.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:30.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:30.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:30.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:30.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:30.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:30.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:30.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:30.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:30.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:30.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:30.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:30.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:30.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:30.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:30.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:30.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:30.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:30.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:30.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:30.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:30.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:30.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:30.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:30.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:30.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:30.369 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:56:30.847 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:56:30.890 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:56:30.892 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:56:30.894 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:56:30.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:56:30.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:56:30.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:56:30.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:56:30.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:56:30.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:56:30.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:56:30.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:56:30.965 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:56:30.965 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:56:30.965 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:56:30.966 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:56:30.967 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:56:30.967 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:56:30.967 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:56:30.967 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:56:30.967 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:56:30.967 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:56:35.974 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:56:35.974 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:56:35.974 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:56:35.974 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:56:35.974 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:56:35.974 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:56:35.979 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:56:35.979 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:56:35.979 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:56:35.980 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:56:35.980 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:56:35.983 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:56:35.983 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:56:35.983 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:56:35.983 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:56:35.983 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:56:35.984 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:56:35.984 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:56:35.984 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:56:35.986 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:56:35.986 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:56:35.986 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:56:35.986 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:56:35.986 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:56:35.987 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:56:35.987 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:56:35.987 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:56:35.989 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:56:35.989 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:56:35.989 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:56:35.989 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:56:35.989 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:56:35.989 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:56:35.989 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:56:35.989 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:56:35.993 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:56:35.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:56:35.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:56:35.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:56:35.993 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:56:35.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:56:35.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:56:35.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:56:35.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:56:35.994 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:56:35.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:35.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:35.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:35.994 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:56:35.994 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:56:35.994 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:56:35.994 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:56:35.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:35.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:35.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:35.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:56:35.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:35.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:35.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:35.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:35.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:35.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:35.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:35.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:35.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:35.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:35.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:35.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:35.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:35.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:35.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:35.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:35.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:35.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:35.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:35.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:35.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:35.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:56:35.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:35.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:56:35.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:56:35.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:56:35.999 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:56:36.477 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:56:36.517 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:56:36.518 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:56:36.519 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:56:36.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:56:36.522 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:56:36.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:56:36.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:56:36.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:56:36.524 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:56:36.524 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:56:36.524 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:56:36.524 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:56:36.949 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:56:36.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:56:36.997 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:56:36.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:56:36.998 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:56:37.420 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:56:37.893 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:56:37.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:56:37.999 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:56:37.999 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:56:37.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:56:38.366 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:56:38.838 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:56:39.000 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:56:39.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:56:39.000 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:56:39.000 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:56:39.309 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:56:39.782 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:56:40.000 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:56:40.001 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:56:40.001 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:56:40.001 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:56:40.255 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:56:40.727 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:56:41.002 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:56:41.002 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:56:41.002 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:56:41.003 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:56:41.198 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:56:41.669 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:56:42.142 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:56:42.615 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:56:43.087 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:56:43.558 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:56:44.031 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:56:44.504 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:56:44.976 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 03:56:45.447 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 03:56:45.920 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 03:56:46.393 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 03:56:46.865 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 03:56:47.336 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 03:56:47.807 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 03:56:48.280 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 03:56:48.752 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 03:56:49.225 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 03:56:49.696 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 03:56:50.169 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 03:56:50.641 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 03:56:51.114 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 03:56:51.585 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 03:56:52.058 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 03:56:52.530 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 03:56:53.002 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 03:56:53.474 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 03:56:53.947 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 03:56:54.419 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 03:56:54.892 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 03:56:55.363 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 03:56:55.836 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 03:56:56.309 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 03:56:56.781 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 03:56:57.252 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 03:56:57.725 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 03:56:58.198 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 03:56:58.670 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 03:56:59.141 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 03:56:59.614 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 03:57:00.087 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 03:57:00.559 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 03:57:01.030 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 03:57:01.503 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 03:57:01.976 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 03:57:02.448 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 03:57:02.919 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 03:57:03.392 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 03:57:03.864 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 03:57:04.336 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 03:57:04.808 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 03:57:05.281 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-08 03:57:05.753 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-08 03:57:06.226 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-08 03:57:06.696 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-08 03:57:07.167 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-08 03:57:07.640 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-08 03:57:08.113 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-08 03:57:08.585 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-08 03:57:09.058 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-08 03:57:09.531 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-08 03:57:10.003 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-08 03:57:10.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:57:10.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:57:10.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:57:10.022 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:57:10.022 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:57:10.022 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:57:10.023 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:57:10.023 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:57:10.023 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:57:10.023 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:57:10.023 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:57:10.023 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:57:10.023 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:57:10.023 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7349 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:57:10.023 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7349 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:57:10.023 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7350 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:57:10.023 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7350 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:57:10.023 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7350 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:57:10.023 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7350 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:57:10.023 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7350 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:57:10.024 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7350 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:57:10.024 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7350 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:57:10.024 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7350 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:57:15.030 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:57:15.030 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:57:15.030 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:57:15.030 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:57:15.030 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:57:15.030 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:57:15.041 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:57:15.042 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:57:15.042 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:57:15.042 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:57:15.042 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:57:15.044 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:57:15.044 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:57:15.044 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:57:15.044 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:57:15.044 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:57:15.044 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:57:15.045 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:57:15.045 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:57:15.046 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:57:15.046 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:57:15.046 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:57:15.046 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:57:15.046 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:57:15.046 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:57:15.046 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:57:15.046 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:57:15.048 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:57:15.048 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:57:15.048 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:57:15.048 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:57:15.048 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:57:15.048 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:57:15.048 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:57:15.048 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:57:15.050 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:57:15.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:57:15.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:57:15.051 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:57:15.051 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:57:15.051 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:15.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:15.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:15.056 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:57:15.534 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:57:15.571 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:57:15.572 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:57:15.573 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:57:15.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:57:16.006 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:57:16.055 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:57:16.055 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:57:16.055 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:57:16.056 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:57:16.481 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:57:16.953 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:57:17.056 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:57:17.057 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:57:17.057 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:57:17.057 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:57:17.428 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:57:17.899 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:57:18.058 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:57:18.058 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:57:18.058 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:57:18.058 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:57:18.372 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:57:18.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:57:18.599 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:57:18.599 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:57:18.599 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:57:18.599 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:57:18.600 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:57:18.600 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:57:18.600 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:57:18.600 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:57:18.600 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:57:18.600 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:57:18.600 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:57:23.607 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:57:23.607 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:57:23.607 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:57:23.607 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:57:23.607 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:57:23.607 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:57:23.616 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:57:23.616 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:57:23.617 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:57:23.617 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:57:23.617 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:57:23.619 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:57:23.619 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:57:23.619 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:57:23.619 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:57:23.619 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:57:23.619 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:57:23.620 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:57:23.620 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:57:23.621 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:57:23.621 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:57:23.621 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:57:23.621 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:57:23.621 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:57:23.621 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:57:23.621 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:57:23.621 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:57:23.623 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:57:23.623 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:57:23.623 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:57:23.623 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:57:23.623 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:57:23.623 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:57:23.623 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:57:23.624 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:57:23.626 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:57:23.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:57:23.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:57:23.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:57:23.626 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:57:23.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:57:23.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:57:23.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:57:23.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:57:23.626 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:57:23.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:23.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:23.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:23.627 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:57:23.627 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:57:23.627 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:57:23.627 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:57:23.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:23.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:23.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:23.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:57:23.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:23.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:23.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:23.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:23.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:23.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:23.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:23.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:23.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:23.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:23.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:23.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:23.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:23.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:23.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:23.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:23.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:23.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:23.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:23.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:23.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:23.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:23.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:23.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:23.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:23.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:23.631 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:57:24.108 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:57:24.147 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:57:24.149 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:57:24.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:57:24.153 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:57:24.580 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:57:24.630 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:57:24.630 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:57:24.630 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:57:24.630 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:57:25.054 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:57:25.526 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:57:25.632 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:57:25.632 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:57:25.632 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:57:25.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:57:25.998 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:57:26.469 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:57:26.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:57:26.633 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:57:26.634 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:57:26.634 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:57:26.943 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:57:27.415 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:57:27.635 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:57:27.635 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:57:27.635 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:57:27.635 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:57:27.887 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:57:28.362 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:57:28.637 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:57:28.637 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:57:28.637 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:57:28.637 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:57:28.833 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:57:29.305 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:57:29.780 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:57:30.171 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:57:30.171 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:57:30.171 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:57:30.171 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:57:30.172 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:57:30.172 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:57:30.172 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:57:30.172 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:57:30.172 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:57:30.172 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:57:30.172 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:57:30.172 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1412 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:57:35.178 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:57:35.179 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:57:35.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:57:35.179 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:57:35.179 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:57:35.179 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:57:35.190 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:57:35.191 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:57:35.191 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:57:35.192 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:57:35.192 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:57:35.198 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:57:35.198 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:57:35.198 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:57:35.198 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:57:35.199 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:57:35.199 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:57:35.199 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:57:35.200 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:57:35.202 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:57:35.203 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:57:35.203 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:57:35.203 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:57:35.203 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:57:35.204 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:57:35.204 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:57:35.204 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:57:35.206 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:57:35.206 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:57:35.207 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:57:35.207 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:57:35.207 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:57:35.207 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:57:35.207 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:57:35.207 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:57:35.211 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:57:35.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:57:35.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:57:35.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:57:35.211 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:57:35.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:57:35.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:57:35.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:57:35.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:57:35.211 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:57:35.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:35.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:35.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:35.211 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:57:35.211 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:57:35.211 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:57:35.211 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:57:35.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:35.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:35.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:35.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:57:35.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:35.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:35.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:35.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:35.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:35.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:35.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:35.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:35.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:35.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:35.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:35.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:35.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:35.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:35.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:35.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:35.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:35.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:35.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:35.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:35.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:35.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:35.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:35.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:35.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:35.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:35.216 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:57:35.694 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:57:35.736 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:57:35.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:57:35.739 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:57:35.741 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:57:36.162 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:57:36.214 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:57:36.214 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:57:36.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:57:36.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:57:36.637 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:57:37.109 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:57:37.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:57:37.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:57:37.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:57:37.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:57:37.580 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:57:38.054 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:57:38.217 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:57:38.217 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:57:38.218 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:57:38.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:57:38.526 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:57:38.998 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:57:39.219 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:57:39.219 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:57:39.219 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:57:39.219 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:57:39.473 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:57:39.945 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:57:40.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:57:40.220 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:57:40.220 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:57:40.220 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:57:40.420 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:57:40.885 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:57:41.349 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:57:41.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:57:41.756 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:57:41.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:57:41.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:57:41.757 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:57:41.757 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:57:41.757 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:57:41.757 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:57:41.757 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:57:41.757 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:57:41.757 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:57:46.765 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:57:46.765 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:57:46.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:57:46.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:57:46.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:57:46.765 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:57:46.772 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:57:46.773 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:57:46.773 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:57:46.773 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:57:46.773 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:57:46.778 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:57:46.778 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:57:46.778 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:57:46.778 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:57:46.779 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:57:46.779 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:57:46.779 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:57:46.779 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:57:46.781 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:57:46.782 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:57:46.782 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:57:46.782 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:57:46.782 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:57:46.782 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:57:46.782 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:57:46.782 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:57:46.786 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:57:46.786 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:57:46.786 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:57:46.786 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:57:46.786 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:57:46.786 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:57:46.786 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:57:46.786 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:57:46.790 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:57:46.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:57:46.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:57:46.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:57:46.790 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:57:46.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:57:46.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:57:46.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:57:46.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:57:46.790 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:57:46.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:46.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:46.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:46.790 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:57:46.790 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:57:46.790 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:57:46.791 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:57:46.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:46.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:46.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:46.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:57:46.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:46.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:46.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:46.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:46.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:46.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:46.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:46.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:46.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:46.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:46.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:46.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:46.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:46.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:46.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:46.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:46.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:46.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:46.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:46.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:46.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:46.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:46.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:46.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:46.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:46.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:46.795 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:57:47.274 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:57:47.310 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:57:47.311 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:57:47.312 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:57:47.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:57:47.746 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:57:47.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:57:47.794 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:57:47.794 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:57:47.795 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:57:48.217 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:57:48.691 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:57:48.796 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:57:48.796 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:57:48.796 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:57:48.796 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:57:49.163 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:57:49.628 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:57:49.797 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:57:49.797 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:57:49.797 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:57:49.797 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:57:50.099 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:57:50.572 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:57:50.799 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:57:50.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:57:50.799 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:57:50.799 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:57:51.044 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:57:51.509 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:57:51.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:57:51.800 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:57:51.800 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:57:51.800 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:57:51.981 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:57:52.453 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:57:52.926 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:57:53.323 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:57:53.323 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:57:53.323 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:57:53.323 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:57:53.324 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:57:53.324 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:57:53.324 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:57:53.324 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:57:53.324 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:57:53.324 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:57:53.324 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:57:53.324 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1415 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:57:53.324 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1415 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:57:53.324 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1415 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:57:53.324 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1415 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:57:53.325 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1415 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:57:53.325 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1415 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:57:58.330 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:57:58.330 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:57:58.330 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:57:58.330 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:57:58.330 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:57:58.330 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:57:58.341 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:57:58.343 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:57:58.343 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:57:58.344 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:57:58.344 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:57:58.350 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:57:58.350 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:57:58.351 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:57:58.351 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:57:58.351 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:57:58.352 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:57:58.352 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:57:58.352 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:57:58.356 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:57:58.356 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:57:58.357 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:57:58.357 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:57:58.357 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:57:58.357 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:57:58.358 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:57:58.358 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:57:58.361 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:57:58.361 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:57:58.361 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:57:58.362 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:57:58.362 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:57:58.362 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:57:58.362 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:57:58.362 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:57:58.367 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:57:58.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:57:58.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:57:58.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:57:58.367 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:57:58.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:57:58.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:57:58.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:57:58.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:57:58.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:58.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:58.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:58.368 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:57:58.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:58.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:58.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:58.368 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:57:58.368 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:57:58.368 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:57:58.368 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:57:58.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:58.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:58.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:58.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:57:58.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:58.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:58.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:58.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:58.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:58.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:58.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:58.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:58.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:58.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:58.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:58.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:58.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:58.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:58.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:58.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:58.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:58.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:57:58.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:57:58.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:58.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:57:58.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:58.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:57:58.373 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:57:58.851 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:57:58.898 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:57:58.900 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:57:58.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:57:58.902 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:57:59.322 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:57:59.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:57:59.375 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:57:59.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:57:59.376 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:57:59.794 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:58:00.266 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:58:00.377 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:58:00.377 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:58:00.377 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:58:00.377 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:58:00.741 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:58:01.213 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:58:01.379 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:58:01.379 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:58:01.380 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:58:01.380 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:58:01.684 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:58:02.157 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:58:02.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:58:02.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:58:02.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:58:02.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:58:02.630 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:58:02.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:58:03.102 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:58:03.382 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:58:03.382 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:58:03.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:58:03.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:58:03.576 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:58:04.048 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:58:04.520 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:58:04.994 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:58:05.466 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:58:05.938 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:58:06.412 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:58:06.884 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:58:06.937 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:58:06.938 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:58:06.938 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:58:06.938 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:58:06.939 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:58:06.939 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:58:06.939 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:58:06.939 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:58:06.939 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:58:06.939 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:58:06.939 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:58:06.939 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1849 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:58:06.939 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1849 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:58:06.939 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1849 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:58:06.939 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1849 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:58:06.939 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1849 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:58:11.945 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:58:11.945 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:58:11.946 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:58:11.946 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:58:11.946 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:58:11.946 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:58:11.954 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:58:11.955 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:58:11.955 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:58:11.955 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:58:11.955 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:58:11.959 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:58:11.960 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:58:11.960 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:58:11.960 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:58:11.960 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:58:11.960 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:58:11.960 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:58:11.960 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:58:11.965 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:58:11.965 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:58:11.965 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:58:11.965 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:58:11.965 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:58:11.965 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:58:11.966 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:58:11.966 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:58:11.970 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:58:11.970 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:58:11.970 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:58:11.970 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:58:11.970 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:58:11.970 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:58:11.970 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:58:11.970 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:58:11.976 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:58:11.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:58:11.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:58:11.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:58:11.976 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:58:11.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:58:11.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:58:11.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:58:11.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:58:11.977 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:58:11.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:11.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:11.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:11.977 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:58:11.977 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:58:11.977 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:58:11.977 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:58:11.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:11.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:11.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:11.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:58:11.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:11.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:11.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:11.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:11.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:11.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:11.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:11.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:11.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:11.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:11.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:11.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:11.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:11.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:11.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:11.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:11.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:11.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:11.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:11.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:11.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:11.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:11.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:11.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:11.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:11.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:11.982 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:58:12.460 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:58:12.505 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:58:12.506 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:58:12.507 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:58:12.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:58:12.931 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:58:12.981 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:58:12.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:58:12.982 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:58:12.983 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:58:13.403 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:58:13.877 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:58:13.982 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:58:13.983 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:58:13.984 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:58:13.984 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:58:14.350 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:58:14.824 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:58:14.985 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:58:14.985 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:58:14.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:58:14.985 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:58:15.300 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:58:15.772 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:58:15.986 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:58:15.986 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:58:15.987 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:58:15.987 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:58:16.247 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:58:16.520 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:58:16.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:58:16.520 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:58:16.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:58:16.521 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:58:16.521 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:58:16.521 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:58:16.521 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:58:16.521 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:58:16.521 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:58:16.521 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:58:16.521 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=980 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:58:16.521 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=980 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:58:16.521 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=980 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:58:16.521 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=980 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:58:21.528 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:58:21.528 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:58:21.528 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:58:21.528 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:58:21.528 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:58:21.528 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:58:21.535 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:58:21.536 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:58:21.536 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:58:21.536 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:58:21.536 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:58:21.539 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:58:21.539 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:58:21.539 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:58:21.539 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:58:21.539 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:58:21.539 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:58:21.539 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:58:21.539 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:58:21.542 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:58:21.542 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:58:21.542 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:58:21.542 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:58:21.542 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:58:21.542 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:58:21.542 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:58:21.542 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:58:21.544 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:58:21.544 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:58:21.544 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:58:21.544 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:58:21.544 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:58:21.544 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:58:21.544 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:58:21.544 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:58:21.547 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:58:21.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:58:21.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:58:21.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:58:21.547 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:58:21.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:58:21.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:58:21.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:58:21.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:58:21.547 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:58:21.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:21.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:21.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:21.547 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:58:21.547 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:58:21.547 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:58:21.548 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:58:21.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:21.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:21.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:21.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:58:21.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:21.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:21.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:21.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:21.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:21.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:21.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:21.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:21.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:21.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:21.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:21.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:21.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:21.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:21.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:21.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:21.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:21.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:21.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:21.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:21.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:21.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:21.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:21.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:21.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:21.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:21.552 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:58:22.030 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:58:22.071 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:58:22.074 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:58:22.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:58:22.077 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:58:22.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:58:22.125 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:58:22.125 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:58:22.125 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:58:22.126 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:58:22.126 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:58:22.126 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:58:22.126 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:58:22.126 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:58:22.126 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:58:22.126 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:58:27.134 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:58:27.134 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:58:27.134 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:58:27.134 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:58:27.134 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:58:27.134 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:58:27.142 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:58:27.143 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:58:27.143 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:58:27.143 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:58:27.143 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:58:27.148 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:58:27.148 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:58:27.149 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:58:27.149 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:58:27.149 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:58:27.149 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:58:27.149 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:58:27.149 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:58:27.153 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:58:27.154 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:58:27.154 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:58:27.154 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:58:27.154 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:58:27.154 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:58:27.154 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:58:27.154 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:58:27.158 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:58:27.158 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:58:27.158 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:58:27.158 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:58:27.159 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:58:27.159 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:58:27.159 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:58:27.159 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:58:27.164 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:58:27.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:58:27.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:58:27.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:58:27.164 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:58:27.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:58:27.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:58:27.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:58:27.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:58:27.165 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:58:27.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:27.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:27.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:27.165 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:58:27.165 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:58:27.165 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:58:27.165 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:58:27.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:27.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:27.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:27.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:58:27.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:27.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:27.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:27.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:27.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:27.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:27.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:27.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:27.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:27.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:27.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:27.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:27.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:27.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:27.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:27.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:27.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:27.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:27.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:27.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:27.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:27.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:27.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:27.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:27.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:27.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:27.170 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:58:27.649 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:58:27.688 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:58:27.689 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:58:27.690 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:58:27.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:58:27.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:58:27.743 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:58:27.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:58:27.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:58:27.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:58:27.744 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:58:27.744 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:58:27.744 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:58:27.744 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:58:27.744 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:58:27.745 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:58:27.745 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:58:32.750 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:58:32.750 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:58:32.750 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:58:32.751 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:58:32.751 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:58:32.751 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:58:32.759 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:58:32.761 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:58:32.761 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:58:32.761 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:58:32.761 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:58:32.765 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:58:32.765 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:58:32.766 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:58:32.766 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:58:32.766 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:58:32.766 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:58:32.767 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:58:32.767 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:58:32.769 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:58:32.769 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:58:32.769 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:58:32.769 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:58:32.770 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:58:32.770 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:58:32.770 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:58:32.770 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:58:32.772 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:58:32.772 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:58:32.772 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:58:32.772 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:58:32.773 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:58:32.773 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:58:32.773 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:58:32.773 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:58:32.776 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:58:32.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:58:32.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:58:32.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:58:32.776 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:58:32.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:58:32.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:58:32.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:58:32.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:58:32.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:32.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:32.776 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:58:32.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:32.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:32.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:32.776 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:58:32.776 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:58:32.776 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:58:32.777 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:58:32.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:32.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:32.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:32.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:58:32.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:32.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:32.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:32.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:32.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:32.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:32.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:32.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:32.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:32.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:32.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:32.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:32.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:32.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:32.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:32.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:32.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:32.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:32.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:32.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:32.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:32.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:32.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:32.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:32.781 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:58:33.259 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:58:33.300 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:58:33.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:58:33.303 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:58:33.305 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:58:33.353 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:58:33.354 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:58:33.354 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:58:33.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:58:33.359 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:58:33.360 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:58:33.360 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:58:33.360 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:58:33.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:58:33.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:58:33.361 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:58:33.361 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:58:33.361 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:58:33.361 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:58:33.361 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:58:33.361 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:58:33.361 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:58:33.361 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:58:33.362 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:58:33.362 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:58:33.362 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:58:33.362 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:58:33.362 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:58:38.362 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:58:38.362 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:58:38.362 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:58:38.362 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:58:38.362 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:58:38.362 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:58:38.371 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:58:38.372 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:58:38.372 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:58:38.373 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:58:38.373 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:58:38.378 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:58:38.378 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:58:38.378 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:58:38.378 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:58:38.378 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:58:38.378 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:58:38.379 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:58:38.379 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:58:38.383 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:58:38.383 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:58:38.383 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:58:38.383 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:58:38.383 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:58:38.383 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:58:38.384 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:58:38.384 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:58:38.387 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:58:38.388 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:58:38.388 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:58:38.388 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:58:38.388 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:58:38.388 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:58:38.388 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:58:38.388 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:58:38.393 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:58:38.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:58:38.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:58:38.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:58:38.393 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:58:38.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:58:38.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:58:38.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:58:38.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:58:38.394 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:58:38.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:38.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:38.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:38.394 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:58:38.394 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:58:38.394 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:58:38.394 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:58:38.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:38.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:38.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:38.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:58:38.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:38.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:38.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:38.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:38.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:38.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:38.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:38.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:38.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:38.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:38.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:38.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:38.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:38.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:38.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:38.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:38.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:38.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:38.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:38.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:38.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:38.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:38.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:38.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:38.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:38.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:38.399 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:58:38.878 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:58:38.923 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:58:38.925 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:58:38.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:58:38.927 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:58:38.933 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:58:38.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:58:38.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:58:38.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:58:38.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:58:38.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:58:38.935 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:58:38.935 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:58:39.350 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:58:39.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:58:39.398 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:58:39.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:58:39.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:58:39.821 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:58:40.295 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:58:40.400 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:58:40.400 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:58:40.400 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:58:40.400 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:58:40.767 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:58:41.239 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:58:41.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:58:41.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:58:41.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:58:41.401 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:58:41.710 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:58:41.994 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:58:41.994 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:58:41.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:58:41.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:58:42.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:58:42.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:58:42.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:58:42.046 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:58:42.046 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:58:42.046 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:58:42.046 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:58:42.047 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:58:42.047 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:58:42.047 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:58:42.047 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:58:42.047 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:58:42.047 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:58:42.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:58:47.053 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:58:47.053 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:58:47.053 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:58:47.053 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:58:47.053 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:58:47.053 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:58:47.062 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:58:47.064 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:58:47.064 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:58:47.064 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:58:47.064 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:58:47.069 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:58:47.069 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:58:47.069 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:58:47.069 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:58:47.069 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:58:47.070 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:58:47.070 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:58:47.070 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:58:47.074 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:58:47.074 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:58:47.074 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:58:47.074 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:58:47.075 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:58:47.075 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:58:47.075 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:58:47.075 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:58:47.079 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:58:47.079 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:58:47.079 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:58:47.079 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:58:47.079 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:58:47.079 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:58:47.079 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:58:47.079 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:58:47.085 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:58:47.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:58:47.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:58:47.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:58:47.085 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:58:47.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:58:47.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:58:47.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:58:47.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:58:47.085 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:58:47.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:47.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:47.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:47.086 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:58:47.086 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:58:47.086 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:58:47.086 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:58:47.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:47.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:47.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:47.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:58:47.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:47.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:47.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:47.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:47.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:47.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:47.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:47.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:47.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:47.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:47.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:47.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:47.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:47.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:47.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:47.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:47.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:47.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:47.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:47.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:47.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:47.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:47.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:47.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:47.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:47.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:47.090 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:58:47.570 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:58:47.615 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:58:47.617 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:58:47.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:58:47.620 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:58:47.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:58:47.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:58:47.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:58:47.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:58:47.629 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:58:47.629 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:58:47.629 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:58:47.629 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:58:48.041 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:58:48.090 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:58:48.090 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:58:48.092 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:58:48.092 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:58:48.513 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:58:48.986 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:58:49.091 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:58:49.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:58:49.093 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:58:49.093 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:58:49.459 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:58:49.931 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:58:50.092 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:58:50.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:58:50.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:58:50.095 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:58:50.402 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:58:50.685 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:58:50.685 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:58:50.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:58:50.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:58:50.876 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:58:51.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:58:51.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:58:51.096 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:58:51.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:58:51.348 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:58:51.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:58:51.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:58:51.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:58:51.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:58:51.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:58:51.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:58:51.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:58:51.371 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:58:51.371 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:58:51.371 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:58:51.371 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:58:51.371 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:58:51.371 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:58:51.371 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:58:51.371 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=925 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:58:51.371 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=925 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:58:56.376 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:58:56.377 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:58:56.377 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:58:56.377 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:58:56.377 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:58:56.377 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:58:56.385 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:58:56.386 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:58:56.386 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:58:56.387 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:58:56.387 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:58:56.390 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:58:56.390 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:58:56.391 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:58:56.391 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:58:56.391 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:58:56.391 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:58:56.392 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:58:56.392 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:58:56.394 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:58:56.394 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:58:56.394 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:58:56.394 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:58:56.395 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:58:56.395 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:58:56.395 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:58:56.395 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:58:56.397 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:58:56.397 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:58:56.398 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:58:56.398 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:58:56.398 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:58:56.398 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:58:56.398 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:58:56.398 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:58:56.401 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:58:56.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:58:56.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:58:56.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:58:56.402 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:58:56.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:58:56.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:58:56.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:58:56.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:58:56.402 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:58:56.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:56.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:56.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:56.402 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:58:56.402 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:58:56.402 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:58:56.402 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:58:56.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:56.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:56.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:56.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:58:56.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:56.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:56.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:56.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:56.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:56.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:56.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:56.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:56.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:56.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:56.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:56.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:56.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:56.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:56.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:56.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:56.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:56.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:56.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:56.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:56.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:56.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:56.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:58:56.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:58:56.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:58:56.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:58:56.407 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:58:56.885 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:58:56.923 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:58:56.924 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:58:56.925 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:58:56.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:58:56.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:58:56.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:58:56.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:58:56.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:58:56.933 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:58:56.934 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:58:56.934 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:58:56.934 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:58:57.353 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:58:57.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:58:57.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:58:57.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:58:57.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:58:57.824 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:58:58.297 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:58:58.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:58:58.406 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:58:58.406 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:58:58.406 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:58:58.770 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:58:59.242 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:58:59.406 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:58:59.407 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:58:59.407 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:58:59.408 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:58:59.713 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:58:59.996 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:58:59.997 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:58:59.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:58:59.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:59:00.187 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:59:00.408 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:59:00.409 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:59:00.409 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:59:00.409 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:59:00.659 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:59:01.131 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:59:01.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:59:01.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:59:01.411 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:59:01.411 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:59:01.605 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:59:02.077 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:59:02.550 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:59:03.023 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:59:03.496 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:59:03.968 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:59:04.439 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:59:04.910 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:59:04.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:59:05.000 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:59:05.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:59:05.019 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:59:05.020 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:59:05.020 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:59:05.020 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:59:05.022 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:59:05.022 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:59:05.022 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:59:05.022 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:59:05.022 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:59:05.022 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:59:05.022 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:59:05.022 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1862 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:59:05.022 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1862 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:59:05.022 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:59:05.022 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1862 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:59:05.022 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1862 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:59:05.022 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:59:05.022 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:59:10.027 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:59:10.027 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:59:10.027 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:59:10.027 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:59:10.027 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:59:10.027 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:59:10.039 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:59:10.040 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:59:10.040 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:59:10.040 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:59:10.040 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:59:10.042 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:59:10.042 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:59:10.043 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:59:10.043 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:59:10.043 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:59:10.043 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:59:10.043 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:59:10.043 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:59:10.044 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:59:10.044 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:59:10.044 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:59:10.044 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:59:10.045 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:59:10.045 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:59:10.045 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:59:10.045 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:59:10.046 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:59:10.046 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:59:10.046 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:59:10.046 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:59:10.046 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:59:10.046 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:59:10.047 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:59:10.047 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:59:10.049 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:59:10.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:59:10.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:59:10.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:59:10.049 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:59:10.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:59:10.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:59:10.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:59:10.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:59:10.049 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:59:10.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:10.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:10.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:10.050 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:59:10.050 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:59:10.050 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:59:10.050 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:59:10.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:10.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:10.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:10.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:59:10.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:10.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:10.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:10.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:10.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:10.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:10.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:10.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:10.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:10.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:10.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:10.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:10.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:10.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:10.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:10.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:10.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:10.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:10.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:10.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:10.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:10.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:10.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:10.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:10.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:10.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:10.054 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:59:10.534 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:59:10.573 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:59:10.576 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:59:10.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:59:10.580 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:59:10.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:59:10.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:59:10.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:59:10.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:59:10.592 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:59:10.593 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:59:10.593 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:59:10.594 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:59:11.006 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:59:11.052 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:59:11.053 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:59:11.053 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:59:11.053 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:59:11.477 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:59:11.951 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:59:12.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:59:12.054 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:59:12.054 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:59:12.054 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:59:12.423 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:59:12.895 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:59:13.054 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:59:13.055 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:59:13.055 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:59:13.055 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:59:13.366 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:59:13.650 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:59:13.650 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:59:13.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:59:13.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:59:13.840 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:59:14.056 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:59:14.056 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:59:14.056 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:59:14.056 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:59:14.312 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:59:14.785 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:59:15.057 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:59:15.057 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:59:15.057 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:59:15.058 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:59:15.256 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:59:15.729 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:59:16.202 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:59:16.674 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:59:17.145 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:59:17.618 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:59:18.091 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:59:18.563 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:59:18.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:59:18.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:59:18.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:59:18.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:59:18.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:59:18.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:59:18.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:59:18.666 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:59:18.667 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:59:18.667 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:59:18.667 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:59:18.668 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:59:18.668 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:59:18.668 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:59:18.668 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1860 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:59:18.668 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1860 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:59:18.668 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1860 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:59:18.668 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1860 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:59:18.668 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1860 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:59:18.668 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1860 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:59:23.682 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:59:23.683 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:59:23.683 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:59:23.683 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:59:23.683 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:59:23.683 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:59:23.692 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:59:23.693 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:59:23.694 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:59:23.694 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:59:23.694 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:59:23.698 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:59:23.699 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:59:23.699 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:59:23.699 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:59:23.699 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:59:23.699 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:59:23.699 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:59:23.699 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:59:23.704 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:59:23.704 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:59:23.704 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:59:23.704 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:59:23.704 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:59:23.704 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:59:23.704 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:59:23.704 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:59:23.708 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:59:23.708 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:59:23.708 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:59:23.708 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:59:23.709 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:59:23.709 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:59:23.709 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:59:23.709 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:59:23.714 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:59:23.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:59:23.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:59:23.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:59:23.714 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:59:23.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:59:23.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:59:23.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:59:23.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:59:23.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:23.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:23.715 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:59:23.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:23.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:23.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:23.715 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:59:23.715 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:59:23.715 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:59:23.715 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:59:23.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:23.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:23.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:23.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:59:23.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:23.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:23.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:23.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:23.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:23.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:23.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:23.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:23.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:23.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:23.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:23.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:23.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:23.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:23.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:23.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:23.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:23.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:23.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:23.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:23.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:23.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:23.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:23.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:23.720 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:59:24.198 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:59:24.250 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:59:24.252 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:59:24.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:59:24.256 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:59:24.262 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:59:24.262 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:59:24.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:59:24.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:59:24.264 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:59:24.265 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:59:24.265 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:59:24.265 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:59:24.670 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:59:24.719 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:59:24.720 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:59:24.721 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:59:24.721 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:59:25.141 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:59:25.612 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:59:25.721 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:59:25.721 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:59:25.721 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:59:25.722 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:59:26.086 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:59:26.558 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:59:26.721 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:59:26.722 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:59:26.722 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:59:26.723 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:59:27.030 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:59:27.314 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:59:27.314 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:59:27.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:59:27.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:59:27.502 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:59:27.722 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:59:27.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:59:27.723 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:59:27.723 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:59:27.975 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:59:28.448 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:59:28.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:59:28.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:59:28.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:59:28.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:59:28.920 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:59:29.391 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:59:29.864 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:59:30.337 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 03:59:30.809 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 03:59:31.280 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 03:59:31.753 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 03:59:32.226 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 03:59:32.317 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:59:32.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:59:32.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:59:32.337 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:59:32.337 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:59:32.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:59:32.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:59:32.339 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:59:32.339 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:59:32.339 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:59:32.339 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:59:32.339 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:59:32.339 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:59:32.339 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:59:37.346 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:59:37.346 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:59:37.346 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:59:37.346 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:59:37.346 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:59:37.346 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:59:37.355 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:59:37.357 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:59:37.357 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:59:37.358 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:59:37.358 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:59:37.362 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:59:37.363 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:59:37.363 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:59:37.363 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:59:37.364 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:59:37.364 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:59:37.364 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:59:37.364 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:59:37.367 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:59:37.368 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:59:37.368 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:59:37.368 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:59:37.368 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:59:37.369 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:59:37.369 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:59:37.369 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:59:37.372 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:59:37.372 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:59:37.372 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:59:37.372 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:59:37.372 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:59:37.372 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:59:37.372 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:59:37.372 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:59:37.377 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:59:37.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:59:37.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:59:37.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:59:37.377 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:59:37.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:59:37.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:59:37.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:59:37.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:59:37.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:37.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:37.377 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:59:37.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:37.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:37.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:37.377 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:59:37.377 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:59:37.377 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:59:37.378 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:59:37.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:37.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:37.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:37.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:59:37.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:37.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:37.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:37.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:37.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:37.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:37.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:37.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:37.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:37.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:37.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:37.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:37.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:37.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:37.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:37.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:37.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:37.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:37.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:37.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:37.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:37.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:37.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:37.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:37.382 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:59:37.861 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:59:37.903 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:59:37.903 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:59:37.904 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:59:37.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:59:37.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:59:37.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:59:37.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:59:37.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:59:37.907 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:59:37.907 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:59:37.907 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:59:37.908 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:59:37.951 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:59:37.951 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:59:37.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:59:37.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:59:38.332 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:59:38.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:59:38.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:59:38.382 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:59:38.382 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:59:38.804 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:59:39.275 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:59:39.382 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:59:39.383 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:59:39.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:59:39.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:59:39.748 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:59:40.221 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:59:40.383 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:59:40.384 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:59:40.384 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:59:40.384 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:59:40.693 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:59:41.164 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:59:41.385 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:59:41.385 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:59:41.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:59:41.385 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:59:41.637 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:59:42.110 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:59:42.386 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:59:42.387 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:59:42.387 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:59:42.387 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:59:42.582 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:59:42.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:59:42.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:59:42.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:59:42.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:59:42.966 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:59:42.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:59:42.967 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:59:42.967 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:59:42.967 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:59:42.967 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:59:42.967 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:59:42.967 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:59:42.967 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:59:47.973 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:59:47.973 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:59:47.973 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:59:47.973 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:59:47.973 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:59:47.973 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:59:47.977 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:59:47.977 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:59:47.977 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:59:47.977 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:59:47.977 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:59:47.979 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:59:47.979 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:59:47.980 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:59:47.980 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:59:47.980 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:59:47.980 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:59:47.980 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:59:47.980 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:59:47.982 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:59:47.982 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:59:47.982 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:59:47.982 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:59:47.982 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:59:47.982 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:59:47.982 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:59:47.982 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:59:47.985 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:59:47.985 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:59:47.985 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:59:47.985 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:59:47.985 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:59:47.985 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:59:47.985 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:59:47.985 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:59:47.988 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:59:47.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:59:47.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:59:47.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:59:47.988 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:59:47.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:59:47.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:59:47.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:59:47.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:59:47.989 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:59:47.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:47.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:47.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:47.989 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:59:47.989 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:59:47.989 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:59:47.989 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:59:47.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:47.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:47.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:47.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:59:47.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:47.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:47.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:47.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:47.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:47.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:47.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:47.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:47.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:47.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:47.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:47.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:47.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:47.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:47.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:47.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:47.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:47.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:47.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:47.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:47.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:47.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:47.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:47.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:47.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:47.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:47.994 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:59:48.473 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:59:48.513 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:59:48.514 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:59:48.515 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:59:48.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:59:48.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:59:48.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:59:48.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:59:48.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:59:48.520 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:59:48.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:59:48.520 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:59:48.520 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 03:59:48.946 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 03:59:48.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:59:48.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:59:48.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:59:48.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:59:49.417 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 03:59:49.890 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 03:59:49.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:59:49.993 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:59:49.993 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:59:49.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:59:50.363 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 03:59:50.835 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 03:59:50.995 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:59:50.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:59:50.995 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:59:50.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:59:51.306 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 03:59:51.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:59:51.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:59:51.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:59:51.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:59:51.779 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 03:59:51.996 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:59:51.997 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:59:51.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:59:51.997 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:59:52.252 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 03:59:52.724 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 03:59:52.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:59:52.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:59:52.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:59:52.998 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:59:53.197 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 03:59:53.670 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 03:59:54.142 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 03:59:54.190 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:59:54.190 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:59:54.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:59:54.199 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 03:59:54.199 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 03:59:54.199 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 03:59:54.199 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 03:59:54.201 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:59:54.201 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:59:54.201 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:59:54.201 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 03:59:54.201 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:59:54.201 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:59:54.201 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:59:54.201 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1340 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:59:54.201 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1340 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:59:54.201 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1340 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:59:54.201 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1340 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:59:54.201 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1340 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:59:54.202 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1341 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:59:54.202 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1341 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:59:54.202 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1341 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:59:54.202 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1341 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:59:54.202 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1341 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:59:54.202 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1341 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:59:54.202 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1341 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:59:54.202 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1341 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 03:59:59.207 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 03:59:59.207 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 03:59:59.207 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:59:59.207 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:59:59.207 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:59:59.207 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:59:59.217 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 03:59:59.219 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:59:59.219 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:59:59.220 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 03:59:59.220 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 03:59:59.228 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 03:59:59.228 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 03:59:59.229 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:59:59.229 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:59:59.229 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 03:59:59.230 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 03:59:59.230 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 03:59:59.230 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 03:59:59.234 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 03:59:59.234 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 03:59:59.234 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:59:59.234 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:59:59.235 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 03:59:59.235 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 03:59:59.235 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 03:59:59.235 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 03:59:59.239 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 03:59:59.239 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 03:59:59.239 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:59:59.239 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 03:59:59.239 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 03:59:59.239 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 03:59:59.239 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 03:59:59.239 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 03:59:59.245 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 03:59:59.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 03:59:59.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 03:59:59.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 03:59:59.245 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 03:59:59.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 03:59:59.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 03:59:59.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 03:59:59.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 03:59:59.246 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 03:59:59.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:59.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:59.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:59.246 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 03:59:59.246 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 03:59:59.246 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 03:59:59.246 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 03:59:59.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:59.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:59.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:59.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 03:59:59.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:59.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:59.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:59.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:59.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:59.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:59.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:59.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:59.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:59.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:59.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:59.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:59.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:59.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:59.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:59.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:59.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:59.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:59.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:59.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:59.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 03:59:59.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:59.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:59.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 03:59:59.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 03:59:59.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 03:59:59.251 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 03:59:59.729 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 03:59:59.779 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 03:59:59.781 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 03:59:59.781 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 03:59:59.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 03:59:59.786 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 03:59:59.786 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 03:59:59.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 03:59:59.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 03:59:59.788 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 03:59:59.788 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 03:59:59.788 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 03:59:59.788 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:00:00.200 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:00:00.250 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:00:00.251 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:00:00.252 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:00:00.252 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:00:00.672 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:00:01.143 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:00:01.252 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:00:01.252 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:00:01.252 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:00:01.253 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:00:01.617 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:00:02.089 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:00:02.252 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:00:02.253 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:00:02.253 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:00:02.253 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:00:02.561 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:00:02.877 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:00:02.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:00:02.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:00:02.885 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:00:02.885 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:00:02.885 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:00:02.885 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:00:02.886 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:00:02.886 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:00:02.886 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:00:02.886 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:00:02.886 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:00:02.886 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:00:02.886 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:00:02.886 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=786 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:00:02.886 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=786 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:00:02.886 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=786 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:00:02.886 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=786 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:00:07.894 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:00:07.894 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:00:07.894 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:00:07.894 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:00:07.894 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:00:07.894 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:00:07.902 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:00:07.903 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:00:07.903 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:00:07.903 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:00:07.903 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:00:07.907 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:00:07.907 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:00:07.907 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:00:07.908 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:00:07.908 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:00:07.908 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:00:07.908 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:00:07.908 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:00:07.911 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:00:07.911 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:00:07.911 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:00:07.911 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:00:07.911 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:00:07.912 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:00:07.912 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:00:07.912 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:00:07.914 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:00:07.914 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:00:07.914 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:00:07.914 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:00:07.914 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:00:07.914 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:00:07.914 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:00:07.914 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:00:07.917 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:00:07.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:00:07.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:00:07.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:00:07.917 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:00:07.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:00:07.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:00:07.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:00:07.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:00:07.918 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:00:07.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:07.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:07.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:07.918 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:00:07.918 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:00:07.918 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:00:07.918 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:00:07.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:07.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:07.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:07.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:00:07.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:07.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:07.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:07.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:07.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:07.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:07.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:07.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:07.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:07.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:07.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:07.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:07.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:07.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:07.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:07.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:07.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:07.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:07.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:07.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:07.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:07.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:07.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:07.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:07.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:07.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:07.923 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:00:08.401 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:00:08.446 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:00:08.449 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:00:08.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:00:08.449 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:00:08.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:00:08.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:00:08.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:00:08.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:00:08.457 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:00:08.457 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:00:08.458 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:00:08.458 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:00:08.869 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:00:08.920 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:00:08.920 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:00:08.921 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:00:08.921 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:00:09.340 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:00:09.813 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:00:09.921 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:00:09.921 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:00:09.921 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:00:09.922 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:00:10.286 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:00:10.758 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:00:10.922 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:00:10.923 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:00:10.923 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:00:10.923 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:00:11.229 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:00:11.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:00:11.543 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:00:11.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:00:11.551 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:00:11.551 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:00:11.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:00:11.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:00:11.554 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:00:11.554 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:00:11.554 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:00:11.554 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:00:11.554 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:00:11.554 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:00:11.554 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:00:11.554 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=785 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:00:11.554 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=785 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:00:11.554 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=785 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:00:11.554 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=785 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:00:11.554 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=785 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:00:11.554 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=786 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:00:11.554 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=786 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:00:11.554 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=786 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:00:11.554 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=786 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:00:11.554 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=786 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:00:11.554 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=786 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:00:11.554 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=786 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:00:11.555 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=786 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:00:16.559 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:00:16.559 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:00:16.559 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:00:16.559 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:00:16.559 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:00:16.559 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:00:16.566 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:00:16.566 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:00:16.567 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:00:16.567 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:00:16.567 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:00:16.569 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:00:16.569 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:00:16.569 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:00:16.569 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:00:16.570 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:00:16.570 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:00:16.570 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:00:16.570 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:00:16.572 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:00:16.573 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:00:16.573 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:00:16.573 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:00:16.573 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:00:16.574 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:00:16.574 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:00:16.574 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:00:16.576 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:00:16.577 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:00:16.577 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:00:16.577 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:00:16.577 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:00:16.577 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:00:16.577 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:00:16.577 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:00:16.582 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:00:16.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:00:16.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:00:16.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:00:16.582 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:00:16.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:00:16.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:00:16.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:00:16.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:00:16.583 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:00:16.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:16.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:16.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:16.583 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:00:16.583 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:00:16.583 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:00:16.583 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:00:16.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:16.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:16.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:16.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:00:16.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:16.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:16.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:16.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:16.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:16.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:16.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:16.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:16.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:16.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:16.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:16.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:16.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:16.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:16.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:16.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:16.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:16.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:16.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:16.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:16.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:16.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:16.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:16.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:16.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:16.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:16.588 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:00:17.067 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:00:17.108 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:00:17.108 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:00:17.109 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:00:17.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:00:17.115 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:00:17.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:00:17.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:00:17.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:00:17.116 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:00:17.116 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:00:17.116 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:00:17.116 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:00:17.383 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:00:17.383 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:00:17.389 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:00:17.389 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:00:17.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:00:17.390 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:00:17.390 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:00:17.391 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:00:17.391 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:00:17.391 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:00:17.391 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:00:17.391 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:00:17.391 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:00:17.391 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=174 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:00:17.391 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=174 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:00:17.391 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=174 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:00:17.391 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=174 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:00:17.391 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=174 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:00:17.391 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=174 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:00:22.400 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:00:22.400 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:00:22.400 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:00:22.400 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:00:22.400 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:00:22.400 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:00:22.407 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:00:22.408 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:00:22.408 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:00:22.408 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:00:22.409 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:00:22.411 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:00:22.411 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:00:22.412 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:00:22.412 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:00:22.412 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:00:22.412 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:00:22.413 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:00:22.413 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:00:22.414 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:00:22.414 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:00:22.414 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:00:22.414 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:00:22.415 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:00:22.415 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:00:22.415 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:00:22.415 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:00:22.417 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:00:22.417 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:00:22.417 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:00:22.417 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:00:22.417 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:00:22.417 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:00:22.417 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:00:22.417 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:00:22.420 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:00:22.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:00:22.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:00:22.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:00:22.420 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:00:22.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:00:22.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:00:22.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:00:22.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:00:22.420 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:00:22.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:22.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:22.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:22.420 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:00:22.420 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:00:22.420 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:00:22.420 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:00:22.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:22.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:22.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:22.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:00:22.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:22.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:22.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:22.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:22.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:22.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:22.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:22.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:22.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:22.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:22.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:22.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:22.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:22.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:22.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:22.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:22.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:22.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:22.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:22.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:22.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:22.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:22.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:22.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:22.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:22.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:22.425 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:00:22.903 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:00:22.945 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:00:22.947 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:00:22.948 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:00:22.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:00:22.954 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:00:22.954 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:00:22.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:00:22.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:00:22.956 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:00:22.956 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:00:22.957 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:00:22.957 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:00:23.173 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:00:23.174 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:00:23.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:00:23.182 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:00:23.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:00:23.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:00:23.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:00:23.184 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:00:23.184 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:00:23.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:00:23.184 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:00:23.184 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:00:23.184 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:00:23.184 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=164 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:00:23.184 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=164 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:00:23.184 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=164 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:00:28.191 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:00:28.191 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:00:28.191 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:00:28.191 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:00:28.191 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:00:28.191 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:00:28.200 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:00:28.202 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:00:28.202 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:00:28.203 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:00:28.203 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:00:28.208 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:00:28.208 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:00:28.208 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:00:28.208 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:00:28.208 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:00:28.208 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:00:28.208 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:00:28.208 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:00:28.212 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:00:28.213 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:00:28.213 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:00:28.213 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:00:28.213 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:00:28.213 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:00:28.213 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:00:28.213 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:00:28.217 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:00:28.217 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:00:28.217 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:00:28.217 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:00:28.217 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:00:28.217 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:00:28.217 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:00:28.217 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:00:28.222 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:00:28.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:00:28.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:00:28.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:00:28.222 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:00:28.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:00:28.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:00:28.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:00:28.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:00:28.223 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:00:28.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:28.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:28.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:28.223 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:00:28.223 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:00:28.223 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:00:28.223 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:00:28.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:28.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:28.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:28.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:00:28.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:28.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:28.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:28.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:28.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:28.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:28.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:28.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:28.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:28.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:28.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:28.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:28.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:28.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:28.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:28.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:28.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:28.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:28.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:28.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:28.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:28.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:28.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:28.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:28.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:28.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:28.228 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:00:28.706 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:00:28.750 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:00:28.753 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:00:28.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:00:28.755 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:00:28.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:00:28.765 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:00:28.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:00:28.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:00:28.765 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:00:28.765 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:00:28.766 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:00:28.766 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:00:29.175 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:00:29.227 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:00:29.227 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:00:29.227 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:00:29.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:00:29.645 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:00:30.119 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:00:30.228 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:00:30.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:00:30.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:00:30.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:00:30.591 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:00:31.064 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:00:31.230 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:00:31.248 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:00:31.248 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:00:31.248 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:00:31.537 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:00:32.010 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:00:32.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:00:32.249 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:00:32.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:00:32.249 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:00:32.482 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:00:32.955 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:00:33.250 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:00:33.250 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:00:33.250 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:00:33.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:00:33.428 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:00:33.900 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:00:34.371 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:00:34.844 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:00:35.317 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:00:35.789 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:00:36.260 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:00:36.733 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:00:37.206 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:00:37.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:00:37.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:00:37.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:00:37.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:00:37.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:00:37.566 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:00:37.567 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:00:37.567 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:00:37.567 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:00:37.567 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:00:37.567 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:00:37.567 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:00:37.567 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:00:37.567 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2018 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:00:37.567 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2018 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:00:37.567 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2018 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:00:37.567 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2018 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:00:37.567 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2018 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:00:37.567 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2018 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:00:37.568 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2018 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:00:42.574 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:00:42.574 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:00:42.574 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:00:42.574 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:00:42.574 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:00:42.574 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:00:42.583 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:00:42.584 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:00:42.584 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:00:42.585 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:00:42.585 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:00:42.588 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:00:42.588 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:00:42.588 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:00:42.588 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:00:42.589 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:00:42.589 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:00:42.589 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:00:42.589 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:00:42.591 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:00:42.591 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:00:42.592 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:00:42.592 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:00:42.592 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:00:42.592 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:00:42.592 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:00:42.592 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:00:42.594 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:00:42.594 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:00:42.594 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:00:42.594 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:00:42.594 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:00:42.594 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:00:42.594 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:00:42.594 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:00:42.597 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:00:42.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:00:42.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:00:42.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:00:42.597 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:00:42.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:00:42.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:00:42.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:00:42.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:00:42.597 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:00:42.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:42.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:42.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:42.597 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:00:42.597 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:00:42.597 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:00:42.597 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:00:42.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:42.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:42.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:42.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:00:42.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:42.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:42.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:42.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:42.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:42.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:42.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:42.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:42.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:42.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:42.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:42.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:42.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:42.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:42.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:42.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:42.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:42.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:42.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:42.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:42.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:42.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:42.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:42.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:42.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:42.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:42.602 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:00:43.080 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:00:43.123 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:00:43.125 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:00:43.127 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:00:43.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:00:43.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:00:43.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:00:43.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:00:43.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:00:43.136 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:00:43.136 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:00:43.136 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:00:43.136 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:00:43.553 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:00:43.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:00:43.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:00:43.601 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:00:43.601 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:00:44.024 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:00:44.497 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:00:44.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:00:44.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:00:44.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:00:44.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:00:44.970 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:00:45.442 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:00:45.603 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:00:45.604 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:00:45.604 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:00:45.604 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:00:45.913 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:00:46.386 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:00:46.605 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:00:46.605 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:00:46.605 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:00:46.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:00:46.859 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:00:47.331 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:00:47.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:00:47.607 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:00:47.607 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:00:47.607 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:00:47.802 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:00:48.275 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:00:48.748 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:00:49.220 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:00:49.693 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:00:50.166 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:00:50.638 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:00:51.109 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:00:51.583 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:00:51.928 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:00:51.928 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:00:51.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:00:51.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:00:51.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:00:51.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:00:51.936 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:00:51.936 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:00:51.936 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:00:51.936 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:00:51.936 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:00:51.936 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:00:51.936 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:00:51.936 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2017 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:00:51.936 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2017 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:00:51.936 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2017 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:00:56.943 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:00:56.943 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:00:56.943 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:00:56.943 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:00:56.943 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:00:56.943 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:00:56.951 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:00:56.953 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:00:56.953 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:00:56.953 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:00:56.953 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:00:56.958 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:00:56.958 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:00:56.959 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:00:56.959 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:00:56.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:00:56.959 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:00:56.959 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:00:56.959 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:00:56.964 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:00:56.964 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:00:56.964 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:00:56.964 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:00:56.964 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:00:56.964 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:00:56.965 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:00:56.965 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:00:56.968 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:00:56.969 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:00:56.969 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:00:56.969 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:00:56.969 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:00:56.969 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:00:56.969 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:00:56.969 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:00:56.974 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:00:56.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:00:56.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:00:56.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:00:56.974 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:00:56.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:00:56.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:00:56.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:00:56.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:00:56.975 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:00:56.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:56.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:56.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:56.975 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:00:56.975 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:00:56.975 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:00:56.975 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:00:56.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:56.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:56.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:56.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:00:56.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:56.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:56.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:56.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:56.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:56.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:56.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:56.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:56.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:56.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:56.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:56.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:56.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:56.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:56.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:56.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:56.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:56.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:56.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:56.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:00:56.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:56.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:00:56.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:56.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:56.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:00:56.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:00:56.980 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:00:57.458 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:00:57.505 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:00:57.508 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:00:57.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:00:57.510 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:00:57.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:00:57.516 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:00:57.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:00:57.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:00:57.518 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:00:57.518 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:00:57.518 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:00:57.518 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:00:57.930 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:00:57.979 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:00:57.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:00:57.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:00:57.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:00:58.401 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:00:58.875 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:00:58.981 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:00:58.981 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:00:58.981 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:00:58.981 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:00:59.347 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:00:59.820 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:00:59.981 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:00:59.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:00:59.982 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:00:59.982 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:01:00.293 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:01:00.574 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:01:00.574 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:01:00.574 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:01:00.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:01:00.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:01:00.620 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:01:00.662 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:01:00.699 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:01:00.740 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:01:00.766 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:01:00.788 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:01:00.825 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:01:00.866 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:01:00.908 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:01:00.945 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:01:00.982 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:01:00.983 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:01:00.983 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:01:00.983 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:01:00.986 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:01:01.028 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:01:01.065 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:01:01.107 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:01:01.107 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:01:01.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:01:01.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:01:01.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:01:01.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:01:01.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:01:01.114 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:01:01.114 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:01:01.114 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:01:01.114 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:01:01.114 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:01:01.114 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:01:01.114 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:01:06.120 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:01:06.120 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:01:06.120 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:01:06.120 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:01:06.120 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:01:06.120 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:01:06.128 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:01:06.128 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:01:06.128 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:01:06.128 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:01:06.128 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:01:06.131 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:01:06.132 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:01:06.132 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:01:06.132 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:01:06.132 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:01:06.133 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:01:06.133 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:01:06.133 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:01:06.136 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:01:06.136 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:01:06.137 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:01:06.137 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:01:06.137 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:01:06.138 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:01:06.138 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:01:06.138 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:01:06.141 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:01:06.141 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:01:06.141 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:01:06.141 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:01:06.141 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:01:06.141 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:01:06.141 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:01:06.141 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:01:06.146 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:01:06.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:01:06.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:01:06.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:01:06.146 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:01:06.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:01:06.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:01:06.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:01:06.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:06.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:01:06.146 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:01:06.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:06.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:06.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:06.146 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:01:06.146 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:01:06.146 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:01:06.147 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:01:06.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:06.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:06.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:06.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:01:06.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:06.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:06.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:06.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:06.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:06.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:06.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:06.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:06.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:06.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:06.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:06.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:06.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:06.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:06.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:06.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:06.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:06.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:06.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:06.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:06.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:06.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:06.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:06.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:06.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:06.151 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:01:06.629 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:01:06.669 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:01:06.670 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:01:06.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:01:06.671 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:01:06.802 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:01:06.802 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:01:06.802 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:01:06.802 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:01:06.803 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:01:06.803 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:01:06.803 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:01:06.803 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:01:06.804 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:01:06.804 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:01:06.804 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:01:11.811 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:01:11.811 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:01:11.811 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:01:11.811 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:01:11.811 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:01:11.811 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:01:11.821 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:01:11.823 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:01:11.823 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:01:11.824 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:01:11.824 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:01:11.830 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:01:11.831 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:01:11.831 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:01:11.831 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:01:11.832 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:01:11.832 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:01:11.833 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:01:11.833 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:01:11.836 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:01:11.837 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:01:11.837 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:01:11.837 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:01:11.838 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:01:11.838 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:01:11.838 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:01:11.839 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:01:11.841 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:01:11.842 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:01:11.842 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:01:11.842 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:01:11.842 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:01:11.843 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:01:11.843 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:01:11.843 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:01:11.848 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:01:11.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:01:11.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:01:11.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:01:11.848 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:01:11.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:01:11.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:01:11.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:01:11.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:01:11.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:11.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:11.848 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:01:11.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:11.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:11.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:11.849 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:01:11.849 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:01:11.849 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:01:11.849 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:01:11.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:11.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:11.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:11.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:01:11.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:11.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:11.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:11.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:11.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:11.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:11.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:11.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:11.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:11.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:11.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:11.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:11.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:11.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:11.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:11.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:11.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:11.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:11.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:11.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:11.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:11.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:11.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:11.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:11.853 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:01:12.331 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:01:12.376 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:01:12.378 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:01:12.379 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:01:12.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:01:12.803 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:01:12.853 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:01:12.853 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:01:12.853 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:01:12.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:01:13.278 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:01:13.750 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:01:13.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:01:13.854 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:01:13.855 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:01:13.855 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:01:14.224 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:01:14.696 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:01:14.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:01:14.856 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:01:14.856 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:01:14.856 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:01:15.168 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:01:15.642 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:01:15.857 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:01:15.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:01:15.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:01:15.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:01:16.114 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:01:16.586 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:01:16.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:01:16.859 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:01:16.859 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:01:16.859 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:01:17.060 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:01:17.532 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:01:18.004 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:01:18.475 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:01:18.948 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:01:19.421 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:01:19.893 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:01:20.367 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:01:20.839 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:01:21.311 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:01:21.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:01:21.400 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:01:21.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:01:21.401 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:01:21.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:01:21.406 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:01:21.406 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:01:21.406 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:01:21.407 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:01:21.407 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:01:21.407 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:01:21.407 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:01:21.407 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2062 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:21.407 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2062 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:21.408 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2062 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:21.408 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2062 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:21.408 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2062 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:21.408 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2062 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:26.406 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:01:26.406 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:01:26.406 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:01:26.407 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:01:26.407 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:01:26.407 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:01:26.415 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:01:26.417 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:01:26.417 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:01:26.418 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:01:26.418 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:01:26.423 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:01:26.423 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:01:26.424 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:01:26.424 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:01:26.424 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:01:26.425 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:01:26.425 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:01:26.425 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:01:26.428 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:01:26.429 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:01:26.429 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:01:26.429 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:01:26.430 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:01:26.430 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:01:26.430 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:01:26.431 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:01:26.433 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:01:26.433 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:01:26.434 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:01:26.434 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:01:26.434 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:01:26.434 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:01:26.434 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:01:26.434 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:01:26.439 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:01:26.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:01:26.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:01:26.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:01:26.439 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:01:26.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:01:26.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:01:26.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:01:26.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:01:26.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:26.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:26.439 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:01:26.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:26.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:26.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:26.439 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:01:26.440 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:01:26.440 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:01:26.440 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:01:26.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:26.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:26.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:26.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:01:26.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:26.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:26.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:26.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:26.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:26.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:26.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:26.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:26.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:26.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:26.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:26.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:26.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:26.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:26.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:26.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:26.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:26.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:26.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:26.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:26.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:26.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:26.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:26.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:26.444 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:01:26.923 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:01:26.966 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:01:26.968 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:01:26.970 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:01:26.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:01:27.395 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:01:27.443 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:01:27.444 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:01:27.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:01:27.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:01:27.869 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:01:28.341 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:01:28.445 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:01:28.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:01:28.446 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:01:28.446 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:01:28.813 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:01:29.287 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:01:29.447 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:01:29.447 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:01:29.447 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:01:29.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:01:29.759 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:01:30.231 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:01:30.448 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:01:30.448 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:01:30.449 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:01:30.449 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:01:30.705 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:01:31.177 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:01:31.450 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:01:31.450 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:01:31.450 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:01:31.451 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:01:31.649 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:01:32.124 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:01:32.596 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:01:33.068 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:01:33.541 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:01:34.014 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:01:34.486 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:01:34.959 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:01:35.428 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:01:35.892 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:01:35.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:01:35.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:01:35.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:01:35.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:01:35.992 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:01:35.993 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:01:35.993 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:01:35.993 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:01:35.993 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:01:35.993 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:01:35.993 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:01:35.993 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:01:35.993 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2064 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:35.993 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2064 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:35.993 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2064 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:35.993 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2064 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:41.001 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:01:41.001 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:01:41.001 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:01:41.001 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:01:41.001 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:01:41.001 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:01:41.009 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:01:41.011 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:01:41.011 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:01:41.011 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:01:41.011 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:01:41.014 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:01:41.015 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:01:41.015 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:01:41.015 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:01:41.015 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:01:41.016 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:01:41.016 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:01:41.016 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:01:41.018 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:01:41.018 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:01:41.019 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:01:41.019 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:01:41.019 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:01:41.019 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:01:41.019 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:01:41.019 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:01:41.021 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:01:41.021 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:01:41.021 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:01:41.021 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:01:41.022 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:01:41.022 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:01:41.022 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:01:41.022 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:01:41.025 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:01:41.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:01:41.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:01:41.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:01:41.025 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:01:41.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:01:41.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:01:41.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:01:41.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:01:41.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:41.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:41.025 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:01:41.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:41.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:41.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:41.026 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:01:41.026 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:01:41.026 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:01:41.026 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:01:41.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:41.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:41.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:41.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:01:41.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:41.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:41.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:41.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:41.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:41.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:41.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:41.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:41.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:41.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:41.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:41.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:41.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:41.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:41.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:41.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:41.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:41.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:41.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:41.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:41.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:41.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:41.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:41.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:41.030 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:01:41.509 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:01:41.550 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:01:41.551 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:01:41.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:01:41.553 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:01:41.979 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:01:42.029 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:01:42.029 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:01:42.029 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:01:42.029 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:01:42.452 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:01:42.924 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:01:43.030 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:01:43.030 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:01:43.030 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:01:43.030 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:01:43.398 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:01:43.870 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:01:44.032 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:01:44.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:01:44.032 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:01:44.033 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:01:44.342 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:01:44.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:01:44.587 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:01:44.588 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:01:44.588 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:01:44.588 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:01:44.589 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:01:44.589 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:01:44.589 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:01:44.589 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:01:44.589 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:01:44.589 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:01:44.589 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:01:44.589 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=769 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:44.589 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=769 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:44.589 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=769 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:44.589 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=769 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:44.589 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=769 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:44.589 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=769 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:44.589 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=769 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:44.589 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=769 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:49.595 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:01:49.595 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:01:49.595 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:01:49.595 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:01:49.595 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:01:49.595 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:01:49.611 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:01:49.612 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:01:49.612 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:01:49.613 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:01:49.613 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:01:49.617 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:01:49.617 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:01:49.618 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:01:49.618 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:01:49.618 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:01:49.618 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:01:49.619 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:01:49.619 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:01:49.621 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:01:49.622 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:01:49.622 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:01:49.622 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:01:49.622 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:01:49.622 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:01:49.622 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:01:49.623 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:01:49.625 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:01:49.625 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:01:49.626 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:01:49.626 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:01:49.626 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:01:49.626 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:01:49.626 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:01:49.626 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:01:49.630 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:01:49.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:01:49.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:01:49.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:01:49.630 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:01:49.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:01:49.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:01:49.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:01:49.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:01:49.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:49.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:49.631 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:01:49.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:49.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:49.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:49.631 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:01:49.631 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:01:49.631 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:01:49.631 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:01:49.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:49.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:49.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:49.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:01:49.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:49.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:49.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:49.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:49.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:49.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:49.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:49.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:49.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:49.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:49.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:49.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:49.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:49.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:49.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:49.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:49.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:49.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:49.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:49.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:49.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:49.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:49.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:49.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:49.636 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:01:50.114 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:01:50.160 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:01:50.162 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:01:50.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:01:50.164 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:01:50.196 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:01:50.196 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:01:50.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:01:50.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:01:50.206 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:01:50.206 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:01:50.206 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:01:50.206 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:01:50.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:01:50.265 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:01:50.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:01:50.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:01:50.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:01:50.584 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:01:50.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:01:50.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:01:50.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:01:50.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:01:50.604 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:01:50.605 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:01:50.605 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:01:50.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:01:50.606 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:01:50.606 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:01:50.606 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:01:50.606 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:01:50.606 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:01:50.606 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:01:50.606 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:01:50.606 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=210 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:50.606 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=210 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:50.607 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=210 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:50.607 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=210 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:50.607 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=211 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:50.607 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=211 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:50.607 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=211 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:50.607 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=211 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:50.607 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=211 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:50.607 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=211 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:50.607 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=211 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:50.607 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=211 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:55.614 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:01:55.614 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:01:55.614 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:01:55.614 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:01:55.614 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:01:55.614 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:01:55.624 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:01:55.625 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:01:55.625 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:01:55.625 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:01:55.625 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:01:55.627 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:01:55.627 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:01:55.627 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:01:55.627 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:01:55.628 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:01:55.628 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:01:55.628 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:01:55.628 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:01:55.629 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:01:55.629 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:01:55.629 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:01:55.629 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:01:55.629 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:01:55.629 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:01:55.629 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:01:55.629 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:01:55.631 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:01:55.631 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:01:55.631 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:01:55.631 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:01:55.631 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:01:55.631 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:01:55.631 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:01:55.631 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:01:55.634 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:01:55.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:01:55.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:01:55.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:01:55.634 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:01:55.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:01:55.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:01:55.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:01:55.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:01:55.634 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:01:55.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:55.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:55.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:55.634 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:01:55.634 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:01:55.634 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:01:55.634 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:01:55.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:55.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:55.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:55.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:01:55.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:55.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:55.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:55.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:55.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:55.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:55.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:55.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:55.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:55.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:55.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:55.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:55.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:55.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:55.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:55.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:55.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:55.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:55.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:55.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:55.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:55.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:55.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:01:55.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:01:55.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:01:55.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:01:55.639 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:01:56.117 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:01:56.154 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:01:56.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:01:56.156 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:01:56.157 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:01:56.165 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:01:56.165 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:01:56.166 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:01:56.166 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:01:56.170 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:01:56.170 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:01:56.170 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:01:56.170 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:01:56.170 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:01:56.170 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:01:56.170 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:01:56.170 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=114 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:56.170 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=114 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:56.170 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=115 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:56.170 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=115 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:56.170 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:56.170 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:56.170 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:56.170 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:56.170 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:01:56.170 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:02:01.174 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:02:01.174 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:02:01.174 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:02:01.174 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:02:01.174 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:02:01.174 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:02:01.182 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:02:01.184 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:02:01.184 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:02:01.184 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:02:01.184 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:02:01.187 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:02:01.188 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:02:01.188 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:02:01.188 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:02:01.188 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:02:01.188 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:02:01.189 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:02:01.189 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:02:01.191 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:02:01.191 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:02:01.191 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:02:01.191 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:02:01.191 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:02:01.192 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:02:01.192 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:02:01.192 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:02:01.194 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:02:01.194 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:02:01.194 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:02:01.194 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:02:01.194 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:02:01.194 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:02:01.194 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:02:01.194 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:02:01.197 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:02:01.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:02:01.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:02:01.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:02:01.197 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:02:01.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:02:01.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:02:01.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:02:01.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:02:01.198 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:02:01.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:01.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:01.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:01.198 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:02:01.198 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:02:01.198 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:02:01.198 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:02:01.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:01.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:01.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:01.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:02:01.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:01.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:01.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:01.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:01.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:01.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:01.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:01.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:01.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:01.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:01.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:01.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:01.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:01.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:01.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:01.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:01.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:01.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:01.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:01.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:01.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:01.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:01.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:01.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:01.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:01.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:01.203 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:02:01.681 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:02:01.721 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:02:01.722 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:02:01.722 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:02:01.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:02:02.148 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:02:02.201 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:02:02.201 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:02:02.202 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:02:02.202 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:02:02.622 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:02:03.095 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:02:03.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:02:03.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:02:03.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:02:03.203 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:02:03.567 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:02:03.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:02:03.742 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:02:03.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:02:03.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:02:03.743 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:02:03.743 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:02:03.743 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:02:03.743 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:02:03.744 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:02:03.744 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:02:03.744 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:02:03.744 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=549 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:02:03.744 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=550 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:02:03.744 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=550 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:02:03.744 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=550 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:02:03.744 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=550 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:02:03.744 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=550 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:02:03.744 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=550 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:02:03.744 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=550 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:02:03.744 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=550 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:02:08.751 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:02:08.751 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:02:08.751 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:02:08.751 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:02:08.751 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:02:08.751 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:02:08.759 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:02:08.760 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:02:08.760 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:02:08.760 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:02:08.760 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:02:08.763 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:02:08.764 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:02:08.764 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:02:08.764 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:02:08.764 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:02:08.764 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:02:08.765 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:02:08.765 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:02:08.767 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:02:08.767 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:02:08.767 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:02:08.767 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:02:08.767 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:02:08.767 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:02:08.767 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:02:08.767 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:02:08.769 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:02:08.770 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:02:08.770 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:02:08.770 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:02:08.770 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:02:08.770 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:02:08.770 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:02:08.770 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:02:08.773 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:02:08.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:02:08.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:02:08.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:02:08.773 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:02:08.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:02:08.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:02:08.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:02:08.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:02:08.773 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:02:08.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:08.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:08.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:08.774 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:02:08.774 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:02:08.774 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:02:08.774 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:02:08.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:08.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:08.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:08.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:02:08.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:08.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:08.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:08.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:08.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:08.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:08.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:08.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:08.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:08.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:08.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:08.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:08.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:08.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:08.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:08.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:08.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:08.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:08.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:08.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:08.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:08.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:08.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:08.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:08.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:08.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:08.778 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:02:09.256 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:02:09.295 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:02:09.296 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:02:09.298 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:02:09.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:02:09.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:02:09.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:02:09.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:02:09.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:02:09.301 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:02:09.301 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:02:09.302 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:02:09.302 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:02:09.728 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:02:09.777 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:02:09.777 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:02:09.777 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:02:09.777 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:02:10.200 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:02:10.671 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:02:10.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:02:10.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:02:10.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:02:10.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:02:11.144 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:02:11.616 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:02:11.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:02:11.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:02:11.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:02:11.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:02:12.088 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:02:12.107 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:02:12.107 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:02:12.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:02:12.112 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:02:12.112 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:02:12.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:02:12.112 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:02:12.113 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:02:12.113 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:02:12.113 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:02:12.113 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:02:12.113 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:02:12.113 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:02:12.113 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=721 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:02:12.113 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=721 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:02:12.113 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=721 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:02:17.120 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:02:17.120 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:02:17.120 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:02:17.120 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:02:17.120 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:02:17.120 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:02:17.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:02:17.138 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:02:17.138 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:02:17.139 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:02:17.139 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:02:17.148 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:02:17.149 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:02:17.149 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:02:17.149 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:02:17.150 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:02:17.150 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:02:17.151 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:02:17.151 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:02:17.155 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:02:17.155 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:02:17.156 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:02:17.156 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:02:17.156 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:02:17.157 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:02:17.157 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:02:17.157 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:02:17.161 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:02:17.161 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:02:17.161 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:02:17.162 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:02:17.162 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:02:17.162 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:02:17.163 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:02:17.163 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:02:17.168 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:02:17.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:02:17.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:02:17.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:02:17.168 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:02:17.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:02:17.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:02:17.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:17.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:02:17.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:02:17.168 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:02:17.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:17.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:17.169 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:02:17.169 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:02:17.169 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:02:17.169 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:02:17.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:17.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:17.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:17.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:02:17.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:17.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:17.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:17.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:17.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:17.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:17.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:17.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:17.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:17.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:17.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:17.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:17.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:17.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:17.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:17.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:17.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:17.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:17.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:17.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:17.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:17.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:17.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:17.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:17.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:17.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:17.173 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:02:17.652 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:02:17.696 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:02:17.697 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:02:17.698 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:02:17.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:02:17.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:02:17.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:02:17.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:02:17.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:02:17.701 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:02:17.701 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:02:17.701 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:02:17.701 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:02:18.124 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:02:18.172 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:02:18.173 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:02:18.175 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:02:18.175 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:02:18.595 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:02:19.066 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:02:19.174 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:02:19.174 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:02:19.176 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:02:19.176 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:02:19.537 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:02:19.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:02:19.790 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:02:19.796 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:02:19.796 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:02:19.796 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:02:19.796 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:02:19.797 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:02:19.797 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:02:19.797 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:02:19.797 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:02:19.797 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:02:19.797 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:02:19.797 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:02:19.797 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=568 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:02:19.797 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=568 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:02:19.797 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=568 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:02:19.797 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=568 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:02:24.804 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:02:24.804 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:02:24.804 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:02:24.804 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:02:24.804 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:02:24.804 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:02:24.811 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:02:24.811 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:02:24.811 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:02:24.812 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:02:24.812 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:02:24.814 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:02:24.814 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:02:24.814 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:02:24.815 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:02:24.815 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:02:24.815 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:02:24.815 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:02:24.815 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:02:24.817 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:02:24.817 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:02:24.817 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:02:24.817 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:02:24.818 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:02:24.818 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:02:24.818 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:02:24.818 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:02:24.820 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:02:24.820 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:02:24.820 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:02:24.820 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:02:24.820 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:02:24.820 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:02:24.820 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:02:24.820 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:02:24.823 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:02:24.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:02:24.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:02:24.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:02:24.823 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:02:24.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:02:24.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:02:24.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:02:24.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:02:24.823 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:02:24.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:24.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:24.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:24.823 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:02:24.823 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:02:24.823 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:02:24.824 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:02:24.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:24.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:24.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:24.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:02:24.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:24.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:24.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:24.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:24.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:24.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:24.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:24.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:24.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:24.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:24.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:24.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:24.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:24.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:24.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:24.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:24.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:24.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:24.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:24.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:24.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:24.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:24.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:24.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:24.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:24.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:24.828 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:02:25.306 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:02:25.343 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:02:25.344 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:02:25.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:02:25.345 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:02:25.347 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:02:25.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:02:25.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:02:25.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:02:25.348 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:02:25.348 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:02:25.348 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:02:25.348 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:02:25.778 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:02:25.826 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:02:25.827 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:02:25.827 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:02:25.827 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:02:26.249 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:02:26.720 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:02:26.828 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:02:26.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:02:26.828 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:02:26.828 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:02:27.193 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:02:27.666 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:02:27.829 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:02:27.829 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:02:27.829 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:02:27.829 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:02:28.138 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:02:28.156 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:02:28.156 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:02:28.163 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:02:28.163 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:02:28.163 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:02:28.163 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:02:28.164 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:02:28.164 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:02:28.164 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:02:28.164 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:02:28.164 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:02:28.164 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:02:28.164 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:02:33.171 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:02:33.171 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:02:33.171 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:02:33.171 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:02:33.171 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:02:33.171 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:02:33.179 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:02:33.180 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:02:33.180 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:02:33.180 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:02:33.180 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:02:33.183 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:02:33.183 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:02:33.184 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:02:33.184 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:02:33.184 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:02:33.184 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:02:33.185 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:02:33.185 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:02:33.188 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:02:33.188 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:02:33.189 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:02:33.189 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:02:33.189 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:02:33.189 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:02:33.190 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:02:33.190 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:02:33.193 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:02:33.193 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:02:33.193 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:02:33.193 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:02:33.193 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:02:33.193 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:02:33.193 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:02:33.194 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:02:33.199 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:02:33.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:02:33.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:02:33.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:02:33.199 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:02:33.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:02:33.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:02:33.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:02:33.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:02:33.200 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:02:33.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:33.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:33.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:33.200 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:02:33.200 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:02:33.200 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:02:33.200 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:02:33.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:33.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:33.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:33.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:02:33.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:33.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:33.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:33.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:33.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:33.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:33.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:33.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:33.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:33.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:33.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:33.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:33.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:33.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:33.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:33.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:33.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:33.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:33.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:33.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:33.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:33.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:33.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:33.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:33.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:33.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:33.205 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:02:33.684 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:02:33.733 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:02:33.735 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:02:33.736 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:02:33.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:02:33.742 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:02:33.742 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:02:33.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:02:33.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:02:33.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:02:33.744 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:02:33.744 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:02:33.744 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:02:34.155 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:02:34.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:02:34.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:02:34.206 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:02:34.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:02:34.627 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:02:35.101 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:02:35.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:02:35.207 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:02:35.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:02:35.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:02:35.573 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:02:35.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:02:35.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:02:35.836 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:02:35.836 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:02:35.837 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:02:35.837 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:02:35.839 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:02:35.839 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:02:35.839 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:02:35.839 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:02:35.839 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:02:35.839 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:02:35.839 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:02:35.839 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=568 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:02:35.839 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=568 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:02:35.839 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=568 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:02:35.839 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=568 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:02:35.839 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=569 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:02:35.839 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=569 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:02:35.839 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=569 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:02:35.839 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=569 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:02:35.839 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=569 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:02:35.839 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=569 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:02:35.839 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=569 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:02:35.839 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=569 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:02:40.844 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:02:40.844 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:02:40.844 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:02:40.844 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:02:40.844 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:02:40.844 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:02:40.851 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:02:40.852 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:02:40.852 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:02:40.852 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:02:40.853 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:02:40.856 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:02:40.856 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:02:40.856 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:02:40.857 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:02:40.857 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:02:40.857 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:02:40.857 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:02:40.858 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:02:40.859 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:02:40.859 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:02:40.860 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:02:40.860 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:02:40.860 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:02:40.860 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:02:40.860 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:02:40.860 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:02:40.862 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:02:40.862 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:02:40.862 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:02:40.862 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:02:40.862 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:02:40.862 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:02:40.862 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:02:40.862 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:02:40.866 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:02:40.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:02:40.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:02:40.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:02:40.866 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:02:40.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:02:40.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:02:40.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:02:40.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:02:40.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:40.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:40.866 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:02:40.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:40.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:40.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:40.866 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:02:40.866 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:02:40.866 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:02:40.866 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:02:40.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:40.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:40.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:40.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:02:40.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:40.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:40.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:40.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:40.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:40.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:40.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:40.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:40.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:40.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:40.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:40.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:40.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:40.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:40.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:40.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:40.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:40.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:40.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:40.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:40.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:40.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:40.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:40.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:40.871 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:02:41.349 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:02:41.384 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:02:41.385 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:02:41.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:02:41.387 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:02:41.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:02:41.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:02:41.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:02:41.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:02:41.390 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:02:41.390 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:02:41.390 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:02:41.390 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:02:41.821 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:02:41.869 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:02:41.869 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:02:41.870 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:02:41.870 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:02:42.292 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:02:42.765 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:02:42.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:02:42.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:02:42.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:02:42.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:02:43.238 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:02:43.710 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:02:43.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:02:43.872 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:02:43.872 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:02:43.872 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:02:44.181 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:02:44.652 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:02:44.873 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:02:44.873 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:02:44.874 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:02:44.874 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:02:45.123 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:02:45.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:02:45.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:02:45.143 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:02:45.143 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:02:45.143 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:02:45.143 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:02:45.144 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:02:45.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:02:45.144 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:02:45.144 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:02:45.144 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:02:45.144 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:02:45.144 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:02:50.151 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:02:50.151 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:02:50.151 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:02:50.151 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:02:50.151 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:02:50.151 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:02:50.159 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:02:50.160 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:02:50.160 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:02:50.160 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:02:50.161 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:02:50.164 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:02:50.164 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:02:50.164 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:02:50.164 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:02:50.164 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:02:50.165 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:02:50.165 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:02:50.165 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:02:50.167 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:02:50.167 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:02:50.167 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:02:50.168 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:02:50.168 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:02:50.168 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:02:50.168 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:02:50.168 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:02:50.170 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:02:50.170 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:02:50.170 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:02:50.170 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:02:50.170 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:02:50.170 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:02:50.170 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:02:50.170 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:02:50.174 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:02:50.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:02:50.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:02:50.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:02:50.174 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:02:50.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:02:50.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:02:50.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:02:50.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:02:50.174 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:02:50.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:50.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:50.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:50.174 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:02:50.174 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:02:50.174 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:02:50.174 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:02:50.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:50.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:50.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:50.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:02:50.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:50.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:50.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:50.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:50.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:50.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:50.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:50.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:50.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:50.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:50.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:50.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:50.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:50.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:50.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:50.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:50.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:50.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:50.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:50.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:50.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:50.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:50.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:50.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:50.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:50.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:50.179 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:02:50.657 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:02:50.695 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:02:50.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:02:50.696 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:02:50.697 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:02:50.702 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:02:50.702 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:02:50.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:02:50.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:02:50.704 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:02:50.704 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:02:50.704 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:02:50.704 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:02:51.129 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:02:51.176 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:02:51.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:02:51.177 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:02:51.177 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:02:51.601 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:02:52.074 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:02:52.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:02:52.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:02:52.178 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:02:52.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:02:52.547 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:02:53.019 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:02:53.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:02:53.178 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:02:53.178 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:02:53.179 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:02:53.490 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:02:53.963 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:02:54.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:02:54.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:02:54.179 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:02:54.179 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:02:54.436 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:02:54.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:02:54.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:02:54.700 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:02:54.701 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:02:54.701 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:02:54.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:02:54.702 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:02:54.702 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:02:54.702 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:02:54.702 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:02:54.702 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:02:54.702 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:02:54.702 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:02:59.708 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:02:59.708 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:02:59.708 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:02:59.708 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:02:59.708 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:02:59.708 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:02:59.717 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:02:59.719 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:02:59.719 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:02:59.719 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:02:59.719 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:02:59.722 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:02:59.723 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:02:59.723 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:02:59.723 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:02:59.723 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:02:59.724 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:02:59.724 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:02:59.724 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:02:59.726 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:02:59.727 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:02:59.727 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:02:59.727 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:02:59.727 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:02:59.727 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:02:59.728 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:02:59.728 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:02:59.730 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:02:59.730 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:02:59.730 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:02:59.730 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:02:59.730 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:02:59.730 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:02:59.730 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:02:59.730 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:02:59.734 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:02:59.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:02:59.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:02:59.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:02:59.734 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:02:59.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:02:59.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:02:59.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:02:59.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:02:59.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:59.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:59.734 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:02:59.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:59.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:59.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:59.734 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:02:59.734 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:02:59.734 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:02:59.734 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:02:59.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:59.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:59.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:59.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:02:59.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:59.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:59.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:59.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:59.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:59.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:59.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:59.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:59.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:59.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:59.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:59.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:59.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:59.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:59.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:59.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:59.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:02:59.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:59.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:59.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:02:59.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:59.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:59.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:02:59.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:02:59.739 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:03:00.217 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:03:00.258 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:03:00.259 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:03:00.260 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:03:00.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:03:00.689 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:03:00.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:03:00.738 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:03:00.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:03:00.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:03:01.160 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:03:01.634 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:03:01.740 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:03:01.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:03:01.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:03:01.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:03:02.106 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:03:02.274 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:03:02.275 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:03:02.275 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:03:02.275 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:03:02.276 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:03:02.276 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:03:02.276 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:03:02.276 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:03:02.276 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:03:02.276 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:03:02.276 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:03:02.276 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=548 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:02.276 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=548 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:07.284 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:03:07.284 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:03:07.284 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:03:07.284 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:03:07.284 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:03:07.284 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:03:07.291 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:03:07.292 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:03:07.292 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:03:07.292 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:03:07.293 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:03:07.297 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:03:07.297 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:03:07.297 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:03:07.297 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:03:07.298 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:03:07.298 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:03:07.299 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:03:07.299 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:03:07.302 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:03:07.302 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:03:07.303 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:03:07.303 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:03:07.303 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:03:07.304 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:03:07.304 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:03:07.304 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:03:07.307 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:03:07.307 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:03:07.307 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:03:07.308 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:03:07.308 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:03:07.308 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:03:07.308 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:03:07.308 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:03:07.315 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:03:07.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:03:07.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:03:07.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:03:07.315 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:03:07.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:03:07.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:03:07.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:03:07.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:03:07.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:07.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:07.316 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:03:07.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:07.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:07.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:07.316 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:03:07.316 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:03:07.316 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:03:07.316 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:03:07.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:07.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:07.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:07.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:03:07.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:07.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:07.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:07.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:07.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:07.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:07.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:07.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:07.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:07.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:07.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:07.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:07.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:07.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:07.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:07.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:07.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:07.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:07.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:07.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:07.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:07.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:07.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:07.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:07.321 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:03:07.799 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:03:07.846 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:03:07.847 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:03:07.848 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:03:07.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:03:07.867 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:03:07.867 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:03:07.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:03:07.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:07.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:03:08.271 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:03:08.320 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:03:08.320 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:03:08.321 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:03:08.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:03:08.745 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:03:09.217 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:03:09.322 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:03:09.322 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:03:09.322 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:03:09.323 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:03:09.689 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:03:10.164 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:03:10.323 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:03:10.324 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:03:10.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:03:10.324 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:03:10.636 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:03:10.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:03:10.924 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:03:10.924 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:03:10.924 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:03:10.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:03:10.926 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:03:10.926 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:03:10.926 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:03:10.926 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:03:10.926 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:03:10.926 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:03:10.926 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:03:10.926 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=778 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:10.926 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=778 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:10.926 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=778 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:10.926 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=778 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:10.926 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=778 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:15.933 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:03:15.933 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:03:15.933 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:03:15.933 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:03:15.933 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:03:15.933 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:03:15.941 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:03:15.943 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:03:15.943 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:03:15.943 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:03:15.943 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:03:15.946 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:03:15.946 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:03:15.946 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:03:15.946 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:03:15.947 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:03:15.947 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:03:15.947 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:03:15.947 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:03:15.949 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:03:15.949 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:03:15.949 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:03:15.949 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:03:15.949 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:03:15.949 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:03:15.949 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:03:15.950 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:03:15.952 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:03:15.952 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:03:15.952 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:03:15.952 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:03:15.952 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:03:15.952 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:03:15.952 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:03:15.952 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:03:15.955 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:03:15.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:03:15.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:03:15.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:03:15.955 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:03:15.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:03:15.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:03:15.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:03:15.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:15.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:03:15.955 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:03:15.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:15.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:15.955 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:03:15.955 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:03:15.955 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:03:15.955 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:03:15.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:15.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:15.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:15.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:03:15.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:15.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:15.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:15.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:15.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:15.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:15.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:15.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:15.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:15.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:15.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:15.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:15.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:15.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:15.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:15.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:15.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:15.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:15.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:15.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:15.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:15.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:15.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:15.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:15.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:15.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:15.960 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:03:16.439 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:03:16.476 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:03:16.477 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:03:16.478 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:03:16.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:03:16.493 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:03:16.493 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:03:16.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:03:16.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:16.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:03:16.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:03:16.539 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:03:16.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:03:16.540 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:03:16.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:03:16.542 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:03:16.542 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:03:16.542 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:03:16.542 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:03:16.542 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:03:16.542 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:03:16.542 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:03:16.542 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:16.542 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:16.542 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:16.542 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:16.543 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:16.543 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:21.548 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:03:21.548 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:03:21.548 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:03:21.548 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:03:21.548 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:03:21.548 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:03:21.557 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:03:21.559 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:03:21.559 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:03:21.560 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:03:21.560 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:03:21.566 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:03:21.567 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:03:21.567 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:03:21.567 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:03:21.568 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:03:21.568 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:03:21.568 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:03:21.569 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:03:21.572 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:03:21.572 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:03:21.572 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:03:21.572 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:03:21.573 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:03:21.573 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:03:21.573 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:03:21.573 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:03:21.576 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:03:21.576 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:03:21.577 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:03:21.577 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:03:21.577 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:03:21.577 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:03:21.577 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:03:21.577 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:03:21.582 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:03:21.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:03:21.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:03:21.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:03:21.582 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:03:21.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:03:21.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:03:21.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:03:21.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:03:21.583 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:03:21.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:21.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:21.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:21.583 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:03:21.583 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:03:21.583 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:03:21.583 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:03:21.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:21.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:21.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:21.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:03:21.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:21.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:21.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:21.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:21.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:21.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:21.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:21.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:21.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:21.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:21.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:21.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:21.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:21.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:21.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:21.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:21.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:21.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:21.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:21.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:21.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:21.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:21.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:21.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:21.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:21.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:21.588 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:03:22.067 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:03:22.115 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:03:22.118 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:03:22.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:03:22.119 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:03:22.143 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:03:22.143 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:03:22.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:03:22.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:22.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:03:22.538 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:03:22.587 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:03:22.596 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:03:22.597 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:03:22.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:03:23.010 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:03:23.484 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:03:23.598 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:03:23.598 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:03:23.598 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:03:23.598 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:03:23.950 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:03:24.421 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:03:24.599 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:03:24.599 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:03:24.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:03:24.600 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:03:24.893 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:03:25.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:03:25.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:25.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:03:25.182 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:03:25.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:03:25.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:03:25.183 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:03:25.183 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:03:25.183 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:03:25.183 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:03:25.183 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:03:25.183 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:03:25.183 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:03:30.190 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:03:30.190 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:03:30.190 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:03:30.190 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:03:30.190 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:03:30.190 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:03:30.199 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:03:30.200 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:03:30.201 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:03:30.201 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:03:30.201 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:03:30.206 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:03:30.206 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:03:30.206 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:03:30.207 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:03:30.207 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:03:30.207 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:03:30.208 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:03:30.208 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:03:30.211 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:03:30.211 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:03:30.212 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:03:30.212 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:03:30.212 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:03:30.213 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:03:30.213 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:03:30.213 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:03:30.216 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:03:30.216 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:03:30.216 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:03:30.216 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:03:30.217 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:03:30.217 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:03:30.217 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:03:30.217 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:03:30.221 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:03:30.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:03:30.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:03:30.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:03:30.221 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:03:30.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:03:30.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:03:30.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:03:30.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:03:30.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:30.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:30.222 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:03:30.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:30.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:30.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:30.222 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:03:30.222 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:03:30.222 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:03:30.222 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:03:30.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:30.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:30.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:30.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:03:30.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:30.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:30.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:30.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:30.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:30.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:30.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:30.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:30.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:30.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:30.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:30.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:30.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:30.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:30.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:30.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:30.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:30.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:30.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:30.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:30.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:30.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:30.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:30.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:30.227 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:03:30.704 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:03:30.740 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:03:30.741 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:03:30.742 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:03:30.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:03:30.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:03:30.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:03:30.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:03:30.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:30.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:03:30.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:03:30.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:30.809 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:03:30.809 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:03:30.809 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:03:30.809 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:03:30.811 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:03:30.811 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:03:30.811 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:03:30.811 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:03:30.811 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:03:30.811 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:03:30.811 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:03:30.811 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:30.811 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:30.811 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:30.811 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=127 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:30.811 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:30.811 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:30.812 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:30.812 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:30.812 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:30.812 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:30.812 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:35.819 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:03:35.819 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:03:35.819 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:03:35.819 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:03:35.819 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:03:35.819 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:03:35.827 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:03:35.828 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:03:35.828 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:03:35.829 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:03:35.829 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:03:35.831 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:03:35.831 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:03:35.832 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:03:35.832 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:03:35.832 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:03:35.832 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:03:35.833 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:03:35.833 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:03:35.835 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:03:35.835 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:03:35.835 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:03:35.835 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:03:35.835 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:03:35.836 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:03:35.836 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:03:35.836 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:03:35.838 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:03:35.838 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:03:35.838 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:03:35.838 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:03:35.838 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:03:35.838 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:03:35.838 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:03:35.838 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:03:35.841 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:03:35.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:03:35.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:03:35.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:03:35.842 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:03:35.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:03:35.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:03:35.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:03:35.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:35.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:03:35.842 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:03:35.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:35.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:35.842 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:03:35.842 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:03:35.842 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:03:35.842 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:03:35.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:35.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:35.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:35.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:03:35.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:35.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:35.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:35.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:35.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:35.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:35.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:35.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:35.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:35.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:35.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:35.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:35.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:35.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:35.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:35.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:35.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:35.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:35.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:35.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:35.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:35.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:35.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:35.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:35.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:35.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:35.847 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:03:36.324 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:03:36.363 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:03:36.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:03:36.366 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:03:36.368 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:03:36.382 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:03:36.382 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:03:36.382 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:03:36.382 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:03:36.388 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:03:36.388 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:03:36.388 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:03:36.388 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:03:36.388 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:03:36.388 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:03:36.388 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:03:36.388 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:36.389 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:36.389 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:36.389 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:36.389 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:36.389 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=117 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:36.389 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:36.389 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:36.389 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:36.389 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:36.389 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:36.389 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:36.389 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:41.391 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:03:41.391 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:03:41.391 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:03:41.391 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:03:41.391 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:03:41.391 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:03:41.399 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:03:41.401 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:03:41.401 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:03:41.401 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:03:41.401 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:03:41.405 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:03:41.405 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:03:41.405 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:03:41.406 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:03:41.406 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:03:41.406 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:03:41.406 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:03:41.407 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:03:41.409 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:03:41.409 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:03:41.409 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:03:41.409 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:03:41.409 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:03:41.409 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:03:41.410 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:03:41.410 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:03:41.412 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:03:41.412 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:03:41.412 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:03:41.412 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:03:41.412 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:03:41.412 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:03:41.412 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:03:41.412 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:03:41.416 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:03:41.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:03:41.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:03:41.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:03:41.416 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:03:41.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:03:41.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:03:41.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:03:41.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:03:41.416 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:03:41.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:41.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:41.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:41.416 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:03:41.416 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:03:41.416 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:03:41.416 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:03:41.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:41.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:41.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:41.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:03:41.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:41.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:41.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:41.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:41.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:41.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:41.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:41.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:41.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:41.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:41.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:41.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:41.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:41.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:41.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:41.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:41.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:41.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:41.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:41.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:41.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:41.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:41.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:41.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:41.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:41.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:41.421 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:03:41.900 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:03:41.945 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:03:41.947 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:03:41.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:03:41.950 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:03:41.957 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:03:41.957 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:03:41.958 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:03:41.958 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:03:41.959 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:03:41.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:03:41.959 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:03:41.959 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:03:41.959 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:03:41.959 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:03:41.959 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:03:46.966 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:03:46.966 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:03:46.966 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:03:46.966 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:03:46.966 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:03:46.966 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:03:46.975 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:03:46.977 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:03:46.977 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:03:46.978 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:03:46.978 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:03:46.983 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:03:46.983 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:03:46.983 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:03:46.983 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:03:46.984 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:03:46.984 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:03:46.984 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:03:46.984 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:03:46.989 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:03:46.989 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:03:46.989 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:03:46.989 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:03:46.989 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:03:46.989 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:03:46.989 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:03:46.989 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:03:46.993 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:03:46.994 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:03:46.994 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:03:46.994 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:03:46.994 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:03:46.994 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:03:46.994 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:03:46.994 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:03:46.999 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:03:46.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:03:47.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:03:47.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:03:47.000 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:03:47.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:03:47.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:03:47.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:03:47.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:03:47.000 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:03:47.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:47.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:47.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:47.000 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:03:47.000 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:03:47.000 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:03:47.000 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:03:47.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:47.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:47.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:47.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:03:47.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:47.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:47.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:47.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:47.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:47.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:47.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:47.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:47.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:47.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:47.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:47.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:47.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:47.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:47.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:47.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:47.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:47.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:47.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:47.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:47.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:47.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:47.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:47.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:47.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:47.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:47.005 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:03:47.483 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:03:47.529 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:03:47.532 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:03:47.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:03:47.534 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:03:47.546 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:03:47.547 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:03:47.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:03:47.547 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:03:47.549 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:03:47.549 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:03:47.549 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:03:47.549 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:03:47.549 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:03:47.549 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:03:47.549 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:03:47.549 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:47.549 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:47.549 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:47.549 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:47.549 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=118 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:47.549 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:47.549 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:47.549 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:47.549 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:47.549 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:47.549 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:47.549 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:52.555 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:03:52.555 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:03:52.555 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:03:52.555 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:03:52.555 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:03:52.555 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:03:52.563 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:03:52.564 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:03:52.564 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:03:52.564 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:03:52.564 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:03:52.567 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:03:52.567 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:03:52.567 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:03:52.567 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:03:52.567 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:03:52.568 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:03:52.568 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:03:52.568 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:03:52.570 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:03:52.570 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:03:52.570 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:03:52.570 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:03:52.570 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:03:52.570 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:03:52.571 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:03:52.571 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:03:52.572 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:03:52.572 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:03:52.572 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:03:52.572 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:03:52.573 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:03:52.573 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:03:52.573 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:03:52.573 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:03:52.576 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:03:52.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:03:52.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:03:52.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:03:52.576 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:03:52.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:03:52.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:03:52.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:03:52.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:03:52.576 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:03:52.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:52.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:52.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:52.576 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:03:52.576 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:03:52.576 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:03:52.576 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:03:52.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:52.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:52.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:52.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:03:52.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:52.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:52.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:52.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:52.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:52.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:52.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:52.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:52.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:52.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:52.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:52.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:52.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:52.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:52.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:52.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:52.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:52.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:52.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:52.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:52.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:52.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:52.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:52.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:52.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:52.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:52.581 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:03:53.060 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:03:53.102 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:03:53.104 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:03:53.105 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:03:53.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:03:53.115 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:03:53.116 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:03:53.116 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:03:53.116 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:03:53.118 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:03:53.118 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:03:53.118 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:03:53.118 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:03:53.118 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:03:53.118 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:03:53.118 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:03:53.119 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:53.119 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:53.119 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:53.119 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:53.119 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:53.119 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=116 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:53.119 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:53.119 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:53.119 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:53.119 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:53.119 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:53.119 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:53.119 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:03:58.124 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:03:58.124 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:03:58.124 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:03:58.124 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:03:58.124 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:03:58.124 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:03:58.132 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:03:58.134 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:03:58.134 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:03:58.134 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:03:58.134 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:03:58.138 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:03:58.138 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:03:58.138 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:03:58.138 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:03:58.139 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:03:58.139 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:03:58.139 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:03:58.139 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:03:58.142 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:03:58.142 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:03:58.143 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:03:58.143 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:03:58.143 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:03:58.143 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:03:58.143 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:03:58.143 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:03:58.146 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:03:58.146 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:03:58.146 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:03:58.146 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:03:58.147 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:03:58.147 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:03:58.147 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:03:58.147 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:03:58.151 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:03:58.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:03:58.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:03:58.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:03:58.151 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:03:58.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:03:58.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:03:58.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:03:58.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:03:58.152 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:03:58.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:58.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:58.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:58.152 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:03:58.152 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:03:58.152 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:03:58.152 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:03:58.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:58.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:58.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:58.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:03:58.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:58.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:58.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:58.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:58.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:58.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:58.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:58.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:58.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:58.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:58.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:58.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:58.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:58.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:58.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:58.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:58.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:58.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:58.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:58.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:58.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:03:58.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:58.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:58.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:03:58.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:03:58.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:03:58.157 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:03:58.636 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:03:58.675 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:03:58.675 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:03:58.676 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:03:58.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:03:59.108 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:03:59.155 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:03:59.156 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:03:59.156 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:03:59.157 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:03:59.582 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:04:00.054 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:04:00.157 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:04:00.157 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:04:00.158 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:04:00.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:04:00.526 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:04:01.000 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:04:01.158 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:04:01.159 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:04:01.159 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:04:01.160 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:04:01.472 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:04:01.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:04:01.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:04:01.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:04:01.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:04:01.700 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:04:01.700 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:04:01.701 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:04:01.701 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:04:01.945 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:04:02.160 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:04:02.160 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:04:02.160 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:04:02.161 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:04:02.415 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:04:02.886 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:04:03.161 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:04:03.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:04:03.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:04:03.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:04:03.360 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:04:03.832 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:04:03.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:04:03.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:04:03.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:03.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:04:03.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:04:03.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:04:03.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:04:03.974 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:04:03.974 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:04:03.975 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:04:03.975 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:04:03.975 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:04:03.975 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:04:03.975 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:04:03.975 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1255 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:03.976 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1255 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:03.976 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1255 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:03.976 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1255 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:03.976 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1255 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:03.976 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1255 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:03.976 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1255 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:03.976 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1256 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:03.976 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1256 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:03.976 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1256 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:03.976 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1256 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:03.977 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1256 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:03.977 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1256 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:03.977 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1256 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:03.977 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1256 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:08.978 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:04:08.978 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:04:08.978 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:04:08.978 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:04:08.978 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:04:08.978 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:04:08.987 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:04:08.988 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:04:08.988 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:04:08.989 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:04:08.989 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:04:08.993 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:04:08.994 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:04:08.994 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:04:08.994 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:04:08.995 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:04:08.995 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:04:08.995 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:04:08.996 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:04:08.999 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:04:08.999 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:04:08.999 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:04:08.999 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:04:09.000 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:04:09.000 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:04:09.000 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:04:09.000 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:04:09.003 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:04:09.003 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:04:09.004 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:04:09.004 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:04:09.004 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:04:09.004 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:04:09.004 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:04:09.004 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:04:09.013 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:04:09.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:04:09.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:04:09.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:04:09.013 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:04:09.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:04:09.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:04:09.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:09.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:04:09.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:04:09.014 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:04:09.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:09.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:09.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:09.014 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:04:09.014 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:04:09.014 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:04:09.014 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:04:09.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:09.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:09.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:09.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:04:09.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:09.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:09.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:09.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:09.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:09.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:09.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:09.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:09.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:09.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:09.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:09.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:09.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:09.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:09.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:09.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:09.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:09.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:09.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:09.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:09.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:09.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:09.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:09.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:09.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:09.019 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:04:09.497 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:04:09.535 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:04:09.535 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:04:09.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:09.536 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:04:09.554 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:04:09.554 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:04:09.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:04:09.596 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:04:09.596 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:04:09.596 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:04:09.596 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:04:09.598 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:04:09.598 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:04:09.598 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:04:09.598 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:04:09.598 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:04:09.598 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:04:09.598 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:04:14.603 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:04:14.603 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:04:14.603 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:04:14.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:04:14.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:04:14.603 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:04:14.611 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:04:14.613 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:04:14.613 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:04:14.613 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:04:14.613 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:04:14.617 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:04:14.617 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:04:14.617 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:04:14.617 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:04:14.618 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:04:14.618 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:04:14.618 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:04:14.618 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:04:14.620 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:04:14.621 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:04:14.621 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:04:14.621 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:04:14.621 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:04:14.621 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:04:14.622 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:04:14.622 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:04:14.623 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:04:14.624 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:04:14.624 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:04:14.624 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:04:14.624 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:04:14.624 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:04:14.624 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:04:14.624 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:04:14.627 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:04:14.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:04:14.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:04:14.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:04:14.627 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:04:14.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:04:14.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:04:14.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:04:14.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:04:14.628 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:04:14.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:14.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:14.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:14.628 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:04:14.628 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:04:14.628 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:04:14.628 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:04:14.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:14.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:14.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:14.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:04:14.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:14.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:14.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:14.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:14.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:14.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:14.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:14.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:14.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:14.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:14.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:14.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:14.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:14.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:14.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:14.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:14.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:14.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:14.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:14.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:14.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:14.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:14.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:14.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:14.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:14.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:14.633 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:04:15.112 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:04:15.153 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:04:15.155 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:04:15.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:15.157 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:04:15.180 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:04:15.180 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:04:15.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:04:15.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:15.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:15.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:04:15.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:04:15.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:04:15.203 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:04:15.205 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:04:15.205 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:04:15.205 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:04:15.205 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:04:15.205 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:04:15.205 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:04:15.205 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:04:15.205 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:15.205 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:15.205 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:15.205 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:15.205 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:15.205 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:15.205 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:15.205 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:15.205 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:15.205 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:15.205 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:15.205 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:20.212 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:04:20.212 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:04:20.213 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:04:20.213 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:04:20.213 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:04:20.213 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:04:20.219 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:04:20.221 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:04:20.221 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:04:20.221 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:04:20.221 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:04:20.225 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:04:20.225 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:04:20.226 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:04:20.226 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:04:20.226 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:04:20.226 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:04:20.227 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:04:20.227 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:04:20.230 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:04:20.230 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:04:20.230 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:04:20.230 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:04:20.231 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:04:20.231 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:04:20.231 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:04:20.231 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:04:20.235 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:04:20.236 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:04:20.236 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:04:20.236 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:04:20.236 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:04:20.236 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:04:20.236 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:04:20.236 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:04:20.240 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:04:20.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:04:20.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:04:20.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:04:20.241 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:04:20.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:04:20.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:04:20.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:04:20.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:04:20.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:20.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:20.241 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:04:20.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:20.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:20.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:20.241 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:04:20.241 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:04:20.241 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:04:20.241 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:04:20.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:20.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:20.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:20.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:04:20.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:20.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:20.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:20.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:20.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:20.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:20.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:20.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:20.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:20.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:20.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:20.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:20.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:20.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:20.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:20.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:20.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:20.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:20.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:20.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:20.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:20.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:20.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:20.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:20.246 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:04:20.725 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:04:20.769 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:04:20.771 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:04:20.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:20.774 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:04:20.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:04:20.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:04:20.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:04:20.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:20.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:20.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:20.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:04:20.824 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:04:20.824 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:04:20.824 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:04:20.829 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:04:20.829 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:04:20.829 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:04:20.829 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:04:20.829 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:04:20.829 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:04:20.830 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:04:20.830 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:20.830 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:20.830 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:20.830 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:20.830 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:20.830 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:20.830 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:20.830 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:20.830 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:20.831 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:20.831 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:20.831 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:20.831 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:25.833 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:04:25.833 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:04:25.833 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:04:25.833 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:04:25.833 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:04:25.833 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:04:25.841 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:04:25.842 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:04:25.842 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:04:25.842 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:04:25.842 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:04:25.846 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:04:25.846 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:04:25.846 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:04:25.846 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:04:25.846 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:04:25.847 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:04:25.847 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:04:25.847 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:04:25.851 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:04:25.851 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:04:25.851 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:04:25.851 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:04:25.852 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:04:25.852 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:04:25.852 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:04:25.852 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:04:25.856 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:04:25.856 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:04:25.856 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:04:25.856 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:04:25.856 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:04:25.856 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:04:25.856 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:04:25.856 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:04:25.862 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:04:25.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:04:25.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:04:25.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:04:25.862 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:04:25.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:04:25.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:04:25.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:04:25.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:04:25.862 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:04:25.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:25.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:25.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:25.863 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:04:25.863 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:04:25.863 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:04:25.863 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:04:25.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:25.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:25.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:25.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:04:25.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:25.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:25.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:25.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:25.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:25.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:25.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:25.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:25.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:25.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:25.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:25.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:25.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:25.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:25.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:25.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:25.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:25.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:25.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:25.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:25.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:25.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:25.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:25.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:25.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:25.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:25.867 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:04:26.345 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:04:26.385 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:04:26.385 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:04:26.386 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:04:26.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:26.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:04:26.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:04:26.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:04:26.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:26.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:26.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:26.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:26.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:26.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:26.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:26.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:26.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:26.471 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:04:26.472 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:04:26.472 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:04:26.472 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:04:26.473 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:04:26.473 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:04:26.473 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:04:26.473 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:04:26.473 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:04:26.473 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:04:26.473 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:04:31.486 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:04:31.486 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:04:31.486 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:04:31.487 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:04:31.487 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:04:31.487 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:04:31.496 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:04:31.497 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:04:31.497 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:04:31.498 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:04:31.498 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:04:31.501 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:04:31.502 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:04:31.502 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:04:31.502 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:04:31.502 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:04:31.503 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:04:31.503 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:04:31.503 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:04:31.505 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:04:31.505 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:04:31.506 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:04:31.506 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:04:31.506 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:04:31.506 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:04:31.506 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:04:31.507 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:04:31.508 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:04:31.508 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:04:31.509 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:04:31.509 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:04:31.509 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:04:31.509 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:04:31.509 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:04:31.509 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:04:31.512 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:04:31.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:04:31.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:04:31.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:04:31.512 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:04:31.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:04:31.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:04:31.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:04:31.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:04:31.513 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:04:31.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:31.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:31.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:31.513 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:04:31.513 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:04:31.513 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:04:31.513 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:04:31.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:31.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:31.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:31.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:04:31.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:31.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:31.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:31.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:31.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:31.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:31.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:31.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:31.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:31.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:31.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:31.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:31.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:31.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:31.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:31.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:31.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:31.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:31.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:31.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:31.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:31.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:31.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:31.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:31.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:31.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:31.518 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:04:31.996 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:04:32.035 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:04:32.035 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:04:32.036 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:04:32.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:32.038 [DEBUG] fake_trx.py:382 (BTS@172.18.152.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-02-08 04:04:32.038 [INFO] fake_trx.py:385 (BTS@172.18.152.20:5700) Artificial TRXC delay set to 200
2026-02-08 04:04:32.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-02-08 04:04:32.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:32.466 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:04:32.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:32.668 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:04:32.668 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:04:32.668 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:04:32.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:32.869 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:04:32.938 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:04:33.407 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:04:33.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:33.676 [DEBUG] fake_trx.py:382 (BTS@172.18.152.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-02-08 04:04:33.676 [INFO] fake_trx.py:385 (BTS@172.18.152.20:5700) Artificial TRXC delay set to 0
2026-02-08 04:04:33.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-02-08 04:04:33.677 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:04:33.677 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:04:33.677 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:04:33.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:33.685 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:04:33.685 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:04:33.685 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:04:33.685 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:04:33.686 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:04:33.687 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:04:33.687 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:04:33.687 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:04:33.687 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:04:33.687 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:04:33.687 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:04:33.687 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=471 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:33.687 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=471 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:33.687 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=471 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:33.687 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=471 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:33.687 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=471 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:33.687 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=471 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:38.694 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:04:38.694 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:04:38.694 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:04:38.694 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:04:38.694 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:04:38.694 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:04:38.702 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:04:38.703 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:04:38.703 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:04:38.704 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:04:38.704 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:04:38.707 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:04:38.707 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:04:38.707 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:04:38.707 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:04:38.707 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:04:38.708 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:04:38.708 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:04:38.708 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:04:38.710 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:04:38.710 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:04:38.710 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:04:38.710 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:04:38.711 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:04:38.711 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:04:38.711 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:04:38.711 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:04:38.713 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:04:38.713 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:04:38.713 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:04:38.713 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:04:38.713 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:04:38.713 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:04:38.713 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:04:38.713 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:04:38.716 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:04:38.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:04:38.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:04:38.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:04:38.716 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:04:38.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:04:38.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:04:38.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:04:38.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:04:38.717 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:04:38.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:38.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:38.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:38.717 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:04:38.717 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:04:38.717 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:04:38.717 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:04:38.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:38.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:38.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:38.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:04:38.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:38.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:38.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:38.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:38.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:38.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:38.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:38.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:38.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:38.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:38.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:38.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:38.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:38.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:38.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:38.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:38.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:38.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:38.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:38.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:38.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:38.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:38.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:38.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:38.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:38.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:38.722 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:04:39.199 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:04:39.241 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:04:39.243 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:04:39.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:39.247 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:04:39.249 [DEBUG] fake_trx.py:382 (BTS@172.18.152.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-02-08 04:04:39.250 [INFO] fake_trx.py:385 (BTS@172.18.152.20:5700) Artificial TRXC delay set to 200
2026-02-08 04:04:39.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-02-08 04:04:39.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:39.671 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:04:39.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:39.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:04:39.878 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:04:39.878 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:04:39.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:40.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:40.145 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:04:40.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:40.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:40.618 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:04:40.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:40.882 [DEBUG] fake_trx.py:382 (BTS@172.18.152.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-02-08 04:04:40.882 [INFO] fake_trx.py:385 (BTS@172.18.152.20:5700) Artificial TRXC delay set to 0
2026-02-08 04:04:40.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-02-08 04:04:40.882 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:04:40.882 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:04:40.882 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:04:40.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:40.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:40.883 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:04:40.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:40.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:40.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:40.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:40.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:40.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:40.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:40.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:40.888 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:04:40.888 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:04:40.888 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:04:40.888 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:04:40.889 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:04:40.889 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:04:40.889 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:04:40.889 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:04:40.889 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:04:40.889 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:04:40.889 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:04:45.897 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:04:45.897 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:04:45.897 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:04:45.897 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:04:45.897 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:04:45.897 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:04:45.905 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:04:45.906 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:04:45.906 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:04:45.906 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:04:45.906 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:04:45.909 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:04:45.909 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:04:45.910 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:04:45.910 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:04:45.910 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:04:45.910 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:04:45.910 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:04:45.910 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:04:45.913 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:04:45.913 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:04:45.913 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:04:45.913 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:04:45.913 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:04:45.913 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:04:45.913 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:04:45.913 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:04:45.916 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:04:45.916 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:04:45.916 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:04:45.916 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:04:45.916 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:04:45.916 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:04:45.916 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:04:45.916 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:04:45.920 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:04:45.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:04:45.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:04:45.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:04:45.920 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:04:45.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:04:45.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:04:45.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:04:45.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:45.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:04:45.920 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:04:45.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:45.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:45.920 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:04:45.920 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:04:45.920 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:04:45.920 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:04:45.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:45.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:45.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:45.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:04:45.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:45.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:45.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:45.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:45.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:45.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:45.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:45.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:45.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:45.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:45.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:45.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:45.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:45.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:45.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:45.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:45.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:45.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:45.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:45.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:45.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:45.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:45.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:45.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:45.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:45.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:45.925 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:04:46.403 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:04:46.442 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:04:46.443 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:04:46.443 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:04:46.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:46.462 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:04:46.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:04:46.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:04:46.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:46.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:46.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:04:46.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:04:46.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:04:46.506 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:04:46.508 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:04:46.508 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:04:46.508 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:04:46.508 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:04:46.508 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:04:46.508 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:04:46.508 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:04:46.508 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:46.509 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:51.516 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:04:51.516 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:04:51.516 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:04:51.516 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:04:51.516 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:04:51.516 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:04:51.524 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:04:51.525 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:04:51.525 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:04:51.525 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:04:51.525 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:04:51.528 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:04:51.528 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:04:51.528 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:04:51.528 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:04:51.528 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:04:51.528 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:04:51.528 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:04:51.528 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:04:51.530 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:04:51.530 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:04:51.530 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:04:51.530 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:04:51.530 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:04:51.530 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:04:51.530 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:04:51.530 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:04:51.532 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:04:51.533 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:04:51.533 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:04:51.533 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:04:51.533 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:04:51.533 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:04:51.533 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:04:51.533 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:04:51.536 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:04:51.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:04:51.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:04:51.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:04:51.536 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:04:51.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:04:51.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:04:51.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:51.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:04:51.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:04:51.536 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:04:51.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:51.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:51.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:51.536 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:04:51.536 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:04:51.536 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:04:51.536 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:04:51.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:51.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:51.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:51.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:04:51.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:51.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:51.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:51.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:51.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:51.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:51.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:51.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:51.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:51.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:51.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:51.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:51.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:51.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:51.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:51.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:51.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:51.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:51.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:51.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:51.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:51.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:51.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:51.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:51.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:51.541 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:04:52.020 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:04:52.056 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:04:52.057 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:04:52.058 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:04:52.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:52.072 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:04:52.072 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:04:52.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:04:52.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:52.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:52.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:04:52.125 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:04:52.125 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:04:52.125 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:04:52.126 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:04:52.126 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:04:52.126 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:04:52.126 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:04:52.126 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:04:52.126 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:04:52.126 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:04:52.126 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:52.126 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:52.126 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:04:57.134 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:04:57.134 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:04:57.134 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:04:57.134 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:04:57.134 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:04:57.137 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:04:57.142 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:04:57.143 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:04:57.143 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:04:57.143 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:04:57.143 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:04:57.146 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:04:57.146 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:04:57.146 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:04:57.146 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:04:57.147 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:04:57.147 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:04:57.147 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:04:57.147 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:04:57.149 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:04:57.149 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:04:57.149 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:04:57.149 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:04:57.149 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:04:57.149 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:04:57.150 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:04:57.150 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:04:57.152 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:04:57.152 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:04:57.152 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:04:57.152 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:04:57.152 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:04:57.152 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:04:57.152 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:04:57.152 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:04:57.155 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:04:57.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:04:57.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:04:57.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:04:57.156 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:04:57.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:04:57.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:04:57.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:04:57.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:04:57.156 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:04:57.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:57.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:57.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:57.156 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:04:57.156 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:04:57.156 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:04:57.156 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:04:57.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:57.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:57.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:57.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:04:57.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:57.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:57.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:57.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:57.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:57.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:57.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:57.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:57.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:57.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:57.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:57.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:57.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:57.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:57.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:57.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:57.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:57.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:57.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:57.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:04:57.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:57.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:57.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:57.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:04:57.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:04:57.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:04:57.161 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:04:57.640 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:04:57.675 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:04:57.676 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:04:57.677 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:04:57.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:57.696 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:04:57.696 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:04:57.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:04:57.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:04:57.701 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:04:57.702 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:04:57.702 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:04:57.702 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:04:57.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:57.744 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:04:57.745 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:04:57.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:04:57.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:04:57.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:57.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:04:57.803 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:04:57.803 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:04:57.820 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:04:57.820 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:04:57.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:04:57.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:04:57.822 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:04:57.822 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:04:57.822 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:04:57.822 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:04:57.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:04:57.881 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:04:57.882 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:04:57.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:04:57.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:04:58.108 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:04:58.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:04:58.159 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:04:58.160 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:04:58.160 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:04:58.579 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:04:59.050 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:04:59.160 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:04:59.160 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:04:59.161 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:04:59.161 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:04:59.523 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:04:59.996 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:05:00.161 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:05:00.161 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:05:00.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:05:00.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:05:00.468 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:05:00.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:00.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:00.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:00.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:00.909 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:00.909 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:00.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:05:00.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:00.910 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:00.910 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:00.910 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:05:00.910 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:05:00.941 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:05:00.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:00.947 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:00.947 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:00.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:00.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:00.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:01.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:01.002 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:01.002 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:01.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:01.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:01.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:05:01.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:01.017 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:01.017 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:01.017 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:05:01.017 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:05:01.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:01.029 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:01.029 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:01.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:01.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:01.162 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:05:01.163 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:05:01.163 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:05:01.163 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:05:01.414 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:05:01.887 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:05:02.164 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:05:02.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:05:02.164 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:05:02.164 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:05:02.360 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:05:02.833 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:05:03.306 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:05:03.779 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:05:04.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:04.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:04.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:04.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:04.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:04.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:04.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:05:04.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:04.056 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:04.056 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:04.056 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:05:04.056 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:05:04.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:04.114 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:04.114 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:04.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:04.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:04.252 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:05:04.724 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:05:05.197 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:05:05.670 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:05:06.142 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:05:06.613 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:05:07.087 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:05:07.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:07.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:07.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:07.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:07.141 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:07.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:07.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:05:07.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:07.143 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:07.143 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:07.143 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:05:07.143 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:05:07.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:07.185 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:07.185 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:07.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:07.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:07.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:07.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:07.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:07.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:07.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:07.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:07.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:05:07.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:07.269 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:07.269 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:07.269 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:05:07.269 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:05:07.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:07.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:07.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:07.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:07.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:07.559 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:05:08.031 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:05:08.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:08.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:08.239 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:08.239 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:08.255 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:08.255 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:08.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:05:08.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:08.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:08.256 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:08.256 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:05:08.256 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:05:08.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:08.264 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:08.264 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:08.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:08.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:08.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:08.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:08.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:08.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:08.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:08.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:08.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:05:08.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:08.351 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:08.351 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:08.351 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:05:08.351 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:05:08.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:08.356 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:08.356 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:08.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:08.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:08.502 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:05:08.973 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:05:09.444 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:05:09.918 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:05:10.390 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:05:10.863 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:05:11.334 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:05:11.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:11.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:11.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:11.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:11.381 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:11.381 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:11.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:05:11.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:11.382 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:11.382 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:11.382 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:05:11.382 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:05:11.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:11.435 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:11.435 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:11.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:11.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:11.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:11.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:11.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:11.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:11.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:11.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:11.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:05:11.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:11.515 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:11.515 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:11.515 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:05:11.515 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:05:11.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:11.574 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:11.574 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:11.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:11.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:11.817 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:05:12.289 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:05:12.760 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 04:05:13.233 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 04:05:13.706 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 04:05:14.178 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 04:05:14.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:14.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:14.582 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:14.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:14.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:14.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:14.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:05:14.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:14.604 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:14.604 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:14.604 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:05:14.604 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:05:14.649 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 04:05:14.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:14.661 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:14.661 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:14.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:14.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:15.120 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 04:05:15.593 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 04:05:16.066 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 04:05:16.538 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 04:05:17.011 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 04:05:17.484 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 04:05:17.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:17.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:17.668 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:17.669 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:17.686 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:17.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:17.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:05:17.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:17.688 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:17.688 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:17.688 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:05:17.688 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:05:17.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:17.730 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:17.730 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:17.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:17.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:17.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:17.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:17.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:17.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:17.827 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:17.827 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:17.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:05:17.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:17.828 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:17.828 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:17.828 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:05:17.828 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:05:17.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:17.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:17.867 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:17.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:17.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:17.956 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 04:05:18.428 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 04:05:18.901 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 04:05:19.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:19.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:19.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:19.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:19.096 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:19.096 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:19.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:05:19.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:19.097 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:19.097 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:19.097 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:05:19.097 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:05:19.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:19.143 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:19.144 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:19.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:19.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:19.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:19.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:19.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:19.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:19.373 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 04:05:19.382 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:19.382 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:19.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:05:19.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:19.384 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:19.384 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:19.384 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:05:19.384 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:05:19.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:19.430 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:19.431 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:19.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:19.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:19.846 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 04:05:20.317 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 04:05:20.790 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 04:05:21.262 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 04:05:21.735 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 04:05:22.206 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 04:05:22.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:22.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:22.437 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:22.437 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:22.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:22.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:22.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:05:22.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:22.453 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:22.453 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:22.453 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:05:22.453 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:05:22.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:22.498 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:22.498 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:22.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:22.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:22.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:22.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:22.670 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:22.670 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:22.678 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 04:05:22.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:22.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:22.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:05:22.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:22.691 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:22.691 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:22.691 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:05:22.691 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:05:22.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:22.731 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:22.731 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:22.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:22.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:23.151 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 04:05:23.623 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 04:05:24.094 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 04:05:24.567 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 04:05:25.040 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 04:05:25.513 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 04:05:25.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:25.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:25.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:25.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:25.753 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:25.753 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:25.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:05:25.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:25.755 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:25.755 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:25.755 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:05:25.755 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:05:25.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:25.805 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:25.805 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:25.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:25.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:25.986 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 04:05:26.458 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-08 04:05:26.930 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-08 04:05:27.401 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-08 04:05:27.872 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-08 04:05:28.345 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-08 04:05:28.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:28.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:28.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:28.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:28.818 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-08 04:05:28.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:28.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:28.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:05:28.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:28.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:28.827 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:28.827 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:05:28.827 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:05:28.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:28.873 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:28.873 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:28.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:28.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:29.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:29.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:29.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:29.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:29.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:29.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:29.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:05:29.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:29.071 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:29.071 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:29.071 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:05:29.071 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:05:29.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:29.102 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:29.102 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:29.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:29.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:29.289 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-08 04:05:29.761 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-08 04:05:29.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:29.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:29.803 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:29.803 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:29.820 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:29.820 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:29.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:05:29.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:29.821 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:29.821 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:29.821 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:05:29.821 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:05:29.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:29.859 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:29.859 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:29.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:29.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:29.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:29.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:29.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:29.918 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:29.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:29.931 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:29.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:05:29.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:29.933 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:29.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:29.933 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:05:29.933 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:05:29.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:29.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:29.943 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:29.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:29.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:30.231 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-08 04:05:30.702 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-08 04:05:31.176 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-08 04:05:31.648 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-08 04:05:32.121 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-08 04:05:32.592 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-08 04:05:32.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:32.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:32.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:32.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:32.966 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:32.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:32.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:05:32.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:32.968 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:32.968 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:32.968 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:05:32.968 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:05:33.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:33.024 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:33.024 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:33.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:33.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:33.065 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-08 04:05:33.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:33.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:33.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:33.220 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:33.237 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:33.237 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:33.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:05:33.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:33.238 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:33.238 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:33.238 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:05:33.238 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:05:33.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:33.244 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:33.244 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:33.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:33.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:33.536 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-08 04:05:34.009 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-08 04:05:34.480 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-08 04:05:34.953 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-08 04:05:35.426 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-08 04:05:35.898 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-08 04:05:36.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:36.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:36.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:36.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:36.266 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:36.266 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:36.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:05:36.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:36.267 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:36.267 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:36.267 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:05:36.267 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:05:36.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:36.327 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:36.328 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:36.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:36.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:36.371 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-08 04:05:36.844 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-08 04:05:37.316 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-08 04:05:37.787 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-08 04:05:38.260 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-08 04:05:38.733 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-08 04:05:39.205 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-08 04:05:39.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:39.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:39.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:39.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:39.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:39.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:39.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:05:39.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:39.356 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:39.356 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:39.356 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:05:39.356 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:05:39.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:39.399 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:39.399 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:39.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:39.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:39.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:39.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:39.598 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:39.598 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:39.614 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:39.614 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:39.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:05:39.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:39.616 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:39.616 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:39.616 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:05:39.616 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:05:39.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:39.622 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:39.622 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:39.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:39.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:39.677 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-08 04:05:40.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:40.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:40.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:40.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:40.150 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-08 04:05:40.160 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:05:40.160 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:05:40.161 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:05:40.161 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:05:40.163 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:05:40.163 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:05:40.163 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:05:40.163 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:05:40.163 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:05:40.163 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:05:40.163 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:05:40.163 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=9286 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:05:40.163 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=9286 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:05:40.163 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=9286 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:05:45.167 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:05:45.167 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:05:45.167 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:05:45.167 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:05:45.167 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:05:45.168 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:05:45.175 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:05:45.175 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:05:45.175 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:05:45.176 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:05:45.176 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:05:45.179 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:05:45.179 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:05:45.180 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:05:45.180 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:05:45.180 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:05:45.180 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:05:45.181 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:05:45.181 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:05:45.184 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:05:45.184 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:05:45.185 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:05:45.185 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:05:45.185 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:05:45.186 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:05:45.186 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:05:45.186 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:05:45.189 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:05:45.189 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:05:45.190 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:05:45.190 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:05:45.190 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:05:45.190 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:05:45.190 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:05:45.190 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:05:45.196 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:05:45.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:05:45.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:05:45.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:05:45.196 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:05:45.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:05:45.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:05:45.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:05:45.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:05:45.197 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:05:45.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:05:45.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:05:45.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:05:45.197 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:05:45.197 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:05:45.197 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:05:45.197 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:05:45.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:05:45.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:05:45.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:05:45.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:05:45.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:05:45.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:05:45.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:05:45.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:05:45.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:05:45.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:05:45.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:05:45.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:05:45.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:05:45.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:05:45.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:05:45.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:05:45.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:05:45.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:05:45.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:05:45.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:05:45.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:05:45.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:05:45.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:05:45.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:05:45.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:05:45.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:05:45.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:05:45.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:05:45.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:05:45.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:05:45.202 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:05:45.681 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:05:45.722 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:05:45.723 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:05:45.724 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:05:45.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:45.740 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:45.740 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:45.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:05:45.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:45.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:45.743 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:45.743 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:05:45.743 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:05:45.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:45.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:45.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:45.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:45.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:45.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:45.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:45.842 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:45.842 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:45.858 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:45.858 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:45.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:05:45.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:45.860 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:45.860 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:45.860 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:05:45.860 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:05:45.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:45.864 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:45.864 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:45.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:45.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:45.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:45.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:45.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:45.964 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:45.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:45.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:45.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:05:45.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:45.984 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:45.984 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:45.984 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:05:45.984 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:05:46.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:46.019 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:46.020 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:46.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:46.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:46.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:46.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:46.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:46.078 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:46.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:46.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:46.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:05:46.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:46.101 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:46.101 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:46.101 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:05:46.101 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:05:46.148 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:05:46.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:46.155 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:46.156 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:46.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:46.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:46.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:05:46.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:05:46.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:05:46.204 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:05:46.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:46.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:46.237 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:46.237 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:46.249 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:05:46.249 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:05:46.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:05:46.249 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:05:46.251 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:05:46.251 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:05:46.251 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:05:46.251 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:05:46.251 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:05:46.251 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:05:46.251 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:05:46.251 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=227 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:05:46.252 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=227 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:05:46.252 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=228 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:05:46.252 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=228 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:05:46.252 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=228 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:05:46.252 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=228 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:05:46.252 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=228 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:05:46.252 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=228 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:05:46.252 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=228 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:05:46.252 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=228 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:05:51.256 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:05:51.256 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:05:51.256 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:05:51.256 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:05:51.256 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:05:51.256 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:05:51.265 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:05:51.266 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:05:51.266 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:05:51.267 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:05:51.267 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:05:51.270 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:05:51.270 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:05:51.271 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:05:51.271 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:05:51.271 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:05:51.272 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:05:51.272 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:05:51.272 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:05:51.275 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:05:51.276 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:05:51.276 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:05:51.276 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:05:51.277 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:05:51.277 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:05:51.277 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:05:51.277 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:05:51.280 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:05:51.280 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:05:51.281 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:05:51.281 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:05:51.281 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:05:51.281 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:05:51.281 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:05:51.281 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:05:51.287 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:05:51.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:05:51.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:05:51.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:05:51.287 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:05:51.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:05:51.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:05:51.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:05:51.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:05:51.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:05:51.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:05:51.288 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:05:51.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:05:51.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:05:51.288 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:05:51.288 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:05:51.288 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:05:51.288 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:05:51.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:05:51.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:05:51.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:05:51.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:05:51.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:05:51.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:05:51.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:05:51.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:05:51.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:05:51.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:05:51.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:05:51.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:05:51.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:05:51.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:05:51.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:05:51.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:05:51.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:05:51.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:05:51.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:05:51.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:05:51.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:05:51.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:05:51.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:05:51.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:05:51.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:05:51.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:05:51.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:05:51.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:05:51.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:05:51.293 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:05:51.770 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:05:51.819 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:05:51.821 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:05:51.822 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:05:51.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:51.842 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:51.842 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:51.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:05:51.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:51.847 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:51.848 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:51.848 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:05:51.848 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:05:51.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:51.875 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:51.876 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:51.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:51.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:52.242 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:05:52.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:05:52.293 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:05:52.293 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:05:52.293 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:05:52.713 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:05:52.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:52.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:52.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:52.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:52.749 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:52.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:52.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:05:52.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:52.751 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:52.751 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:52.751 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:05:52.751 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:05:52.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:52.756 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:52.756 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:52.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:52.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:53.184 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:05:53.292 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:05:53.294 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:05:53.294 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:05:53.294 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:05:53.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:53.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:53.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:53.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:53.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:53.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:53.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:05:53.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:53.474 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:53.474 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:53.474 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:05:53.474 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:05:53.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:53.521 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:53.521 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:53.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:53.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:53.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:53.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:53.624 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:53.624 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:53.644 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:53.644 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:53.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:05:53.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:53.646 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:53.646 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:53.646 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:05:53.646 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:05:53.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:53.652 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:53.652 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:53.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:53.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:53.656 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:05:54.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:54.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:54.051 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:54.051 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:54.062 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:05:54.062 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:05:54.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:05:54.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:05:54.067 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:05:54.068 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:05:54.068 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:05:54.068 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:05:54.068 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:05:54.068 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:05:54.068 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:05:54.069 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=600 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:05:54.069 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=601 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:05:54.069 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=601 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:05:54.069 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=601 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:05:54.069 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=601 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:05:54.069 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=601 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:05:54.069 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=601 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:05:54.069 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=601 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:05:54.069 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=601 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:05:59.069 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:05:59.069 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:05:59.069 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:05:59.069 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:05:59.069 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:05:59.069 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:05:59.077 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:05:59.078 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:05:59.078 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:05:59.079 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:05:59.079 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:05:59.082 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:05:59.083 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:05:59.083 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:05:59.083 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:05:59.083 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:05:59.084 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:05:59.084 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:05:59.084 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:05:59.086 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:05:59.087 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:05:59.087 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:05:59.087 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:05:59.087 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:05:59.088 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:05:59.088 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:05:59.088 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:05:59.090 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:05:59.090 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:05:59.090 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:05:59.090 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:05:59.090 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:05:59.090 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:05:59.090 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:05:59.090 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:05:59.094 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:05:59.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:05:59.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:05:59.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:05:59.094 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:05:59.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:05:59.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:05:59.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:05:59.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:05:59.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:05:59.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:05:59.095 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:05:59.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:05:59.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:05:59.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:05:59.095 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:05:59.095 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:05:59.095 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:05:59.095 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:05:59.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:05:59.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:05:59.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:05:59.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:05:59.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:05:59.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:05:59.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:05:59.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:05:59.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:05:59.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:05:59.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:05:59.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:05:59.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:05:59.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:05:59.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:05:59.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:05:59.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:05:59.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:05:59.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:05:59.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:05:59.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:05:59.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:05:59.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:05:59.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:05:59.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:05:59.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:05:59.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:05:59.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:05:59.100 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:05:59.578 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:05:59.617 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:05:59.618 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:05:59.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:59.619 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:05:59.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:59.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:59.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:05:59.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:59.639 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:59.639 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:59.639 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:05:59.639 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:05:59.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:59.681 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:59.682 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:59.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:59.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:59.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:59.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:59.874 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:59.874 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:59.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:05:59.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:05:59.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:05:59.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:59.893 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:59.893 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:59.893 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:05:59.893 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:05:59.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:05:59.906 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:05:59.907 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:05:59.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:05:59.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:00.046 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:06:00.099 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:06:00.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:06:00.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:06:00.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:06:00.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:00.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:00.190 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:00.190 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:00.207 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:00.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:00.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:06:00.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:00.209 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:00.209 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:00.209 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:06:00.209 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:06:00.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:00.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:00.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:00.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:00.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:00.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:00.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:00.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:00.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:00.517 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:06:00.529 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:00.529 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:00.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:06:00.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:00.531 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:00.531 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:00.531 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:06:00.531 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:06:00.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:00.572 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:00.572 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:00.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:00.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:00.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:00.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:00.909 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:00.909 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:00.919 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:06:00.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:06:00.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:06:00.919 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:06:00.920 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:06:00.920 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:06:00.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:06:00.920 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:06:00.920 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:06:00.920 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:06:00.920 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:06:05.928 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:06:05.928 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:06:05.928 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:06:05.928 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:06:05.928 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:06:05.928 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:06:05.935 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:06:05.936 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:06:05.937 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:06:05.937 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:06:05.937 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:06:05.940 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:06:05.940 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:06:05.940 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:06:05.940 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:06:05.940 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:06:05.941 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:06:05.941 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:06:05.941 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:06:05.943 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:06:05.943 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:06:05.943 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:06:05.943 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:06:05.943 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:06:05.943 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:06:05.943 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:06:05.943 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:06:05.945 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:06:05.945 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:06:05.945 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:06:05.945 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:06:05.946 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:06:05.946 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:06:05.946 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:06:05.946 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:06:05.949 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:06:05.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:06:05.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:06:05.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:06:05.949 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:06:05.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:06:05.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:06:05.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:06:05.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:06:05.949 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:06:05.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:06:05.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:06:05.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:06:05.949 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:06:05.949 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:06:05.949 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:06:05.949 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:06:05.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:06:05.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:06:05.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:06:05.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:06:05.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:06:05.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:06:05.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:06:05.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:06:05.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:06:05.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:06:05.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:06:05.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:06:05.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:06:05.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:06:05.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:06:05.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:06:05.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:06:05.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:06:05.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:06:05.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:06:05.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:06:05.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:06:05.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:06:05.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:06:05.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:06:05.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:06:05.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:06:05.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:06:05.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:06:05.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:06:05.954 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:06:06.431 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:06:06.470 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:06:06.471 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:06:06.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:06.472 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:06:06.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:06.482 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:06.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:06:06.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:06.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:06.483 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:06.483 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:06:06.483 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:06:06.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:06.534 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:06.534 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:06.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:06.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:06.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:06.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:06.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:06.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:06.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:06.720 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:06.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:06:06.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:06.721 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:06.721 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:06.721 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:06:06.721 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:06:06.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:06.769 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:06.769 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:06.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:06.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:06.901 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:06:06.951 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:06:06.952 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:06:06.952 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:06:06.952 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:06:07.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:07.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:07.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:07.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:07.060 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:07.060 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:07.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:06:07.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:07.061 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:07.062 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:07.062 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:06:07.062 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:06:07.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:07.089 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:07.089 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:07.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:07.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:07.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:07.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:07.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:07.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:07.373 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:06:07.376 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:07.376 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:07.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:06:07.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:07.377 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:07.377 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:07.377 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:06:07.377 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:06:07.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:07.425 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:07.425 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:07.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:07.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:07.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:07.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:07.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:07.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:07.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:06:07.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:06:07.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:06:07.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:06:07.781 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:06:07.781 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:06:07.781 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:06:07.781 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:06:07.781 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:06:07.781 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:06:07.781 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:06:07.781 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=396 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:06:07.781 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=396 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:06:07.782 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=396 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:06:07.782 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=396 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:06:07.782 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=396 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:06:12.788 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:06:12.788 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:06:12.788 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:06:12.788 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:06:12.788 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:06:12.788 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:06:12.794 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:06:12.795 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:06:12.795 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:06:12.796 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:06:12.796 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:06:12.798 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:06:12.798 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:06:12.799 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:06:12.799 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:06:12.799 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:06:12.799 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:06:12.799 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:06:12.799 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:06:12.801 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:06:12.801 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:06:12.801 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:06:12.801 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:06:12.801 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:06:12.802 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:06:12.802 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:06:12.802 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:06:12.805 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:06:12.805 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:06:12.805 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:06:12.805 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:06:12.805 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:06:12.805 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:06:12.805 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:06:12.805 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:06:12.809 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:06:12.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:06:12.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:06:12.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:06:12.809 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:06:12.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:06:12.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:06:12.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:06:12.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:06:12.809 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:06:12.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:06:12.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:06:12.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:06:12.809 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:06:12.809 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:06:12.809 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:06:12.810 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:06:12.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:06:12.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:06:12.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:06:12.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:06:12.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:06:12.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:06:12.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:06:12.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:06:12.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:06:12.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:06:12.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:06:12.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:06:12.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:06:12.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:06:12.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:06:12.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:06:12.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:06:12.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:06:12.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:06:12.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:06:12.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:06:12.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:06:12.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:06:12.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:06:12.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:06:12.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:06:12.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:06:12.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:06:12.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:06:12.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:06:12.814 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:06:13.293 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:06:13.331 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:06:13.333 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:06:13.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:13.334 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:06:13.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:13.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:13.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:06:13.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:13.352 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:13.352 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:13.352 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:06:13.352 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:06:13.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:13.395 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:13.395 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:13.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:13.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:13.764 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:06:13.812 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:06:13.827 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:06:13.827 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:06:13.827 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:06:14.236 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:06:14.704 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:06:14.828 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:06:14.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:06:14.829 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:06:14.829 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:06:15.175 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:06:15.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:15.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:15.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:15.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:15.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:15.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:15.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:06:15.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:15.242 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:15.242 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:15.242 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:06:15.242 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:06:15.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:15.273 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:15.273 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:15.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:15.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:15.646 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:06:15.830 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:06:15.830 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:06:15.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:06:15.830 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:06:16.119 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:06:16.592 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:06:16.830 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:06:16.831 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:06:16.831 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:06:16.831 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:06:17.064 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:06:17.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:17.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:17.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:17.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:17.413 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:17.413 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:17.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:06:17.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:17.414 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:17.415 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:17.415 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:06:17.415 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:06:17.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:17.444 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:17.444 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:17.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:17.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:17.535 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:06:17.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:06:17.832 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:06:17.832 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:06:17.832 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:06:18.006 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:06:18.476 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:06:18.950 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:06:18.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:18.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:18.989 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:18.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:19.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:19.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:19.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:06:19.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:19.009 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:19.009 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:19.009 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:06:19.009 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:06:19.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:19.048 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:19.048 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:19.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:19.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:19.422 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:06:19.895 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:06:20.366 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:06:20.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:20.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:20.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:20.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:20.839 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:06:20.843 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:06:20.844 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:06:20.844 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:06:20.844 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:06:20.848 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:06:20.849 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:06:20.850 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:06:20.850 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:06:20.850 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:06:20.850 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:06:20.850 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:06:20.850 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1738 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:06:20.851 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1738 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:06:20.851 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1738 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:06:20.851 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1738 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:06:20.851 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1738 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:06:20.851 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1738 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:06:20.851 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1739 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:06:20.851 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1739 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:06:20.851 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1739 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:06:20.851 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1739 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:06:20.851 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1739 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:06:20.851 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1739 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:06:20.852 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1739 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:06:20.852 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1739 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:06:25.852 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:06:25.852 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:06:25.852 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:06:25.852 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:06:25.852 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:06:25.852 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:06:25.864 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:06:25.866 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:06:25.866 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:06:25.866 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:06:25.866 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:06:25.872 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:06:25.873 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:06:25.873 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:06:25.873 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:06:25.873 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:06:25.873 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:06:25.873 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:06:25.873 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:06:25.878 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:06:25.878 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:06:25.878 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:06:25.878 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:06:25.878 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:06:25.878 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:06:25.878 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:06:25.879 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:06:25.882 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:06:25.882 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:06:25.883 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:06:25.883 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:06:25.883 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:06:25.883 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:06:25.883 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:06:25.883 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:06:25.889 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:06:25.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:06:25.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:06:25.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:06:25.889 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:06:25.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:06:25.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:06:25.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:06:25.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:06:25.889 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:06:25.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:06:25.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:06:25.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:06:25.889 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:06:25.889 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:06:25.889 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:06:25.890 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:06:25.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:06:25.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:06:25.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:06:25.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:06:25.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:06:25.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:06:25.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:06:25.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:06:25.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:06:25.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:06:25.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:06:25.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:06:25.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:06:25.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:06:25.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:06:25.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:06:25.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:06:25.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:06:25.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:06:25.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:06:25.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:06:25.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:06:25.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:06:25.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:06:25.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:06:25.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:06:25.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:06:25.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:06:25.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:06:25.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:06:25.894 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:06:26.373 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:06:26.419 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:06:26.421 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:06:26.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:26.423 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:06:26.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:26.447 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:26.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:06:26.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:26.449 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:26.449 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:26.449 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:06:26.449 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:06:26.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:26.471 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:26.471 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:26.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:26.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:26.846 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:06:26.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:06:26.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:06:26.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:06:26.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:06:27.317 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:06:27.788 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:06:27.895 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:06:27.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:06:27.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:06:27.896 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:06:28.259 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:06:28.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:28.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:28.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:28.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:28.324 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:28.324 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:28.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:06:28.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:28.325 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:28.325 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:28.325 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:06:28.325 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:06:28.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:28.357 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:28.357 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:28.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:28.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:28.731 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:06:28.897 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:06:28.897 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:06:28.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:06:28.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:06:29.204 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:06:29.677 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:06:29.897 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:06:29.898 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:06:29.898 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:06:29.898 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:06:30.148 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:06:30.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:30.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:30.477 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:30.477 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:30.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:30.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:30.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:06:30.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:30.498 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:30.498 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:30.498 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:06:30.498 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:06:30.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:30.528 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:30.528 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:30.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:30.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:30.620 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:06:30.899 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:06:30.900 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:06:30.900 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:06:30.900 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:06:31.093 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:06:31.566 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:06:32.039 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:06:32.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:32.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:32.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:32.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:32.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:32.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:32.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:06:32.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:32.100 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:32.100 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:32.100 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:06:32.100 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:06:32.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:32.134 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:32.134 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:32.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:32.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:32.511 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:06:32.984 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:06:33.457 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:06:33.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:33.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:33.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:33.922 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:33.929 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:06:33.934 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:06:33.934 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:06:33.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:06:33.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:06:33.937 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:06:33.937 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:06:33.937 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:06:33.937 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:06:33.937 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:06:33.937 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:06:33.937 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:06:38.940 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:06:38.940 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:06:38.940 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:06:38.940 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:06:38.940 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:06:38.940 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:06:38.948 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:06:38.950 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:06:38.950 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:06:38.950 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:06:38.950 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:06:38.953 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:06:38.953 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:06:38.953 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:06:38.953 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:06:38.954 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:06:38.954 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:06:38.954 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:06:38.954 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:06:38.956 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:06:38.957 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:06:38.957 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:06:38.957 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:06:38.957 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:06:38.957 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:06:38.958 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:06:38.958 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:06:38.960 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:06:38.960 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:06:38.960 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:06:38.960 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:06:38.960 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:06:38.960 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:06:38.960 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:06:38.960 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:06:38.965 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:06:38.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:06:38.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:06:38.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:06:38.965 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:06:38.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:06:38.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:06:38.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:06:38.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:06:38.965 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:06:38.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:06:38.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:06:38.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:06:38.965 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:06:38.965 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:06:38.965 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:06:38.966 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:06:38.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:06:38.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:06:38.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:06:38.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:06:38.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:06:38.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:06:38.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:06:38.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:06:38.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:06:38.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:06:38.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:06:38.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:06:38.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:06:38.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:06:38.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:06:38.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:06:38.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:06:38.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:06:38.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:06:38.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:06:38.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:06:38.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:06:38.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:06:38.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:06:38.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:06:38.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:06:38.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:06:38.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:06:38.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:06:38.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:06:38.970 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:06:39.447 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:06:39.492 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:06:39.494 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:06:39.495 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:06:39.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:39.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:39.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:39.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:06:39.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:39.515 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:39.515 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:39.516 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:06:39.516 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:06:39.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:39.551 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:39.551 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:39.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:39.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:39.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:39.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:39.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:39.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:39.744 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:39.744 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:39.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:06:39.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:39.746 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:39.746 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:39.746 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:06:39.746 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:06:39.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:39.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:39.785 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:39.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:39.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:39.917 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:06:39.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:06:39.976 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:06:39.977 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:06:39.977 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:06:40.391 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:06:40.863 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:06:40.977 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:06:40.978 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:06:40.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:06:40.978 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:06:41.334 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:06:41.807 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:06:41.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:41.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:41.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:41.853 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:41.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:41.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:41.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:06:41.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:41.871 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:41.871 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:41.871 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:06:41.871 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:06:41.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:41.903 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:41.903 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:41.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:41.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:41.978 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:06:41.978 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:06:41.979 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:06:41.979 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:06:42.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:42.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:42.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:42.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:42.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:42.086 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:42.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:06:42.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:42.087 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:42.087 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:42.088 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:06:42.088 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:06:42.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:42.137 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:42.137 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:42.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:42.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:42.278 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:06:42.751 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:06:42.979 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:06:42.979 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:06:42.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:06:42.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:06:43.223 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:06:43.694 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:06:43.980 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:06:43.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:06:43.981 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:06:43.981 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:06:44.165 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:06:44.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:44.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:44.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:44.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:44.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:44.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:44.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:06:44.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:44.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:44.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:44.278 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:06:44.278 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:06:44.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:44.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:44.309 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:44.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:44.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:44.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:44.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:44.577 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:44.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:44.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:44.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:44.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:06:44.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:44.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:44.588 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:44.588 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:06:44.588 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:06:44.635 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:06:44.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:44.637 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:44.637 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:44.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:44.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:45.106 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:06:45.577 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:06:46.048 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:06:46.518 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:06:46.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:46.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:46.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:46.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:46.918 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:46.918 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:46.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:06:46.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:46.920 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:46.920 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:46.920 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:06:46.920 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:06:46.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:46.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:46.943 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:46.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:46.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:46.989 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:06:47.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:47.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:47.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:47.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:47.236 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:47.237 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:47.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:06:47.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:47.238 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:47.238 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:47.238 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:06:47.238 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:06:47.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:47.274 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:47.274 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:47.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:47.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:47.462 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:06:47.935 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:06:48.407 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:06:48.881 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:06:49.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:49.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:49.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:49.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:49.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:49.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:49.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:06:49.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:49.327 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:49.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:49.327 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:06:49.327 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:06:49.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:49.353 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:06:49.354 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:49.354 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:49.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:49.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:49.825 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:06:49.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:50.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:50.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:50.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:50.018 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:50.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:50.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:06:50.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:50.019 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:50.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:50.019 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:06:50.019 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:06:50.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:50.070 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:50.070 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:50.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:50.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:50.296 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:06:50.767 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:06:51.238 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:06:51.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:51.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:51.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:51.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:51.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:51.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:51.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:06:51.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:51.699 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:51.699 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:51.699 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:06:51.699 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:06:51.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:51.705 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:51.705 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:51.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:51.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:51.711 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:06:52.184 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:06:52.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:52.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:52.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:52.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:52.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:52.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:52.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:06:52.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:52.353 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:52.353 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:52.353 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:06:52.353 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:06:52.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:52.372 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:52.372 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:52.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:52.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:52.656 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:06:53.129 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:06:53.602 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:06:54.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:54.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:54.043 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:54.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:54.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:54.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:54.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:06:54.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:54.062 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:54.062 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:54.062 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:06:54.062 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:06:54.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:54.071 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:54.072 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:54.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:54.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:54.074 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:06:54.545 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 04:06:54.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:54.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:54.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:54.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:54.646 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:54.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:54.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:06:54.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:54.647 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:54.647 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:54.648 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:06:54.648 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:06:54.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:54.691 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:54.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:54.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:54.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:55.018 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 04:06:55.491 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 04:06:55.963 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 04:06:56.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:56.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:56.358 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:56.358 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:56.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:56.373 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:56.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:06:56.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:56.375 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:56.375 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:56.375 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:06:56.375 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:06:56.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:56.380 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:56.381 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:56.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:56.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:56.434 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 04:06:56.905 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 04:06:56.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:56.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:56.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:56.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:57.005 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:57.005 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:57.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:06:57.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:57.007 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:57.007 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:57.007 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:06:57.007 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:06:57.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:57.050 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:06:57.050 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:06:57.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:57.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:57.375 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 04:06:57.847 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 04:06:58.320 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 04:06:58.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:06:58.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:06:58.714 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:06:58.714 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:06:58.722 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:06:58.722 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:06:58.722 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:06:58.722 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:06:58.723 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:06:58.723 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:06:58.723 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:06:58.723 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:06:58.723 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:06:58.723 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:06:58.723 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:06:58.723 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4272 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:06:58.723 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4272 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:06:58.723 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4272 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:06:58.723 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4272 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:06:58.723 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4272 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:06:58.723 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4272 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:03.731 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:07:03.731 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:07:03.731 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:07:03.731 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:07:03.731 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:07:03.731 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:07:03.739 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:07:03.740 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:07:03.740 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:07:03.741 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:07:03.741 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:07:03.746 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:07:03.747 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:07:03.747 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:07:03.747 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:07:03.747 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:07:03.748 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:07:03.748 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:07:03.748 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:07:03.751 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:07:03.751 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:07:03.751 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:07:03.752 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:07:03.752 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:07:03.752 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:07:03.752 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:07:03.752 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:07:03.755 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:07:03.755 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:07:03.755 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:07:03.755 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:07:03.755 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:07:03.755 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:07:03.755 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:07:03.755 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:07:03.759 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:07:03.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:07:03.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:07:03.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:07:03.759 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:07:03.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:07:03.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:07:03.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:07:03.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:07:03.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:03.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:03.760 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:07:03.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:03.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:03.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:03.760 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:07:03.760 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:07:03.760 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:07:03.760 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:07:03.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:03.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:03.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:03.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:07:03.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:03.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:03.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:03.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:03.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:03.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:03.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:03.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:03.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:03.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:03.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:03.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:03.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:03.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:03.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:03.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:03.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:03.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:03.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:03.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:03.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:03.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:03.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:03.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:03.765 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:07:04.242 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:07:04.276 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:07:04.277 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:07:04.278 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:07:04.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:04.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:04.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:04.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:04.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:04.292 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:04.292 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:04.292 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:04.292 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:04.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:04.341 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:04.341 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:04.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:04.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:04.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:04.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:04.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:04.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:04.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:04.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:04.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:04.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:04.422 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:04.422 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:04.422 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:04.422 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:04.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:04.426 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:04.426 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:04.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:04.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:04.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:04.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:04.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:04.482 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:04.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:04.503 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:04.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:04.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:04.505 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:04.505 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:04.505 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:04.505 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:04.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:04.530 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:04.531 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:04.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:04.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:04.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:04.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:04.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:04.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:04.623 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:04.623 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:04.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:04.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:04.625 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:04.625 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:04.625 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:04.625 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:04.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:04.674 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:04.674 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:04.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:04.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:04.710 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:07:04.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:04.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:04.761 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:04.761 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:04.764 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:07:04.764 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:07:04.764 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:07:04.764 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:07:04.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:04.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:04.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:04.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:04.776 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:04.776 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:04.776 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:04.776 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:04.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:04.806 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:04.807 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:04.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:04.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:04.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:04.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:04.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:04.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:04.887 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:04.887 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:04.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:04.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:04.889 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:04.889 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:04.889 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:04.889 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:04.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:04.892 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:04.892 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:04.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:04.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:05.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:05.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:05.107 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:05.107 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:05.123 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:05.123 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:05.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:05.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:05.124 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:05.124 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:05.124 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:05.124 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:05.181 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:07:05.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:05.190 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:05.190 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:05.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:05.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:05.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:05.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:05.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:05.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:05.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:05.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:05.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:05.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:05.288 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:05.288 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:05.288 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:05.288 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:05.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:05.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:05.328 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:05.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:05.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:05.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:05.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:05.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:05.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:05.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:07:05.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:07:05.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:07:05.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:07:05.512 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:07:05.512 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:07:05.512 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:07:05.512 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:07:05.513 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:07:05.513 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:07:05.513 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:07:05.513 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=380 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:05.513 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=380 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:05.513 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=380 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:05.513 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=380 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:05.513 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=380 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:05.513 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=380 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:10.521 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:07:10.521 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:07:10.521 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:07:10.521 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:07:10.521 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:07:10.521 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:07:10.529 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:07:10.531 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:07:10.531 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:07:10.531 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:07:10.531 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:07:10.534 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:07:10.535 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:07:10.535 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:07:10.535 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:07:10.535 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:07:10.536 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:07:10.536 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:07:10.536 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:07:10.539 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:07:10.539 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:07:10.540 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:07:10.540 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:07:10.540 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:07:10.540 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:07:10.541 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:07:10.541 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:07:10.544 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:07:10.544 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:07:10.544 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:07:10.544 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:07:10.544 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:07:10.545 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:07:10.545 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:07:10.545 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:07:10.550 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:07:10.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:07:10.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:07:10.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:07:10.550 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:07:10.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:07:10.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:07:10.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:07:10.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:07:10.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:10.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:10.550 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:07:10.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:10.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:10.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:10.551 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:07:10.551 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:07:10.551 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:07:10.551 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:07:10.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:10.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:10.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:10.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:07:10.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:10.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:10.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:10.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:10.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:10.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:10.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:10.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:10.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:10.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:10.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:10.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:10.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:10.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:10.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:10.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:10.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:10.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:10.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:10.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:10.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:10.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:10.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:10.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:10.555 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:07:11.033 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:07:11.075 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:07:11.076 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:07:11.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:11.078 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:07:11.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:11.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:11.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:11.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:11.104 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:11.104 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:11.104 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:11.104 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:11.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:11.137 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:11.138 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:11.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:11.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:11.503 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:07:11.554 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:07:11.555 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:07:11.555 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:07:11.555 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:07:11.972 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:07:11.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:11.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:11.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:11.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:12.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:12.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:12.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:12.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:12.011 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:12.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:12.011 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:12.011 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:12.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:12.015 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:12.015 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:12.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:12.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:12.443 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:07:12.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:12.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:12.474 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:12.474 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:12.492 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:12.492 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:12.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:12.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:12.494 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:12.494 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:12.494 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:12.494 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:12.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:12.544 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:12.545 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:12.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:12.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:12.555 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:07:12.556 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:07:12.556 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:07:12.556 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:07:12.916 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:07:13.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:13.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:13.194 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:13.194 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:13.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:13.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:13.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:13.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:13.210 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:13.210 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:13.210 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:13.210 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:13.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:13.246 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:13.246 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:13.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:13.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:13.387 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:07:13.557 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:07:13.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:07:13.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:07:13.558 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:07:13.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:13.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:13.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:13.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:13.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:13.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:13.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:13.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:13.691 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:13.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:13.692 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:13.692 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:13.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:13.715 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:13.715 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:13.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:13.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:13.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:13.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:13.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:13.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:13.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:13.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:13.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:13.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:13.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:13.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:13.845 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:13.845 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:13.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:13.852 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:13.852 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:13.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:13.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:13.858 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:07:14.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:14.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:14.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:14.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:14.314 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:14.314 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:14.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:14.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:14.315 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:14.315 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:14.315 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:14.315 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:14.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:14.323 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:14.323 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:14.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:14.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:14.329 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:07:14.559 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:07:14.559 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:07:14.559 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:07:14.559 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:07:14.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:14.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:14.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:14.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:14.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:14.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:14.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:14.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:14.738 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:14.738 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:14.738 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:14.738 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:14.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:14.749 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:14.749 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:14.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:14.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:14.801 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:07:15.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:15.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:15.197 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:15.197 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:15.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:07:15.207 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:07:15.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:07:15.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:07:15.211 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:07:15.211 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:07:15.211 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:07:15.211 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:07:15.211 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:07:15.211 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:07:15.212 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:07:15.212 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1007 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:15.212 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1007 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:15.212 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1007 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:15.212 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1007 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:15.212 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1008 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:15.212 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1008 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:15.212 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1008 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:15.212 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1008 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:15.212 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1008 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:15.212 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1008 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:15.212 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1008 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:15.212 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1008 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:15.212 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1009 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:15.212 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1009 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:15.212 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1009 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:15.212 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1009 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:15.212 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1009 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:15.212 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1009 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:15.212 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1009 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:15.212 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1009 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:20.216 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:07:20.216 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:07:20.216 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:07:20.216 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:07:20.216 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:07:20.216 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:07:20.224 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:07:20.225 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:07:20.225 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:07:20.226 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:07:20.226 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:07:20.229 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:07:20.229 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:07:20.229 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:07:20.229 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:07:20.230 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:07:20.230 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:07:20.230 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:07:20.230 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:07:20.232 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:07:20.232 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:07:20.232 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:07:20.233 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:07:20.233 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:07:20.233 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:07:20.233 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:07:20.233 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:07:20.235 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:07:20.235 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:07:20.235 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:07:20.235 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:07:20.235 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:07:20.235 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:07:20.236 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:07:20.236 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:07:20.239 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:07:20.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:07:20.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:07:20.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:07:20.239 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:07:20.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:07:20.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:07:20.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:07:20.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:07:20.239 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:07:20.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:20.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:20.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:20.239 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:07:20.239 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:07:20.239 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:07:20.239 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:07:20.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:20.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:20.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:20.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:07:20.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:20.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:20.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:20.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:20.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:20.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:20.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:20.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:20.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:20.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:20.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:20.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:20.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:20.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:20.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:20.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:20.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:20.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:20.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:20.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:20.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:20.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:20.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:20.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:20.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:20.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:20.244 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:07:20.722 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:07:20.759 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:07:20.760 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:07:20.761 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:07:20.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:20.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:20.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:20.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:20.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:20.782 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:20.782 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:20.782 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:20.782 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:20.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:20.828 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:20.828 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:20.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:20.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:20.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:20.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:20.887 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:20.887 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:20.903 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:20.903 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:20.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:20.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:20.905 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:20.905 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:20.905 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:20.905 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:20.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:20.966 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:20.966 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:20.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:20.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:21.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:21.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:21.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:21.025 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:21.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:21.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:21.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:21.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:21.044 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:21.044 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:21.044 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:21.044 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:21.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:21.049 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:21.049 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:21.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:21.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:21.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:21.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:21.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:21.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:21.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:21.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:21.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:21.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:21.156 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:21.156 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:21.156 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:21.156 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:21.194 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:07:21.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:21.204 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:21.204 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:21.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:21.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:21.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:07:21.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:07:21.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:07:21.243 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:07:21.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:21.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:21.263 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:21.263 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:21.278 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:21.278 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:21.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:21.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:21.280 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:21.280 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:21.280 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:21.280 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:21.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:21.284 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:21.284 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:21.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:21.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:21.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:21.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:21.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:21.424 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:21.443 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:21.443 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:21.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:21.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:21.445 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:21.445 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:21.445 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:21.445 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:21.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:21.485 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:21.485 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:21.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:21.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:21.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:21.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:21.660 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:21.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:21.666 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:07:21.679 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:21.679 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:21.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:21.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:21.681 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:21.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:21.681 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:21.681 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:21.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:21.723 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:21.723 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:21.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:21.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:21.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:21.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:21.823 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:21.824 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:21.842 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:21.842 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:21.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:21.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:21.844 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:21.844 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:21.844 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:21.844 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:21.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:21.848 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:21.848 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:21.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:21.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:22.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:22.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:22.059 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:22.059 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:22.064 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:07:22.064 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:07:22.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:07:22.064 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:07:22.065 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:07:22.065 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:07:22.065 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:07:22.065 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:07:22.065 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:07:22.065 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:07:22.065 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:07:27.073 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:07:27.073 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:07:27.073 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:07:27.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:07:27.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:07:27.073 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:07:27.083 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:07:27.086 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:07:27.086 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:07:27.086 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:07:27.086 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:07:27.091 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:07:27.091 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:07:27.092 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:07:27.092 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:07:27.092 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:07:27.093 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:07:27.093 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:07:27.093 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:07:27.096 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:07:27.097 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:07:27.097 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:07:27.097 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:07:27.097 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:07:27.098 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:07:27.098 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:07:27.098 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:07:27.101 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:07:27.101 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:07:27.101 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:07:27.101 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:07:27.102 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:07:27.102 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:07:27.102 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:07:27.102 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:07:27.106 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:07:27.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:07:27.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:07:27.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:07:27.106 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:07:27.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:07:27.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:07:27.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:07:27.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:07:27.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:27.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:27.107 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:07:27.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:27.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:27.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:27.107 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:07:27.107 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:07:27.107 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:07:27.107 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:07:27.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:27.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:27.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:27.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:07:27.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:27.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:27.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:27.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:27.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:27.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:27.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:27.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:27.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:27.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:27.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:27.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:27.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:27.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:27.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:27.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:27.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:27.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:27.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:27.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:27.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:27.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:27.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:27.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:27.112 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:07:27.592 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:07:27.627 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:07:27.629 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:07:27.630 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:07:27.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:27.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:27.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:27.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:27.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:27.649 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:27.649 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:27.650 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:27.650 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:27.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:27.697 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:27.698 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:27.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:27.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:28.064 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:07:28.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:07:28.111 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:07:28.111 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:07:28.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:07:28.535 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:07:28.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:28.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:28.559 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:28.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:28.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:28.580 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:28.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:28.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:28.582 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:28.582 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:28.582 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:28.582 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:28.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:28.636 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:28.636 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:28.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:28.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:29.006 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:07:29.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:07:29.112 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:07:29.112 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:07:29.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:07:29.477 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:07:29.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:29.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:29.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:29.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:29.540 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:29.540 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:29.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:29.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:29.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:29.542 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:29.542 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:29.542 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:29.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:29.576 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:29.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:29.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:29.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:29.948 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:07:30.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:07:30.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:07:30.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:07:30.114 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:07:30.421 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:07:30.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:30.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:30.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:30.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:30.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:30.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:30.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:30.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:30.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:30.739 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:30.739 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:30.739 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:30.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:30.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:30.743 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:30.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:30.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:30.893 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:07:31.114 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:07:31.115 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:07:31.115 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:07:31.115 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:07:31.365 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:07:31.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:31.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:31.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:31.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:31.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:31.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:31.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:31.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:31.702 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:31.702 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:31.702 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:31.702 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:31.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:31.750 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:31.750 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:31.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:31.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:31.836 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:07:32.116 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:07:32.117 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:07:32.117 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:07:32.117 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:07:32.310 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:07:32.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:32.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:32.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:32.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:32.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:32.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:32.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:32.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:32.368 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:32.368 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:32.368 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:32.368 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:32.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:32.409 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:32.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:32.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:32.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:32.782 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:07:33.254 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:07:33.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:33.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:33.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:33.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:33.316 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:33.316 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:33.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:33.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:33.318 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:33.318 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:33.318 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:33.318 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:33.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:33.355 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:33.355 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:33.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:33.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:33.725 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:07:34.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:34.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:34.192 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:34.192 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:34.199 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:07:34.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:34.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:34.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:34.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:34.213 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:34.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:34.213 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:34.213 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:34.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:34.253 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:34.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:34.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:34.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:34.671 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:07:35.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:35.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:35.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:35.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:35.143 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:07:35.150 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:07:35.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:07:35.151 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:07:35.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:07:35.156 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:07:35.157 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:07:35.157 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:07:35.157 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:07:35.157 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:07:35.158 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:07:35.158 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:07:35.158 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1738 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:35.158 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1738 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:35.158 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1738 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:35.158 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1738 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:35.158 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1738 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:35.158 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1738 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:35.158 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1739 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:35.158 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1739 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:35.158 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1739 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:35.158 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1739 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:35.158 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1739 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:35.158 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1739 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:35.158 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1739 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:35.158 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1739 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:40.157 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:07:40.157 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:07:40.157 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:07:40.157 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:07:40.157 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:07:40.157 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:07:40.166 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:07:40.167 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:07:40.167 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:07:40.168 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:07:40.168 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:07:40.172 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:07:40.172 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:07:40.172 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:07:40.173 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:07:40.173 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:07:40.173 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:07:40.173 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:07:40.173 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:07:40.175 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:07:40.176 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:07:40.176 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:07:40.176 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:07:40.176 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:07:40.176 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:07:40.176 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:07:40.176 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:07:40.178 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:07:40.179 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:07:40.179 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:07:40.179 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:07:40.179 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:07:40.179 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:07:40.179 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:07:40.179 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:07:40.182 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:07:40.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:07:40.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:07:40.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:07:40.183 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:07:40.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:07:40.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:07:40.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:07:40.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:07:40.183 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:07:40.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:40.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:40.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:40.183 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:07:40.183 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:07:40.183 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:07:40.183 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:07:40.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:40.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:40.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:40.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:07:40.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:40.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:40.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:40.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:40.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:40.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:40.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:40.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:40.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:40.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:40.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:40.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:40.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:40.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:40.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:40.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:40.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:40.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:40.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:40.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:40.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:40.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:40.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:40.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:40.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:40.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:40.188 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:07:40.666 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:07:40.702 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:07:40.703 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:07:40.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:40.705 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:07:40.722 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:40.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:40.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:40.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:40.728 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:40.728 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:40.729 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:40.729 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:40.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:40.772 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:40.773 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:40.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:40.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:40.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:40.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:40.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:40.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:40.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:40.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:40.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:40.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:40.910 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:40.910 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:40.910 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:40.910 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:40.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:40.960 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:40.960 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:40.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:40.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:41.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:41.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:41.129 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:41.129 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:41.139 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:07:41.148 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:41.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:41.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:41.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:41.150 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:41.150 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:41.150 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:41.150 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:41.187 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:07:41.187 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:07:41.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:41.188 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:07:41.188 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:07:41.195 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:41.196 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:41.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:41.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:41.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:41.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:41.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:41.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:41.388 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:41.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:41.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:41.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:41.389 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:41.390 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:41.390 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:41.390 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:41.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:41.436 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:41.437 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:41.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:41.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:41.610 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:07:41.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:41.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:41.765 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:41.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:41.776 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:07:41.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:07:41.776 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:07:41.776 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:07:41.778 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:07:41.778 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:07:41.778 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:07:41.778 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:07:41.778 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:07:41.778 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:07:41.778 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:07:46.783 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:07:46.783 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:07:46.783 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:07:46.783 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:07:46.783 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:07:46.783 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:07:46.791 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:07:46.791 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:07:46.792 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:07:46.792 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:07:46.792 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:07:46.797 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:07:46.803 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:07:46.803 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:07:46.803 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:07:46.803 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:07:46.803 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:07:46.803 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:07:46.803 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:07:46.806 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:07:46.806 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:07:46.806 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:07:46.806 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:07:46.806 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:07:46.806 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:07:46.806 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:07:46.806 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:07:46.809 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:07:46.809 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:07:46.809 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:07:46.809 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:07:46.809 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:07:46.809 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:07:46.809 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:07:46.809 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:07:46.813 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:07:46.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:07:46.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:07:46.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:07:46.813 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:07:46.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:07:46.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:07:46.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:07:46.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:07:46.813 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:07:46.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:46.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:46.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:46.813 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:07:46.813 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:07:46.813 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:07:46.813 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:07:46.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:46.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:46.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:46.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:07:46.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:46.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:46.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:46.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:46.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:46.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:46.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:46.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:46.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:46.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:46.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:46.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:46.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:46.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:46.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:46.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:46.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:46.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:46.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:46.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:46.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:46.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:46.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:46.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:46.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:46.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:46.818 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:07:47.297 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:07:47.340 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:07:47.342 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:07:47.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:47.344 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:07:47.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:47.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:47.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:47.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:47.370 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:47.370 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:47.370 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:47.370 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:47.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:47.397 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:47.397 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:47.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:47.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:47.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:47.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:47.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:47.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:47.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:47.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:47.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:47.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:47.523 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:47.523 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:47.523 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:47.523 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:47.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:47.532 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:47.532 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:47.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:47.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:47.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:47.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:47.682 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:47.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:47.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:47.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:47.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:47.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:47.702 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:47.702 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:47.702 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:47.702 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:47.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:47.721 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:47.721 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:47.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:47.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:47.769 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:07:47.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:07:47.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:07:47.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:07:47.818 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:07:47.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:47.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:48.001 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:48.001 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:48.014 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:48.014 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:48.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:48.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:48.015 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:48.015 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:48.015 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:48.016 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:48.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:48.059 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:48.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:48.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:48.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:48.240 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:07:48.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:48.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:48.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:48.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:48.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:07:48.404 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:07:48.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:07:48.404 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:07:48.405 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:07:48.405 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:07:48.405 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:07:48.405 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:07:48.405 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:07:48.405 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:07:48.405 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:07:48.405 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=344 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:48.405 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=344 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:48.405 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=344 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:48.405 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=344 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:48.405 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=344 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:48.405 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=344 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:48.405 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=344 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:53.412 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:07:53.412 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:07:53.412 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:07:53.412 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:07:53.412 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:07:53.412 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:07:53.421 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:07:53.423 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:07:53.423 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:07:53.423 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:07:53.423 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:07:53.428 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:07:53.428 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:07:53.429 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:07:53.429 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:07:53.429 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:07:53.429 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:07:53.430 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:07:53.430 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:07:53.432 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:07:53.433 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:07:53.433 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:07:53.433 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:07:53.433 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:07:53.433 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:07:53.434 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:07:53.434 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:07:53.436 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:07:53.436 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:07:53.436 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:07:53.436 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:07:53.436 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:07:53.436 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:07:53.436 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:07:53.436 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:07:53.440 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:07:53.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:07:53.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:07:53.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:07:53.440 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:07:53.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:07:53.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:07:53.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:07:53.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:07:53.441 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:07:53.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:53.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:53.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:53.441 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:07:53.441 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:07:53.441 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:07:53.441 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:07:53.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:53.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:53.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:53.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:07:53.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:53.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:53.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:53.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:53.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:53.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:53.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:53.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:53.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:53.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:53.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:53.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:53.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:53.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:53.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:53.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:53.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:53.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:53.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:53.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:53.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:53.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:53.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:53.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:53.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:53.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:53.446 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:07:53.924 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:07:53.962 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:07:53.965 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:07:53.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:53.967 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:07:53.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:53.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:53.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:53.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:53.994 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:53.994 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:53.994 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:53.994 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:54.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:54.026 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:54.026 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:54.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:54.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:54.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:54.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:54.129 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:54.129 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:54.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:54.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:54.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:54.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:54.148 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:54.148 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:54.148 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:54.149 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:54.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:54.159 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:54.159 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:54.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:54.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:54.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:54.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:54.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:54.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:54.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:54.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:54.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:54.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:54.327 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:54.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:54.327 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:54.327 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:54.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:54.350 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:54.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:54.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:54.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:54.393 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:07:54.445 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:07:54.445 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:07:54.445 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:07:54.445 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:07:54.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:54.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:54.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:54.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:54.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:54.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:54.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:07:54.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:54.638 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:54.638 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:54.638 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:07:54.638 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:07:54.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:54.675 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:07:54.675 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:07:54.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:54.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:54.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:07:54.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:07:54.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:07:54.785 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:07:54.795 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:07:54.795 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:07:54.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:07:54.795 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:07:54.800 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:07:54.801 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:07:54.801 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:07:54.801 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:07:54.801 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:07:54.801 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:07:54.802 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:07:54.802 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=293 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:54.802 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=293 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:54.802 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:54.802 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:54.802 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:54.802 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:54.802 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:54.802 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:54.802 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:54.802 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:07:59.803 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:07:59.803 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:07:59.803 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:07:59.803 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:07:59.803 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:07:59.803 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:07:59.811 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:07:59.813 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:07:59.813 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:07:59.813 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:07:59.813 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:07:59.817 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:07:59.817 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:07:59.818 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:07:59.818 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:07:59.818 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:07:59.818 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:07:59.819 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:07:59.819 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:07:59.821 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:07:59.821 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:07:59.821 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:07:59.821 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:07:59.821 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:07:59.822 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:07:59.822 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:07:59.822 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:07:59.824 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:07:59.824 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:07:59.824 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:07:59.824 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:07:59.824 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:07:59.824 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:07:59.824 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:07:59.824 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:07:59.828 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:07:59.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:07:59.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:07:59.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:07:59.828 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:07:59.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:07:59.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:07:59.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:07:59.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:07:59.828 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:07:59.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:59.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:59.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:59.828 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:07:59.828 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:07:59.828 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:07:59.828 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:07:59.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:59.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:59.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:59.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:07:59.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:59.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:59.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:59.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:59.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:59.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:59.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:59.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:59.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:59.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:59.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:59.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:59.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:59.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:59.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:59.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:59.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:59.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:59.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:59.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:59.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:59.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:07:59.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:59.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:07:59.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:07:59.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:07:59.833 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:08:00.311 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:08:00.352 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:08:00.354 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:08:00.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:00.356 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:08:00.372 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:00.372 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:00.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:08:00.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:00.377 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:00.377 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:00.378 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:08:00.378 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:08:00.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:00.417 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:00.418 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:00.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:00.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:00.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:00.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:00.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:00.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:00.552 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:00.552 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:00.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:08:00.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:00.554 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:00.554 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:00.554 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:08:00.554 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:08:00.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:00.604 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:00.604 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:00.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:00.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:00.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:00.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:00.774 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:00.774 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:00.784 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:08:00.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:00.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:00.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:08:00.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:00.793 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:00.793 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:00.793 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:08:00.793 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:08:00.831 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:08:00.831 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:08:00.831 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:08:00.831 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:08:00.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:00.839 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:00.840 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:00.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:00.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:01.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:01.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:01.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:01.014 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:01.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:01.032 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:01.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:08:01.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:01.034 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:01.034 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:01.034 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:08:01.034 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:08:01.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:01.069 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:01.069 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:01.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:01.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:01.255 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:08:01.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:01.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:01.413 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:01.413 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:01.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:08:01.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:08:01.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:08:01.424 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:08:01.429 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:08:01.430 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:08:01.430 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:08:01.430 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:08:01.431 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:08:01.431 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:08:01.431 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:08:01.431 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=344 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:01.431 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=345 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:01.431 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=345 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:01.431 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=345 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:01.432 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=345 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:01.432 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=345 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:01.432 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=345 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:01.432 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=345 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:01.432 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=345 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:01.432 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=346 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:01.432 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=346 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:01.432 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=346 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:01.432 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=346 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:01.432 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=346 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:01.432 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=346 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:01.432 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=346 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:01.433 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=346 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:06.434 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:08:06.434 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:08:06.434 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:08:06.434 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:08:06.434 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:08:06.434 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:08:06.442 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:08:06.443 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:08:06.443 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:08:06.444 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:08:06.444 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:08:06.447 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:08:06.447 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:08:06.448 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:08:06.448 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:08:06.448 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:08:06.448 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:08:06.449 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:08:06.449 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:08:06.451 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:08:06.451 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:08:06.451 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:08:06.451 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:08:06.451 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:08:06.451 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:08:06.452 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:08:06.452 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:08:06.454 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:08:06.454 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:08:06.454 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:08:06.454 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:08:06.454 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:08:06.454 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:08:06.454 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:08:06.454 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:08:06.458 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:08:06.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:08:06.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:08:06.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:08:06.458 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:08:06.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:08:06.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:08:06.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:08:06.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:08:06.458 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:08:06.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:06.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:06.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:06.458 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:08:06.458 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:08:06.458 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:08:06.458 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:08:06.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:06.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:06.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:06.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:08:06.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:06.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:06.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:06.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:06.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:06.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:06.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:06.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:06.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:06.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:06.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:06.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:06.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:06.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:06.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:06.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:06.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:06.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:06.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:06.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:06.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:06.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:06.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:06.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:06.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:06.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:06.463 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:08:06.941 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:08:06.984 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:08:06.986 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:08:06.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:06.988 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:08:07.006 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:07.006 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:07.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:08:07.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:07.013 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:07.014 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:07.014 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:08:07.014 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:08:07.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:07.044 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:07.044 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:07.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:07.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:07.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:07.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:07.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:07.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:07.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:07.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:07.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:08:07.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:07.382 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:07.382 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:07.382 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:08:07.382 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:08:07.409 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:08:07.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:07.426 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:07.426 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:07.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:07.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:07.461 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:08:07.462 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:08:07.462 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:08:07.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:08:07.880 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:08:07.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:07.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:07.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:07.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:07.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:07.957 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:07.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:08:07.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:07.960 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:07.960 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:07.961 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:08:07.961 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:08:07.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:07.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:07.971 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:07.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:07.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:08.354 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:08:08.462 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:08:08.462 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:08:08.463 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:08:08.463 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:08:08.826 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:08:08.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:08.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:08.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:08.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:09.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:09.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:09.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:08:09.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:09.006 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:09.006 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:09.006 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:08:09.006 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:08:09.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:09.009 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:09.009 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:09.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:09.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:09.298 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:08:09.462 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:08:09.463 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:08:09.463 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:08:09.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:08:09.769 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:08:10.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:10.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:10.092 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:10.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:10.103 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:08:10.104 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:08:10.104 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:08:10.104 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:08:10.105 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:08:10.105 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:08:10.105 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:08:10.105 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:08:10.105 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:08:10.105 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:08:10.105 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:08:10.105 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=789 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:10.105 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=789 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:10.105 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=789 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:10.105 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=789 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:10.105 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=789 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:10.106 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=789 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:15.112 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:08:15.112 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:08:15.112 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:08:15.112 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:08:15.112 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:08:15.112 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:08:15.123 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:08:15.125 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:08:15.125 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:08:15.125 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:08:15.126 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:08:15.132 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:08:15.132 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:08:15.132 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:08:15.132 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:08:15.132 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:08:15.132 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:08:15.133 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:08:15.133 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:08:15.137 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:08:15.137 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:08:15.137 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:08:15.137 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:08:15.137 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:08:15.138 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:08:15.138 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:08:15.138 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:08:15.142 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:08:15.142 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:08:15.142 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:08:15.142 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:08:15.142 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:08:15.142 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:08:15.142 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:08:15.142 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:08:15.148 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:08:15.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:08:15.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:08:15.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:08:15.148 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:08:15.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:08:15.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:08:15.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:08:15.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:08:15.149 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:08:15.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:15.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:15.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:15.149 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:08:15.149 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:08:15.149 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:08:15.149 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:08:15.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:15.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:15.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:15.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:08:15.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:15.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:15.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:15.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:15.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:15.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:15.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:15.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:15.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:15.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:15.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:15.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:15.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:15.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:15.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:15.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:15.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:15.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:15.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:15.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:15.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:15.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:15.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:15.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:15.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:15.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:15.154 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:08:15.632 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:08:15.673 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:08:15.674 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:08:15.675 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:08:15.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:15.688 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:15.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:15.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:08:15.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:15.689 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:15.689 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:15.689 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:08:15.689 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:08:15.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:15.736 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:15.736 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:15.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:15.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:16.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:16.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:16.051 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:16.052 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:16.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:16.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:16.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:08:16.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:16.070 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:16.070 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:16.071 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:08:16.071 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:08:16.102 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:08:16.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:16.114 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:16.115 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:16.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:16.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:16.152 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:08:16.153 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:08:16.153 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:08:16.153 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:08:16.575 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:08:16.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:16.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:16.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:16.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:16.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:16.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:16.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:08:16.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:16.656 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:16.656 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:16.656 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:08:16.656 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:08:16.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:16.668 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:16.668 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:16.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:16.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:17.047 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:08:17.153 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:08:17.154 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:08:17.154 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:08:17.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:08:17.518 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:08:17.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:17.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:17.676 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:17.676 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:17.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:17.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:17.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:08:17.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:17.696 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:17.697 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:17.697 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:08:17.697 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:08:17.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:17.700 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:17.700 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:17.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:17.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:17.991 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:08:18.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:08:18.155 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:08:18.155 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:08:18.155 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:08:18.464 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:08:18.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:18.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:18.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:18.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:18.797 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:08:18.797 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:08:18.797 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:08:18.797 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:08:18.798 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:08:18.798 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:08:18.798 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:08:18.798 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:08:18.798 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:08:18.798 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:08:18.798 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:08:18.798 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=788 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:18.798 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=788 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:18.799 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=788 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:23.806 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:08:23.806 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:08:23.806 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:08:23.806 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:08:23.806 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:08:23.806 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:08:23.815 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:08:23.817 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:08:23.817 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:08:23.817 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:08:23.817 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:08:23.821 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:08:23.822 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:08:23.822 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:08:23.822 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:08:23.822 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:08:23.822 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:08:23.822 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:08:23.822 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:08:23.827 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:08:23.827 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:08:23.827 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:08:23.827 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:08:23.827 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:08:23.827 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:08:23.827 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:08:23.827 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:08:23.831 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:08:23.832 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:08:23.832 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:08:23.832 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:08:23.832 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:08:23.832 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:08:23.832 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:08:23.832 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:08:23.838 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:08:23.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:08:23.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:08:23.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:08:23.838 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:08:23.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:08:23.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:08:23.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:08:23.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:08:23.839 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:08:23.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:23.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:23.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:23.839 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:08:23.839 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:08:23.839 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:08:23.839 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:08:23.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:23.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:23.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:23.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:08:23.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:23.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:23.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:23.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:23.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:23.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:23.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:23.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:23.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:23.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:23.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:23.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:23.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:23.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:23.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:23.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:23.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:23.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:23.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:23.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:23.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:23.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:23.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:23.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:23.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:23.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:23.844 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:08:24.321 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:08:24.374 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:08:24.376 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:08:24.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:24.378 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:08:24.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:24.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:24.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:08:24.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:24.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:24.408 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:24.408 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:08:24.408 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:08:24.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:24.421 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:24.421 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:24.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:24.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:24.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:24.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:24.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:24.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:24.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:24.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:24.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:08:24.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:24.759 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:24.759 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:24.759 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:08:24.759 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:08:24.794 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:08:24.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:24.803 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:24.803 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:24.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:24.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:24.844 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:08:24.845 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:08:24.845 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:08:24.845 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:08:25.265 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:08:25.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:25.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:25.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:25.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:25.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:25.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:25.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:08:25.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:25.302 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:25.302 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:25.302 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:08:25.302 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:08:25.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:25.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:25.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:25.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:25.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:25.736 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:08:25.845 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:08:25.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:08:25.846 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:08:25.846 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:08:26.209 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:08:26.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:26.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:26.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:26.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:26.383 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:26.383 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:26.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:08:26.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:26.386 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:26.386 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:26.386 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:08:26.386 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:08:26.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:26.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:26.452 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:26.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:26.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:26.680 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:08:26.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:08:26.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:08:26.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:08:26.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:08:27.152 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:08:27.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:27.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:27.475 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:27.475 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:27.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:08:27.485 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:08:27.485 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:08:27.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:08:27.487 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:08:27.487 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:08:27.487 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:08:27.487 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:08:27.487 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:08:27.487 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:08:27.487 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:08:27.487 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=787 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:27.488 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=787 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:27.488 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=787 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:27.488 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=787 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:27.488 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=788 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:27.488 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=788 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:27.488 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=788 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:27.488 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=788 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:27.488 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=788 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:27.488 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=788 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:27.488 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=788 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:27.489 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=788 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:32.492 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:08:32.492 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:08:32.492 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:08:32.492 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:08:32.492 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:08:32.492 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:08:32.499 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:08:32.500 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:08:32.500 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:08:32.500 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:08:32.500 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:08:32.503 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:08:32.503 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:08:32.503 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:08:32.503 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:08:32.503 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:08:32.504 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:08:32.504 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:08:32.504 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:08:32.506 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:08:32.506 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:08:32.506 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:08:32.506 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:08:32.506 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:08:32.506 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:08:32.507 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:08:32.507 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:08:32.508 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:08:32.508 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:08:32.508 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:08:32.508 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:08:32.509 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:08:32.509 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:08:32.509 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:08:32.509 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:08:32.512 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:08:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:08:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:08:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:08:32.512 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:08:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:08:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:08:32.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:08:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:08:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:32.512 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:08:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:32.512 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:08:32.512 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:08:32.512 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:08:32.512 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:08:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:32.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:08:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:32.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:32.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:32.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:32.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:32.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:32.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:32.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:32.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:32.517 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:08:32.995 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:08:33.034 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:08:33.036 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:08:33.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:33.038 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:08:33.055 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:33.055 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:33.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:08:33.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:33.062 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:33.062 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:33.062 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:08:33.062 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:08:33.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:33.100 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:33.101 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:33.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:33.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:33.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:33.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:33.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:33.416 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:33.434 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:33.434 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:33.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:08:33.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:33.436 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:33.436 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:33.436 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:08:33.436 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:08:33.468 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:08:33.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:33.476 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:33.477 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:33.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:33.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:33.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:08:33.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:08:33.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:08:33.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:08:33.940 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:08:33.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:33.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:33.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:33.957 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:33.976 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:33.976 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:33.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:08:33.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:33.978 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:33.979 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:33.979 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:08:33.979 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:08:33.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:33.982 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:33.982 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:33.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:33.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:34.412 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:08:34.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:08:34.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:08:34.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:08:34.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:08:34.885 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:08:35.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:35.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:35.046 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:35.046 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:35.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:35.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:35.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:08:35.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:35.067 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:35.068 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:35.068 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:08:35.068 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:08:35.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:35.128 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:08:35.128 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:08:35.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:35.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:35.357 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:08:35.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:08:35.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:08:35.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:08:35.517 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:08:35.828 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:08:36.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:36.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:08:36.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:36.150 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:36.160 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:08:36.160 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:08:36.160 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:08:36.160 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:08:36.165 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:08:36.166 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:08:36.166 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:08:36.166 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:08:36.167 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:08:36.167 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:08:36.167 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:08:36.167 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=788 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:36.167 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=788 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:36.167 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=788 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:36.167 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=788 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:36.168 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=789 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:36.168 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=789 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:36.168 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=789 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:36.168 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=789 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:36.168 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=789 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:36.168 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=789 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:36.168 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=789 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:36.168 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=789 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:41.168 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:08:41.168 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:08:41.168 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:08:41.168 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:08:41.168 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:08:41.168 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:08:41.175 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:08:41.175 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:08:41.176 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:08:41.176 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:08:41.176 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:08:41.178 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:08:41.178 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:08:41.179 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:08:41.179 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:08:41.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:08:41.179 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:08:41.179 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:08:41.179 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:08:41.181 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:08:41.181 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:08:41.181 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:08:41.181 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:08:41.181 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:08:41.182 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:08:41.182 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:08:41.182 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:08:41.183 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:08:41.183 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:08:41.183 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:08:41.183 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:08:41.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:08:41.184 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:08:41.184 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:08:41.184 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:08:41.186 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:08:41.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:08:41.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:08:41.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:08:41.187 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:08:41.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:08:41.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:08:41.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:08:41.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:08:41.187 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:08:41.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:41.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:41.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:41.187 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:08:41.187 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:08:41.187 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:08:41.187 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:08:41.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:41.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:41.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:41.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:08:41.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:41.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:41.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:41.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:41.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:41.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:41.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:41.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:41.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:41.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:41.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:41.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:41.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:41.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:41.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:41.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:41.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:41.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:41.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:41.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:41.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:41.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:41.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:41.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:41.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:41.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:41.192 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:08:41.668 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:08:41.707 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:08:41.708 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:08:41.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:41.709 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:08:41.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:41.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:41.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:08:41.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:08:41.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:08:41.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:08:41.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:08:41.761 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:08:41.761 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:08:41.761 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:08:41.761 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:08:41.761 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:08:41.761 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:08:41.761 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:08:41.761 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:41.761 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:41.761 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:41.761 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:41.761 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:41.761 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:41.761 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:41.761 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:41.761 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:41.761 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:41.762 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:41.762 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:46.764 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:08:46.765 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:08:46.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:08:46.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:08:46.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:08:46.765 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:08:46.772 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:08:46.773 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:08:46.773 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:08:46.773 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:08:46.773 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:08:46.776 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:08:46.777 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:08:46.777 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:08:46.777 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:08:46.777 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:08:46.777 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:08:46.778 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:08:46.778 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:08:46.780 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:08:46.780 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:08:46.780 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:08:46.780 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:08:46.780 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:08:46.780 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:08:46.780 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:08:46.780 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:08:46.782 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:08:46.782 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:08:46.782 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:08:46.783 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:08:46.783 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:08:46.783 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:08:46.783 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:08:46.783 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:08:46.786 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:08:46.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:08:46.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:08:46.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:08:46.786 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:08:46.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:08:46.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:08:46.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:08:46.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:08:46.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:46.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:46.786 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:08:46.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:46.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:46.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:46.786 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:08:46.786 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:08:46.786 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:08:46.786 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:08:46.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:46.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:46.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:46.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:08:46.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:46.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:46.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:46.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:46.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:46.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:46.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:46.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:46.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:46.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:46.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:46.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:46.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:46.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:46.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:46.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:46.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:46.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:46.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:46.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:46.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:46.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:46.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:46.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:46.791 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:08:47.269 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:08:47.306 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:08:47.307 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:08:47.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:47.308 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:08:47.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:47.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:47.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:08:47.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:47.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:47.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:08:47.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:47.402 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:08:47.402 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:08:47.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:08:47.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:08:47.403 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:08:47.403 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:08:47.403 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:08:47.403 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:08:47.403 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:08:47.403 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:08:47.403 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:08:47.403 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=133 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:47.404 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=133 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:47.404 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=133 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:47.404 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=133 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:47.404 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=133 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:47.404 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=133 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:08:52.410 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:08:52.410 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:08:52.410 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:08:52.410 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:08:52.410 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:08:52.410 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:08:52.420 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:08:52.422 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:08:52.422 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:08:52.423 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:08:52.423 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:08:52.428 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:08:52.429 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:08:52.429 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:08:52.429 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:08:52.430 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:08:52.430 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:08:52.431 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:08:52.431 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:08:52.434 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:08:52.434 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:08:52.435 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:08:52.435 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:08:52.435 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:08:52.435 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:08:52.435 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:08:52.435 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:08:52.438 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:08:52.439 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:08:52.439 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:08:52.439 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:08:52.439 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:08:52.439 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:08:52.440 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:08:52.440 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:08:52.444 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:08:52.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:08:52.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:08:52.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:08:52.444 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:08:52.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:08:52.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:08:52.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:08:52.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:08:52.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:52.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:52.445 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:08:52.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:52.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:52.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:52.445 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:08:52.445 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:08:52.445 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:08:52.445 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:08:52.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:52.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:52.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:52.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:08:52.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:52.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:52.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:52.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:52.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:52.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:52.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:52.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:52.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:52.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:52.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:52.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:52.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:52.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:52.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:52.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:52.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:52.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:52.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:52.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:52.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:52.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:52.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:52.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:52.450 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:08:52.928 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:08:52.971 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:08:52.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:08:52.974 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:08:52.976 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:08:52.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:08:52.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:08:52.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:08:53.018 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:08:53.018 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:08:53.018 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:08:53.018 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:08:53.020 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:08:53.020 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:08:53.020 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:08:53.020 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:08:53.020 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:08:53.020 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:08:53.020 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:08:58.028 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:08:58.028 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:08:58.028 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:08:58.028 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:08:58.028 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:08:58.028 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:08:58.034 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:08:58.035 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:08:58.035 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:08:58.035 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:08:58.035 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:08:58.038 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:08:58.038 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:08:58.038 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:08:58.038 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:08:58.038 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:08:58.039 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:08:58.039 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:08:58.039 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:08:58.042 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:08:58.042 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:08:58.042 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:08:58.042 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:08:58.042 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:08:58.042 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:08:58.042 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:08:58.042 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:08:58.045 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:08:58.045 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:08:58.045 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:08:58.045 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:08:58.045 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:08:58.045 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:08:58.045 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:08:58.045 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:08:58.050 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:08:58.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:08:58.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:08:58.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:08:58.050 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:08:58.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:08:58.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:08:58.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:08:58.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:08:58.050 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:08:58.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:58.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:58.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:58.050 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:08:58.050 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:08:58.050 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:08:58.050 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:08:58.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:58.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:58.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:58.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:08:58.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:58.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:58.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:58.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:58.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:58.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:58.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:58.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:58.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:58.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:58.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:58.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:58.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:58.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:58.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:58.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:58.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:58.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:58.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:58.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:08:58.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:58.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:58.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:58.053 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:08:58.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:08:58.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:08:58.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:08:58.053 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:08:58.053 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:08:58.053 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:08:58.053 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:08:58.053 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:08:58.053 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:09:03.062 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:09:03.062 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:09:03.062 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:09:03.062 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:09:03.062 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:09:03.062 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:09:03.071 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:09:03.072 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:09:03.072 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:09:03.072 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:09:03.072 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:09:03.075 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:09:03.075 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:09:03.076 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:09:03.076 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:09:03.076 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:09:03.076 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:09:03.077 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:09:03.077 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:09:03.079 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:09:03.079 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:09:03.079 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:09:03.079 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:09:03.079 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:09:03.079 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:09:03.079 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:09:03.079 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:09:03.082 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:09:03.082 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:09:03.082 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:09:03.082 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:09:03.082 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:09:03.082 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:09:03.082 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:09:03.082 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:09:03.085 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:09:03.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:09:03.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:09:03.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:09:03.085 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:09:03.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:09:03.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:09:03.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:09:03.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:09:03.086 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:09:03.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:09:03.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:09:03.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:09:03.086 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:09:03.086 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:09:03.086 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:09:03.086 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:09:03.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:09:03.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:09:03.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:09:03.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:09:03.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:09:03.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:09:03.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:09:03.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:09:03.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:09:03.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:09:03.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:09:03.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:09:03.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:09:03.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:09:03.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:09:03.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:09:03.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:09:03.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:09:03.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:09:03.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:09:03.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:09:03.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:09:03.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:09:03.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:09:03.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:09:03.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:09:03.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:09:03.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:09:03.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:09:03.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:09:03.091 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:09:03.569 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:09:03.610 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:09:03.612 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:09:03.614 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:09:03.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:03.638 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:03.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:03.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:09:03.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:03.641 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:03.641 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:03.642 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:09:03.642 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:09:03.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:03.670 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:03.670 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:03.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:03.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:04.040 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:09:04.088 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:09:04.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:09:04.097 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:09:04.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:09:04.512 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:09:04.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:04.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:04.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:04.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:04.644 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:04.644 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:04.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:09:04.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:04.646 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:04.646 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:04.646 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:09:04.646 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:09:04.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:04.649 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:04.649 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:04.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:04.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:04.984 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:09:05.090 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:09:05.097 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:09:05.098 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:09:05.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:09:05.456 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:09:05.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:05.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:05.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:05.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:05.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:05.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:05.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:09:05.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:05.607 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:05.607 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:05.607 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:09:05.607 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:09:05.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:05.646 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:05.646 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:05.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:05.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:05.928 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:09:06.092 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:09:06.098 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:09:06.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:09:06.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:09:06.401 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:09:06.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:06.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:06.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:06.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:06.577 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:06.577 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:06.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:09:06.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:06.579 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:06.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:06.579 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:09:06.579 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:09:06.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:06.584 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:06.584 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:06.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:06.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:06.873 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:09:07.093 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:09:07.100 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:09:07.100 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:09:07.100 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:09:07.344 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:09:07.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:07.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:07.522 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:07.522 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:07.542 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:07.542 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:07.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:09:07.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:07.544 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:07.544 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:07.544 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:09:07.544 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:09:07.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:07.590 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:07.591 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:07.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:07.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:07.815 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:09:08.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:09:08.101 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:09:08.101 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:09:08.101 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:09:08.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:08.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:08.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:08.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:08.134 [WARNING] transceiver.py:257 (MS@172.18.152.22:6700) RX TRXD message (fn=1091 tn=6 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:09:08.151 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:08.152 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:08.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:09:08.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:08.153 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:08.153 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:08.153 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:09:08.153 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:09:08.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:08.199 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:08.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:08.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:08.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:08.286 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:09:08.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:08.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:08.757 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:09:08.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:08.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:08.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:08.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:08.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:09:08.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:08.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:08.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:08.778 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:09:08.778 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:09:08.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:08.810 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:08.811 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:08.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:08.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:09.230 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:09:09.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:09.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:09.357 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:09.358 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:09.372 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:09.372 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:09.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:09:09.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:09.374 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:09.374 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:09.374 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:09:09.374 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:09:09.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:09:09.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:09.421 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:09.421 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:09.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:09.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:09.703 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:09:10.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:10.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:10.019 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:10.019 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:10.037 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:10.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:10.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:09:10.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:10.039 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:10.039 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:10.039 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:09:10.039 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:09:10.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:10.087 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:10.088 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:10.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:10.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:10.175 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:09:10.646 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:09:10.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:10.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:10.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:10.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:10.679 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:10.679 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:10.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:09:10.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:10.681 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:10.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:10.681 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:09:10.681 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:09:10.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:09:10.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:10.690 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:10.690 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:10.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:10.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:11.117 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:09:11.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:11.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:11.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:11.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:11.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:11.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:11.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:09:11.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:11.262 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:11.262 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:11.262 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:09:11.262 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:09:11.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:11.311 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:11.311 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:11.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:11.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:11.590 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:09:11.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:11.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:11.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:11.898 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:11.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:11.916 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:11.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:09:11.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:11.917 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:11.917 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:11.917 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:09:11.917 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:09:11.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:11.969 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:11.970 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:11.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:11.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:12.063 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:09:12.535 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:09:12.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:12.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:12.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:12.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:12.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:12.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:12.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:09:12.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:12.606 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:12.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:12.606 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:09:12.606 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:09:12.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:12.632 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:12.632 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:12.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:12.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:13.008 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:09:13.481 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:09:13.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:13.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:13.488 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:13.488 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:13.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:13.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:13.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:09:13.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:13.508 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:13.508 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:13.508 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:09:13.508 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:09:13.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:13.532 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:13.532 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:13.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:13.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:13.953 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:09:14.424 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:09:14.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:14.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:14.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:14.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:14.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:14.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:14.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:09:14.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:14.474 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:14.474 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:14.474 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:09:14.474 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:09:14.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:14.525 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:14.526 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:14.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:14.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:14.897 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:09:15.370 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:09:15.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:15.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:15.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:15.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:15.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:15.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:15.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:09:15.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:15.440 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:15.440 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:15.440 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:09:15.440 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:09:15.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:15.467 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:15.467 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:15.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:15.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:15.842 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:09:16.313 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:09:16.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:16.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:16.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:16.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:16.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:16.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:16.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:09:16.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:16.390 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:16.390 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:16.390 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:09:16.390 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:09:16.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:16.407 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:16.407 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:16.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:16.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:16.786 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:09:17.258 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:09:17.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:17.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:17.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:17.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:17.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:17.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:17.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:09:17.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:17.364 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:17.364 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:17.364 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:09:17.364 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:09:17.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:17.407 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:17.407 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:17.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:17.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:17.730 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:09:18.202 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:09:18.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:18.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:18.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:18.304 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:18.319 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:18.320 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:18.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:09:18.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:18.322 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:18.322 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:18.322 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:09:18.322 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:09:18.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:18.343 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:18.343 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:18.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:18.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:18.675 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 04:09:19.148 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 04:09:19.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:19.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:19.272 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:19.272 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:19.281 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:19.281 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:19.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:09:19.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:19.283 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:19.283 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:19.283 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:09:19.283 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:09:19.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:19.343 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:19.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:19.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:19.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:19.620 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 04:09:20.091 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 04:09:20.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:20.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:20.231 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:20.231 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:20.237 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:09:20.237 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:09:20.237 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:09:20.237 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:09:20.238 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:09:20.238 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:09:20.238 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:09:20.238 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:09:20.238 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:09:20.238 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:09:20.238 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:09:20.238 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3706 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:09:20.238 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3706 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:09:20.238 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3706 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:09:20.238 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3706 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:09:20.238 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3706 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:09:20.238 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3706 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:09:25.246 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:09:25.246 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:09:25.246 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:09:25.246 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:09:25.246 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:09:25.246 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:09:25.255 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:09:25.256 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:09:25.256 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:09:25.256 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:09:25.256 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:09:25.261 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:09:25.261 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:09:25.261 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:09:25.261 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:09:25.262 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:09:25.262 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:09:25.262 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:09:25.262 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:09:25.266 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:09:25.266 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:09:25.266 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:09:25.266 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:09:25.267 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:09:25.267 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:09:25.267 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:09:25.267 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:09:25.271 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:09:25.271 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:09:25.271 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:09:25.271 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:09:25.271 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:09:25.271 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:09:25.271 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:09:25.271 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:09:25.277 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:09:25.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:09:25.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:09:25.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:09:25.277 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:09:25.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:09:25.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:09:25.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:09:25.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:09:25.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:09:25.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:09:25.278 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:09:25.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:09:25.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:09:25.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:09:25.278 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:09:25.278 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:09:25.278 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:09:25.278 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:09:25.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:09:25.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:09:25.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:09:25.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:09:25.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:09:25.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:09:25.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:09:25.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:09:25.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:09:25.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:09:25.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:09:25.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:09:25.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:09:25.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:09:25.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:09:25.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:09:25.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:09:25.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:09:25.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:09:25.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:09:25.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:09:25.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:09:25.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:09:25.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:09:25.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:09:25.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:09:25.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:09:25.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:09:25.283 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:09:25.760 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:09:25.805 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:09:25.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:25.807 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:09:25.808 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:09:25.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:25.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:25.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:09:25.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:25.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:25.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:25.834 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:09:25.834 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:09:25.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:25.864 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:25.864 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:25.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:25.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:26.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:26.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:26.109 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:26.109 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:26.118 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:26.118 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:26.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:09:26.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:26.119 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:26.119 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:26.119 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:09:26.119 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:09:26.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:26.136 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:26.137 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:26.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:26.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:26.230 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:09:26.282 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:09:26.282 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:09:26.283 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:09:26.283 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:09:26.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:26.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:26.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:26.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:26.376 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:26.376 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:26.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:09:26.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:26.377 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:26.377 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:26.377 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:09:26.377 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:09:26.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:26.422 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:26.422 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:26.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:26.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:26.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:26.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:26.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:26.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:26.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:26.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:26.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:09:26.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:26.638 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:26.639 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:26.639 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:09:26.639 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:09:26.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:26.645 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:09:26.645 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:09:26.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:26.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:26.702 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:09:26.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:09:26.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:09:26.875 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:09:26.875 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:09:26.883 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:09:26.883 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:09:26.883 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:09:26.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:09:26.884 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:09:26.884 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:09:26.884 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:09:26.884 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:09:26.884 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:09:26.884 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:09:26.884 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:09:26.884 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=348 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:09:26.884 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=348 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:09:26.884 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=348 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:09:31.891 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:09:31.891 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:09:31.891 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:09:31.891 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:09:31.891 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:09:31.891 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:09:31.899 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:09:31.900 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:09:31.900 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:09:31.900 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:09:31.900 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:09:31.903 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:09:31.904 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:09:31.904 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:09:31.904 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:09:31.904 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:09:31.904 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:09:31.905 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:09:31.905 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:09:31.907 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:09:31.907 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:09:31.907 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:09:31.907 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:09:31.907 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:09:31.907 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:09:31.907 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:09:31.907 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:09:31.910 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:09:31.910 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:09:31.910 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:09:31.910 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:09:31.910 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:09:31.910 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:09:31.910 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:09:31.910 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:09:31.914 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:09:31.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:09:31.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:09:31.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:09:31.914 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:09:31.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:09:31.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:09:31.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:09:31.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:09:31.914 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:09:31.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:09:31.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:09:31.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:09:31.914 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:09:31.914 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:09:31.914 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:09:31.914 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:09:31.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:09:31.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:09:31.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:09:31.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:09:31.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:09:31.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:09:31.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:09:31.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:09:31.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:09:31.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:09:31.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:09:31.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:09:31.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:09:31.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:09:31.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:09:31.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:09:31.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:09:31.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:09:31.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:09:31.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:09:31.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:09:31.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:09:31.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:09:31.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:09:31.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:09:31.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:09:31.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:09:31.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:09:31.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:09:31.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:09:31.919 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:09:32.397 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:09:32.861 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:09:33.325 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:09:33.788 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:09:34.251 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:09:34.714 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:09:35.178 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:09:35.641 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:09:36.104 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:09:36.567 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:09:37.037 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:09:37.508 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:09:37.982 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:09:38.446 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:09:38.910 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:09:39.378 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:09:39.847 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:09:40.319 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:09:40.784 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:09:41.253 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:09:41.725 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:09:42.189 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:09:42.652 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:09:43.115 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:09:43.584 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:09:44.047 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:09:44.520 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:09:44.989 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:09:45.452 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:09:45.923 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:09:46.386 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:09:46.851 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:09:47.321 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 04:09:47.793 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 04:09:48.265 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 04:09:48.739 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 04:09:49.211 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 04:09:49.683 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 04:09:50.157 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 04:09:50.629 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 04:09:51.101 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 04:09:51.568 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 04:09:52.038 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 04:09:52.512 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 04:09:52.976 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 04:09:53.439 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 04:09:53.912 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 04:09:54.384 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 04:09:54.858 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 04:09:55.330 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 04:09:55.802 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 04:09:55.941 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:09:55.941 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:09:55.942 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:09:55.942 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:09:55.942 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:09:55.942 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:09:55.942 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:09:55.942 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5234 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:09:55.942 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5234 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:09:55.942 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5234 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:09:55.942 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5234 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:09:55.942 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5234 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:09:55.942 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5234 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:10:00.950 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:10:00.950 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:10:00.950 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:10:00.950 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:10:00.950 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:10:00.950 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:10:00.959 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:10:00.960 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:10:00.960 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:10:00.960 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:10:00.961 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:10:00.965 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:10:00.965 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:10:00.965 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:10:00.965 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:10:00.965 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:10:00.965 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:10:00.966 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:10:00.966 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:10:00.970 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:10:00.970 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:10:00.970 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:10:00.970 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:10:00.970 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:10:00.970 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:10:00.970 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:10:00.970 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:10:00.974 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:10:00.975 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:10:00.975 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:10:00.975 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:10:00.975 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:10:00.975 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:10:00.975 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:10:00.975 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:10:00.981 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:10:00.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:10:00.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:10:00.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:10:00.981 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:10:00.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:10:00.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:10:00.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:10:00.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:10:00.981 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:10:00.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:10:00.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:10:00.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:10:00.982 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:10:00.982 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:10:00.982 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:10:00.982 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:10:00.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:10:00.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:10:00.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:10:00.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:10:00.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:10:00.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:10:00.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:10:00.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:10:00.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:10:00.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:10:00.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:10:00.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:10:00.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:10:00.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:10:00.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:10:00.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:10:00.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:10:00.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:10:00.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:10:00.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:10:00.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:10:00.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:10:00.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:10:00.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:10:00.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:10:00.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:10:00.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:10:00.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:10:00.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:10:00.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:10:00.986 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:10:01.465 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:10:01.932 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:10:02.395 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:10:02.859 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:10:03.322 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:10:03.785 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:10:04.256 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:10:04.719 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:10:05.185 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:10:05.653 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:10:06.116 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:10:06.583 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:10:07.053 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:10:07.521 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:10:07.995 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:10:08.468 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:10:08.940 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:10:09.414 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:10:09.886 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:10:10.358 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:10:10.832 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:10:11.304 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:10:11.776 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:10:12.247 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:10:12.721 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:10:13.193 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:10:13.665 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:10:14.139 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:10:14.611 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:10:15.083 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:10:15.557 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:10:16.029 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:10:16.501 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 04:10:16.975 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 04:10:17.447 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 04:10:17.919 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 04:10:18.394 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 04:10:18.866 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 04:10:19.340 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 04:10:19.812 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 04:10:20.284 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 04:10:20.758 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 04:10:21.230 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 04:10:21.702 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 04:10:22.176 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 04:10:22.648 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 04:10:23.120 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 04:10:23.594 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 04:10:24.066 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 04:10:24.538 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 04:10:25.011 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 04:10:25.484 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 04:10:25.956 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 04:10:26.430 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 04:10:26.902 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 04:10:27.374 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 04:10:27.847 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 04:10:28.320 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 04:10:28.792 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 04:10:29.266 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 04:10:29.738 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 04:10:30.210 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-08 04:10:30.684 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-08 04:10:31.156 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-08 04:10:31.628 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-08 04:10:32.102 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-08 04:10:32.574 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-08 04:10:33.047 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-08 04:10:33.521 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-08 04:10:33.993 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-08 04:10:34.467 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-08 04:10:34.939 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-08 04:10:35.411 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-08 04:10:35.885 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-08 04:10:36.357 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-08 04:10:36.829 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-08 04:10:37.303 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-08 04:10:37.776 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-08 04:10:38.018 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:10:38.247 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-08 04:10:38.721 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-08 04:10:39.019 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:10:39.194 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-08 04:10:39.665 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-08 04:10:40.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:10:40.139 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-08 04:10:40.612 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-08 04:10:41.023 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:10:41.084 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-08 04:10:41.558 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-08 04:10:42.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:10:42.030 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-08 04:10:42.502 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-08 04:10:42.976 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-08 04:10:43.023 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:10:43.024 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:10:43.024 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:10:43.024 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:10:43.024 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:10:43.024 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:10:43.024 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:10:43.024 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:10:48.032 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:10:48.032 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:10:48.032 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:10:48.032 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:10:48.032 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:10:48.032 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:10:48.039 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:10:48.040 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:10:48.040 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:10:48.040 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:10:48.041 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:10:48.043 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:10:48.043 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:10:48.043 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:10:48.043 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:10:48.044 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:10:48.044 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:10:48.044 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:10:48.044 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:10:48.046 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:10:48.046 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:10:48.046 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:10:48.047 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:10:48.047 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:10:48.047 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:10:48.047 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:10:48.047 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:10:48.049 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:10:48.049 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:10:48.049 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:10:48.049 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:10:48.049 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:10:48.049 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:10:48.049 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:10:48.049 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:10:48.052 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:10:48.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:10:48.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:10:48.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:10:48.052 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:10:48.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:10:48.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:10:48.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:10:48.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:10:48.053 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:10:48.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:10:48.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:10:48.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:10:48.053 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:10:48.053 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:10:48.053 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:10:48.053 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:10:48.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:10:48.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:10:48.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:10:48.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:10:48.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:10:48.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:10:48.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:10:48.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:10:48.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:10:48.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:10:48.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:10:48.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:10:48.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:10:48.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:10:48.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:10:48.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:10:48.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:10:48.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:10:48.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:10:48.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:10:48.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:10:48.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:10:48.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:10:48.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:10:48.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:10:48.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:10:48.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:10:48.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:10:48.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:10:48.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:10:48.057 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:10:48.535 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:10:48.577 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:10:48.579 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:10:48.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:10:48.581 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:10:48.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:10:48.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:10:48.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:10:48.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:10:48.615 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:10:48.615 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:10:48.615 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:10:48.615 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:10:48.627 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:10:48.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:10:48.643 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:10:48.643 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:10:48.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:10:48.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:10:49.007 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:10:49.056 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:10:49.056 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:10:49.057 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:10:49.057 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:10:49.479 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:10:49.495 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 04:10:49.952 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:10:50.057 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:10:50.057 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:10:50.058 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:10:50.058 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:10:50.423 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:10:50.896 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:10:51.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:10:51.059 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:10:51.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:10:51.059 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:10:51.369 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:10:51.841 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:10:52.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:10:52.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:10:52.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:10:52.061 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:10:52.312 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:10:52.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:10:52.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:10:52.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:10:52.387 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:10:52.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:10:52.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:10:52.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:10:52.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:10:52.406 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:10:52.406 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:10:52.406 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:10:52.406 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:10:52.451 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:10:52.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:10:52.462 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:10:52.462 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:10:52.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:10:52.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:10:52.785 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:10:53.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:10:53.061 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:10:53.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:10:53.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:10:53.258 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:10:53.588 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 04:10:53.730 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:10:54.201 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:10:54.674 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:10:55.147 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:10:55.619 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:10:56.090 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:10:56.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:10:56.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:10:56.481 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:10:56.481 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:10:56.495 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:10:56.495 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:10:56.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:10:56.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:10:56.497 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:10:56.497 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:10:56.497 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:10:56.497 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:10:56.505 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:10:56.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:10:56.512 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:10:56.513 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:10:56.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:10:56.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:10:56.563 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:10:56.995 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 04:10:57.036 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:10:57.508 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:10:57.979 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:10:58.450 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:10:58.923 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:10:59.395 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:10:59.868 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:11:00.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:11:00.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:11:00.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:11:00.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:11:00.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:11:00.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:11:00.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:11:00.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:11:00.326 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:11:00.326 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:11:00.326 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:11:00.326 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:11:00.334 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:00.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:11:00.338 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:11:00.341 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:11:00.341 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:11:00.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:11:00.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:11:00.809 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:11:01.198 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 04:11:01.283 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:11:01.669 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 04:11:01.755 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:11:02.228 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:11:02.617 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 04:11:02.701 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:11:03.173 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:11:03.645 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 04:11:04.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:11:04.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:11:04.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:11:04.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:11:04.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:11:04.053 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:11:04.053 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:11:04.053 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:11:04.059 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:11:04.060 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:11:04.061 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:11:04.061 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:11:04.061 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:11:04.061 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:11:04.061 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:11:04.061 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3456 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:11:04.062 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3456 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:11:04.062 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3456 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:11:04.062 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3456 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:11:04.062 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3457 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:11:04.062 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3457 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:11:04.062 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3457 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:11:04.062 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3457 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:11:04.062 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3457 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:11:04.062 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3457 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:11:04.062 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3457 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:11:04.062 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3457 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:11:04.063 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3458 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:11:04.063 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3458 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:11:04.063 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3458 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:11:04.063 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3458 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:11:04.063 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3458 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:11:04.063 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3458 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:11:04.063 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3458 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:11:04.063 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3458 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:11:09.062 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:11:09.062 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:11:09.062 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:11:09.062 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:11:09.062 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:11:09.062 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:11:09.071 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:11:09.072 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:11:09.072 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:11:09.073 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:11:09.073 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:11:09.075 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:11:09.076 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:11:09.076 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:11:09.076 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:11:09.076 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:11:09.076 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:11:09.077 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:11:09.077 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:11:09.079 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:11:09.079 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:11:09.079 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:11:09.079 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:11:09.079 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:11:09.079 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:11:09.079 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:11:09.079 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:11:09.082 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:11:09.082 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:11:09.082 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:11:09.082 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:11:09.082 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:11:09.082 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:11:09.082 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:11:09.082 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:11:09.085 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:11:09.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:11:09.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:11:09.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:11:09.085 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:11:09.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:11:09.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:11:09.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:11:09.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:11:09.086 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:11:09.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:11:09.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:11:09.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:11:09.086 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:11:09.086 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:11:09.086 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:11:09.086 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:11:09.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:11:09.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:11:09.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:11:09.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:11:09.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:11:09.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:11:09.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:11:09.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:11:09.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:11:09.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:11:09.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:11:09.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:11:09.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:11:09.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:11:09.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:11:09.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:11:09.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:11:09.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:11:09.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:11:09.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:11:09.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:11:09.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:11:09.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:11:09.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:11:09.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:11:09.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:11:09.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:11:09.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:11:09.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:11:09.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:11:09.091 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:11:09.569 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:11:09.609 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:11:09.610 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:09.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:11:09.612 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:11:09.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:11:09.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:11:09.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:11:09.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:11:09.634 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:11:09.634 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:11:09.634 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:11:09.634 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:11:09.662 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:09.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:11:09.677 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:11:09.678 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:11:09.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:11:09.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:11:10.040 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:11:10.088 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:11:10.089 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:11:10.089 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:11:10.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:11:10.513 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:11:10.530 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:10.532 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 04:11:10.985 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:11:11.009 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:11.090 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:11:11.090 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:11:11.090 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:11:11.090 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:11:11.457 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:11:11.489 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:11.930 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:11:11.969 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:12.091 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:11:12.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:11:12.092 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:11:12.092 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:11:12.402 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:11:12.455 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:12.875 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:11:12.935 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:13.092 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:11:13.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:11:13.093 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:11:13.093 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:11:13.346 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:11:13.415 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:13.819 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:11:13.895 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:14.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:11:14.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:11:14.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:11:14.094 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:11:14.292 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:11:14.382 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:14.765 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:11:14.862 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:15.238 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:11:15.342 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:15.711 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:11:15.828 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:16.183 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:11:16.308 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:16.654 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:11:16.788 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:17.127 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:11:17.268 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:17.600 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:11:17.754 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:17.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:11:17.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:11:17.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:11:17.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:11:17.764 [WARNING] transceiver.py:257 (MS@172.18.152.22:6700) RX TRXD message (fn=1873 tn=7 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:11:17.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:11:17.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:11:17.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:11:17.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:11:17.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:11:17.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:11:17.778 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:11:17.778 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:11:17.781 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:17.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:11:17.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:11:17.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:11:17.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:11:17.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:11:18.073 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:11:18.475 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:18.546 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:11:18.955 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:18.958 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 04:11:19.019 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:11:19.441 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:19.491 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:11:19.921 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:19.962 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:11:20.401 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:20.433 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:11:20.881 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:20.903 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:11:21.361 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:21.377 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:11:21.841 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:21.850 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:11:22.322 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:11:22.328 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:22.796 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:11:22.808 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:23.268 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:11:23.294 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:23.741 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:11:23.774 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:24.214 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:11:24.254 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:24.687 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 04:11:24.740 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:25.159 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 04:11:25.220 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:25.630 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 04:11:25.700 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:25.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:11:25.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:11:25.706 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:11:25.706 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:11:25.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:11:25.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:11:25.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:11:25.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:11:25.714 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:11:25.714 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:11:25.714 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:11:25.714 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:11:25.717 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:25.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:11:25.721 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:11:25.722 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:11:25.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:11:25.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:11:26.065 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:26.101 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 04:11:26.535 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:26.537 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 04:11:26.574 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 04:11:27.006 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:27.047 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 04:11:27.483 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:27.519 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 04:11:27.953 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:27.990 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 04:11:28.424 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:28.461 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 04:11:28.895 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:28.931 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 04:11:29.366 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:29.405 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 04:11:29.837 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:29.877 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 04:11:30.313 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:30.350 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 04:11:30.784 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:30.821 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 04:11:31.255 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:31.294 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 04:11:31.726 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:31.766 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 04:11:32.202 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:32.239 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 04:11:32.673 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:32.710 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 04:11:33.144 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:33.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:11:33.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:11:33.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:11:33.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:11:33.166 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:11:33.166 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:11:33.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:11:33.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:11:33.167 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:11:33.167 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:11:33.167 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:11:33.167 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:11:33.175 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:33.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:11:33.179 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:11:33.179 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:11:33.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:11:33.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:11:33.180 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 04:11:33.570 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:33.651 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 04:11:34.040 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:34.043 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 04:11:34.124 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 04:11:34.511 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:34.513 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 04:11:34.597 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 04:11:34.987 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:35.069 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 04:11:35.458 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:35.461 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 04:11:35.540 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 04:11:35.929 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:36.014 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 04:11:36.400 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:36.486 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 04:11:36.876 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:36.958 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 04:11:37.347 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:37.429 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 04:11:37.818 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:37.902 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 04:11:38.289 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:38.375 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-08 04:11:38.765 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:38.847 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-08 04:11:39.236 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:39.321 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-08 04:11:39.707 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:39.793 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-08 04:11:40.184 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:40.265 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-08 04:11:40.654 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:40.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:11:40.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:11:40.659 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:11:40.659 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:11:40.662 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:11:40.662 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:11:40.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:11:40.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:11:40.663 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:11:40.663 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:11:40.663 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:11:40.663 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:11:40.663 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:11:40.663 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:11:40.663 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:11:45.670 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:11:45.670 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:11:45.670 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:11:45.670 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:11:45.670 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:11:45.670 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:11:45.679 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:11:45.681 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:11:45.681 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:11:45.681 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:11:45.681 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:11:45.686 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:11:45.686 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:11:45.686 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:11:45.686 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:11:45.686 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:11:45.686 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:11:45.686 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:11:45.687 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:11:45.692 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:11:45.692 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:11:45.692 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:11:45.692 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:11:45.692 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:11:45.692 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:11:45.693 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:11:45.693 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:11:45.696 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:11:45.696 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:11:45.696 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:11:45.696 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:11:45.697 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:11:45.697 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:11:45.697 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:11:45.697 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:11:45.701 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:11:45.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:11:45.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:11:45.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:11:45.702 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:11:45.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:11:45.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:11:45.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:11:45.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:11:45.702 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:11:45.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:11:45.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:11:45.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:11:45.702 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:11:45.702 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:11:45.702 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:11:45.702 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:11:45.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:11:45.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:11:45.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:11:45.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:11:45.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:11:45.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:11:45.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:11:45.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:11:45.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:11:45.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:11:45.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:11:45.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:11:45.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:11:45.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:11:45.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:11:45.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:11:45.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:11:45.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:11:45.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:11:45.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:11:45.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:11:45.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:11:45.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:11:45.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:11:45.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:11:45.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:11:45.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:11:45.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:11:45.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:11:45.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:11:45.707 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:11:46.184 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:11:46.232 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:11:46.234 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:46.236 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:11:46.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:11:46.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:11:46.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:11:46.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:11:46.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:11:46.264 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:11:46.264 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:11:46.264 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:11:46.264 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:11:46.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:11:46.288 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:11:46.288 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:11:46.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:11:46.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:11:46.655 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:11:46.705 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:11:46.706 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:11:46.706 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:11:46.707 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:11:47.128 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:11:47.601 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:11:47.707 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:11:47.707 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:11:47.708 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:11:47.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:11:48.074 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:11:48.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:11:48.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:11:48.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:11:48.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:11:48.413 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:11:48.413 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:11:48.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:11:48.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:11:48.414 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:11:48.414 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:11:48.414 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:11:48.414 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:11:48.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:11:48.458 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:11:48.458 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:11:48.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:11:48.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:11:48.546 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:11:48.709 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:11:48.710 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:11:48.710 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:11:48.710 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:11:49.017 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:11:49.490 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:11:49.711 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:11:49.711 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:11:49.711 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:11:49.711 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:11:49.963 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:11:50.436 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:11:50.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:11:50.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:11:50.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:11:50.561 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:11:50.577 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:11:50.577 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:11:50.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:11:50.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:11:50.579 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:11:50.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:11:50.579 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:11:50.579 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:11:50.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:11:50.631 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:11:50.632 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:11:50.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:11:50.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:11:50.712 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:11:50.712 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:11:50.713 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:11:50.713 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:11:50.909 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:11:51.382 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:11:51.854 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:11:52.327 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:11:52.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:11:52.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:11:52.725 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:11:52.725 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:11:52.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:11:52.735 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:11:52.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:11:52.736 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:11:52.739 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:11:52.740 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:11:52.740 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:11:52.740 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:11:52.740 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:11:52.740 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:11:52.740 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:11:52.740 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1520 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:11:52.740 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1520 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:11:52.740 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1520 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:11:52.740 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1520 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:11:52.740 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1520 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:11:52.740 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1520 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:11:57.743 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:11:57.743 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:11:57.743 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:11:57.743 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:11:57.743 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:11:57.743 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:11:57.753 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:11:57.755 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:11:57.755 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:11:57.755 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:11:57.756 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:11:57.761 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:11:57.761 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:11:57.762 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:11:57.762 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:11:57.762 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:11:57.763 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:11:57.763 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:11:57.763 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:11:57.766 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:11:57.767 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:11:57.767 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:11:57.767 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:11:57.767 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:11:57.768 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:11:57.768 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:11:57.768 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:11:57.771 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:11:57.771 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:11:57.771 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:11:57.771 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:11:57.772 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:11:57.772 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:11:57.772 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:11:57.772 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:11:57.777 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:11:57.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:11:57.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:11:57.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:11:57.778 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:11:57.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:11:57.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:11:57.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:11:57.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:11:57.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:11:57.778 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:11:57.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:11:57.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:11:57.778 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:11:57.778 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:11:57.778 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:11:57.779 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:11:57.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:11:57.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:11:57.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:11:57.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:11:57.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:11:57.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:11:57.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:11:57.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:11:57.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:11:57.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:11:57.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:11:57.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:11:57.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:11:57.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:11:57.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:11:57.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:11:57.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:11:57.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:11:57.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:11:57.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:11:57.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:11:57.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:11:57.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:11:57.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:11:57.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:11:57.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:11:57.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:11:57.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:11:57.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:11:57.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:11:57.783 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:11:58.262 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:11:58.308 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:11:58.309 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:11:58.311 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:11:58.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:11:58.327 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:11:58.327 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:11:58.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:11:58.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:11:58.333 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:11:58.333 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:11:58.334 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:11:58.334 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:11:58.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:11:58.368 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:11:58.384 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:11:58.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:11:58.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:11:58.734 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:11:58.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:11:58.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:11:58.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:11:58.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:11:59.205 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:11:59.676 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:11:59.784 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:11:59.784 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:11:59.784 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:11:59.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:12:00.149 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:12:00.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:12:00.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:00.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:12:00.484 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:12:00.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:12:00.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:12:00.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:12:00.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:00.503 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:12:00.503 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:12:00.503 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:12:00.503 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:12:00.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:12:00.526 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:12:00.527 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:12:00.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:00.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:00.622 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:12:00.785 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:12:00.785 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:12:00.785 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:12:00.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:12:01.094 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:12:01.565 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:12:01.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:12:01.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:12:01.787 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:12:01.787 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:12:02.036 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:12:02.510 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:12:02.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:12:02.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:02.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:12:02.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:12:02.643 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:12:02.644 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:12:02.644 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:12:02.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:12:02.649 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:12:02.650 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:12:02.650 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:12:02.650 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:12:02.650 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:12:02.650 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:12:02.650 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:12:02.651 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1050 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:02.651 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1050 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:02.651 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1050 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:02.651 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1051 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:02.651 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1051 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:02.651 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1051 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:02.651 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1051 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:02.652 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1051 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:02.652 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1051 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:02.652 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1051 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:02.652 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1051 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:02.652 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1052 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:02.652 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1052 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:02.652 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1052 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:02.652 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1052 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:02.652 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1052 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:02.652 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1052 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:02.652 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1052 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:02.653 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1052 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:07.660 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:12:07.660 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:12:07.660 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:12:07.660 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:12:07.660 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:12:07.660 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:12:07.671 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:12:07.673 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:12:07.673 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:12:07.673 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:12:07.673 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:12:07.677 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:12:07.677 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:12:07.677 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:12:07.677 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:12:07.677 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:12:07.677 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:12:07.677 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:12:07.677 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:12:07.681 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:12:07.681 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:12:07.681 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:12:07.681 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:12:07.681 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:12:07.681 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:12:07.681 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:12:07.681 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:12:07.685 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:12:07.685 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:12:07.685 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:12:07.685 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:12:07.685 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:12:07.685 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:12:07.685 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:12:07.685 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:12:07.690 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:12:07.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:12:07.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:12:07.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:12:07.690 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:12:07.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:12:07.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:12:07.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:12:07.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:12:07.690 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:12:07.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:07.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:07.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:07.691 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:12:07.691 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:12:07.691 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:12:07.691 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:12:07.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:07.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:07.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:07.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:12:07.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:07.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:07.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:07.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:07.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:07.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:07.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:07.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:07.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:07.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:07.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:07.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:07.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:07.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:07.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:07.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:07.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:07.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:07.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:07.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:07.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:07.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:07.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:07.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:07.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:07.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:07.695 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:12:08.174 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:12:08.218 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:12:08.220 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:12:08.222 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:12:08.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:12:08.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:12:08.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:12:08.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:12:08.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:08.248 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:12:08.248 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:12:08.248 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:12:08.248 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:12:08.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:12:08.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:12:08.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:12:08.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:08.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:08.645 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:12:08.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:12:08.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:12:08.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:12:08.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:12:09.118 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:12:09.590 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:12:09.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:12:09.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:12:09.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:12:09.696 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:12:10.064 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:12:10.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:10.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:12:10.381 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:12:10.382 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:12:10.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:12:10.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:12:10.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:12:10.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:10.404 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:12:10.404 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:12:10.404 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:12:10.404 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:12:10.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:12:10.442 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:12:10.443 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:12:10.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:10.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:10.536 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:12:10.697 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:12:10.697 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:12:10.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:12:10.698 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:12:11.008 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:12:11.479 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:12:11.698 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:12:11.699 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:12:11.699 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:12:11.699 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:12:11.950 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:12:12.423 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:12:12.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:12.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:12:12.529 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:12:12.529 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:12:12.544 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:12:12.544 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:12:12.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:12:12.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:12.546 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:12:12.546 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:12:12.546 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:12:12.546 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:12:12.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:12:12.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:12:12.557 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:12:12.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:12.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:12.700 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:12:12.700 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:12:12.701 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:12:12.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:12:12.894 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:12:13.367 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:12:13.840 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:12:14.313 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:12:14.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:14.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:12:14.640 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:12:14.640 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:12:14.652 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:12:14.652 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:12:14.652 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:12:14.652 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:12:14.658 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:12:14.658 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:12:14.659 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:12:14.659 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:12:14.659 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:12:14.659 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:12:14.659 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:12:14.659 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1503 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:14.660 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1503 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:14.660 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1503 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:14.660 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1503 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:14.660 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1504 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:14.660 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1504 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:14.660 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1504 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:14.660 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1504 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:14.660 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1504 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:14.660 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1504 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:14.661 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1504 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:14.661 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1504 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:19.660 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:12:19.660 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:12:19.660 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:12:19.660 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:12:19.660 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:12:19.660 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:12:19.674 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:12:19.675 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:12:19.675 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:12:19.675 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:12:19.675 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:12:19.677 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:12:19.677 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:12:19.677 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:12:19.677 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:12:19.678 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:12:19.678 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:12:19.678 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:12:19.678 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:12:19.679 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:12:19.679 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:12:19.679 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:12:19.679 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:12:19.679 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:12:19.679 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:12:19.679 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:12:19.679 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:12:19.681 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:12:19.681 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:12:19.681 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:12:19.681 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:12:19.681 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:12:19.681 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:12:19.681 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:12:19.681 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:12:19.684 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:12:19.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:12:19.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:12:19.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:12:19.684 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:12:19.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:12:19.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:12:19.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:19.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:12:19.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:12:19.684 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:12:19.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:19.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:19.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:19.684 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:12:19.684 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:12:19.684 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:12:19.684 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:12:19.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:19.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:19.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:19.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:12:19.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:19.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:19.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:19.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:19.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:19.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:19.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:19.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:19.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:19.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:19.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:19.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:19.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:19.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:19.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:19.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:19.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:19.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:19.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:19.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:19.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:19.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:19.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:19.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:19.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:19.689 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:12:20.166 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:12:20.209 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:12:20.211 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:12:20.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:12:20.214 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:12:20.237 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:12:20.237 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:12:20.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:12:20.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:20.240 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:12:20.240 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:12:20.241 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:12:20.241 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:12:20.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:12:20.271 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:12:20.272 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:12:20.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:20.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:20.638 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:12:20.688 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:12:20.688 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:12:20.688 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:12:20.689 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:12:21.110 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:12:21.580 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:12:21.689 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:12:21.690 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:12:21.690 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:12:21.690 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:12:22.054 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:12:22.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:22.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:12:22.388 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:12:22.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:12:22.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:12:22.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:12:22.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:12:22.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:22.406 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:12:22.406 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:12:22.406 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:12:22.406 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:12:22.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:12:22.426 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:12:22.426 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:12:22.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:22.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:22.526 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:12:22.691 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:12:22.692 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:12:22.692 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:12:22.692 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:12:22.998 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:12:23.469 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:12:23.693 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:12:23.693 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:12:23.694 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:12:23.694 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:12:23.942 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:12:24.415 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:12:24.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:24.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:12:24.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:12:24.542 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:12:24.552 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:12:24.552 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:12:24.553 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:12:24.553 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:12:24.554 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:12:24.554 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:12:24.554 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:12:24.554 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:12:24.554 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:12:24.554 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:12:24.554 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:12:24.554 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1051 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:24.554 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1051 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:24.554 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1052 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:24.554 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1052 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:24.554 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1052 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:24.554 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1052 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:24.554 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1052 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:24.554 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1052 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:24.554 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1052 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:24.554 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1052 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:29.560 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:12:29.560 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:12:29.560 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:12:29.560 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:12:29.560 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:12:29.560 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:12:29.567 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:12:29.568 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:12:29.568 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:12:29.568 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:12:29.568 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:12:29.571 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:12:29.571 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:12:29.571 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:12:29.571 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:12:29.571 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:12:29.572 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:12:29.572 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:12:29.572 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:12:29.576 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:12:29.576 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:12:29.577 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:12:29.577 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:12:29.577 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:12:29.578 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:12:29.578 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:12:29.578 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:12:29.581 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:12:29.581 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:12:29.581 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:12:29.581 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:12:29.582 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:12:29.582 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:12:29.582 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:12:29.582 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:12:29.588 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:12:29.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:12:29.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:12:29.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:12:29.588 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:12:29.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:12:29.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:12:29.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:29.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:12:29.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:12:29.589 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:12:29.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:29.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:29.589 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:12:29.589 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:12:29.589 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:12:29.589 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:12:29.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:29.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:29.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:29.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:12:29.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:29.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:29.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:29.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:29.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:29.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:29.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:29.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:29.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:29.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:29.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:29.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:29.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:29.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:29.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:29.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:29.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:29.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:29.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:29.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:29.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:29.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:29.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:29.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:29.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:29.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:29.594 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:12:30.072 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:12:30.111 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:12:30.112 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:12:30.113 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:12:30.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:12:30.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:12:30.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:12:30.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:12:30.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:30.125 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:12:30.125 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:12:30.125 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:12:30.125 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:12:30.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:12:30.174 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:12:30.174 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:12:30.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:30.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:30.542 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:12:30.592 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:12:30.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:12:30.593 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:12:30.593 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:12:31.015 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:12:31.488 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:12:31.593 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:12:31.594 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:12:31.594 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:12:31.594 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:12:31.961 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:12:32.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:32.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:12:32.357 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:12:32.357 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:12:32.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:12:32.368 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:12:32.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:12:32.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:12:32.369 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:12:32.369 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:12:32.369 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:12:32.369 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:12:32.369 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:12:32.369 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:12:32.369 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:12:32.369 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=600 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:32.369 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=600 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:32.369 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=601 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:32.369 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=601 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:32.369 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=601 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:32.369 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=601 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:32.369 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=601 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:32.369 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=601 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:32.369 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=601 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:32.369 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=601 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:37.375 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:12:37.375 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:12:37.375 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:12:37.375 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:12:37.375 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:12:37.376 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:12:37.383 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:12:37.384 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:12:37.384 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:12:37.384 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:12:37.384 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:12:37.388 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:12:37.388 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:12:37.388 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:12:37.388 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:12:37.388 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:12:37.389 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:12:37.389 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:12:37.389 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:12:37.390 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:12:37.391 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:12:37.391 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:12:37.391 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:12:37.391 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:12:37.391 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:12:37.391 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:12:37.391 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:12:37.393 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:12:37.393 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:12:37.393 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:12:37.393 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:12:37.393 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:12:37.393 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:12:37.393 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:12:37.393 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:12:37.396 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:12:37.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:12:37.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:12:37.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:12:37.396 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:12:37.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:12:37.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:12:37.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:12:37.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:12:37.396 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:12:37.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:37.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:37.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:37.396 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:12:37.396 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:12:37.396 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:12:37.396 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:12:37.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:37.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:37.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:37.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:12:37.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:37.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:37.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:37.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:37.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:37.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:37.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:37.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:37.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:37.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:37.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:37.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:37.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:37.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:37.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:37.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:37.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:37.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:37.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:37.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:37.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:37.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:37.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:37.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:37.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:37.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:37.401 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:12:37.879 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:12:37.921 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:12:37.923 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:12:37.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:12:37.925 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:12:37.947 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:12:37.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:12:37.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:12:37.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:37.950 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:12:37.951 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:12:37.951 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:12:37.951 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:12:37.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:12:37.987 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:12:37.988 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:12:37.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:37.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:38.352 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:12:38.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:12:38.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:12:38.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:12:38.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:12:38.823 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:12:39.297 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:12:39.400 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:12:39.400 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:12:39.400 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:12:39.400 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:12:39.769 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:12:40.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:40.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:12:40.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:12:40.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:12:40.170 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:12:40.170 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:12:40.170 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:12:40.170 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:12:40.171 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:12:40.171 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:12:40.171 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:12:40.171 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:12:40.172 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:12:40.172 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:12:40.172 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:12:40.172 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=599 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:40.172 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=599 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:40.172 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=599 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:40.172 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=599 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:40.172 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=599 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:40.172 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=599 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:45.178 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:12:45.178 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:12:45.178 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:12:45.178 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:12:45.178 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:12:45.178 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:12:45.187 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:12:45.188 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:12:45.188 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:12:45.189 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:12:45.189 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:12:45.192 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:12:45.193 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:12:45.193 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:12:45.193 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:12:45.194 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:12:45.194 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:12:45.194 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:12:45.194 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:12:45.197 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:12:45.197 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:12:45.197 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:12:45.198 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:12:45.198 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:12:45.198 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:12:45.198 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:12:45.199 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:12:45.200 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:12:45.201 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:12:45.201 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:12:45.201 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:12:45.201 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:12:45.201 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:12:45.201 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:12:45.201 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:12:45.205 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:12:45.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:12:45.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:12:45.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:12:45.205 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:12:45.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:12:45.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:12:45.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:12:45.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:12:45.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:45.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:45.206 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:12:45.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:45.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:45.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:45.206 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:12:45.206 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:12:45.206 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:12:45.206 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:12:45.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:45.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:45.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:45.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:12:45.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:45.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:45.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:45.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:45.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:45.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:45.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:45.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:45.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:45.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:45.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:45.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:45.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:45.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:45.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:45.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:45.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:45.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:45.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:45.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:45.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:45.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:45.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:45.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:45.210 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:12:45.689 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:12:45.731 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:12:45.733 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:12:45.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:12:45.735 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:12:45.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:12:45.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:12:45.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:12:45.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:45.799 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:12:45.799 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:12:45.800 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:12:45.800 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:12:45.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:12:45.836 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:12:45.836 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:12:45.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:45.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:46.157 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:12:46.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:46.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:12:46.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:12:46.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:12:46.209 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:12:46.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:12:46.212 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:12:46.212 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:12:46.225 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:12:46.225 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:12:46.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:12:46.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:46.235 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:12:46.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:12:46.235 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:12:46.235 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:12:46.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:12:46.247 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:12:46.247 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:12:46.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:46.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:46.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:46.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:12:46.624 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:12:46.624 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:12:46.628 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:12:46.632 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:12:46.632 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:12:46.632 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:12:46.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:12:46.633 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:12:46.633 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:12:46.633 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:12:46.633 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:12:46.633 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:12:46.633 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:12:46.633 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:12:46.633 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=309 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:46.633 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=309 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:46.633 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=309 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:46.633 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=309 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:51.642 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:12:51.642 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:12:51.642 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:12:51.642 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:12:51.642 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:12:51.642 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:12:51.650 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:12:51.651 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:12:51.651 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:12:51.652 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:12:51.652 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:12:51.655 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:12:51.655 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:12:51.655 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:12:51.655 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:12:51.655 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:12:51.656 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:12:51.656 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:12:51.656 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:12:51.658 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:12:51.658 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:12:51.659 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:12:51.659 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:12:51.659 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:12:51.659 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:12:51.659 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:12:51.659 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:12:51.661 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:12:51.661 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:12:51.661 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:12:51.661 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:12:51.661 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:12:51.662 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:12:51.662 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:12:51.662 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:12:51.665 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:12:51.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:12:51.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:12:51.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:12:51.665 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:12:51.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:12:51.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:12:51.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:12:51.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:12:51.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:51.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:51.665 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:12:51.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:51.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:51.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:51.665 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:12:51.666 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:12:51.666 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:12:51.666 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:12:51.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:51.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:51.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:51.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:12:51.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:51.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:51.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:51.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:51.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:51.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:51.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:51.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:51.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:51.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:51.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:51.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:51.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:51.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:51.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:51.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:51.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:51.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:51.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:51.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:51.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:51.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:51.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:51.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:51.670 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:12:52.149 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:12:52.186 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:12:52.189 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:12:52.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:12:52.192 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:12:52.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:12:52.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:12:52.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:12:52.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:52.240 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:12:52.240 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:12:52.240 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:12:52.240 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:12:52.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:12:52.296 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:12:52.297 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:12:52.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:52.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:52.618 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:12:52.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:52.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:12:52.668 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:12:52.668 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:12:52.668 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:12:52.669 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:12:52.670 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:12:52.671 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:12:52.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:12:52.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:12:52.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:12:52.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:52.697 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:12:52.697 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:12:52.697 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:12:52.697 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:12:52.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:12:52.708 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:12:52.708 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:12:52.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:52.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:53.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:53.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:12:53.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:12:53.088 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:12:53.089 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:12:53.100 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:12:53.100 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:12:53.101 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:12:53.101 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:12:53.102 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:12:53.102 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:12:53.102 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:12:53.102 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:12:53.102 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:12:53.102 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:12:53.102 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:12:53.102 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=310 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:53.102 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=310 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:53.102 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=311 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:53.102 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=311 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:53.102 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=311 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:53.102 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=311 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:53.102 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=311 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:53.102 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=311 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:53.102 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=311 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:53.102 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=311 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:58.109 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:12:58.109 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:12:58.109 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:12:58.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:12:58.109 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:12:58.109 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:12:58.120 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:12:58.121 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:12:58.121 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:12:58.121 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:12:58.121 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:12:58.123 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:12:58.123 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:12:58.123 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:12:58.123 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:12:58.123 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:12:58.123 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:12:58.124 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:12:58.124 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:12:58.125 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:12:58.125 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:12:58.125 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:12:58.125 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:12:58.125 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:12:58.125 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:12:58.125 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:12:58.125 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:12:58.127 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:12:58.127 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:12:58.127 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:12:58.127 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:12:58.127 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:12:58.127 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:12:58.127 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:12:58.127 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:12:58.130 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:12:58.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:12:58.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:12:58.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:12:58.130 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:12:58.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:12:58.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:12:58.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:12:58.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:12:58.130 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:12:58.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:58.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:58.130 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:12:58.130 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:12:58.130 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:12:58.130 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:12:58.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:58.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:58.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:58.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:12:58.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:58.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:58.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:58.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:58.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:58.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:58.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:58.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:58.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:58.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:58.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:58.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:58.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:58.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:58.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:58.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:58.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:58.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:58.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:58.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:12:58.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:58.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:58.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:58.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:12:58.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:12:58.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:58.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:12:58.135 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:12:58.614 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:12:58.647 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:12:58.648 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:12:58.649 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:12:58.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:12:58.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:12:58.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:12:58.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:12:58.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:58.707 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:12:58.707 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:12:58.708 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:12:58.708 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:12:58.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:12:58.761 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:12:58.762 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:12:58.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:58.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:59.085 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:12:59.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:59.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:12:59.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:12:59.133 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:12:59.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:12:59.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:12:59.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:12:59.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:12:59.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:12:59.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:12:59.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:12:59.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:59.161 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:12:59.161 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:12:59.161 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:12:59.161 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:12:59.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:12:59.176 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:12:59.176 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:12:59.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:59.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:59.557 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:12:59.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:12:59.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:12:59.600 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:12:59.600 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:12:59.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:12:59.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:12:59.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:12:59.613 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:12:59.619 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:12:59.619 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:12:59.619 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:12:59.619 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:12:59.619 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:12:59.619 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:12:59.620 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:12:59.620 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=321 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:59.620 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=321 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:59.620 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=321 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:59.620 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=321 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:59.620 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=321 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:12:59.621 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=321 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:13:04.621 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:13:04.621 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:13:04.621 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:13:04.621 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:13:04.621 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:13:04.621 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:13:04.632 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:13:04.633 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:13:04.633 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:13:04.633 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:13:04.633 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:13:04.635 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:13:04.635 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:13:04.635 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:13:04.635 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:13:04.635 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:13:04.636 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:13:04.636 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:13:04.636 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:13:04.637 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:13:04.637 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:13:04.637 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:13:04.637 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:13:04.637 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:13:04.637 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:13:04.637 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:13:04.637 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:13:04.639 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:13:04.639 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:13:04.639 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:13:04.639 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:13:04.639 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:13:04.639 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:13:04.639 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:13:04.639 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:13:04.642 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:13:04.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:13:04.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:13:04.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:13:04.642 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:13:04.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:13:04.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:13:04.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:04.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:13:04.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:13:04.642 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:13:04.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:04.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:04.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:04.642 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:13:04.642 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:13:04.642 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:13:04.642 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:13:04.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:04.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:04.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:04.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:13:04.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:04.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:04.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:04.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:04.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:04.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:04.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:04.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:04.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:04.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:04.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:04.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:04.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:04.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:04.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:04.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:04.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:04.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:04.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:04.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:04.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:04.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:04.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:04.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:04.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:04.647 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:13:05.124 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:13:05.164 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:13:05.165 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:13:05.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:13:05.166 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:13:05.179 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:13:05.179 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:13:05.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:13:05.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:13:05.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:13:05.227 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:13:05.228 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:13:05.228 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:13:05.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:13:05.272 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:13:05.272 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:13:05.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:13:05.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:13:05.597 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:13:05.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:13:05.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:13:05.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:13:05.647 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:13:06.068 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:13:06.541 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:13:06.648 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:13:06.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:13:06.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:13:06.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:13:07.014 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:13:07.486 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:13:07.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:13:07.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:13:07.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:13:07.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:13:07.957 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:13:08.431 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:13:08.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:13:08.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:13:08.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:13:08.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:13:08.903 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:13:09.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:13:09.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:13:09.283 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:13:09.283 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:13:09.283 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:13:09.283 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:13:09.285 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:13:09.285 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:13:09.285 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:13:09.285 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:13:09.285 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:13:09.285 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:13:09.285 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:13:14.289 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:13:14.289 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:13:14.289 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:13:14.289 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:13:14.289 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:13:14.289 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:13:14.297 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:13:14.298 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:13:14.298 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:13:14.298 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:13:14.299 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:13:14.301 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:13:14.301 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:13:14.302 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:13:14.302 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:13:14.302 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:13:14.302 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:13:14.303 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:13:14.303 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:13:14.304 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:13:14.305 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:13:14.305 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:13:14.305 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:13:14.305 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:13:14.306 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:13:14.306 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:13:14.306 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:13:14.308 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:13:14.308 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:13:14.308 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:13:14.308 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:13:14.308 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:13:14.308 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:13:14.308 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:13:14.308 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:13:14.312 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:13:14.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:13:14.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:13:14.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:13:14.312 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:13:14.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:13:14.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:13:14.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:13:14.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:13:14.312 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:13:14.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:14.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:14.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:14.312 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:13:14.312 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:13:14.312 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:13:14.312 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:13:14.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:14.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:14.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:13:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:14.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:14.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:14.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:14.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:14.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:14.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:14.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:14.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:14.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:14.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:14.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:14.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:14.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:14.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:14.317 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:13:14.796 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:13:14.832 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:13:14.833 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:13:14.834 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:13:14.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:13:14.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:13:14.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:13:14.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:13:14.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:13:14.893 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:13:14.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:13:14.894 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:13:14.894 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:13:14.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:13:14.944 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:13:14.945 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:13:14.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:13:14.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:13:15.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:13:15.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:13:15.161 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:13:15.161 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:13:15.175 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:13:15.175 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:13:15.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:13:15.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:13:15.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:13:15.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:13:15.188 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:13:15.188 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:13:15.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:13:15.224 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:13:15.224 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:13:15.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:13:15.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:13:15.264 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:13:15.315 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:13:15.316 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:13:15.316 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:13:15.316 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:13:15.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:13:15.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:13:15.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:13:15.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:13:15.448 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:13:15.448 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:13:15.448 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:13:15.448 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:13:15.449 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:13:15.449 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:13:15.449 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:13:15.449 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:13:15.449 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:13:15.449 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:13:15.449 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:13:20.456 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:13:20.456 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:13:20.456 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:13:20.456 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:13:20.456 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:13:20.456 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:13:20.463 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:13:20.464 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:13:20.464 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:13:20.465 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:13:20.465 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:13:20.468 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:13:20.468 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:13:20.468 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:13:20.469 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:13:20.469 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:13:20.469 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:13:20.469 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:13:20.469 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:13:20.471 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:13:20.471 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:13:20.471 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:13:20.472 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:13:20.472 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:13:20.472 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:13:20.472 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:13:20.472 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:13:20.474 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:13:20.474 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:13:20.474 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:13:20.474 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:13:20.474 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:13:20.474 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:13:20.474 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:13:20.474 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:13:20.477 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:13:20.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:13:20.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:13:20.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:13:20.477 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:13:20.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:13:20.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:13:20.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:13:20.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:13:20.478 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:13:20.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:20.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:20.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:20.478 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:13:20.478 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:13:20.478 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:13:20.478 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:13:20.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:20.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:20.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:20.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:13:20.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:20.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:20.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:20.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:20.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:20.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:20.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:20.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:20.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:20.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:20.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:20.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:20.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:20.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:20.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:20.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:20.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:20.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:20.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:20.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:20.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:20.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:20.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:20.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:20.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:20.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:20.483 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:13:20.961 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:13:21.005 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:13:21.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:13:21.010 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:13:21.012 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:13:21.038 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:13:21.038 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:13:21.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:13:21.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:13:21.079 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:13:21.080 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:13:21.080 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:13:21.080 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:13:21.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:13:21.108 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:13:21.108 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:13:21.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:13:21.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:13:21.431 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:13:21.480 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:13:21.480 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:13:21.481 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:13:21.481 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:13:21.902 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:13:22.375 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:13:22.482 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:13:22.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:13:22.483 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:13:22.483 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:13:22.847 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:13:23.318 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:13:23.484 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:13:23.484 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:13:23.484 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:13:23.484 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:13:23.789 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:13:24.262 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:13:24.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:13:24.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:13:24.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:13:24.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:13:24.735 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:13:25.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:13:25.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:13:25.119 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:13:25.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:13:25.119 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:13:25.119 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:13:25.120 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:13:25.120 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:13:25.120 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:13:25.120 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:13:25.120 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:13:25.120 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:13:25.120 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:13:30.128 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:13:30.128 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:13:30.128 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:13:30.128 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:13:30.128 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:13:30.128 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:13:30.147 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:13:30.148 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:13:30.148 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:13:30.149 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:13:30.149 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:13:30.154 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:13:30.154 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:13:30.154 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:13:30.155 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:13:30.155 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:13:30.155 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:13:30.156 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:13:30.156 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:13:30.159 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:13:30.159 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:13:30.159 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:13:30.159 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:13:30.160 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:13:30.160 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:13:30.161 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:13:30.161 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:13:30.163 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:13:30.163 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:13:30.164 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:13:30.164 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:13:30.164 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:13:30.164 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:13:30.164 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:13:30.164 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:13:30.169 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:13:30.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:13:30.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:13:30.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:13:30.169 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:13:30.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:13:30.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:13:30.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:13:30.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:30.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:13:30.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:30.170 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:13:30.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:30.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:30.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:30.170 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:13:30.170 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:13:30.170 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:13:30.170 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:13:30.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:30.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:30.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:30.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:13:30.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:30.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:30.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:30.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:30.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:30.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:30.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:30.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:30.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:30.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:30.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:30.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:30.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:30.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:30.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:30.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:30.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:30.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:30.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:30.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:30.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:30.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:30.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:30.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:30.175 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:13:30.654 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:13:30.699 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:13:30.701 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:13:30.704 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:13:30.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:13:30.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:13:30.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:13:30.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:13:30.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:13:30.785 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:13:30.785 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:13:30.786 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:13:30.786 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:13:30.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:13:30.803 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:13:30.803 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:13:30.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:13:30.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:13:31.126 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:13:31.174 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:13:31.175 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:13:31.175 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:13:31.177 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:13:31.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:13:31.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:13:31.520 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:13:31.520 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:13:31.531 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:13:31.531 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:13:31.531 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:13:31.531 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:13:31.533 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:13:31.533 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:13:31.533 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:13:31.533 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:13:31.533 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:13:31.533 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:13:31.533 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:13:31.533 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=293 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:13:31.533 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=293 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:13:31.533 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=293 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:13:31.533 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=293 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:13:31.533 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=293 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:13:31.533 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:13:31.533 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:13:31.533 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:13:31.533 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:13:31.533 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:13:31.533 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:13:31.533 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:13:31.533 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:13:36.541 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:13:36.541 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:13:36.541 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:13:36.541 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:13:36.541 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:13:36.541 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:13:36.550 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:13:36.551 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:13:36.551 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:13:36.552 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:13:36.552 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:13:36.555 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:13:36.555 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:13:36.556 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:13:36.556 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:13:36.556 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:13:36.556 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:13:36.557 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:13:36.557 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:13:36.559 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:13:36.559 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:13:36.559 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:13:36.559 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:13:36.559 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:13:36.559 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:13:36.560 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:13:36.560 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:13:36.561 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:13:36.562 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:13:36.562 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:13:36.562 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:13:36.562 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:13:36.562 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:13:36.562 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:13:36.562 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:13:36.565 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:13:36.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:13:36.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:13:36.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:13:36.565 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:13:36.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:13:36.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:13:36.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:13:36.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:13:36.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:36.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:36.565 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:13:36.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:36.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:36.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:36.565 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:13:36.565 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:13:36.565 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:13:36.566 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:13:36.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:36.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:36.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:36.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:13:36.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:36.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:36.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:36.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:36.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:36.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:36.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:36.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:36.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:36.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:36.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:36.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:36.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:36.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:36.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:36.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:36.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:36.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:36.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:36.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:36.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:36.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:36.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:36.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:36.570 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:13:37.049 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:13:37.085 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:13:37.085 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:13:37.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:13:37.088 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:13:37.103 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:13:37.103 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:13:37.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:13:37.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:13:37.141 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:13:37.141 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:13:37.141 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:13:37.141 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:13:37.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:13:37.195 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:13:37.196 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:13:37.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:13:37.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:13:37.521 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:13:37.569 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:13:37.569 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:13:37.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:13:37.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:13:37.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:13:37.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:13:37.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:13:37.916 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:13:37.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:13:37.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:13:37.928 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:13:37.928 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:13:37.933 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:13:37.934 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:13:37.934 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:13:37.934 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:13:37.934 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:13:37.935 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:13:37.935 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:13:37.935 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=295 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:13:37.935 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=295 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:13:37.935 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=295 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:13:37.935 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=295 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:13:37.936 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=295 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:13:37.936 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=295 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:13:37.936 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=295 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:13:42.943 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:13:42.943 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:13:42.944 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:13:42.944 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:13:42.944 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:13:42.944 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:13:42.953 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:13:42.955 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:13:42.955 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:13:42.956 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:13:42.956 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:13:42.960 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:13:42.961 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:13:42.961 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:13:42.961 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:13:42.961 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:13:42.961 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:13:42.961 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:13:42.961 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:13:42.965 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:13:42.966 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:13:42.966 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:13:42.966 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:13:42.966 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:13:42.966 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:13:42.966 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:13:42.966 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:13:42.970 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:13:42.970 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:13:42.970 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:13:42.970 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:13:42.970 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:13:42.970 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:13:42.970 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:13:42.970 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:13:42.975 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:13:42.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:13:42.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:13:42.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:13:42.976 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:13:42.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:13:42.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:13:42.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:13:42.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:13:42.976 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:13:42.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:42.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:42.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:42.976 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:13:42.976 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:13:42.976 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:13:42.976 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:13:42.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:42.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:42.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:42.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:13:42.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:42.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:42.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:42.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:42.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:42.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:42.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:42.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:42.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:42.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:42.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:42.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:42.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:42.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:42.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:42.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:42.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:42.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:42.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:42.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:42.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:42.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:42.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:42.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:42.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:42.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:42.981 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:13:43.459 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:13:43.503 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:13:43.505 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:13:43.507 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:13:43.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:13:43.522 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:13:43.522 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:13:43.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:13:43.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:13:43.559 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:13:43.559 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:13:43.560 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:13:43.560 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:13:43.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:13:43.606 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:13:43.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:13:43.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:13:43.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:13:43.932 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:13:43.981 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:13:43.981 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:13:43.981 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:13:43.982 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:13:44.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:13:44.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:13:44.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:13:44.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:13:44.337 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:13:44.337 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:13:44.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:13:44.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:13:44.338 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:13:44.338 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:13:44.338 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:13:44.338 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:13:44.338 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:13:44.338 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:13:44.338 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:13:44.338 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:13:44.339 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:13:44.339 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:13:44.339 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:13:49.345 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:13:49.345 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:13:49.345 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:13:49.345 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:13:49.345 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:13:49.345 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:13:49.352 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:13:49.353 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:13:49.354 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:13:49.354 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:13:49.354 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:13:49.357 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:13:49.358 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:13:49.358 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:13:49.358 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:13:49.358 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:13:49.358 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:13:49.359 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:13:49.359 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:13:49.361 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:13:49.361 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:13:49.361 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:13:49.361 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:13:49.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:13:49.361 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:13:49.361 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:13:49.361 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:13:49.365 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:13:49.365 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:13:49.365 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:13:49.365 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:13:49.365 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:13:49.365 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:13:49.366 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:13:49.366 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:13:49.369 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:13:49.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:13:49.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:13:49.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:13:49.369 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:13:49.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:13:49.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:13:49.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:13:49.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:13:49.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:49.370 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:13:49.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:49.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:49.370 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:13:49.370 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:13:49.370 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:13:49.370 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:13:49.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:49.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:49.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:49.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:13:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:49.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:49.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:49.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:49.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:49.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:49.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:49.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:49.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:49.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:49.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:49.375 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:13:49.853 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:13:49.884 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:13:49.886 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:13:49.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:13:49.887 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:13:49.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:13:49.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:13:49.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:13:49.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:13:49.951 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:13:49.951 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:13:49.951 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:13:49.951 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:13:49.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:13:50.001 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:13:50.002 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:13:50.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:13:50.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:13:50.323 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:13:50.373 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:13:50.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:13:50.374 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:13:50.374 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:13:50.797 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:13:50.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:13:50.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:13:50.855 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:13:50.855 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:13:50.866 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:13:50.866 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:13:50.866 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:13:50.866 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:13:50.868 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:13:50.868 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:13:50.868 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:13:50.868 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:13:50.868 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:13:50.868 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:13:50.868 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:13:50.868 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=323 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:13:50.868 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=323 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:13:50.868 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=323 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:13:50.868 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=323 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:13:50.868 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=323 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:13:50.868 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=323 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:13:55.872 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:13:55.872 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:13:55.872 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:13:55.872 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:13:55.872 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:13:55.872 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:13:55.879 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:13:55.880 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:13:55.880 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:13:55.881 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:13:55.881 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:13:55.883 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:13:55.883 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:13:55.883 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:13:55.883 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:13:55.884 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:13:55.884 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:13:55.884 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:13:55.884 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:13:55.886 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:13:55.886 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:13:55.886 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:13:55.886 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:13:55.887 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:13:55.887 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:13:55.887 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:13:55.887 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:13:55.889 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:13:55.889 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:13:55.889 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:13:55.889 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:13:55.889 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:13:55.889 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:13:55.889 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:13:55.889 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:13:55.893 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:13:55.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:13:55.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:13:55.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:13:55.893 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:13:55.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:13:55.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:13:55.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:13:55.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:13:55.894 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:13:55.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:55.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:55.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:55.894 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:13:55.894 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:13:55.894 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:13:55.894 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:13:55.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:55.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:55.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:55.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:13:55.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:55.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:55.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:55.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:55.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:55.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:55.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:55.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:55.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:55.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:55.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:55.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:55.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:55.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:55.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:55.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:55.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:55.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:55.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:13:55.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:55.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:55.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:55.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:13:55.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:13:55.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:55.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:13:55.898 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:13:56.377 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:13:56.416 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:13:56.417 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:13:56.418 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:13:56.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:13:56.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:13:56.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:13:56.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:13:56.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:13:56.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:13:56.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:13:56.484 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:13:56.484 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:13:56.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:13:56.524 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:13:56.524 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:13:56.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:13:56.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:13:56.849 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:13:56.897 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:13:56.898 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:13:56.898 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:13:56.898 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:13:57.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:13:57.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:13:57.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:13:57.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:13:57.257 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:13:57.257 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:13:57.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:13:57.257 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:13:57.258 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:13:57.258 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:13:57.258 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:13:57.258 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:13:57.258 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:13:57.258 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:13:57.258 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:14:02.264 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:14:02.264 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:14:02.264 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:14:02.264 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:14:02.264 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:14:02.264 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:14:02.271 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:14:02.272 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:14:02.272 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:14:02.272 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:14:02.272 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:14:02.276 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:14:02.276 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:14:02.277 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:14:02.277 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:14:02.277 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:14:02.277 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:14:02.277 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:14:02.277 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:14:02.281 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:14:02.281 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:14:02.281 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:14:02.282 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:14:02.282 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:14:02.282 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:14:02.282 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:14:02.282 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:14:02.285 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:14:02.286 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:14:02.286 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:14:02.286 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:14:02.286 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:14:02.286 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:14:02.286 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:14:02.286 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:14:02.291 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:14:02.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:14:02.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:14:02.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:14:02.291 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:14:02.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:14:02.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:14:02.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:14:02.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:14:02.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:02.292 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:14:02.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:02.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:02.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:02.292 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:14:02.292 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:14:02.292 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:14:02.292 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:14:02.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:02.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:02.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:02.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:14:02.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:02.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:02.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:02.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:02.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:02.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:02.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:02.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:02.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:02.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:02.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:02.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:02.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:02.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:02.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:02.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:02.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:02.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:02.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:02.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:02.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:02.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:02.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:02.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:02.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:02.297 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:14:02.775 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:14:02.819 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:14:02.821 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:14:02.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:14:02.824 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:14:02.845 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:14:02.845 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:14:02.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:14:02.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:14:02.885 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:14:02.885 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:14:02.886 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:14:02.886 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:14:02.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:14:02.924 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:14:02.924 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:14:02.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:14:02.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:14:03.248 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:14:03.295 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:14:03.295 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:14:03.296 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:14:03.296 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:14:03.719 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:14:03.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:14:03.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:14:03.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:14:03.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:14:03.789 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:14:03.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:14:03.790 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:14:03.790 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:14:03.795 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:14:03.795 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:14:03.796 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:14:03.796 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:14:03.796 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:14:03.796 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:14:03.796 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:14:03.796 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=323 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:14:03.797 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=323 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:14:03.797 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=324 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:14:03.797 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=324 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:14:03.797 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=324 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:14:03.797 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=324 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:14:03.797 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=324 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:14:03.797 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=324 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:14:03.797 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=324 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:14:03.797 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=324 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:14:08.797 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:14:08.797 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:14:08.798 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:14:08.798 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:14:08.798 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:14:08.798 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:14:08.806 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:14:08.807 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:14:08.807 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:14:08.808 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:14:08.808 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:14:08.810 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:14:08.811 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:14:08.811 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:14:08.811 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:14:08.811 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:14:08.811 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:14:08.812 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:14:08.812 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:14:08.814 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:14:08.814 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:14:08.814 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:14:08.814 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:14:08.814 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:14:08.814 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:14:08.814 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:14:08.814 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:14:08.816 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:14:08.817 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:14:08.817 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:14:08.817 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:14:08.817 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:14:08.817 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:14:08.817 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:14:08.817 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:14:08.820 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:14:08.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:14:08.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:14:08.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:14:08.820 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:14:08.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:14:08.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:14:08.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:14:08.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:14:08.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:08.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:08.821 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:14:08.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:08.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:08.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:08.821 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:14:08.821 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:14:08.821 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:14:08.821 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:14:08.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:08.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:08.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:08.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:14:08.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:08.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:08.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:08.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:08.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:08.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:08.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:08.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:08.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:08.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:08.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:08.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:08.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:08.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:08.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:08.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:08.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:08.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:08.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:08.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:08.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:08.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:08.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:08.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:08.826 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:14:09.304 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:14:09.353 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:14:09.355 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:14:09.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:14:09.356 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:14:09.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:14:09.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:14:09.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:14:09.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:14:09.385 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:14:09.385 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:14:09.386 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:14:09.386 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:14:09.776 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:14:09.823 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:14:09.823 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:14:09.824 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:14:09.824 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:14:10.248 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:14:10.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:14:10.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:14:10.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:14:10.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:14:10.540 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:14:10.540 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:14:10.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:14:10.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:14:10.541 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:14:10.541 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:14:10.541 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:14:10.541 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:14:10.720 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:14:10.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:14:10.825 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:14:10.825 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:14:10.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:14:11.193 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:14:11.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD NOHANDOVER
2026-02-08 04:14:11.665 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:14:11.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD NOHANDOVER
2026-02-08 04:14:11.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:14:11.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:14:11.716 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:14:11.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:14:11.716 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:14:11.716 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:14:11.717 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:14:11.717 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:14:11.718 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:14:11.718 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:14:11.718 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:14:11.718 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:14:11.718 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:14:11.718 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=625 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:14:11.718 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=625 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:14:11.718 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=625 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:14:11.718 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=625 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:14:11.718 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=625 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:14:16.724 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:14:16.725 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:14:16.725 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:14:16.725 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:14:16.725 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:14:16.725 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:14:16.734 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:14:16.735 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:14:16.735 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:14:16.735 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:14:16.736 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:14:16.739 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:14:16.739 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:14:16.739 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:14:16.739 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:14:16.740 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:14:16.740 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:14:16.740 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:14:16.740 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:14:16.742 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:14:16.743 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:14:16.743 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:14:16.743 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:14:16.743 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:14:16.744 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:14:16.744 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:14:16.744 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:14:16.746 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:14:16.746 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:14:16.746 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:14:16.746 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:14:16.746 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:14:16.746 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:14:16.746 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:14:16.746 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:14:16.750 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:14:16.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:14:16.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:14:16.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:14:16.750 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:14:16.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:14:16.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:14:16.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:14:16.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:14:16.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:16.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:16.750 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:14:16.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:16.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:16.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:16.750 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:14:16.750 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:14:16.750 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:14:16.751 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:14:16.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:16.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:16.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:16.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:14:16.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:16.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:16.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:16.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:16.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:16.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:16.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:16.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:16.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:16.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:16.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:16.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:16.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:16.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:16.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:16.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:16.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:16.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:16.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:16.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:16.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:16.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:16.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:16.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:16.755 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:14:17.234 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:14:17.278 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:14:17.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:14:17.282 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:14:17.284 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:14:17.311 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:14:17.311 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:14:17.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:14:17.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:14:17.315 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:14:17.315 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:14:17.315 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:14:17.315 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:14:17.706 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:14:17.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:14:17.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:14:17.755 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:14:17.755 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:14:18.177 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:14:18.651 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:14:18.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:14:18.756 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:14:18.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:14:18.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:14:19.123 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:14:19.595 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:14:19.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:14:19.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:14:19.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:14:19.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:14:20.066 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:14:20.539 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:14:20.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:14:20.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:14:20.758 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:14:20.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:14:21.012 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:14:21.484 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:14:21.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:14:21.759 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:14:21.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:14:21.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:14:21.955 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:14:22.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD NOHANDOVER
2026-02-08 04:14:22.221 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:14:22.221 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:14:22.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:14:22.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:14:22.428 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:14:22.901 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:14:23.374 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:14:23.847 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:14:24.320 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:14:24.792 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:14:25.266 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:14:25.738 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:14:26.211 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:14:26.685 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:14:27.157 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:14:27.630 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:14:28.104 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:14:28.576 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:14:29.048 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:14:29.522 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:14:29.995 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:14:30.469 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:14:30.942 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:14:31.416 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:14:31.889 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:14:32.361 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 04:14:32.835 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 04:14:33.307 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 04:14:33.780 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 04:14:34.254 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 04:14:34.727 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 04:14:35.201 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 04:14:35.673 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 04:14:36.146 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 04:14:36.620 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 04:14:36.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD NOHANDOVER
2026-02-08 04:14:36.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:14:36.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:14:36.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:14:36.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:14:36.949 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:14:36.949 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:14:36.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:14:36.950 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:14:36.950 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:14:36.950 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:14:36.950 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:14:36.950 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:14:36.950 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:14:36.951 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:14:41.957 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:14:41.957 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:14:41.957 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:14:41.957 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:14:41.957 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:14:41.958 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:14:41.965 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:14:41.967 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:14:41.967 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:14:41.967 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:14:41.967 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:14:41.972 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:14:41.972 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:14:41.972 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:14:41.972 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:14:41.973 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:14:41.973 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:14:41.974 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:14:41.974 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:14:41.977 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:14:41.977 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:14:41.978 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:14:41.978 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:14:41.978 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:14:41.978 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:14:41.979 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:14:41.979 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:14:41.981 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:14:41.982 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:14:41.982 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:14:41.982 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:14:41.982 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:14:41.982 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:14:41.983 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:14:41.983 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:14:41.988 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:14:41.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:14:41.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:14:41.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:14:41.988 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:14:41.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:14:41.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:14:41.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:14:41.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:14:41.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:41.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:41.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:41.988 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:14:41.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:41.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:41.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:41.989 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:14:41.989 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:14:41.989 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:14:41.989 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:14:41.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:41.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:41.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:41.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:14:41.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:41.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:41.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:41.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:41.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:41.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:41.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:41.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:41.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:41.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:41.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:41.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:41.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:41.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:41.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:41.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:41.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:41.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:41.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:41.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:41.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:41.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:41.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:41.993 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:14:42.471 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:14:42.517 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:14:42.519 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:14:42.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:14:42.521 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:14:42.540 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:14:42.540 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:14:42.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:14:42.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:14:42.543 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:14:42.543 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:14:42.543 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:14:42.543 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:14:42.943 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:14:42.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:14:42.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:14:42.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:14:42.992 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:14:43.415 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:14:43.886 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:14:43.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:14:43.993 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:14:43.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:14:43.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:14:44.359 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:14:44.832 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:14:44.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:14:44.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:14:44.995 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:14:44.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:14:45.304 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:14:45.775 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:14:45.996 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:14:45.996 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:14:45.996 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:14:45.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:14:46.248 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:14:46.721 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:14:46.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:14:46.997 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:14:46.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:14:46.998 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:14:47.193 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:14:47.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD NOHANDOVER
2026-02-08 04:14:47.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:14:47.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:14:47.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:14:47.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:14:47.664 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:14:48.138 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:14:48.611 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:14:49.085 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:14:49.557 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:14:50.028 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:14:50.501 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:14:50.974 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:14:51.447 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:14:51.917 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:14:52.381 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:14:52.850 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:14:53.321 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:14:53.795 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:14:54.269 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:14:54.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD NOHANDOVER
2026-02-08 04:14:54.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:14:54.441 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:14:54.441 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:14:54.448 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:14:54.448 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:14:54.448 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:14:54.448 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:14:54.449 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:14:54.449 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:14:54.449 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:14:54.449 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:14:54.449 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:14:54.449 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:14:54.449 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:14:59.456 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:14:59.456 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:14:59.456 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:14:59.456 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:14:59.456 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:14:59.456 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:14:59.471 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:14:59.471 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:14:59.472 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:14:59.472 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:14:59.472 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:14:59.474 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:14:59.475 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:14:59.475 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:14:59.475 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:14:59.475 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:14:59.475 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:14:59.475 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:14:59.475 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:14:59.478 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:14:59.478 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:14:59.478 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:14:59.478 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:14:59.478 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:14:59.479 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:14:59.479 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:14:59.479 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:14:59.481 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:14:59.481 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:14:59.481 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:14:59.481 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:14:59.481 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:14:59.481 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:14:59.481 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:14:59.481 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:14:59.485 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:14:59.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:14:59.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:14:59.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:14:59.485 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:14:59.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:14:59.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:14:59.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:14:59.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:14:59.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:59.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:59.486 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:14:59.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:59.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:59.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:59.486 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:14:59.486 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:14:59.486 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:14:59.486 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:14:59.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:59.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:59.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:59.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:14:59.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:59.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:59.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:59.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:59.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:59.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:59.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:59.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:59.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:59.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:59.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:59.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:59.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:59.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:59.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:59.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:59.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:14:59.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:59.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:59.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:14:59.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:59.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:59.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:14:59.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:14:59.491 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:14:59.969 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:15:00.014 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:15:00.016 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:15:00.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:15:00.018 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:15:00.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:15:00.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:15:00.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:15:00.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:15:00.045 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:15:00.045 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:15:00.046 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:15:00.046 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:15:00.440 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:15:00.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:15:00.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:15:00.490 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:15:00.490 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:15:00.912 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:15:01.384 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:15:01.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:15:01.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:15:01.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:15:01.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:15:01.855 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:15:02.329 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:15:02.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:15:02.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:15:02.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:15:02.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:15:02.801 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:15:03.273 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:15:03.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:15:03.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:15:03.493 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:15:03.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:15:03.744 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:15:04.217 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:15:04.495 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:15:04.495 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:15:04.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:15:04.495 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:15:04.690 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:15:04.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD NOHANDOVER
2026-02-08 04:15:04.954 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:15:04.954 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:15:04.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:15:04.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:15:05.162 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:15:05.636 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:15:06.109 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:15:06.583 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:15:07.055 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:15:07.527 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:15:08.001 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:15:08.475 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:15:08.947 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:15:09.420 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:15:09.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD NOHANDOVER
2026-02-08 04:15:09.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:15:09.545 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:15:09.545 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:15:09.556 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:15:09.556 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:15:09.556 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:15:09.556 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:15:09.558 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:15:09.558 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:15:09.558 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:15:09.558 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:15:09.558 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:15:09.558 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:15:09.558 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:15:09.558 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2174 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:09.558 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2174 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:14.564 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:15:14.564 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:15:14.564 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:15:14.564 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:15:14.564 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:15:14.564 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:15:14.571 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:15:14.572 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:15:14.572 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:15:14.572 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:15:14.572 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:15:14.577 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:15:14.577 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:15:14.578 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:15:14.578 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:15:14.578 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:15:14.579 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:15:14.579 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:15:14.579 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:15:14.582 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:15:14.583 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:15:14.583 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:15:14.583 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:15:14.583 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:15:14.584 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:15:14.584 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:15:14.584 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:15:14.587 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:15:14.587 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:15:14.588 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:15:14.588 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:15:14.588 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:15:14.588 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:15:14.589 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:15:14.589 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:15:14.593 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:15:14.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:15:14.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:15:14.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:15:14.593 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:15:14.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:15:14.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:15:14.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:15:14.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:15:14.594 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:15:14.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:15:14.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:15:14.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:15:14.594 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:15:14.594 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:15:14.594 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:15:14.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:15:14.594 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:15:14.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:15:14.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:15:14.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:15:14.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:15:14.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:15:14.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:15:14.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:15:14.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:15:14.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:15:14.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:15:14.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:15:14.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:15:14.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:15:14.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:15:14.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:15:14.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:15:14.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:15:14.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:15:14.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:15:14.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:15:14.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:15:14.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:15:14.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:15:14.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:15:14.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:15:14.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:15:14.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:15:14.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:15:14.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:15:14.599 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:15:15.079 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:15:15.122 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:15:15.123 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:15:15.124 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:15:15.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:15:15.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:15:15.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:15:15.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:15:15.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:15:15.150 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:15:15.151 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:15:15.151 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:15:15.151 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:15:15.551 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:15:15.598 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:15:15.598 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:15:15.599 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:15:15.601 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:15:16.022 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:15:16.496 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:15:16.599 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:15:16.599 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:15:16.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:15:16.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:15:16.968 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:15:17.440 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:15:17.599 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:15:17.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:15:17.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:15:17.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:15:17.914 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:15:18.386 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:15:18.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:15:18.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:15:18.601 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:15:18.604 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:15:18.859 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:15:19.329 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:15:19.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:15:19.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:15:19.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:15:19.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:15:19.800 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:15:20.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD NOHANDOVER
2026-02-08 04:15:20.063 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:15:20.063 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:15:20.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:15:20.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:15:20.274 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:15:20.746 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:15:21.219 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:15:21.692 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:15:22.165 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:15:22.639 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:15:23.112 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:15:23.585 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:15:24.059 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:15:24.531 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:15:24.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD NOHANDOVER
2026-02-08 04:15:24.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:15:24.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:15:24.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:15:24.673 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:15:24.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:15:24.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:15:24.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:15:24.679 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:15:24.679 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:15:24.679 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:15:24.679 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:15:24.680 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:15:24.680 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:15:24.680 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:15:24.680 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2174 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:24.680 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2174 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:24.680 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2174 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:24.681 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2174 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:24.681 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2175 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:24.681 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2175 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:24.681 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2175 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:24.681 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2175 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:24.681 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2175 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:24.681 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2175 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:24.681 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2175 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:24.681 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2175 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:24.681 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2176 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:24.681 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2176 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:24.682 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2176 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:24.682 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2176 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:24.682 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2176 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:24.682 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2176 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:24.682 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2176 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:24.682 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2176 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:29.680 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:15:29.680 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:15:29.680 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:15:29.680 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:15:29.680 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:15:29.680 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:15:29.688 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:15:29.690 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:15:29.690 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:15:29.691 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:15:29.691 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:15:29.695 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:15:29.696 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:15:29.696 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:15:29.696 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:15:29.697 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:15:29.697 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:15:29.698 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:15:29.698 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:15:29.701 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:15:29.701 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:15:29.702 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:15:29.702 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:15:29.702 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:15:29.702 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:15:29.703 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:15:29.703 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:15:29.706 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:15:29.706 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:15:29.706 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:15:29.706 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:15:29.706 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:15:29.706 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:15:29.707 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:15:29.707 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:15:29.711 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:15:29.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:15:29.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:15:29.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:15:29.711 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:15:29.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:15:29.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:15:29.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:15:29.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:15:29.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:15:29.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:15:29.712 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:15:29.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:15:29.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:15:29.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:15:29.712 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:15:29.712 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:15:29.712 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:15:29.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:15:29.712 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:15:29.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:15:29.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:15:29.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:15:29.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:15:29.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:15:29.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:15:29.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:15:29.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:15:29.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:15:29.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:15:29.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:15:29.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:15:29.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:15:29.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:15:29.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:15:29.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:15:29.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:15:29.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:15:29.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:15:29.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:15:29.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:15:29.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:15:29.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:15:29.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:15:29.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:15:29.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:15:29.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:15:29.717 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:15:30.195 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:15:30.241 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:15:30.243 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:15:30.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:15:30.245 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:15:30.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:15:30.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:15:30.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:15:30.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:15:30.268 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:15:30.268 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:15:30.268 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:15:30.268 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:15:30.667 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:15:30.716 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:15:30.717 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:15:30.717 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:15:30.717 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:15:31.138 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:15:31.612 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:15:31.718 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:15:31.718 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:15:31.718 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:15:31.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:15:32.084 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:15:32.556 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:15:32.719 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:15:32.720 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:15:32.720 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:15:32.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:15:33.030 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:15:33.502 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:15:33.720 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:15:33.721 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:15:33.721 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:15:33.721 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:15:33.974 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:15:34.445 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:15:34.722 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:15:34.722 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:15:34.722 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:15:34.722 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:15:34.919 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:15:35.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD NOHANDOVER
2026-02-08 04:15:35.177 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:15:35.178 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:15:35.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:15:35.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:15:35.392 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:15:35.863 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:15:36.328 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:15:36.793 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:15:37.258 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:15:37.724 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:15:38.190 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:15:38.656 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:15:39.127 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:15:39.601 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:15:39.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD NOHANDOVER
2026-02-08 04:15:39.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:15:39.725 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:15:39.726 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:15:39.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:15:39.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:15:39.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:15:39.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:15:39.743 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:15:39.744 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:15:39.744 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:15:39.744 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:15:39.744 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:15:39.744 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:15:39.745 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:15:39.745 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2174 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:39.745 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2174 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:39.745 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2174 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:39.745 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2174 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:39.745 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2174 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:39.745 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2174 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:39.745 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2174 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:39.745 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2175 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:39.745 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2175 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:39.746 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2175 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:39.746 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2175 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:39.746 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2175 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:39.746 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2175 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:39.746 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2175 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:39.746 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2175 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:15:44.746 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:15:44.746 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:15:44.746 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:15:44.746 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:15:44.746 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:15:44.746 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:15:44.756 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:15:44.758 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:15:44.758 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:15:44.758 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:15:44.758 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:15:44.763 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:15:44.763 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:15:44.763 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:15:44.764 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:15:44.764 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:15:44.764 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:15:44.765 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:15:44.765 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:15:44.768 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:15:44.769 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:15:44.769 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:15:44.769 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:15:44.769 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:15:44.770 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:15:44.770 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:15:44.770 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:15:44.773 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:15:44.773 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:15:44.773 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:15:44.774 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:15:44.774 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:15:44.774 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:15:44.774 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:15:44.774 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:15:44.779 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:15:44.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:15:44.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:15:44.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:15:44.779 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:15:44.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:15:44.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:15:44.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:15:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:15:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:15:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:15:44.780 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:15:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:15:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:15:44.780 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:15:44.780 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:15:44.780 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:15:44.780 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:15:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:15:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:15:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:15:44.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:15:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:15:44.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:15:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:15:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:15:44.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:15:44.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:15:44.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:15:44.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:15:44.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:15:44.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:15:44.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:15:44.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:15:44.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:15:44.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:15:44.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:15:44.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:15:44.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:15:44.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:15:44.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:15:44.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:15:44.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:15:44.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:15:44.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:15:44.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:15:44.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:15:44.785 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:15:45.262 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:15:45.307 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:15:45.309 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:15:45.311 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:15:45.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:15:45.734 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:15:45.784 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:15:45.784 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:15:45.784 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:15:45.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:15:46.209 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:15:46.681 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:15:46.785 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:15:46.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:15:46.786 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:15:46.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:15:47.156 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:15:47.628 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:15:47.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:15:47.787 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:15:47.787 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:15:47.787 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:15:48.103 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:15:48.574 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:15:48.788 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:15:48.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:15:48.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:15:48.789 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:15:49.046 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:15:49.517 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:15:49.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:15:49.790 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:15:49.790 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:15:49.790 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:15:49.992 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:15:50.464 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:15:50.938 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:15:51.410 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:15:51.882 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:15:52.356 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:15:52.828 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:15:53.300 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:15:53.771 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:15:54.245 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:15:54.717 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:15:55.190 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:15:55.324 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:15:55.325 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:15:55.325 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:15:55.325 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:15:55.326 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:15:55.326 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:15:55.326 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:15:55.326 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:15:55.326 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:15:55.326 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:15:55.326 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:15:55.327 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2275 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:16:00.332 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:16:00.332 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:16:00.332 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:16:00.332 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:16:00.332 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:16:00.332 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:16:00.342 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:16:00.343 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:16:00.343 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:16:00.344 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:16:00.344 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:16:00.348 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:16:00.348 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:16:00.349 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:16:00.349 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:16:00.349 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:16:00.349 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:16:00.350 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:16:00.350 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:16:00.353 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:16:00.353 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:16:00.353 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:16:00.353 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:16:00.354 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:16:00.354 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:16:00.354 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:16:00.355 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:16:00.357 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:16:00.357 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:16:00.358 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:16:00.358 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:16:00.358 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:16:00.358 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:16:00.358 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:16:00.358 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:16:00.363 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:16:00.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:16:00.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:16:00.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:16:00.363 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:16:00.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:16:00.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:16:00.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:16:00.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:16:00.364 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:16:00.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:00.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:00.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:00.364 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:16:00.364 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:16:00.364 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:16:00.364 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:16:00.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:00.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:00.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:00.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:16:00.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:00.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:00.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:00.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:00.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:00.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:00.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:00.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:00.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:00.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:00.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:00.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:00.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:00.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:00.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:00.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:00.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:00.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:00.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:00.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:00.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:00.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:00.367 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:16:00.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:00.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:00.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:00.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:00.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:16:00.367 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:16:00.367 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:16:00.367 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:16:00.367 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:16:00.367 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:16:05.371 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:16:05.371 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:16:05.371 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:16:05.371 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:16:05.371 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:16:05.371 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:16:05.375 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:16:05.375 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:16:05.375 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:16:05.376 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:16:05.376 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:16:05.377 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:16:05.377 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:16:05.377 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:16:05.377 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:16:05.377 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:16:05.377 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:16:05.377 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:16:05.377 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:16:05.378 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:16:05.378 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:16:05.379 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:16:05.379 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:16:05.379 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:16:05.379 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:16:05.379 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:16:05.379 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:16:05.380 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:16:05.380 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:16:05.380 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:16:05.380 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:16:05.380 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:16:05.380 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:16:05.380 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:16:05.380 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:16:05.383 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:16:05.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:16:05.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:16:05.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:16:05.383 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:16:05.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:16:05.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:16:05.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:16:05.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:16:05.383 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:16:05.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:05.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:05.383 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:16:05.383 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:16:05.383 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:16:05.383 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:16:05.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:05.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:05.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:05.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:16:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:05.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:05.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:05.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:05.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:05.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:05.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:05.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:05.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:05.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:05.388 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:16:05.854 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:16:05.897 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:16:05.898 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:16:05.898 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:16:05.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:16:05.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:16:05.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:16:05.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:16:05.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:16:05.899 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:16:05.899 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:16:05.899 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:16:05.899 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:16:06.317 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:16:06.386 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:16:06.386 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:16:06.386 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:16:06.386 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:16:06.780 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:16:07.248 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:16:07.387 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:16:07.387 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:16:07.387 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:16:07.387 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:16:07.715 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:16:08.180 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:16:08.387 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:16:08.387 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:16:08.387 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:16:08.387 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:16:08.646 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:16:09.112 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:16:09.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:16:09.388 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:16:09.388 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:16:09.388 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:16:09.578 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:16:10.046 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:16:10.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:16:10.388 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:16:10.388 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:16:10.389 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:16:10.518 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:16:10.985 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:16:11.454 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:16:11.921 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:16:12.386 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:16:12.857 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:16:13.328 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:16:13.799 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:16:13.947 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:16:13.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:16:13.953 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:16:13.953 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:16:13.953 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:16:13.953 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:16:13.958 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:16:13.959 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:16:13.959 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:16:13.959 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:16:13.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:16:13.959 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:16:13.960 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:16:13.960 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1871 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:16:13.960 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1871 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:16:13.960 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1871 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:16:13.960 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1872 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:16:13.960 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1872 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:16:13.960 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1872 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:16:13.960 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1872 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:16:13.960 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1872 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:16:13.960 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1872 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:16:13.960 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1872 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:16:13.960 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1872 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:16:13.961 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1873 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:16:13.961 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1873 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:16:13.961 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1873 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:16:13.961 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1873 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:16:13.961 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1873 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:16:13.961 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1873 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:16:18.958 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:16:18.958 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:16:18.958 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:16:18.958 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:16:18.958 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:16:18.958 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:16:18.963 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:16:18.963 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:16:18.963 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:16:18.964 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:16:18.964 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:16:18.965 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:16:18.965 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:16:18.965 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:16:18.965 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:16:18.965 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:16:18.965 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:16:18.965 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:16:18.965 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:16:18.967 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:16:18.967 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:16:18.967 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:16:18.967 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:16:18.967 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:16:18.967 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:16:18.967 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:16:18.967 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:16:18.969 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:16:18.969 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:16:18.969 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:16:18.969 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:16:18.969 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:16:18.969 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:16:18.969 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:16:18.969 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:16:18.972 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:16:18.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:16:18.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:16:18.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:16:18.972 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:16:18.973 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:16:18.973 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:16:18.973 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:18.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:18.975 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:16:18.975 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:16:18.975 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:16:18.975 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:16:18.975 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:16:18.975 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:16:18.975 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:16:23.984 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:16:23.984 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:16:23.984 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:16:23.984 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:16:23.984 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:16:23.984 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:16:23.991 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:16:23.992 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:16:23.992 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:16:23.992 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:16:23.992 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:16:23.994 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:16:23.994 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:16:23.994 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:16:23.995 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:16:23.995 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:16:23.995 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:16:23.995 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:16:23.995 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:16:23.997 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:16:23.997 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:16:23.997 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:16:23.997 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:16:23.997 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:16:23.998 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:16:23.998 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:16:23.998 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:16:23.999 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:16:23.999 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:16:23.999 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:16:23.999 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:16:24.000 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:16:24.000 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:16:24.000 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:16:24.000 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:16:24.003 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:16:24.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:16:24.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:16:24.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:16:24.003 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:16:24.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:16:24.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:16:24.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:16:24.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:16:24.003 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:16:24.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:24.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:24.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:24.003 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:16:24.003 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:16:24.003 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:16:24.003 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:16:24.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:24.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:24.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:24.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:16:24.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:24.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:24.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:24.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:24.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:24.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:24.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:24.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:24.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:24.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:24.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:24.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:24.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:24.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:24.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:24.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:24.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:24.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:24.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:24.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:24.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:24.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:24.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:24.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:24.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:24.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:24.008 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:16:24.487 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:16:24.535 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:16:24.537 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:16:24.539 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:16:24.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:16:24.542 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:16:24.543 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:16:24.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:16:24.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:16:24.544 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:16:24.544 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:16:24.544 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:16:24.544 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:16:24.959 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:16:25.006 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:16:25.008 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:16:25.008 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:16:25.008 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:16:25.421 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:16:25.885 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:16:26.007 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:16:26.008 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:16:26.008 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:16:26.008 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:16:26.350 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:16:26.815 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:16:27.007 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:16:27.009 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:16:27.009 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:16:27.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:16:27.277 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:16:27.740 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:16:28.008 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:16:28.009 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:16:28.009 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:16:28.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:16:28.202 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:16:28.665 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:16:29.009 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:16:29.010 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:16:29.010 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:16:29.010 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:16:29.135 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:16:29.606 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:16:30.074 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:16:30.544 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:16:31.014 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:16:31.485 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:16:31.956 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:16:32.426 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:16:32.579 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:16:32.579 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:16:32.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:16:32.585 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:16:32.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:16:32.585 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:16:32.590 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:16:32.591 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:16:32.591 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:16:32.591 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:16:32.591 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:16:32.591 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:16:32.591 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:16:32.592 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1873 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:16:32.592 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1873 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:16:32.592 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1873 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:16:32.592 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1873 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:16:32.592 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1873 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:16:32.592 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1873 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:16:37.590 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:16:37.590 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:16:37.590 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:16:37.591 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:16:37.591 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:16:37.591 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:16:37.597 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:16:37.597 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:16:37.597 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:16:37.598 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:16:37.598 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:16:37.599 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:16:37.599 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:16:37.600 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:16:37.600 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:16:37.600 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:16:37.600 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:16:37.600 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:16:37.600 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:16:37.601 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:16:37.602 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:16:37.602 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:16:37.602 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:16:37.602 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:16:37.602 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:16:37.602 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:16:37.602 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:16:37.604 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:16:37.604 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:16:37.604 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:16:37.604 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:16:37.604 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:16:37.604 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:16:37.604 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:16:37.604 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:16:37.607 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:16:37.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:16:37.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:16:37.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:16:37.607 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:16:37.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:16:37.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:16:37.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:16:37.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:16:37.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:37.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:37.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:37.608 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:16:37.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:37.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:37.608 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:16:37.608 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:16:37.608 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:16:37.608 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:16:37.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:37.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:37.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:37.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:16:37.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:37.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:37.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:37.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:37.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:37.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:37.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:37.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:37.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:37.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:37.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:37.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:37.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:37.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:37.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:37.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:37.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:37.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:37.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:37.609 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:16:37.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:37.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:37.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:37.609 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:16:37.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:37.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:37.609 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:16:37.609 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:16:37.609 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:16:37.609 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:16:37.609 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:16:42.625 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:16:42.625 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:16:42.625 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:16:42.625 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:16:42.625 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:16:42.625 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:16:42.640 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:16:42.641 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:16:42.641 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:16:42.642 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:16:42.642 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:16:42.645 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:16:42.645 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:16:42.645 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:16:42.645 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:16:42.645 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:16:42.645 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:16:42.645 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:16:42.645 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:16:42.648 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:16:42.648 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:16:42.648 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:16:42.648 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:16:42.648 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:16:42.648 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:16:42.648 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:16:42.648 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:16:42.650 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:16:42.651 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:16:42.651 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:16:42.651 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:16:42.651 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:16:42.651 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:16:42.651 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:16:42.651 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:16:42.654 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:16:42.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:16:42.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:16:42.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:16:42.654 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:16:42.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:16:42.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:16:42.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:42.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:16:42.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:16:42.655 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:16:42.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:42.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:42.655 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:16:42.655 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:16:42.655 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:16:42.655 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:16:42.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:42.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:42.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:42.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:16:42.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:42.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:42.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:42.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:42.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:42.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:42.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:42.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:42.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:42.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:42.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:42.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:42.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:42.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:42.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:42.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:42.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:42.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:42.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:42.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:42.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:42.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:42.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:42.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:42.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:42.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:42.660 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:16:43.130 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:16:43.170 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:16:43.171 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:16:43.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:16:43.172 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:16:43.173 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:16:43.173 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:16:43.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:16:43.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:16:43.173 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:16:43.173 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:16:43.173 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:16:43.173 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:16:43.598 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:16:43.657 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:16:43.658 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:16:43.658 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:16:43.658 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:16:44.066 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:16:44.536 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:16:44.658 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:16:44.659 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:16:44.659 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:16:44.660 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:16:45.005 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:16:45.476 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:16:45.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:16:45.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:16:45.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:16:45.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:16:45.947 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:16:46.418 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:16:46.662 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:16:46.662 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:16:46.663 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:16:46.663 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:16:46.889 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:16:47.358 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:16:47.663 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:16:47.664 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:16:47.664 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:16:47.664 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:16:47.829 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:16:48.294 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:16:48.758 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:16:49.224 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:16:49.690 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:16:50.155 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:16:50.623 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:16:51.086 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:16:51.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:16:51.220 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:16:51.222 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:16:51.222 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:16:51.222 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:16:51.222 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:16:51.223 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:16:51.223 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:16:51.223 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:16:51.223 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:16:51.223 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:16:51.223 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:16:51.223 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:16:51.223 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1868 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:16:51.223 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1868 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:16:51.223 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1868 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:16:56.226 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:16:56.226 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:16:56.226 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:16:56.226 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:16:56.226 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:16:56.226 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:16:56.231 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:16:56.232 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:16:56.232 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:16:56.232 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:16:56.232 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:16:56.233 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:16:56.234 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:16:56.234 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:16:56.234 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:16:56.234 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:16:56.234 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:16:56.234 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:16:56.234 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:16:56.235 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:16:56.235 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:16:56.236 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:16:56.236 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:16:56.236 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:16:56.236 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:16:56.236 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:16:56.236 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:16:56.237 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:16:56.237 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:16:56.237 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:16:56.237 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:16:56.237 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:16:56.238 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:16:56.238 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:16:56.238 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:16:56.240 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:16:56.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:16:56.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:16:56.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:16:56.240 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:16:56.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:16:56.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:16:56.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:16:56.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:16:56.240 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:16:56.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:56.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:56.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:56.240 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:16:56.240 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:16:56.240 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:16:56.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:56.240 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:16:56.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:56.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:56.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:16:56.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:56.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:56.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:56.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:56.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:56.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:56.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:56.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:56.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:56.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:56.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:56.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:56.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:56.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:56.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:56.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:56.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:56.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:56.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:56.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:16:56.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:56.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:56.242 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:16:56.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:56.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:16:56.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:16:56.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:16:56.242 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:16:56.242 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:16:56.242 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:16:56.242 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:16:56.242 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:16:56.242 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:17:01.253 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:17:01.254 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:17:01.254 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:17:01.254 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:17:01.254 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:17:01.254 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:17:01.262 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:17:01.262 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:17:01.262 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:17:01.263 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:17:01.263 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:17:01.265 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:17:01.265 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:17:01.265 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:17:01.265 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:17:01.265 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:17:01.265 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:17:01.266 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:17:01.266 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:17:01.267 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:17:01.268 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:17:01.268 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:17:01.268 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:17:01.268 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:17:01.268 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:17:01.268 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:17:01.268 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:17:01.270 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:17:01.270 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:17:01.270 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:17:01.270 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:17:01.270 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:17:01.270 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:17:01.270 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:17:01.270 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:17:01.275 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:17:01.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:17:01.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:17:01.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:17:01.276 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:17:01.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:17:01.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:17:01.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:17:01.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:17:01.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:01.276 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:17:01.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:01.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:01.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:01.276 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:17:01.276 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:17:01.276 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:17:01.276 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:17:01.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:01.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:01.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:01.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:17:01.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:01.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:01.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:01.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:01.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:01.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:01.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:01.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:01.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:01.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:01.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:01.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:01.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:01.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:01.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:01.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:01.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:01.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:01.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:01.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:01.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:01.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:01.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:01.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:01.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:01.281 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:17:01.751 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:17:01.792 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:17:01.793 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:17:01.794 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:17:01.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:17:01.796 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:17:01.796 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:17:01.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:17:01.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:17:01.796 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:17:01.796 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:17:01.796 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:17:01.796 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:17:02.217 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:17:02.278 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:17:02.279 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:17:02.280 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:17:02.280 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:17:02.685 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:17:03.154 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:17:03.279 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:17:03.279 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:17:03.281 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:17:03.281 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:17:03.627 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:17:04.099 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:17:04.281 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:17:04.281 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:17:04.281 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:17:04.282 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:17:04.570 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:17:05.043 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:17:05.282 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:17:05.283 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:17:05.283 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:17:05.283 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:17:05.516 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:17:05.988 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:17:06.283 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:17:06.284 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:17:06.284 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:17:06.284 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:17:06.459 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:17:06.932 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:17:07.405 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:17:07.877 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:17:08.348 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:17:08.821 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:17:09.294 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:17:09.766 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:17:09.845 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:17:09.846 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:17:09.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:17:09.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:17:09.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:17:09.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:17:09.848 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:17:09.848 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:17:09.848 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:17:09.848 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:17:09.849 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:17:09.849 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:17:09.849 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:17:09.849 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1856 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:17:09.849 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1856 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:17:09.849 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:17:09.849 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:17:09.849 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:17:09.849 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:17:14.851 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:17:14.851 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:17:14.851 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:17:14.851 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:17:14.851 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:17:14.851 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:17:14.855 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:17:14.855 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:17:14.855 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:17:14.855 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:17:14.855 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:17:14.857 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:17:14.857 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:17:14.857 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:17:14.857 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:17:14.857 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:17:14.857 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:17:14.857 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:17:14.857 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:17:14.858 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:17:14.858 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:17:14.859 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:17:14.859 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:17:14.859 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:17:14.859 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:17:14.859 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:17:14.859 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:17:14.860 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:17:14.860 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:17:14.860 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:17:14.860 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:17:14.860 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:17:14.860 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:17:14.860 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:17:14.860 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:17:14.863 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:17:14.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:17:14.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:17:14.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:17:14.863 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:17:14.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:17:14.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:17:14.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:17:14.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:17:14.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:14.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:14.863 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:17:14.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:14.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:14.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:14.863 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:17:14.863 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:17:14.863 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:17:14.863 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:17:14.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:14.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:14.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:14.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:17:14.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:14.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:14.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:14.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:14.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:14.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:14.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:14.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:14.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:14.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:14.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:14.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:14.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:14.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:14.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:14.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:14.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:14.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:14.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:14.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:14.865 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:17:14.865 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:17:14.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:14.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:14.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:14.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:14.865 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:17:14.865 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:17:14.865 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:17:14.865 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:17:14.865 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:17:19.869 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:17:19.869 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:17:19.869 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:17:19.869 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:17:19.869 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:17:19.869 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:17:19.873 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:17:19.873 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:17:19.873 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:17:19.873 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:17:19.873 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:17:19.874 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:17:19.875 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:17:19.875 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:17:19.875 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:17:19.875 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:17:19.875 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:17:19.875 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:17:19.875 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:17:19.876 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:17:19.876 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:17:19.877 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:17:19.877 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:17:19.877 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:17:19.877 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:17:19.877 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:17:19.877 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:17:19.878 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:17:19.878 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:17:19.878 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:17:19.878 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:17:19.879 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:17:19.879 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:17:19.879 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:17:19.879 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:17:19.881 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:17:19.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:17:19.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:17:19.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:17:19.881 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:17:19.882 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:17:19.882 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:17:19.882 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:19.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:19.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:19.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:19.887 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:17:20.349 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:17:20.398 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:17:20.398 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:17:20.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:17:20.399 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:17:20.400 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:17:20.400 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:17:20.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:17:20.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:17:20.401 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:17:20.401 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:17:20.401 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:17:20.401 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:17:20.812 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:17:20.885 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:17:20.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:17:20.886 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:17:20.889 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:17:21.276 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:17:21.739 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:17:21.886 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:17:21.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:17:21.886 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:17:21.890 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:17:22.202 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:17:22.666 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:17:22.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:17:22.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:17:22.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:17:22.890 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:17:23.129 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:17:23.593 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:17:23.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:17:23.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:17:23.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:17:23.891 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:17:24.056 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:17:24.519 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:17:24.888 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:17:24.888 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:17:24.888 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:17:24.891 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:17:24.983 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:17:25.446 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:17:25.910 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:17:26.373 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:17:26.837 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:17:27.301 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:17:27.764 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:17:28.228 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:17:28.692 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:17:29.156 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:17:29.620 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:17:30.083 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:17:30.547 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:17:31.010 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:17:31.477 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:17:31.944 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:17:32.407 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:17:32.871 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:17:33.334 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:17:33.799 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:17:34.262 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:17:34.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:17:34.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:17:34.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:17:34.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:17:34.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:17:34.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:17:34.442 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:17:34.442 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:17:34.442 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:17:34.442 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:17:34.442 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:17:34.442 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:17:34.442 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:17:39.444 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:17:39.444 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:17:39.444 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:17:39.444 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:17:39.444 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:17:39.444 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:17:39.449 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:17:39.449 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:17:39.449 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:17:39.449 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:17:39.449 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:17:39.450 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:17:39.450 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:17:39.450 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:17:39.451 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:17:39.451 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:17:39.451 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:17:39.451 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:17:39.451 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:17:39.452 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:17:39.452 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:17:39.452 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:17:39.452 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:17:39.453 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:17:39.453 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:17:39.453 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:17:39.453 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:17:39.454 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:17:39.454 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:17:39.454 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:17:39.454 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:17:39.454 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:17:39.454 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:17:39.454 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:17:39.454 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:17:39.459 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:17:39.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:17:39.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:17:39.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:17:39.459 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:17:39.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:17:39.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:17:39.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:17:39.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:17:39.459 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:17:39.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:39.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:39.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:39.459 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:17:39.459 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:17:39.459 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:17:39.459 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:17:39.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:39.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:39.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:39.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:17:39.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:39.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:39.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:39.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:39.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:39.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:39.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:39.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:39.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:39.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:39.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:39.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:39.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:39.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:39.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:39.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:39.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:39.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:39.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:39.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:39.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:39.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:39.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:39.461 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:17:39.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:39.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:39.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:39.461 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:17:39.461 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:17:39.461 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:17:39.461 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:17:39.461 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:17:39.461 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:17:44.465 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:17:44.465 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:17:44.465 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:17:44.465 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:17:44.465 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:17:44.465 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:17:44.470 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:17:44.471 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:17:44.471 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:17:44.471 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:17:44.471 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:17:44.473 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:17:44.473 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:17:44.473 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:17:44.473 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:17:44.474 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:17:44.474 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:17:44.474 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:17:44.474 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:17:44.476 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:17:44.476 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:17:44.476 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:17:44.476 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:17:44.476 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:17:44.476 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:17:44.476 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:17:44.476 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:17:44.478 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:17:44.478 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:17:44.478 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:17:44.478 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:17:44.478 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:17:44.479 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:17:44.479 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:17:44.479 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:17:44.482 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:17:44.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:17:44.482 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:17:44.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:17:44.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:17:44.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:17:44.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:17:44.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:17:44.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:44.482 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:17:44.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:44.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:17:44.482 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:17:44.482 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:17:44.482 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:17:44.482 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:17:44.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:44.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:44.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:44.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:17:44.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:44.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:44.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:44.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:44.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:44.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:44.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:44.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:44.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:44.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:44.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:44.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:44.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:44.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:44.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:44.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:44.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:44.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:44.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:44.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:44.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:44.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:44.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:44.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:44.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:44.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:44.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:44.487 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:17:44.951 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:17:44.998 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:17:44.998 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:17:44.999 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:17:44.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:17:44.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:17:44.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:17:44.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:17:44.999 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:17:45.000 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:17:45.000 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:17:45.000 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:17:45.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:17:45.414 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:17:45.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:17:45.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:17:45.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:17:45.487 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:17:45.877 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:17:46.340 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:17:46.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:17:46.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:17:46.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:17:46.487 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:17:46.803 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:17:47.266 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:17:47.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:17:47.487 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:17:47.487 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:17:47.488 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:17:47.729 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:17:48.193 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:17:48.488 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:17:48.488 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:17:48.488 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:17:48.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:17:48.657 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:17:49.121 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:17:49.488 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:17:49.488 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:17:49.488 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:17:49.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:17:49.584 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:17:50.047 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:17:50.511 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:17:50.974 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:17:51.438 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:17:51.904 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:17:52.368 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:17:52.832 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:17:53.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:17:53.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:17:53.042 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:17:53.042 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:17:53.042 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:17:53.042 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:17:53.043 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:17:53.043 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:17:53.043 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:17:53.043 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:17:53.043 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:17:53.043 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:17:53.043 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:17:58.052 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:17:58.052 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:17:58.052 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:17:58.052 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:17:58.052 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:17:58.052 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:17:58.067 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:17:58.068 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:17:58.068 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:17:58.069 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:17:58.069 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:17:58.076 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:17:58.076 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:17:58.076 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:17:58.076 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:17:58.077 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:17:58.077 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:17:58.078 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:17:58.078 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:17:58.081 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:17:58.081 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:17:58.081 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:17:58.081 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:17:58.081 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:17:58.081 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:17:58.082 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:17:58.082 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:17:58.085 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:17:58.085 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:17:58.085 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:17:58.085 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:17:58.086 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:17:58.086 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:17:58.086 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:17:58.086 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:17:58.090 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:17:58.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:17:58.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:17:58.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:17:58.090 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:17:58.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:17:58.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:17:58.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:58.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:17:58.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:17:58.091 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:17:58.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:58.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:58.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:58.091 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:17:58.091 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:17:58.091 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:17:58.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:58.091 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:17:58.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:58.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:58.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:17:58.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:58.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:58.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:58.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:58.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:58.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:58.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:58.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:58.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:58.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:58.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:58.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:58.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:58.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:58.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:58.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:58.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:58.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:17:58.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:58.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:58.093 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:17:58.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:58.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:58.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:17:58.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:17:58.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:17:58.093 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:17:58.093 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:17:58.093 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:17:58.093 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:17:58.093 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:17:58.093 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:18:03.097 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:18:03.097 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:18:03.097 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:18:03.097 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:18:03.097 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:18:03.097 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:18:03.103 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:18:03.103 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:18:03.103 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:18:03.104 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:18:03.104 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:18:03.105 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:18:03.105 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:18:03.105 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:18:03.105 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:18:03.105 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:18:03.105 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:18:03.105 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:18:03.105 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:18:03.107 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:18:03.107 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:18:03.107 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:18:03.107 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:18:03.107 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:18:03.107 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:18:03.107 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:18:03.107 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:18:03.108 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:18:03.109 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:18:03.109 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:18:03.109 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:18:03.109 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:18:03.109 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:18:03.109 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:18:03.109 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:18:03.113 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:18:03.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:18:03.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:18:03.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:18:03.113 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:18:03.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:18:03.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:18:03.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:03.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:18:03.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:18:03.113 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:18:03.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:03.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:03.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:03.113 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:18:03.113 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:18:03.113 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:18:03.113 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:18:03.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:03.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:03.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:03.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:18:03.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:03.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:03.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:03.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:03.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:03.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:03.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:03.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:03.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:03.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:03.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:03.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:03.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:03.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:03.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:03.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:03.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:03.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:03.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:03.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:03.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:03.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:03.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:03.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:03.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:03.118 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:18:03.581 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:18:03.628 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:18:03.629 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:18:03.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:18:03.630 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:18:03.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:18:03.631 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:18:03.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:18:03.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:18:03.631 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:18:03.631 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:18:03.631 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:18:03.631 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:18:04.044 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:18:04.116 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:18:04.116 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:18:04.117 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:18:04.117 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:18:04.510 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:18:04.977 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:18:05.117 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:18:05.117 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:18:05.117 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:18:05.117 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:18:05.443 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:18:05.909 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:18:06.118 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:18:06.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:18:06.118 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:18:06.118 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:18:06.373 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:18:06.837 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:18:07.118 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:18:07.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:18:07.119 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:18:07.119 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:18:07.302 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:18:07.773 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:18:08.119 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:18:08.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:18:08.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:18:08.120 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:18:08.244 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:18:08.718 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:18:09.190 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:18:09.662 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:18:10.133 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:18:10.607 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:18:11.079 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:18:11.551 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:18:12.022 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:18:12.495 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:18:12.968 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:18:13.440 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:18:13.678 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:18:13.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:18:13.684 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:18:13.684 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:18:13.684 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:18:13.684 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:18:13.685 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:18:13.685 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:18:13.685 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:18:13.685 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:18:13.685 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:18:13.685 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:18:13.685 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:18:13.685 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2298 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:18:13.685 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2298 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:18:13.685 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2298 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:18:13.685 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2298 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:18:13.685 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2298 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:18:13.685 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2299 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:18:13.685 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2299 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:18:13.685 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2299 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:18:13.685 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2299 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:18:13.686 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2299 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:18:13.686 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2299 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:18:13.686 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2299 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:18:13.686 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2299 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:18:18.692 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:18:18.692 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:18:18.692 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:18:18.692 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:18:18.692 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:18:18.692 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:18:18.699 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:18:18.700 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:18:18.700 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:18:18.700 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:18:18.700 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:18:18.702 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:18:18.702 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:18:18.703 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:18:18.703 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:18:18.703 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:18:18.703 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:18:18.703 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:18:18.704 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:18:18.705 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:18:18.705 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:18:18.705 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:18:18.705 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:18:18.705 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:18:18.706 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:18:18.706 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:18:18.706 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:18:18.708 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:18:18.708 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:18:18.708 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:18:18.708 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:18:18.708 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:18:18.708 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:18:18.708 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:18:18.708 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:18:18.711 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:18:18.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:18:18.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:18:18.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:18:18.711 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:18:18.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:18:18.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:18:18.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:18:18.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:18:18.711 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:18:18.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:18.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:18.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:18.711 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:18:18.711 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:18:18.711 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:18:18.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:18.712 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:18:18.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:18.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:18.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:18:18.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:18.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:18.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:18.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:18.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:18.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:18.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:18.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:18.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:18.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:18.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:18.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:18.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:18.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:18.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:18.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:18.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:18.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:18.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:18.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:18.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:18.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:18.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:18.713 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:18:18.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:18.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:18.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:18.713 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:18:18.713 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:18:18.713 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:18:18.713 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:18:18.713 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:18:18.713 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:18:23.721 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:18:23.721 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:18:23.721 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:18:23.721 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:18:23.721 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:18:23.721 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:18:23.729 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:18:23.730 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:18:23.731 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:18:23.731 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:18:23.731 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:18:23.735 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:18:23.736 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:18:23.736 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:18:23.736 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:18:23.736 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:18:23.737 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:18:23.737 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:18:23.737 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:18:23.741 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:18:23.741 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:18:23.742 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:18:23.742 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:18:23.742 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:18:23.742 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:18:23.743 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:18:23.743 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:18:23.746 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:18:23.746 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:18:23.746 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:18:23.746 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:18:23.747 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:18:23.747 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:18:23.747 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:18:23.747 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:18:23.752 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:18:23.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:18:23.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:18:23.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:18:23.753 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:18:23.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:18:23.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:18:23.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:18:23.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:18:23.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:23.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:23.753 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:18:23.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:23.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:23.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:23.754 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:18:23.754 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:18:23.754 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:18:23.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:23.754 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:18:23.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:23.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:23.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:18:23.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:23.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:23.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:23.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:23.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:23.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:23.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:23.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:23.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:23.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:23.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:23.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:23.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:23.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:23.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:23.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:23.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:23.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:23.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:23.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:23.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:23.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:23.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:23.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:23.759 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:18:24.237 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:18:24.285 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:18:24.287 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:18:24.287 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:18:24.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:18:24.288 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:18:24.288 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:18:24.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:18:24.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:18:24.288 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:18:24.288 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:18:24.288 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:18:24.288 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:18:24.709 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:18:24.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:18:24.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:18:24.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:18:24.765 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:18:25.180 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:18:25.654 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:18:25.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:18:25.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:18:25.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:18:25.765 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:18:26.126 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:18:26.598 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:18:26.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:18:26.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:18:26.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:18:26.766 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:18:27.069 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:18:27.543 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:18:27.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:18:27.764 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:18:27.764 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:18:27.768 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:18:28.015 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:18:28.488 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:18:28.764 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:18:28.765 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:18:28.765 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:18:28.768 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:18:28.958 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:18:29.432 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:18:29.904 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:18:30.377 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:18:30.848 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:18:31.321 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:18:31.794 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:18:32.266 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:18:32.737 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:18:33.210 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:18:33.683 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:18:34.155 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:18:34.626 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:18:35.099 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:18:35.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:18:35.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:18:35.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:18:35.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:18:35.334 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:18:35.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:18:35.334 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:18:35.335 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:18:35.335 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:18:35.335 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:18:35.335 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:18:35.335 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:18:35.335 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:18:40.342 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:18:40.342 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:18:40.342 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:18:40.342 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:18:40.342 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:18:40.342 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:18:40.351 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:18:40.353 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:18:40.353 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:18:40.354 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:18:40.354 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:18:40.358 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:18:40.358 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:18:40.359 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:18:40.359 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:18:40.359 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:18:40.360 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:18:40.360 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:18:40.360 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:18:40.363 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:18:40.363 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:18:40.363 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:18:40.363 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:18:40.364 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:18:40.364 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:18:40.364 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:18:40.364 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:18:40.366 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:18:40.367 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:18:40.367 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:18:40.367 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:18:40.367 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:18:40.367 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:18:40.367 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:18:40.367 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:18:40.371 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:18:40.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:18:40.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:18:40.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:18:40.371 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:18:40.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:18:40.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:18:40.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:40.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:18:40.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:18:40.372 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:18:40.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:40.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:40.372 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:18:40.372 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:18:40.372 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:18:40.372 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:18:40.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:40.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:40.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:40.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:18:40.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:40.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:40.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:40.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:40.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:40.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:40.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:40.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:40.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:40.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:40.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:40.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:40.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:40.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:40.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:40.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:40.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:40.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:40.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:40.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:40.374 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:18:40.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:40.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:40.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:40.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:40.374 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:18:40.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:40.374 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:18:40.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:40.374 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:18:40.374 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:18:40.374 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:18:40.374 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:18:45.382 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:18:45.382 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:18:45.382 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:18:45.382 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:18:45.382 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:18:45.382 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:18:45.391 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:18:45.392 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:18:45.392 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:18:45.393 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:18:45.393 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:18:45.396 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:18:45.396 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:18:45.397 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:18:45.397 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:18:45.397 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:18:45.397 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:18:45.398 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:18:45.398 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:18:45.400 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:18:45.401 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:18:45.401 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:18:45.401 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:18:45.401 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:18:45.401 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:18:45.402 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:18:45.402 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:18:45.404 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:18:45.404 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:18:45.404 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:18:45.404 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:18:45.404 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:18:45.404 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:18:45.404 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:18:45.404 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:18:45.408 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:18:45.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:18:45.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:18:45.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:18:45.408 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:18:45.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:18:45.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:18:45.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:18:45.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:18:45.409 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:18:45.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:45.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:45.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:45.409 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:18:45.409 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:18:45.409 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:18:45.409 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:18:45.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:45.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:45.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:45.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:18:45.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:45.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:45.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:45.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:45.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:45.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:45.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:45.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:45.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:45.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:45.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:45.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:45.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:45.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:45.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:45.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:45.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:45.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:45.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:18:45.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:45.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:45.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:45.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:45.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:18:45.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:18:45.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:18:45.414 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:18:45.892 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:18:45.938 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:18:45.940 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:18:45.940 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:18:45.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:18:45.942 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:18:45.942 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:18:45.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:18:45.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:18:45.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:18:45.943 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:18:45.943 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:18:45.944 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:18:46.365 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:18:46.413 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:18:46.413 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:18:46.413 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:18:46.413 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:18:46.836 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:18:47.310 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:18:47.414 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:18:47.415 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:18:47.415 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:18:47.415 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:18:47.782 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:18:48.254 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:18:48.416 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:18:48.416 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:18:48.416 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:18:48.416 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:18:48.725 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:18:49.198 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:18:49.417 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:18:49.417 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:18:49.417 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:18:49.417 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:18:49.671 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:18:50.143 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:18:50.418 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:18:50.419 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:18:50.419 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:18:50.419 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:18:50.617 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:18:51.089 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:18:51.562 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:18:52.033 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:18:52.506 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:18:52.979 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:18:53.451 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:18:53.922 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:18:54.395 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:18:54.868 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:18:55.340 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:18:55.811 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:18:56.284 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:18:56.756 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:18:57.237 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:18:57.710 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:18:58.181 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:18:58.654 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:18:59.126 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:18:59.599 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:19:00.070 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:19:00.543 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:19:01.015 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 04:19:01.487 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 04:19:01.959 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 04:19:02.432 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 04:19:02.904 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 04:19:03.376 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 04:19:03.847 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 04:19:04.320 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 04:19:04.793 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 04:19:05.265 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 04:19:05.736 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 04:19:05.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:19:05.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:19:05.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:19:05.997 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:19:05.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:19:05.997 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:19:05.998 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:19:05.998 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:19:05.998 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:19:05.998 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:19:05.998 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:19:05.998 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:19:05.998 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:19:05.998 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4445 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:19:05.998 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4445 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:19:05.998 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4445 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:19:05.998 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4445 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:19:05.998 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4445 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:19:05.998 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4445 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:19:11.005 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:19:11.005 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:19:11.005 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:19:11.005 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:19:11.005 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:19:11.005 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:19:11.013 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:19:11.014 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:19:11.014 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:19:11.015 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:19:11.015 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:19:11.017 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:19:11.017 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:19:11.017 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:19:11.017 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:19:11.017 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:19:11.018 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:19:11.018 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:19:11.018 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:19:11.020 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:19:11.020 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:19:11.020 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:19:11.020 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:19:11.020 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:19:11.020 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:19:11.020 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:19:11.020 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:19:11.022 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:19:11.022 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:19:11.022 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:19:11.022 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:19:11.022 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:19:11.023 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:19:11.023 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:19:11.023 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:19:11.025 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:19:11.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:19:11.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:19:11.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:19:11.025 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:19:11.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:19:11.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:19:11.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:19:11.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:19:11.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:11.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:11.026 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:19:11.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:11.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:11.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:11.026 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:19:11.026 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:19:11.026 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:19:11.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:11.026 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:19:11.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:11.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:11.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:19:11.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:11.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:11.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:11.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:11.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:11.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:11.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:11.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:11.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:11.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:11.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:11.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:11.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:11.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:11.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:11.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:11.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:11.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:11.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:11.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:11.027 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:19:11.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:11.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:11.027 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:19:11.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:11.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:11.027 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:19:11.028 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:19:11.028 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:19:11.028 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:19:11.028 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:19:16.045 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:19:16.045 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:19:16.045 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:19:16.045 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:19:16.045 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:19:16.046 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:19:16.055 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:19:16.056 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:19:16.056 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:19:16.057 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:19:16.057 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:19:16.060 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:19:16.060 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:19:16.061 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:19:16.061 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:19:16.061 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:19:16.061 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:19:16.062 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:19:16.062 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:19:16.064 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:19:16.064 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:19:16.064 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:19:16.064 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:19:16.064 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:19:16.065 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:19:16.065 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:19:16.065 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:19:16.067 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:19:16.067 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:19:16.067 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:19:16.067 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:19:16.067 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:19:16.067 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:19:16.067 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:19:16.067 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:19:16.070 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:19:16.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:19:16.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:19:16.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:19:16.071 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:19:16.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:19:16.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:19:16.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:19:16.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:19:16.071 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:19:16.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:16.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:16.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:16.071 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:19:16.071 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:19:16.071 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:19:16.071 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:19:16.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:16.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:16.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:16.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:19:16.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:16.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:16.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:16.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:16.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:16.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:16.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:16.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:16.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:16.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:16.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:16.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:16.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:16.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:16.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:16.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:16.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:16.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:16.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:16.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:16.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:16.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:16.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:16.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:16.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:16.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:16.076 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:19:16.554 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:19:16.594 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:19:16.596 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:19:16.598 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:19:16.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:19:17.018 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:19:17.074 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:19:17.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:19:17.075 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:19:17.075 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:19:17.481 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:19:17.951 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:19:18.075 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:19:18.075 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:19:18.075 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:19:18.076 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:19:18.415 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:19:18.880 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:19:19.076 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:19:19.077 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:19:19.077 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:19:19.077 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:19:19.347 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:19:19.810 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:19:20.078 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:19:20.078 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:19:20.078 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:19:20.078 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:19:20.273 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:19:20.738 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:19:21.079 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:19:21.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:19:21.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:19:21.080 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:19:21.203 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:19:21.666 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:19:22.138 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:19:22.610 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:19:23.082 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:19:23.548 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:19:24.012 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:19:24.475 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:19:24.941 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:19:25.406 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:19:25.870 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:19:26.337 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:19:26.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:19:26.611 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:19:26.611 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:19:26.611 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:19:26.612 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:19:26.612 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:19:26.612 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:19:26.612 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:19:26.612 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:19:26.612 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:19:26.612 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:19:26.612 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2305 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:19:26.612 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2306 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:19:26.612 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2306 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:19:26.612 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2306 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:19:26.612 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2306 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:19:26.612 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2306 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:19:26.612 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2306 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:19:26.612 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2306 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:19:26.612 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2306 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:19:31.621 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:19:31.621 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:19:31.621 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:19:31.621 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:19:31.621 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:19:31.621 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:19:31.625 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:19:31.625 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:19:31.625 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:19:31.626 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:19:31.626 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:19:31.627 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:19:31.628 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:19:31.628 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:19:31.628 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:19:31.628 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:19:31.628 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:19:31.628 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:19:31.628 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:19:31.629 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:19:31.629 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:19:31.629 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:19:31.629 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:19:31.629 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:19:31.629 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:19:31.629 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:19:31.629 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:19:31.631 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:19:31.631 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:19:31.631 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:19:31.631 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:19:31.631 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:19:31.631 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:19:31.631 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:19:31.631 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:19:31.633 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:19:31.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:19:31.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:19:31.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:19:31.633 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:19:31.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:19:31.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:19:31.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:19:31.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:19:31.634 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:19:31.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:31.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:31.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:31.634 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:19:31.634 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:19:31.634 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:19:31.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:31.634 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:19:31.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:31.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:31.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:19:31.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:31.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:31.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:31.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:31.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:31.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:31.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:31.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:31.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:31.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:31.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:31.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:31.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:31.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:31.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:31.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:31.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:31.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:31.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:31.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:31.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:31.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:31.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:31.635 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:19:31.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:31.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:31.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:31.635 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:19:31.635 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:19:31.635 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:19:31.635 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:19:31.635 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:19:31.635 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:19:36.645 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:19:36.645 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:19:36.645 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:19:36.645 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:19:36.645 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:19:36.645 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:19:36.652 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:19:36.653 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:19:36.653 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:19:36.653 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:19:36.653 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:19:36.655 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:19:36.656 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:19:36.656 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:19:36.656 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:19:36.656 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:19:36.657 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:19:36.657 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:19:36.657 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:19:36.659 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:19:36.659 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:19:36.659 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:19:36.659 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:19:36.659 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:19:36.660 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:19:36.660 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:19:36.660 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:19:36.662 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:19:36.662 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:19:36.662 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:19:36.662 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:19:36.662 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:19:36.662 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:19:36.663 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:19:36.663 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:19:36.667 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:19:36.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:19:36.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:19:36.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:19:36.667 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:19:36.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:19:36.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:19:36.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:19:36.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:19:36.668 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:19:36.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:36.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:36.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:36.668 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:19:36.668 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:19:36.668 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:19:36.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:36.668 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:19:36.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:36.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:36.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:19:36.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:36.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:36.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:36.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:36.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:36.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:36.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:36.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:36.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:36.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:36.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:36.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:36.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:36.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:36.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:36.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:36.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:36.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:36.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:36.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:36.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:36.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:36.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:36.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:36.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:36.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:36.673 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:19:37.151 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:19:37.193 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:19:37.194 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:19:37.194 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:19:37.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:19:37.622 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:19:37.671 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:19:37.672 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:19:37.692 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:19:37.692 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:19:38.087 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:19:38.560 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:19:38.673 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:19:38.693 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:19:38.693 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:19:38.693 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:19:39.032 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:19:39.506 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:19:39.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:19:39.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:19:39.694 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:19:39.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:19:39.978 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:19:40.450 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:19:40.676 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:19:40.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:19:40.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:19:40.696 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:19:40.921 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:19:41.395 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:19:41.678 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:19:41.698 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:19:41.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:19:41.698 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:19:41.868 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:19:42.340 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:19:42.809 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:19:43.273 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:19:43.736 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:19:44.199 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:19:44.671 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:19:45.143 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:19:45.617 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:19:46.086 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:19:46.560 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:19:47.026 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:19:47.490 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:19:47.953 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:19:48.421 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:19:48.895 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:19:49.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:19:49.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:19:49.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:19:49.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:19:49.206 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:19:49.206 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:19:49.206 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:19:49.206 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:19:49.206 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:19:49.206 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:19:49.206 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:19:54.214 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:19:54.214 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:19:54.214 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:19:54.214 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:19:54.214 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:19:54.214 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:19:54.222 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:19:54.223 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:19:54.223 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:19:54.224 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:19:54.224 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:19:54.226 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:19:54.227 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:19:54.227 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:19:54.227 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:19:54.227 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:19:54.228 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:19:54.228 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:19:54.228 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:19:54.231 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:19:54.231 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:19:54.231 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:19:54.231 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:19:54.232 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:19:54.232 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:19:54.232 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:19:54.232 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:19:54.235 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:19:54.235 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:19:54.235 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:19:54.235 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:19:54.236 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:19:54.236 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:19:54.236 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:19:54.236 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:19:54.240 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:19:54.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:19:54.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:19:54.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:19:54.240 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:19:54.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:19:54.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:19:54.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:19:54.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:19:54.241 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:19:54.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:54.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:54.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:54.241 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:19:54.241 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:19:54.241 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:19:54.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:54.241 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:19:54.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:54.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:54.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:19:54.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:54.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:54.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:54.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:54.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:54.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:54.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:54.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:54.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:54.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:54.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:54.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:54.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:54.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:54.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:54.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:54.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:54.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:54.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:54.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:54.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:54.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:54.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:54.244 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:19:54.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:54.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:54.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:54.244 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:19:54.244 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:19:54.244 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:19:54.244 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:19:54.244 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:19:54.244 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:19:59.253 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:19:59.253 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:19:59.253 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:19:59.253 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:19:59.253 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:19:59.253 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:19:59.261 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:19:59.263 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:19:59.263 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:19:59.263 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:19:59.263 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:19:59.268 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:19:59.268 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:19:59.268 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:19:59.269 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:19:59.269 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:19:59.269 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:19:59.269 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:19:59.269 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:19:59.273 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:19:59.274 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:19:59.274 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:19:59.274 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:19:59.274 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:19:59.274 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:19:59.274 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:19:59.274 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:19:59.278 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:19:59.278 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:19:59.278 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:19:59.278 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:19:59.278 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:19:59.278 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:19:59.279 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:19:59.279 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:19:59.284 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:19:59.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:19:59.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:19:59.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:19:59.285 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:19:59.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:19:59.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:19:59.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:19:59.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:19:59.285 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:19:59.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:59.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:59.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:59.285 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:19:59.285 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:19:59.285 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:19:59.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:59.285 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:19:59.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:59.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:59.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:19:59.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:59.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:59.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:59.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:59.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:59.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:59.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:59.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:59.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:59.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:59.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:59.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:59.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:59.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:59.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:59.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:59.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:59.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:59.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:59.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:19:59.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:59.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:59.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:59.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:19:59.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:19:59.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:19:59.290 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:19:59.769 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:19:59.810 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:19:59.811 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:19:59.812 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:19:59.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:19:59.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:19:59.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:19:59.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:19:59.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:19:59.815 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:19:59.815 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:19:59.815 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:19:59.815 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:19:59.859 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:19:59.859 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:19:59.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:19:59.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:20:00.242 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:20:00.289 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:20:00.289 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:20:00.290 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:20:00.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:20:00.715 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:20:01.188 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:20:01.290 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:20:01.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:20:01.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:20:01.291 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:20:01.660 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:20:02.131 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:20:02.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:20:02.292 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:20:02.292 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:20:02.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:20:02.601 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:20:03.075 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:20:03.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:20:03.293 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:20:03.294 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:20:03.294 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:20:03.547 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:20:04.019 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:20:04.295 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:20:04.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:20:04.311 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:20:04.311 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:20:04.490 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:20:04.964 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:20:05.436 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:20:05.909 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:20:06.382 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:20:06.855 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:20:07.326 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:20:07.798 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:20:07.865 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:20:07.865 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:20:07.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:20:07.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:20:07.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:20:07.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:20:07.872 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:20:07.872 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:20:07.872 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:20:07.872 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:20:07.872 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:20:07.872 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:20:07.872 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:20:12.880 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:20:12.880 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:20:12.880 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:20:12.881 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:20:12.881 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:20:12.881 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:20:12.889 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:20:12.890 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:20:12.890 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:20:12.890 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:20:12.890 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:20:12.893 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:20:12.893 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:20:12.893 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:20:12.894 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:20:12.894 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:20:12.894 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:20:12.894 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:20:12.894 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:20:12.896 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:20:12.896 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:20:12.897 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:20:12.897 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:20:12.897 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:20:12.897 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:20:12.897 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:20:12.897 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:20:12.899 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:20:12.899 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:20:12.899 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:20:12.899 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:20:12.900 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:20:12.900 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:20:12.900 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:20:12.900 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:20:12.906 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:20:12.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:20:12.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:20:12.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:20:12.907 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:20:12.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:20:12.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:20:12.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:12.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:20:12.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:20:12.907 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:20:12.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:12.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:12.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:12.907 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:20:12.907 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:20:12.907 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:20:12.907 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:20:12.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:12.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:12.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:12.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:20:12.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:12.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:12.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:12.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:12.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:12.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:12.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:12.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:12.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:12.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:12.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:12.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:12.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:12.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:12.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:12.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:12.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:12.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:12.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:12.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:12.909 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:20:12.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:12.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:12.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:12.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:12.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:12.909 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:20:12.909 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:20:12.909 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:20:12.909 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:20:12.909 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:20:12.909 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:20:17.918 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:20:17.918 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:20:17.918 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:20:17.918 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:20:17.918 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:20:17.918 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:20:17.926 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:20:17.927 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:20:17.927 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:20:17.928 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:20:17.928 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:20:17.930 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:20:17.930 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:20:17.931 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:20:17.931 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:20:17.931 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:20:17.931 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:20:17.932 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:20:17.932 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:20:17.935 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:20:17.935 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:20:17.935 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:20:17.935 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:20:17.936 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:20:17.936 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:20:17.936 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:20:17.936 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:20:17.939 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:20:17.939 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:20:17.939 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:20:17.939 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:20:17.940 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:20:17.940 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:20:17.940 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:20:17.940 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:20:17.945 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:20:17.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:20:17.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:20:17.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:20:17.945 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:20:17.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:20:17.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:20:17.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:20:17.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:17.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:20:17.946 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:20:17.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:17.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:17.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:17.946 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:20:17.946 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:20:17.946 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:20:17.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:17.946 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:20:17.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:17.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:17.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:20:17.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:17.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:17.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:17.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:17.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:17.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:17.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:17.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:17.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:17.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:17.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:17.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:17.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:17.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:17.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:17.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:17.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:17.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:17.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:17.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:17.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:17.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:17.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:17.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:17.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:17.951 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:20:18.429 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:20:18.472 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:20:18.476 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:20:18.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:20:18.478 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:20:18.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:20:18.482 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:20:18.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:20:18.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:20:18.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:20:18.483 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:20:18.483 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:20:18.483 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:20:18.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:20:18.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:20:18.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:20:18.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:20:18.901 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:20:18.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:20:18.950 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:20:18.950 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:20:18.950 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:20:19.373 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:20:19.846 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:20:19.951 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:20:19.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:20:19.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:20:19.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:20:20.319 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:20:20.791 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:20:20.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:20:20.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:20:20.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:20:20.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:20:21.262 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:20:21.733 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:20:21.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:20:21.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:20:21.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:20:21.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:20:22.206 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:20:22.678 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:20:22.973 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:20:22.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:20:22.974 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:20:22.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:20:23.151 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:20:23.624 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:20:24.096 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:20:24.569 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:20:25.040 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:20:25.513 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:20:25.985 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:20:26.458 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:20:26.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:20:26.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:20:26.531 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:20:26.532 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:20:26.532 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:20:26.532 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:20:26.533 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:20:26.533 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:20:26.533 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:20:26.533 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:20:26.533 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:20:26.534 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:20:26.534 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:20:26.534 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:20:26.534 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:20:26.534 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:20:26.534 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:20:31.539 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:20:31.539 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:20:31.539 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:20:31.539 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:20:31.539 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:20:31.539 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:20:31.547 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:20:31.547 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:20:31.547 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:20:31.548 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:20:31.548 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:20:31.550 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:20:31.551 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:20:31.551 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:20:31.551 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:20:31.551 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:20:31.556 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:20:31.557 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:20:31.557 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:20:31.559 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:20:31.559 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:20:31.559 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:20:31.559 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:20:31.559 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:20:31.560 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:20:31.560 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:20:31.560 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:20:31.561 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:20:31.562 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:20:31.562 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:20:31.562 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:20:31.562 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:20:31.562 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:20:31.562 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:20:31.562 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:20:31.566 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:20:31.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:20:31.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:20:31.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:20:31.566 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:20:31.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:20:31.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:20:31.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:20:31.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:20:31.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:31.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:31.566 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:20:31.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:31.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:31.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:31.566 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:20:31.566 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:20:31.566 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:20:31.566 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:20:31.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:31.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:31.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:31.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:20:31.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:31.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:31.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:31.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:31.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:31.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:31.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:31.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:31.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:31.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:31.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:31.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:31.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:31.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:31.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:31.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:31.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:31.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:31.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:31.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:31.568 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:20:31.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:31.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:31.568 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:20:31.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:31.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:31.568 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:20:31.569 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:20:31.569 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:20:31.569 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:20:31.569 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:20:36.577 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:20:36.577 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:20:36.577 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:20:36.577 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:20:36.577 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:20:36.577 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:20:36.587 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:20:36.589 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:20:36.589 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:20:36.590 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:20:36.590 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:20:36.595 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:20:36.595 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:20:36.596 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:20:36.596 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:20:36.596 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:20:36.597 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:20:36.597 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:20:36.597 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:20:36.601 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:20:36.601 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:20:36.601 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:20:36.601 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:20:36.602 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:20:36.602 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:20:36.603 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:20:36.603 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:20:36.605 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:20:36.606 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:20:36.606 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:20:36.606 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:20:36.606 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:20:36.606 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:20:36.606 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:20:36.606 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:20:36.611 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:20:36.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:20:36.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:20:36.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:20:36.611 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:20:36.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:20:36.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:20:36.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:20:36.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:36.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:20:36.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:36.612 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:20:36.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:36.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:36.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:36.612 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:20:36.612 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:20:36.612 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:20:36.612 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:20:36.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:36.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:36.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:36.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:20:36.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:36.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:36.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:36.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:36.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:36.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:36.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:36.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:36.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:36.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:36.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:36.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:36.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:36.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:36.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:36.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:36.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:36.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:36.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:36.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:36.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:36.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:36.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:36.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:36.617 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:20:37.095 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:20:37.134 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:20:37.135 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:20:37.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:20:37.136 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:20:37.137 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:20:37.138 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:20:37.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:20:37.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:20:37.138 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:20:37.138 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:20:37.139 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:20:37.139 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:20:37.185 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:20:37.185 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:20:37.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:20:37.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:20:37.566 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:20:37.615 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:20:37.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:20:37.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:20:37.616 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:20:38.038 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:20:38.509 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:20:38.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:20:38.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:20:38.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:20:38.617 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:20:38.983 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:20:39.455 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:20:39.618 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:20:39.618 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:20:39.618 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:20:39.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:20:39.927 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:20:40.398 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:20:40.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:20:40.619 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:20:40.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:20:40.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:20:40.871 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:20:41.344 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:20:41.621 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:20:41.621 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:20:41.621 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:20:41.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:20:41.816 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:20:42.287 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:20:42.761 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:20:43.233 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:20:43.705 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:20:44.176 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:20:44.650 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:20:45.122 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:20:45.189 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:20:45.189 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:20:45.195 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:20:45.195 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:20:45.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:20:45.196 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:20:45.199 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:20:45.199 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:20:45.199 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:20:45.199 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:20:45.199 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:20:45.199 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:20:45.199 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:20:45.199 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:20:45.199 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:20:45.199 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:20:45.199 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:20:45.199 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:20:45.199 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:20:50.202 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:20:50.202 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:20:50.202 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:20:50.202 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:20:50.202 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:20:50.202 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:20:50.211 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:20:50.211 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:20:50.211 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:20:50.212 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:20:50.212 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:20:50.217 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:20:50.217 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:20:50.217 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:20:50.218 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:20:50.218 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:20:50.218 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:20:50.219 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:20:50.219 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:20:50.222 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:20:50.222 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:20:50.222 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:20:50.222 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:20:50.223 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:20:50.223 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:20:50.223 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:20:50.223 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:20:50.225 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:20:50.226 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:20:50.226 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:20:50.226 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:20:50.226 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:20:50.226 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:20:50.226 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:20:50.226 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:20:50.230 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:20:50.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:20:50.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:20:50.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:20:50.230 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:20:50.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:20:50.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:20:50.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:20:50.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:50.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:20:50.231 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:20:50.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:50.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:50.231 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:20:50.231 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:20:50.231 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:20:50.231 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:20:50.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:50.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:50.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:50.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:20:50.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:50.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:50.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:50.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:50.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:50.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:50.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:50.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:50.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:50.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:50.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:50.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:50.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:50.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:50.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:50.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:50.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:50.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:50.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:50.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:50.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:50.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:50.235 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:20:50.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:50.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:50.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:50.236 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:20:50.236 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:20:50.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:50.236 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:20:50.236 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:20:50.236 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:20:50.236 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:20:55.242 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:20:55.242 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:20:55.242 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:20:55.242 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:20:55.242 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:20:55.242 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:20:55.249 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:20:55.250 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:20:55.251 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:20:55.251 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:20:55.251 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:20:55.254 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:20:55.254 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:20:55.254 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:20:55.255 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:20:55.255 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:20:55.255 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:20:55.255 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:20:55.255 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:20:55.257 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:20:55.258 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:20:55.258 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:20:55.258 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:20:55.258 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:20:55.258 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:20:55.258 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:20:55.258 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:20:55.260 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:20:55.260 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:20:55.260 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:20:55.260 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:20:55.260 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:20:55.260 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:20:55.260 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:20:55.260 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:20:55.264 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:20:55.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:20:55.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:20:55.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:20:55.264 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:20:55.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:20:55.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:20:55.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:20:55.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:20:55.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:55.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:55.264 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:20:55.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:55.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:55.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:55.264 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:20:55.264 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:20:55.264 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:20:55.264 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:20:55.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:55.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:55.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:55.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:20:55.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:55.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:55.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:55.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:55.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:55.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:55.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:55.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:55.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:55.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:55.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:55.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:55.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:55.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:55.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:55.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:55.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:20:55.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:55.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:55.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:20:55.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:55.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:55.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:20:55.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:20:55.269 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:20:55.746 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:20:55.787 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:20:55.788 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:20:55.789 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:20:55.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:20:55.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:20:55.790 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:20:55.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:20:55.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:20:55.790 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:20:55.790 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:20:55.790 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:20:55.790 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:20:55.836 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:20:55.836 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:20:55.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:20:55.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:20:56.214 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:20:56.267 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:20:56.268 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:20:56.268 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:20:56.268 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:20:56.685 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:20:57.155 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:20:57.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:20:57.269 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:20:57.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:20:57.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:20:57.626 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:20:58.100 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:20:58.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:20:58.271 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:20:58.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:20:58.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:20:58.572 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:20:59.044 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:20:59.272 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:20:59.272 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:20:59.272 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:20:59.272 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:20:59.515 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:20:59.986 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:21:00.273 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:21:00.273 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:21:00.273 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:21:00.273 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:21:00.457 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:21:00.928 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:21:01.400 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:21:01.873 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:21:02.345 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:21:02.816 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:21:03.287 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:21:03.760 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:21:03.840 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:21:03.840 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:21:03.846 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:21:03.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:21:03.846 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:21:03.846 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:21:03.847 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:21:03.847 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:21:03.847 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:21:03.847 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:21:03.847 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:21:03.847 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:21:03.847 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:21:03.847 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1857 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:21:03.847 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1857 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:21:03.847 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1857 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:21:03.847 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1857 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:21:08.854 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:21:08.854 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:21:08.854 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:21:08.854 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:21:08.854 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:21:08.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:21:08.863 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:21:08.864 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:21:08.864 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:21:08.865 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:21:08.865 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:21:08.868 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:21:08.869 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:21:08.869 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:21:08.869 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:21:08.869 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:21:08.870 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:21:08.870 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:21:08.870 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:21:08.872 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:21:08.873 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:21:08.873 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:21:08.873 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:21:08.873 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:21:08.873 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:21:08.874 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:21:08.874 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:21:08.876 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:21:08.876 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:21:08.876 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:21:08.876 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:21:08.876 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:21:08.876 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:21:08.876 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:21:08.876 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:21:08.880 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:21:08.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:21:08.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:21:08.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:21:08.881 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:21:08.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:21:08.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:21:08.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:21:08.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:21:08.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:08.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:08.881 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:21:08.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:08.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:08.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:08.881 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:21:08.881 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:21:08.881 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:21:08.881 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:21:08.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:08.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:08.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:08.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:21:08.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:08.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:08.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:08.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:08.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:08.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:08.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:08.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:08.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:08.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:08.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:08.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:08.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:08.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:08.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:08.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:08.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:08.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:08.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:08.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:21:08.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:08.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:08.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:08.883 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:21:08.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:08.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:08.883 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:21:08.883 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:21:08.883 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:21:08.883 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:21:08.883 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:21:13.892 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:21:13.892 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:21:13.892 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:21:13.892 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:21:13.892 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:21:13.892 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:21:13.901 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:21:13.903 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:21:13.903 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:21:13.903 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:21:13.903 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:21:13.907 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:21:13.907 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:21:13.908 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:21:13.908 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:21:13.908 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:21:13.908 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:21:13.909 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:21:13.909 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:21:13.911 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:21:13.911 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:21:13.911 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:21:13.911 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:21:13.912 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:21:13.912 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:21:13.912 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:21:13.912 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:21:13.914 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:21:13.914 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:21:13.914 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:21:13.914 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:21:13.915 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:21:13.915 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:21:13.915 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:21:13.915 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:21:13.918 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:21:13.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:21:13.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:21:13.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:21:13.919 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:21:13.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:21:13.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:21:13.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:21:13.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:13.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:21:13.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:13.919 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:21:13.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:13.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:13.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:13.919 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:21:13.919 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:21:13.919 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:21:13.919 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:21:13.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:13.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:13.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:13.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:21:13.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:13.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:13.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:13.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:13.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:13.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:13.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:13.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:13.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:13.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:13.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:13.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:13.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:13.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:13.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:13.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:13.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:13.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:13.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:13.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:13.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:13.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:13.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:13.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:13.924 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:21:14.402 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:21:14.441 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:21:14.443 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:21:14.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:21:14.444 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:21:14.447 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:21:14.447 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:21:14.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:21:14.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:21:14.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:21:14.448 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:21:14.448 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:21:14.448 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:21:14.493 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:21:14.493 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:21:14.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:21:14.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:21:14.875 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:21:14.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:21:14.923 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:21:14.923 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:21:14.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:21:15.346 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:21:15.819 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:21:15.924 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:21:15.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:21:15.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:21:15.925 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:21:16.292 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:21:16.764 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:21:16.925 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:21:16.926 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:21:16.926 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:21:16.926 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:21:17.235 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:21:17.708 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:21:17.926 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:21:17.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:21:17.927 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:21:17.927 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:21:18.181 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:21:18.653 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:21:18.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:21:18.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:21:18.928 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:21:18.928 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:21:19.124 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:21:19.597 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:21:20.070 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:21:20.542 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:21:21.013 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:21:21.486 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:21:21.959 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:21:22.431 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:21:22.902 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:21:23.375 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:21:23.847 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:21:24.320 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:21:24.791 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:21:25.264 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:21:25.737 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:21:26.209 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:21:26.680 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:21:27.153 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:21:27.626 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:21:28.098 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:21:28.499 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:21:28.499 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:21:28.500 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:21:28.500 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:21:28.500 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:21:28.500 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:21:28.501 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:21:28.501 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:21:28.501 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:21:28.501 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:21:28.501 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:21:28.501 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:21:28.501 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:21:33.515 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:21:33.515 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:21:33.516 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:21:33.516 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:21:33.516 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:21:33.516 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:21:33.530 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:21:33.532 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:21:33.532 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:21:33.533 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:21:33.533 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:21:33.536 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:21:33.536 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:21:33.536 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:21:33.536 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:21:33.537 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:21:33.537 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:21:33.537 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:21:33.537 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:21:33.540 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:21:33.540 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:21:33.540 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:21:33.540 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:21:33.540 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:21:33.541 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:21:33.541 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:21:33.541 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:21:33.543 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:21:33.543 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:21:33.543 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:21:33.543 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:21:33.543 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:21:33.543 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:21:33.543 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:21:33.543 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:21:33.547 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:21:33.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:21:33.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:21:33.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:21:33.547 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:21:33.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:21:33.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:21:33.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:21:33.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:33.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:21:33.547 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:21:33.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:33.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:33.547 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:21:33.547 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:21:33.547 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:21:33.547 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:21:33.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:33.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:33.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:33.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:21:33.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:33.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:33.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:33.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:33.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:33.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:33.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:33.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:33.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:33.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:33.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:33.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:33.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:33.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:33.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:33.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:33.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:33.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:33.549 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:21:33.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:33.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:33.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:33.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:33.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:33.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:33.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:33.549 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:21:33.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:33.549 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:21:33.549 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:21:33.549 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:21:33.549 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:21:33.549 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:21:38.563 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:21:38.563 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:21:38.564 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:21:38.564 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:21:38.564 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:21:38.564 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:21:38.573 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:21:38.574 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:21:38.574 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:21:38.574 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:21:38.574 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:21:38.577 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:21:38.577 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:21:38.578 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:21:38.578 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:21:38.578 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:21:38.578 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:21:38.578 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:21:38.578 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:21:38.580 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:21:38.580 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:21:38.580 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:21:38.580 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:21:38.581 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:21:38.581 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:21:38.581 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:21:38.581 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:21:38.583 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:21:38.583 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:21:38.583 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:21:38.583 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:21:38.583 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:21:38.583 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:21:38.583 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:21:38.583 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:21:38.585 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:21:38.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:21:38.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:21:38.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:21:38.585 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:21:38.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:21:38.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:21:38.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:21:38.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:21:38.586 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:21:38.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:38.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:38.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:38.586 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:21:38.586 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:21:38.586 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:21:38.586 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:21:38.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:38.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:38.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:38.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:21:38.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:38.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:38.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:38.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:38.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:38.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:38.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:38.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:38.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:38.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:38.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:38.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:38.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:38.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:38.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:38.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:38.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:38.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:38.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:38.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:38.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:38.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:38.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:38.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:38.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:38.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:38.590 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:21:39.069 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:21:39.106 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:21:39.107 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:21:39.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:21:39.108 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:21:39.109 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:21:39.109 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:21:39.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:21:39.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:21:39.110 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:21:39.110 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:21:39.110 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:21:39.110 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:21:39.112 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:21:39.112 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:21:39.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:21:39.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:21:39.541 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:21:39.588 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:21:39.589 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:21:39.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:21:39.589 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:21:40.013 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:21:40.483 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:21:40.589 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:21:40.589 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:21:40.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:21:40.590 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:21:40.957 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:21:41.429 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:21:41.589 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:21:41.590 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:21:41.590 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:21:41.590 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:21:41.902 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:21:42.375 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:21:42.591 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:21:42.591 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:21:42.591 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:21:42.591 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:21:42.848 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:21:43.320 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:21:43.592 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:21:43.592 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:21:43.592 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:21:43.593 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:21:43.791 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:21:44.264 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:21:44.737 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:21:45.209 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:21:45.680 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:21:46.153 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:21:46.626 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:21:47.098 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:21:47.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:21:47.117 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:21:47.123 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:21:47.123 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:21:47.123 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:21:47.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:21:47.125 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:21:47.125 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:21:47.125 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:21:47.125 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:21:47.125 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:21:47.125 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:21:47.125 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:21:47.125 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1844 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:21:47.125 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1844 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:21:47.125 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1844 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:21:47.125 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1844 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:21:47.125 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1844 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:21:47.125 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1844 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:21:52.130 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:21:52.130 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:21:52.130 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:21:52.130 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:21:52.130 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:21:52.130 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:21:52.139 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:21:52.140 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:21:52.140 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:21:52.140 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:21:52.140 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:21:52.143 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:21:52.143 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:21:52.143 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:21:52.143 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:21:52.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:21:52.144 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:21:52.144 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:21:52.144 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:21:52.146 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:21:52.146 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:21:52.147 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:21:52.147 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:21:52.147 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:21:52.147 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:21:52.147 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:21:52.147 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:21:52.149 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:21:52.149 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:21:52.149 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:21:52.150 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:21:52.150 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:21:52.150 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:21:52.150 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:21:52.150 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:21:52.154 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:21:52.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:21:52.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:21:52.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:21:52.154 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:21:52.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:21:52.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:21:52.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:21:52.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:21:52.154 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:21:52.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:52.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:52.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:52.155 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:21:52.155 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:21:52.155 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:21:52.155 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:21:52.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:52.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:52.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:52.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:21:52.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:52.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:52.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:52.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:52.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:52.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:52.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:52.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:52.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:52.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:52.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:52.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:52.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:52.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:52.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:52.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:52.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:52.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:52.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:52.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:52.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:52.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:52.157 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:21:52.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:52.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:52.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:52.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:52.157 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:21:52.157 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:21:52.157 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:21:52.157 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:21:52.157 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:21:52.157 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:21:57.164 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:21:57.164 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:21:57.164 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:21:57.164 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:21:57.164 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:21:57.164 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:21:57.175 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:21:57.177 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:21:57.177 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:21:57.178 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:21:57.178 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:21:57.183 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:21:57.184 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:21:57.184 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:21:57.184 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:21:57.185 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:21:57.185 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:21:57.186 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:21:57.186 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:21:57.189 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:21:57.189 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:21:57.190 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:21:57.190 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:21:57.190 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:21:57.190 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:21:57.191 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:21:57.191 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:21:57.194 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:21:57.194 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:21:57.194 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:21:57.194 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:21:57.194 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:21:57.194 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:21:57.195 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:21:57.195 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:21:57.199 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:21:57.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:21:57.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:21:57.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:21:57.199 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:21:57.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:21:57.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:21:57.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:21:57.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:57.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:21:57.200 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:21:57.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:57.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:57.200 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:21:57.200 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:21:57.200 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:21:57.200 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:21:57.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:57.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:57.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:57.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:21:57.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:57.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:57.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:57.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:57.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:57.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:57.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:57.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:57.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:57.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:57.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:57.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:57.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:57.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:57.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:57.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:57.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:21:57.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:57.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:57.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:57.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:57.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:57.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:21:57.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:21:57.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:57.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:21:57.205 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:21:57.683 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:21:57.729 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:21:57.732 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:21:57.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:21:57.734 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:21:57.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:21:57.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:21:57.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:21:57.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:21:57.738 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:21:57.739 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:21:57.739 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:21:57.739 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:21:58.156 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:21:58.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:21:58.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:21:58.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:21:58.204 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:21:58.627 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:21:59.100 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:21:59.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:21:59.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:21:59.206 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:21:59.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:21:59.573 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:22:00.045 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:22:00.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:22:00.207 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:22:00.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:22:00.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:22:00.516 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:22:00.990 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:22:01.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:22:01.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:22:01.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:22:01.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:22:01.462 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:22:01.934 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:22:02.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:22:02.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:22:02.209 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:22:02.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:22:02.405 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:22:02.878 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:22:03.351 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:22:03.823 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:22:04.296 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:22:04.769 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:22:05.241 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:22:05.712 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:22:06.185 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:22:06.658 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:22:07.130 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:22:07.600 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:22:07.779 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:22:07.779 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:22:07.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:22:07.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:22:07.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:22:07.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:22:07.783 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:22:07.783 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:22:07.783 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:22:07.783 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:22:07.783 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:22:07.783 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:22:07.783 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:22:12.790 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:22:12.790 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:22:12.790 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:22:12.790 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:22:12.790 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:22:12.790 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:22:12.798 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:22:12.799 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:22:12.799 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:22:12.799 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:22:12.799 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:22:12.802 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:22:12.802 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:22:12.803 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:22:12.803 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:22:12.803 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:22:12.803 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:22:12.804 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:22:12.804 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:22:12.805 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:22:12.806 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:22:12.806 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:22:12.806 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:22:12.806 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:22:12.806 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:22:12.806 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:22:12.806 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:22:12.808 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:22:12.808 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:22:12.809 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:22:12.809 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:22:12.809 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:22:12.809 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:22:12.809 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:22:12.809 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:22:12.812 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:22:12.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:22:12.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:22:12.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:22:12.812 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:22:12.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:22:12.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:22:12.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:22:12.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:22:12.812 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:22:12.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:12.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:12.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:12.813 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:22:12.813 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:22:12.813 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:22:12.813 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:22:12.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:12.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:12.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:12.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:22:12.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:12.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:12.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:12.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:12.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:12.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:12.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:12.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:12.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:12.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:12.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:12.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:12.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:12.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:12.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:12.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:12.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:12.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:12.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:12.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:12.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:12.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:12.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:12.814 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:22:12.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:12.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:12.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:12.814 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:22:12.814 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:22:12.814 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:22:12.814 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:22:12.814 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:22:12.815 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:22:17.824 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:22:17.824 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:22:17.824 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:22:17.824 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:22:17.824 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:22:17.824 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:22:17.834 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:22:17.835 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:22:17.836 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:22:17.836 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:22:17.836 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:22:17.840 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:22:17.841 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:22:17.841 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:22:17.841 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:22:17.841 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:22:17.842 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:22:17.842 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:22:17.842 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:22:17.844 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:22:17.845 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:22:17.845 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:22:17.845 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:22:17.845 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:22:17.845 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:22:17.846 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:22:17.846 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:22:17.848 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:22:17.848 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:22:17.848 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:22:17.848 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:22:17.848 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:22:17.848 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:22:17.848 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:22:17.848 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:22:17.852 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:22:17.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:22:17.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:22:17.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:22:17.852 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:22:17.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:22:17.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:22:17.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:22:17.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:22:17.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:17.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:17.852 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:22:17.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:17.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:17.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:17.852 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:22:17.852 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:22:17.852 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:22:17.852 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:22:17.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:17.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:17.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:17.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:22:17.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:17.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:17.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:17.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:17.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:17.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:17.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:17.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:17.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:17.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:17.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:17.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:17.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:17.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:17.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:17.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:17.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:17.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:17.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:17.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:17.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:17.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:17.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:17.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:17.857 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:22:18.335 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:22:18.377 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:22:18.378 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:22:18.380 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:22:18.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:22:18.382 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:22:18.382 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:22:18.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:22:18.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:22:18.383 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:22:18.383 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:22:18.383 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:22:18.383 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:22:18.425 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:22:18.426 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:22:18.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:22:18.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:22:18.807 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:22:18.855 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:22:18.856 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:22:18.856 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:22:18.856 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:22:19.278 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:22:19.749 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:22:19.857 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:22:19.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:22:19.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:22:19.857 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:22:20.222 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:22:20.695 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:22:20.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:22:20.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:22:20.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:22:20.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:22:21.167 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:22:21.638 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:22:21.859 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:22:21.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:22:21.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:22:21.860 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:22:22.112 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:22:22.584 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:22:22.861 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:22:22.861 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:22:22.861 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:22:22.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:22:23.056 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:22:23.527 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:22:23.998 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:22:24.469 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:22:24.943 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:22:25.415 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:22:25.886 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:22:26.360 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:22:26.832 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:22:27.304 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:22:27.775 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:22:28.248 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:22:28.721 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:22:29.194 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:22:29.431 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:22:29.431 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:22:29.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:22:29.438 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:22:29.438 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:22:29.438 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:22:29.440 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:22:29.440 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:22:29.440 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:22:29.440 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:22:29.440 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:22:29.440 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:22:29.440 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:22:29.440 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2502 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:22:29.440 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2502 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:22:29.440 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2503 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:22:29.440 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2503 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:22:29.440 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2503 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:22:29.440 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2503 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:22:29.440 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2503 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:22:29.440 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2503 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:22:29.440 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2503 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:22:29.440 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2503 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:22:34.446 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:22:34.446 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:22:34.446 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:22:34.446 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:22:34.446 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:22:34.446 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:22:34.457 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:22:34.458 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:22:34.458 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:22:34.459 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:22:34.459 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:22:34.463 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:22:34.463 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:22:34.463 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:22:34.463 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:22:34.464 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:22:34.464 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:22:34.465 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:22:34.465 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:22:34.467 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:22:34.468 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:22:34.468 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:22:34.468 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:22:34.468 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:22:34.469 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:22:34.469 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:22:34.469 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:22:34.472 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:22:34.472 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:22:34.472 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:22:34.472 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:22:34.472 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:22:34.472 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:22:34.472 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:22:34.472 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:22:34.477 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:22:34.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:22:34.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:22:34.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:22:34.477 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:22:34.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:22:34.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:22:34.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:22:34.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:22:34.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:34.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:34.478 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:22:34.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:34.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:34.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:34.478 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:22:34.478 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:22:34.478 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:22:34.478 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:22:34.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:34.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:34.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:34.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:22:34.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:34.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:34.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:34.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:34.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:34.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:34.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:34.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:34.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:34.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:34.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:34.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:34.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:34.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:34.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:34.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:34.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:34.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:34.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:34.481 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:22:34.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:34.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:34.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:34.481 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:22:34.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:34.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:34.481 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:22:34.481 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:22:34.481 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:22:34.481 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:22:34.481 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:22:39.489 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:22:39.489 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:22:39.489 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:22:39.489 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:22:39.489 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:22:39.489 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:22:39.497 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:22:39.498 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:22:39.498 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:22:39.498 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:22:39.498 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:22:39.501 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:22:39.501 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:22:39.501 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:22:39.501 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:22:39.502 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:22:39.502 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:22:39.502 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:22:39.502 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:22:39.504 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:22:39.504 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:22:39.505 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:22:39.505 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:22:39.505 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:22:39.505 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:22:39.505 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:22:39.505 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:22:39.507 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:22:39.507 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:22:39.507 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:22:39.507 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:22:39.507 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:22:39.507 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:22:39.507 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:22:39.507 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:22:39.510 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:22:39.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:22:39.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:22:39.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:22:39.511 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:22:39.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:22:39.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:22:39.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:22:39.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:22:39.511 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:22:39.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:39.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:39.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:39.511 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:22:39.511 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:22:39.511 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:22:39.511 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:22:39.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:39.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:39.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:39.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:22:39.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:39.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:39.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:39.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:39.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:39.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:39.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:39.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:39.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:39.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:39.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:39.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:39.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:39.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:39.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:39.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:39.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:39.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:39.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:39.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:39.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:39.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:39.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:39.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:39.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:39.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:39.516 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:22:39.994 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:22:40.041 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:22:40.042 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:22:40.044 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:22:40.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:22:40.466 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:22:40.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:22:40.518 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:22:40.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:22:40.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:22:40.937 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:22:41.408 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:22:41.519 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:22:41.519 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:22:41.519 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:22:41.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:22:41.882 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:22:42.354 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:22:42.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:22:42.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:22:42.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:22:42.521 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:22:42.826 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:22:43.300 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:22:43.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:22:43.522 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:22:43.523 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:22:43.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:22:43.772 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:22:44.244 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:22:44.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:22:44.524 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:22:44.524 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:22:44.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:22:44.715 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:22:45.189 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:22:45.661 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:22:46.133 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:22:46.607 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:22:47.080 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:22:47.552 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:22:48.026 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:22:48.498 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:22:48.973 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:22:49.445 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:22:49.917 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:22:50.056 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:22:50.056 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:22:50.056 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:22:50.056 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:22:50.057 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:22:50.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:22:50.057 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:22:50.057 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:22:50.057 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:22:50.057 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:22:50.057 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:22:50.057 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2276 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:22:50.057 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2276 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:22:50.057 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2276 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:22:55.060 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:22:55.060 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:22:55.060 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:22:55.060 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:22:55.060 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:22:55.060 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:22:55.068 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:22:55.069 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:22:55.069 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:22:55.069 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:22:55.069 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:22:55.072 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:22:55.072 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:22:55.072 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:22:55.072 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:22:55.072 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:22:55.072 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:22:55.072 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:22:55.072 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:22:55.074 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:22:55.074 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:22:55.074 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:22:55.074 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:22:55.075 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:22:55.075 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:22:55.075 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:22:55.075 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:22:55.076 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:22:55.076 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:22:55.076 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:22:55.076 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:22:55.076 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:22:55.076 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:22:55.077 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:22:55.077 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:22:55.079 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:22:55.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:22:55.079 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:22:55.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:22:55.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:22:55.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:22:55.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:22:55.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:55.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:22:55.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:22:55.079 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:22:55.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:55.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:55.079 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:22:55.079 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:22:55.079 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:22:55.079 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:22:55.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:55.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:55.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:55.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:22:55.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:55.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:55.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:55.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:55.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:55.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:55.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:55.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:55.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:55.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:55.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:55.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:55.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:55.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:55.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:55.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:55.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:22:55.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:55.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:55.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:55.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:55.081 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:22:55.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:22:55.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:22:55.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:55.081 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:22:55.081 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:22:55.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:22:55.081 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:22:55.081 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:22:55.081 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:22:55.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:23:00.084 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:23:00.084 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:23:00.084 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:23:00.084 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:23:00.084 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:23:00.084 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:23:00.088 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:23:00.088 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:23:00.089 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:23:00.089 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:23:00.089 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:23:00.090 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:23:00.090 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:23:00.090 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:23:00.090 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:23:00.090 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:23:00.090 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:23:00.090 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:23:00.090 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:23:00.092 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:23:00.092 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:23:00.092 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:23:00.092 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:23:00.092 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:23:00.092 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:23:00.092 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:23:00.092 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:23:00.093 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:23:00.093 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:23:00.093 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:23:00.093 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:23:00.094 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:23:00.094 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:23:00.094 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:23:00.094 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:23:00.096 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:23:00.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:23:00.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:23:00.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:23:00.096 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:23:00.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:23:00.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:23:00.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:23:00.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:23:00.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:23:00.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:23:00.096 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:23:00.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:23:00.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:23:00.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:23:00.097 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:23:00.097 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:23:00.097 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:23:00.097 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:23:00.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:23:00.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:23:00.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:23:00.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:23:00.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:23:00.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:23:00.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:23:00.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:23:00.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:23:00.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:23:00.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:23:00.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:23:00.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:23:00.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:23:00.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:23:00.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:23:00.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:23:00.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:23:00.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:23:00.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:23:00.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:23:00.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:23:00.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:23:00.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:23:00.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:23:00.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:23:00.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:23:00.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:23:00.101 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:23:00.567 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:23:00.609 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:23:00.609 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:23:00.610 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:23:00.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:23:01.031 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:23:01.099 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:23:01.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:23:01.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:23:01.100 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:23:01.494 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:23:01.959 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:23:02.099 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:23:02.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:23:02.100 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:23:02.101 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:23:02.422 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:23:02.885 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:23:03.100 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:23:03.100 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:23:03.100 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:23:03.101 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:23:03.347 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:23:03.810 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:23:04.101 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:23:04.101 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:23:04.101 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:23:04.101 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:23:04.275 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:23:04.739 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:23:05.102 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:23:05.102 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:23:05.102 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:23:05.102 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:23:05.204 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:23:05.668 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:23:06.132 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:23:06.597 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:23:07.060 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:23:07.524 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:23:07.988 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:23:08.451 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:23:08.916 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:23:09.380 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:23:09.844 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:23:10.309 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:23:10.774 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:23:11.238 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:23:11.703 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:23:12.168 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:23:12.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:23:12.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:23:12.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:23:12.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:23:12.615 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:23:12.615 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:23:12.615 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:23:12.615 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:23:12.615 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:23:12.615 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:23:12.615 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:23:17.623 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:23:17.623 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:23:17.623 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:23:17.623 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:23:17.623 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:23:17.623 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:23:17.628 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:23:17.629 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:23:17.629 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:23:17.629 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:23:17.629 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:23:17.630 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:23:17.630 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:23:17.630 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:23:17.630 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:23:17.630 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:23:17.630 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:23:17.630 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:23:17.630 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:23:17.632 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:23:17.632 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:23:17.632 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:23:17.632 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:23:17.632 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:23:17.632 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:23:17.632 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:23:17.632 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:23:17.634 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:23:17.634 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:23:17.634 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:23:17.634 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:23:17.634 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:23:17.634 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:23:17.634 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:23:17.634 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:23:17.636 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:23:17.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:23:17.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:23:17.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:23:17.636 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:23:17.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:23:17.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:23:17.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:23:17.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:23:17.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:23:17.637 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:23:17.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:23:17.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:23:17.637 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:23:17.637 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:23:17.637 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:23:17.637 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:23:17.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:23:17.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:23:17.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:23:17.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:23:17.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:23:17.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:23:17.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:23:17.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:23:17.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:23:17.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:23:17.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:23:17.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:23:17.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:23:17.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:23:17.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:23:17.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:23:17.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:23:17.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:23:17.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:23:17.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:23:17.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:23:17.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:23:17.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:23:17.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:23:17.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:23:17.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:23:17.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:23:17.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:23:17.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:23:17.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:23:17.641 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:23:18.112 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:23:18.162 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:23:18.165 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:23:18.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:23:18.167 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:23:18.170 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:23:18.170 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:23:18.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:23:18.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:23:18.170 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:23:18.170 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:23:18.170 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:23:18.170 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:23:18.576 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:23:18.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:23:18.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:23:18.640 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:23:18.640 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:23:19.040 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:23:19.508 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:23:19.640 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:23:19.640 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:23:19.641 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:23:19.641 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:23:19.975 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:23:20.438 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:23:20.640 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:23:20.641 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:23:20.642 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:23:20.642 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:23:20.904 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:23:21.369 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:23:21.641 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:23:21.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:23:21.643 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:23:21.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:23:21.838 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:23:22.304 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:23:22.643 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:23:22.643 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:23:22.643 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:23:22.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:23:22.772 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:23:23.241 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:23:23.712 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:23:24.183 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:23:24.653 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:23:25.123 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:23:25.589 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:23:26.054 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:23:26.518 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:23:26.983 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:23:27.446 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:23:27.917 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:23:28.385 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:23:28.853 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:23:29.208 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:23:29.208 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:23:29.214 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:23:29.214 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:23:29.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:23:29.214 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:23:29.216 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:23:29.216 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:23:29.216 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:23:29.216 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:23:29.216 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:23:29.216 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:23:29.216 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:23:29.216 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2528 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:23:34.223 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:23:34.223 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:23:34.223 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:23:34.223 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:23:34.223 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:23:34.223 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:23:34.228 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:23:34.229 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:23:34.229 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:23:34.229 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:23:34.229 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:23:34.232 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:23:34.232 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:23:34.232 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:23:34.232 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:23:34.233 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:23:34.233 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:23:34.233 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:23:34.233 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:23:34.235 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:23:34.235 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:23:34.236 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:23:34.236 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:23:34.236 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:23:34.236 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:23:34.236 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:23:34.236 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:23:34.238 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:23:34.238 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:23:34.239 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:23:34.239 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:23:34.239 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:23:34.239 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:23:34.239 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:23:34.239 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:23:34.243 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:23:34.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:23:34.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:23:34.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:23:34.243 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:23:34.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:23:34.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:23:34.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:23:34.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:23:34.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:23:34.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:23:34.243 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:23:34.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:23:34.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:23:34.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:23:34.244 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:23:34.244 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:23:34.244 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:23:34.244 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:23:34.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:23:34.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:23:34.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:23:34.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:23:34.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:23:34.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:23:34.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:23:34.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:23:34.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:23:34.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:23:34.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:23:34.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:23:34.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:23:34.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:23:34.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:23:34.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:23:34.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:23:34.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:23:34.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:23:34.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:23:34.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:23:34.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:23:34.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:23:34.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:23:34.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:23:34.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:23:34.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:23:34.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:23:34.249 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:23:34.727 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:23:34.775 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:23:34.776 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:23:34.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:23:34.780 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:23:34.782 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:23:34.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:23:34.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:23:34.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:23:34.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:23:34.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:23:34.783 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:23:34.783 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:23:35.199 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:23:35.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:23:35.248 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:23:35.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:23:35.249 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:23:35.670 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:23:36.143 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:23:36.250 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:23:36.250 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:23:36.250 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:23:36.250 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:23:36.616 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:23:37.088 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:23:37.250 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:23:37.251 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:23:37.251 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:23:37.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:23:37.559 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:23:38.030 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:23:38.251 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:23:38.252 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:23:38.252 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:23:38.252 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:23:38.501 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:23:38.972 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:23:39.252 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:23:39.253 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:23:39.253 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:23:39.253 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:23:39.445 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:23:39.917 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:23:40.390 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:23:40.860 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:23:41.334 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:23:41.806 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:23:42.278 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:23:42.750 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:23:43.223 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:23:43.695 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:23:44.168 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:23:44.641 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:23:45.113 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:23:45.586 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:23:46.059 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:23:46.531 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:23:47.003 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:23:47.475 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:23:47.945 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:23:48.418 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:23:48.891 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:23:49.363 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:23:49.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:23:49.823 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:23:49.827 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:23:49.827 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:23:49.827 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:23:49.827 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:23:49.828 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:23:49.828 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:23:49.828 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:23:49.828 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:23:49.828 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:23:49.828 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:23:49.828 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:23:49.828 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3367 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:23:49.828 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3367 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:23:49.828 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3367 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:23:49.828 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3367 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:23:49.828 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3367 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:23:49.828 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3367 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:23:49.828 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3367 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:23:49.828 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3367 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:23:54.835 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:23:54.835 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:23:54.835 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:23:54.835 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:23:54.835 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:23:54.835 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:23:54.846 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:23:54.847 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:23:54.847 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:23:54.848 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:23:54.848 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:23:54.851 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:23:54.851 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:23:54.852 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:23:54.852 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:23:54.852 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:23:54.852 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:23:54.853 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:23:54.853 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:23:54.856 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:23:54.856 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:23:54.856 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:23:54.856 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:23:54.857 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:23:54.857 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:23:54.857 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:23:54.857 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:23:54.860 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:23:54.860 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:23:54.860 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:23:54.860 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:23:54.860 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:23:54.860 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:23:54.861 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:23:54.861 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:23:54.866 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:23:54.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:23:54.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:23:54.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:23:54.866 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:23:54.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:23:54.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:23:54.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:23:54.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:23:54.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:23:54.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:23:54.866 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:23:54.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:23:54.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:23:54.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:23:54.867 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:23:54.867 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:23:54.867 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:23:54.867 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:23:54.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:23:54.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:23:54.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:23:54.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:23:54.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:23:54.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:23:54.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:23:54.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:23:54.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:23:54.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:23:54.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:23:54.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:23:54.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:23:54.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:23:54.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:23:54.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:23:54.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:23:54.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:23:54.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:23:54.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:23:54.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:23:54.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:23:54.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:23:54.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:23:54.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:23:54.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:23:54.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:23:54.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:23:54.872 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:23:55.349 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:23:55.390 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:23:55.391 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:23:55.392 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:23:55.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:23:55.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:23:55.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:23:55.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:23:55.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:23:55.396 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:23:55.396 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:23:55.396 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:23:55.396 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:23:55.451 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:23:55.451 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:23:55.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:23:55.458 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:23:55.458 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:23:55.458 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:23:55.463 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:23:55.463 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:23:55.464 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:23:55.464 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:23:55.464 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:23:55.464 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:23:55.464 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:23:55.464 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=128 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:23:55.465 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=128 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:23:55.465 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=128 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:23:55.465 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:23:55.465 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:23:55.465 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:24:00.466 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:24:00.466 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:24:00.466 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:24:00.466 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:24:00.466 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:24:00.466 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:24:00.474 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:24:00.474 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:24:00.474 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:24:00.475 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:24:00.475 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:24:00.479 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:24:00.479 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:24:00.479 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:24:00.480 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:24:00.480 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:24:00.480 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:24:00.480 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:24:00.480 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:24:00.484 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:24:00.484 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:24:00.484 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:24:00.484 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:24:00.484 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:24:00.485 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:24:00.485 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:24:00.485 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:24:00.488 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:24:00.488 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:24:00.488 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:24:00.489 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:24:00.489 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:24:00.489 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:24:00.489 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:24:00.489 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:24:00.494 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:24:00.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:24:00.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:24:00.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:24:00.494 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:24:00.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:24:00.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:24:00.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:24:00.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:24:00.495 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:24:00.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:24:00.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:24:00.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:24:00.495 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:24:00.495 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:24:00.495 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:24:00.495 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:24:00.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:24:00.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:24:00.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:24:00.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:24:00.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:24:00.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:24:00.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:24:00.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:24:00.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:24:00.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:24:00.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:24:00.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:24:00.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:24:00.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:24:00.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:24:00.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:24:00.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:24:00.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:24:00.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:24:00.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:24:00.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:24:00.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:24:00.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:24:00.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:24:00.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:24:00.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:24:00.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:24:00.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:24:00.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:24:00.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:24:00.500 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:24:00.977 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:24:01.016 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:24:01.018 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:24:01.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:24:01.020 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:24:01.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:01.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:01.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:24:01.060 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:01.060 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:01.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:24:01.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:24:01.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:01.070 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:24:01.070 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:24:01.070 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:24:01.070 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:24:01.116 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:24:01.116 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:24:01.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:01.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:01.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:01.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:24:01.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:01.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:01.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:01.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:01.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:24:01.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:01.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:01.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:24:01.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:24:01.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:01.267 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:24:01.267 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:24:01.267 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:24:01.267 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:24:01.305 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:24:01.305 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:24:01.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:01.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:01.446 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:24:01.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:01.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:24:01.495 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:01.495 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:01.499 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:24:01.499 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:24:01.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:24:01.500 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:24:01.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:01.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:01.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:24:01.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:01.516 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:01.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:24:01.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:24:01.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:01.518 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:24:01.518 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:24:01.518 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:24:01.518 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:24:01.534 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:24:01.534 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:24:01.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:01.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:01.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:01.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:24:01.841 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:01.841 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:01.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:01.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:01.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:24:01.866 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:01.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:01.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:24:01.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:24:01.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:01.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:24:01.867 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:24:01.867 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:24:01.867 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:24:01.915 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:24:01.915 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:24:01.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:01.916 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:24:01.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:02.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:02.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:24:02.238 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:02.238 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:02.245 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:24:02.245 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:24:02.245 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:24:02.245 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:24:02.246 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:24:02.246 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:24:02.246 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:24:02.246 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:24:02.246 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:24:02.246 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:24:02.246 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:24:07.259 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:24:07.259 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:24:07.260 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:24:07.260 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:24:07.260 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:24:07.260 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:24:07.269 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:24:07.270 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:24:07.270 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:24:07.270 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:24:07.271 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:24:07.275 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:24:07.275 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:24:07.275 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:24:07.276 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:24:07.276 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:24:07.276 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:24:07.277 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:24:07.277 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:24:07.279 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:24:07.280 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:24:07.280 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:24:07.280 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:24:07.280 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:24:07.280 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:24:07.281 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:24:07.281 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:24:07.283 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:24:07.283 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:24:07.283 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:24:07.283 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:24:07.283 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:24:07.283 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:24:07.284 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:24:07.284 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:24:07.287 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:24:07.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:24:07.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:24:07.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:24:07.287 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:24:07.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:24:07.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:24:07.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:24:07.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:24:07.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:24:07.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:24:07.288 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:24:07.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:24:07.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:24:07.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:24:07.288 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:24:07.288 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:24:07.288 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:24:07.288 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:24:07.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:24:07.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:24:07.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:24:07.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:24:07.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:24:07.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:24:07.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:24:07.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:24:07.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:24:07.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:24:07.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:24:07.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:24:07.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:24:07.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:24:07.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:24:07.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:24:07.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:24:07.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:24:07.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:24:07.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:24:07.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:24:07.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:24:07.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:24:07.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:24:07.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:24:07.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:24:07.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:24:07.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:24:07.293 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:24:07.771 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:24:07.815 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:24:07.817 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:24:07.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:24:07.821 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:24:07.845 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:07.845 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:07.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:24:07.868 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:07.868 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:07.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:24:07.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:24:07.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:07.878 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:24:07.879 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:24:07.879 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:24:07.879 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:24:07.909 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:24:07.910 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:24:07.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:07.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:08.244 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:24:08.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:24:08.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:24:08.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:24:08.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:24:08.715 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:24:09.186 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:24:09.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:24:09.292 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:24:09.292 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:24:09.293 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:24:09.659 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:24:10.132 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:24:10.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:24:10.293 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:24:10.293 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:24:10.293 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:24:10.604 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:24:11.078 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:24:11.295 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:24:11.295 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:24:11.295 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:24:11.296 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:24:11.551 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:24:12.022 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:24:12.296 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:24:12.297 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:24:12.297 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:24:12.297 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:24:12.495 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:24:12.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:12.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:24:12.919 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:12.919 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:12.935 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:12.935 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:12.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:24:12.941 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:12.941 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:12.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:24:12.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:24:12.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:12.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:24:12.943 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:24:12.943 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:24:12.943 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:24:12.964 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:24:12.965 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:24:12.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:12.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:12.967 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:24:13.439 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:24:13.913 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:24:14.386 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:24:14.859 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:24:15.332 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:24:15.804 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:24:16.275 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:24:16.749 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:24:17.221 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:24:17.693 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:24:17.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:17.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:24:17.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:17.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:17.988 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:17.988 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:17.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:24:17.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:17.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:17.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:24:17.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:24:17.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:17.996 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:24:17.996 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:24:17.996 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:24:17.996 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:24:18.019 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:24:18.020 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:24:18.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:18.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:18.164 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:24:18.637 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:24:19.110 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:24:19.582 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:24:20.053 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:24:20.524 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:24:20.997 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:24:21.470 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:24:21.942 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:24:22.413 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:24:22.886 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 04:24:23.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:23.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:24:23.029 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:23.029 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:23.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:23.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:23.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:24:23.046 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:23.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:23.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:24:23.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:24:23.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:23.048 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:24:23.048 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:24:23.048 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:24:23.048 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:24:23.065 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:24:23.065 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:24:23.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:23.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:23.358 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 04:24:23.831 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 04:24:24.302 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 04:24:24.775 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 04:24:25.247 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 04:24:25.720 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 04:24:26.191 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 04:24:26.664 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 04:24:27.136 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 04:24:27.608 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 04:24:28.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:28.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:24:28.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:28.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:28.080 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 04:24:28.085 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:24:28.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:24:28.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:24:28.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:24:28.090 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:24:28.091 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:24:28.091 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:24:28.091 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:24:28.091 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:24:28.092 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:24:28.092 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:24:28.092 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4492 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:24:28.092 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4492 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:24:28.092 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4492 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:24:28.092 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4492 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:24:28.092 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4492 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:24:28.092 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4492 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:24:33.093 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:24:33.093 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:24:33.093 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:24:33.093 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:24:33.093 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:24:33.093 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:24:33.101 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:24:33.102 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:24:33.102 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:24:33.102 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:24:33.102 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:24:33.105 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:24:33.106 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:24:33.106 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:24:33.106 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:24:33.106 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:24:33.107 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:24:33.107 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:24:33.107 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:24:33.108 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:24:33.109 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:24:33.109 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:24:33.109 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:24:33.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:24:33.109 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:24:33.109 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:24:33.109 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:24:33.111 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:24:33.111 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:24:33.111 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:24:33.111 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:24:33.111 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:24:33.111 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:24:33.111 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:24:33.111 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:24:33.114 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:24:33.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:24:33.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:24:33.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:24:33.114 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:24:33.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:24:33.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:24:33.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:24:33.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:24:33.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:24:33.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:24:33.114 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:24:33.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:24:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:24:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:24:33.115 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:24:33.115 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:24:33.115 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:24:33.115 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:24:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:24:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:24:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:24:33.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:24:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:24:33.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:24:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:24:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:24:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:24:33.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:24:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:24:33.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:24:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:24:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:24:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:24:33.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:24:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:24:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:24:33.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:24:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:24:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:24:33.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:24:33.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:24:33.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:24:33.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:24:33.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:24:33.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:24:33.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:24:33.119 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:24:33.595 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:24:33.634 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:24:33.635 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:24:33.636 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:24:33.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:24:33.652 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:33.652 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:33.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:24:33.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:33.672 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:33.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:24:33.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:24:33.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:33.680 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:24:33.680 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:24:33.680 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:24:33.680 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:24:33.687 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:24:33.687 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:24:33.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:33.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:34.067 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:24:34.117 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:24:34.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:24:34.118 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:24:34.118 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:24:34.539 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:24:35.010 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:24:35.119 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:24:35.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:24:35.119 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:24:35.119 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:24:35.482 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:24:35.956 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:24:36.119 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:24:36.120 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:24:36.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:24:36.120 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:24:36.428 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:24:36.902 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:24:37.121 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:24:37.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:24:37.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:24:37.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:24:37.375 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:24:37.847 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:24:38.122 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:24:38.122 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:24:38.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:24:38.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:24:38.318 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:24:38.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:38.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:24:38.696 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:38.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:38.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:38.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:38.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:24:38.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:38.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:38.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:24:38.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:24:38.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:38.723 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:24:38.723 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:24:38.723 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:24:38.723 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:24:38.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:24:38.734 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:24:38.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:38.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:38.788 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:24:39.259 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:24:39.730 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:24:40.203 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:24:40.676 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:24:41.148 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:24:41.622 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:24:42.094 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:24:42.567 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:24:43.040 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:24:43.513 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:24:43.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:43.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:24:43.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:43.742 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:43.760 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:43.760 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:43.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:24:43.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:43.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:43.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:24:43.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:24:43.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:43.768 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:24:43.768 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:24:43.768 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:24:43.768 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:24:43.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:24:43.796 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:24:43.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:43.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:43.985 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:24:44.456 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:24:44.930 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:24:45.402 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:24:45.874 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:24:46.345 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:24:46.819 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:24:47.291 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:24:47.763 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:24:48.234 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:24:48.705 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 04:24:48.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:48.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:24:48.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:48.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:48.820 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:48.820 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:48.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:24:48.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:48.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:48.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:24:48.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:24:48.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:48.828 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:24:48.828 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:24:48.828 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:24:48.828 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:24:48.839 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:24:48.839 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:24:48.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:48.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:49.176 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 04:24:49.649 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 04:24:50.122 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 04:24:50.594 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 04:24:51.068 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 04:24:51.540 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 04:24:52.012 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 04:24:52.483 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 04:24:52.956 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 04:24:53.429 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 04:24:53.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:53.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:24:53.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:53.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:53.862 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:24:53.863 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:24:53.863 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:24:53.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:24:53.864 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:24:53.864 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:24:53.864 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:24:53.864 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:24:53.864 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:24:53.864 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:24:53.864 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:24:53.865 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4482 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:24:53.865 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4482 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:24:53.865 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4482 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:24:53.865 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4482 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:24:53.865 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4482 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:24:58.870 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:24:58.870 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:24:58.870 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:24:58.870 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:24:58.870 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:24:58.870 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:24:58.884 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:24:58.884 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:24:58.885 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:24:58.885 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:24:58.885 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:24:58.886 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:24:58.886 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:24:58.886 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:24:58.886 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:24:58.886 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:24:58.886 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:24:58.887 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:24:58.887 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:24:58.888 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:24:58.888 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:24:58.888 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:24:58.888 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:24:58.888 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:24:58.888 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:24:58.888 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:24:58.888 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:24:58.890 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:24:58.890 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:24:58.890 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:24:58.890 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:24:58.890 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:24:58.890 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:24:58.890 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:24:58.890 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:24:58.893 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:24:58.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:24:58.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:24:58.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:24:58.893 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:24:58.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:24:58.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:24:58.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:24:58.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:24:58.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:24:58.893 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:24:58.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:24:58.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:24:58.893 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:24:58.893 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:24:58.893 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:24:58.893 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:24:58.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:24:58.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:24:58.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:24:58.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:24:58.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:24:58.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:24:58.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:24:58.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:24:58.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:24:58.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:24:58.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:24:58.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:24:58.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:24:58.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:24:58.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:24:58.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:24:58.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:24:58.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:24:58.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:24:58.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:24:58.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:24:58.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:24:58.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:24:58.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:24:58.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:24:58.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:24:58.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:24:58.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:24:58.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:24:58.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:24:58.898 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:24:59.375 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:24:59.415 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:24:59.417 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:24:59.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:24:59.420 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:24:59.441 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:59.442 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:59.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:24:59.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:24:59.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:24:59.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:24:59.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:24:59.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:59.464 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:24:59.464 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:24:59.464 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:24:59.464 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:24:59.514 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:24:59.514 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:24:59.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:59.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:24:59.846 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:24:59.897 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:24:59.898 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:24:59.898 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:24:59.898 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:25:00.318 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:25:00.791 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:25:00.899 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:25:00.899 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:25:00.899 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:25:00.899 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:25:01.264 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:25:01.737 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:25:01.899 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:25:01.900 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:25:01.900 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:25:01.900 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:25:02.209 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:25:02.680 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:25:02.901 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:25:02.902 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:25:02.902 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:25:02.902 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:25:03.151 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:25:03.625 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:25:03.902 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:25:03.903 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:25:03.903 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:25:03.903 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:25:04.097 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:25:04.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:04.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:25:04.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:25:04.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:25:04.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:25:04.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:25:04.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:25:04.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:25:04.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:25:04.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:25:04.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:25:04.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:04.550 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:25:04.550 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:25:04.550 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:25:04.550 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:25:04.566 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:25:04.566 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:25:04.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:04.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:04.569 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:25:05.041 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:25:05.511 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:25:05.984 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:25:06.457 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:25:06.930 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:25:07.402 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:25:07.875 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:25:08.348 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:25:08.821 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:25:09.294 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:25:09.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:09.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:25:09.576 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:25:09.577 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:25:09.597 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:25:09.597 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:25:09.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:25:09.603 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:25:09.603 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:25:09.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:25:09.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:25:09.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:09.605 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:25:09.605 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:25:09.605 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:25:09.605 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:25:09.619 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:25:09.619 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:25:09.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:09.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:09.766 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:25:10.237 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:25:10.710 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:25:11.183 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:25:11.655 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:25:12.126 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:25:12.597 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:25:13.067 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:25:13.541 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:25:14.013 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:25:14.485 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 04:25:14.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:14.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:25:14.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:25:14.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:25:14.646 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:25:14.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:25:14.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:25:14.652 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:25:14.652 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:25:14.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:25:14.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:25:14.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:14.653 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:25:14.653 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:25:14.653 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:25:14.653 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:25:14.666 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:25:14.666 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:25:14.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:14.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:14.958 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 04:25:15.431 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 04:25:15.903 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 04:25:16.374 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 04:25:16.847 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 04:25:17.320 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 04:25:17.792 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 04:25:18.263 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 04:25:18.737 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 04:25:19.210 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 04:25:19.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:19.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:25:19.676 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:25:19.676 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:25:19.682 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 04:25:19.691 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:25:19.692 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:25:19.692 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:25:19.692 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:25:19.697 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:25:19.697 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:25:19.698 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:25:19.698 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:25:19.698 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:25:19.698 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:25:19.698 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:25:19.698 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4493 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:25:19.698 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4493 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:25:19.698 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4493 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:25:19.698 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4493 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:25:19.698 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4493 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:25:19.698 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4493 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:25:24.697 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:25:24.698 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:25:24.698 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:25:24.698 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:25:24.698 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:25:24.698 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:25:24.708 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:25:24.710 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:25:24.710 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:25:24.711 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:25:24.711 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:25:24.716 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:25:24.717 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:25:24.717 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:25:24.717 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:25:24.717 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:25:24.718 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:25:24.718 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:25:24.718 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:25:24.721 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:25:24.722 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:25:24.722 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:25:24.722 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:25:24.722 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:25:24.723 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:25:24.723 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:25:24.723 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:25:24.726 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:25:24.726 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:25:24.726 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:25:24.726 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:25:24.727 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:25:24.727 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:25:24.727 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:25:24.727 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:25:24.731 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:25:24.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:25:24.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:25:24.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:25:24.732 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:25:24.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:25:24.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:25:24.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:25:24.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:25:24.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:25:24.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:25:24.732 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:25:24.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:25:24.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:25:24.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:25:24.732 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:25:24.732 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:25:24.732 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:25:24.732 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:25:24.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:25:24.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:25:24.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:25:24.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:25:24.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:25:24.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:25:24.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:25:24.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:25:24.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:25:24.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:25:24.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:25:24.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:25:24.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:25:24.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:25:24.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:25:24.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:25:24.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:25:24.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:25:24.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:25:24.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:25:24.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:25:24.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:25:24.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:25:24.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:25:24.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:25:24.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:25:24.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:25:24.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:25:24.737 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:25:25.214 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:25:25.261 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:25:25.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:25:25.265 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:25:25.267 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:25:25.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:25:25.294 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:25:25.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:25:25.307 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:25:25.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:25:25.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:25:25.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:25:25.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:25.317 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:25:25.317 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:25:25.317 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:25:25.317 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:25:25.352 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:25:25.352 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:25:25.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:25.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:25.684 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:25:25.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:25:25.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:25:25.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:25:25.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:25:26.157 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:25:26.629 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:25:26.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:25:26.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:25:26.739 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:25:26.739 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:25:27.103 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:25:27.576 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:25:27.740 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:25:27.741 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:25:27.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:25:27.741 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:25:28.048 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:25:28.519 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:25:28.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:25:28.742 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:25:28.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:25:28.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:25:28.990 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:25:29.463 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:25:29.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:25:29.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:25:29.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:25:29.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:25:29.936 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:25:30.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:30.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:25:30.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:25:30.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:25:30.375 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:25:30.376 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:25:30.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:25:30.381 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:25:30.381 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:25:30.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:25:30.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:25:30.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:30.383 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:25:30.383 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:25:30.383 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:25:30.383 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:25:30.405 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:25:30.406 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:25:30.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:30.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:30.408 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:25:30.879 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:25:31.350 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:25:31.823 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:25:32.295 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:25:32.768 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:25:33.239 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:25:33.712 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:25:34.185 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:25:34.657 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:25:35.128 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:25:35.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:35.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:25:35.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:25:35.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:25:35.434 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:25:35.434 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:25:35.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:25:35.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:25:35.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:25:35.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:25:35.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:25:35.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:35.441 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:25:35.441 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:25:35.441 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:25:35.441 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:25:35.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:25:35.451 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:25:35.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:35.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:35.600 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:25:36.073 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:25:36.545 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:25:37.016 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:25:37.489 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:25:37.962 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:25:38.434 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:25:38.905 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:25:39.376 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:25:39.847 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:25:40.320 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 04:25:40.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:40.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:25:40.458 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:25:40.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:25:40.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:25:40.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:25:40.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:25:40.475 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:25:40.475 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:25:40.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:25:40.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:25:40.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:40.477 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:25:40.477 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:25:40.477 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:25:40.477 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:25:40.499 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:25:40.499 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:25:40.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:40.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:40.793 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 04:25:41.265 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 04:25:41.736 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 04:25:42.209 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 04:25:42.682 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 04:25:43.154 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 04:25:43.625 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 04:25:44.098 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 04:25:44.571 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 04:25:45.043 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 04:25:45.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:45.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:25:45.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:25:45.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:25:45.514 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 04:25:45.523 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:25:45.524 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:25:45.524 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:25:45.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:25:45.530 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:25:45.530 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:25:45.530 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:25:45.530 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:25:45.530 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:25:45.530 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:25:45.530 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:25:45.531 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4493 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:25:45.531 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4493 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:25:45.531 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4493 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:25:45.531 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4493 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:25:45.531 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4493 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:25:45.531 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4493 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:25:50.531 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:25:50.531 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:25:50.531 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:25:50.531 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:25:50.531 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:25:50.531 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:25:50.539 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:25:50.539 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:25:50.539 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:25:50.540 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:25:50.540 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:25:50.542 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:25:50.543 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:25:50.543 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:25:50.543 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:25:50.543 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:25:50.544 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:25:50.544 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:25:50.544 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:25:50.548 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:25:50.548 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:25:50.548 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:25:50.548 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:25:50.549 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:25:50.549 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:25:50.550 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:25:50.550 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:25:50.553 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:25:50.553 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:25:50.553 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:25:50.553 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:25:50.554 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:25:50.554 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:25:50.554 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:25:50.554 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:25:50.560 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:25:50.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:25:50.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:25:50.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:25:50.560 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:25:50.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:25:50.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:25:50.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:25:50.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:25:50.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:25:50.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:25:50.560 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:25:50.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:25:50.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:25:50.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:25:50.561 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:25:50.561 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:25:50.561 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:25:50.561 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:25:50.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:25:50.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:25:50.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:25:50.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:25:50.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:25:50.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:25:50.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:25:50.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:25:50.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:25:50.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:25:50.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:25:50.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:25:50.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:25:50.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:25:50.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:25:50.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:25:50.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:25:50.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:25:50.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:25:50.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:25:50.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:25:50.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:25:50.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:25:50.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:25:50.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:25:50.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:25:50.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:25:50.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:25:50.566 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:25:51.045 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:25:51.093 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:25:51.095 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:25:51.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:25:51.097 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:25:51.110 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:25:51.110 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:25:51.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:25:51.126 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:25:51.126 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:25:51.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:25:51.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:25:51.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:51.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:25:51.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:25:51.133 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:25:51.134 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:25:51.183 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:25:51.184 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:25:51.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:51.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:51.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:51.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:25:51.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:25:51.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:25:51.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:25:51.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:25:51.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:25:51.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:25:51.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:25:51.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:25:51.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:25:51.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:51.454 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:25:51.454 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:25:51.454 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:25:51.454 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:25:51.462 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:25:51.462 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:25:51.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:51.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:51.517 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:25:51.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:25:51.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:25:51.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:25:51.567 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:25:51.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:51.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:25:51.847 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:25:51.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:25:51.861 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:25:51.861 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:25:51.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:25:51.866 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:25:51.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:25:51.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:25:51.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:25:51.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:51.868 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:25:51.868 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:25:51.868 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:25:51.868 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:25:51.888 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:25:51.888 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:25:51.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:51.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:51.989 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:25:52.462 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:25:52.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:25:52.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:25:52.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:25:52.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:25:52.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:52.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:25:52.620 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:25:52.620 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:25:52.630 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:25:52.630 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:25:52.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:25:52.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:25:52.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:25:52.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:25:52.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:25:52.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:52.637 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:25:52.637 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:25:52.637 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:25:52.637 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:25:52.639 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:25:52.639 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:25:52.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:52.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:52.933 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:25:53.406 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:25:53.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:53.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:25:53.492 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:25:53.492 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:25:53.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:25:53.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:25:53.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:25:53.507 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:25:53.514 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:25:53.514 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:25:53.514 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:25:53.514 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:25:53.514 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:25:53.514 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:25:53.515 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:25:53.515 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=635 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:25:53.515 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=635 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:25:53.515 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=635 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:25:53.515 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=635 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:25:53.515 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=635 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:25:53.515 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=636 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:25:53.515 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=636 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:25:53.515 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=636 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:25:53.516 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=636 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:25:53.516 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=636 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:25:53.516 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=636 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:25:53.516 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=636 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:25:53.516 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=636 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:25:53.516 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=637 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:25:53.516 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=637 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:25:53.516 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=637 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:25:53.516 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=637 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:25:53.516 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=637 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:25:53.516 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=637 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:25:53.516 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=637 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:25:53.517 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=637 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:25:58.515 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:25:58.515 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:25:58.515 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:25:58.515 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:25:58.515 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:25:58.515 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:25:58.522 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:25:58.523 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:25:58.523 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:25:58.523 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:25:58.523 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:25:58.526 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:25:58.526 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:25:58.526 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:25:58.526 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:25:58.527 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:25:58.527 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:25:58.527 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:25:58.527 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:25:58.530 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:25:58.530 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:25:58.530 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:25:58.530 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:25:58.531 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:25:58.531 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:25:58.531 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:25:58.531 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:25:58.534 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:25:58.534 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:25:58.534 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:25:58.534 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:25:58.534 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:25:58.534 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:25:58.534 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:25:58.534 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:25:58.539 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:25:58.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:25:58.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:25:58.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:25:58.539 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:25:58.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:25:58.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:25:58.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:25:58.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:25:58.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:25:58.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:25:58.539 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:25:58.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:25:58.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:25:58.540 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:25:58.540 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:25:58.540 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:25:58.540 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:25:58.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:25:58.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:25:58.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:25:58.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:25:58.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:25:58.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:25:58.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:25:58.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:25:58.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:25:58.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:25:58.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:25:58.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:25:58.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:25:58.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:25:58.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:25:58.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:25:58.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:25:58.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:25:58.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:25:58.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:25:58.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:25:58.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:25:58.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:25:58.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:25:58.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:25:58.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:25:58.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:25:58.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:25:58.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:25:58.544 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:25:59.023 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:25:59.061 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:25:59.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:25:59.063 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:25:59.066 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:25:59.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:25:59.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:25:59.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:25:59.102 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:25:59.102 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:25:59.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:25:59.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:25:59.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:59.107 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:25:59.107 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:25:59.107 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:25:59.107 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:25:59.114 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:25:59.114 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:25:59.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:59.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:25:59.493 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:25:59.543 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:25:59.544 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:25:59.544 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:25:59.544 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:25:59.966 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:26:00.439 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:26:00.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:26:00.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:26:00.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:26:00.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:26:00.911 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:26:01.385 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:26:01.546 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:26:01.546 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:26:01.546 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:26:01.547 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:26:01.857 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:26:02.328 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:26:02.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:26:02.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:26:02.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:26:02.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:26:02.799 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:26:03.272 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:26:03.549 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:26:03.549 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:26:03.549 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:26:03.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:26:03.745 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:26:04.217 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:26:04.688 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:26:05.159 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:26:05.632 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:26:06.105 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:26:06.578 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:26:07.051 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:26:07.524 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:26:07.996 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:26:08.467 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:26:08.938 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:26:09.409 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:26:09.879 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:26:10.350 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:26:10.821 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:26:11.294 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:26:11.767 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:26:12.240 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:26:12.713 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:26:13.186 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:26:13.658 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:26:14.129 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 04:26:14.603 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 04:26:15.075 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 04:26:15.548 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 04:26:16.019 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 04:26:16.492 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 04:26:16.965 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 04:26:17.437 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 04:26:17.908 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 04:26:18.381 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 04:26:18.854 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 04:26:19.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:26:19.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:26:19.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:26:19.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:26:19.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:26:19.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:26:19.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:26:19.142 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:26:19.142 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:26:19.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:26:19.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:26:19.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:26:19.144 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:26:19.144 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:26:19.144 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:26:19.144 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:26:19.181 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:26:19.181 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:26:19.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:26:19.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:26:19.326 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 04:26:19.797 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 04:26:20.270 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 04:26:20.743 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 04:26:21.215 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 04:26:21.689 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 04:26:22.162 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 04:26:22.634 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 04:26:23.105 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 04:26:23.578 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 04:26:24.051 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 04:26:24.523 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 04:26:24.996 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 04:26:25.469 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 04:26:25.941 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 04:26:26.415 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 04:26:26.888 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 04:26:27.360 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 04:26:27.831 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-08 04:26:28.302 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-08 04:26:28.772 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-08 04:26:29.243 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-08 04:26:29.716 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-08 04:26:30.189 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-08 04:26:30.661 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-08 04:26:31.132 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-08 04:26:31.606 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-08 04:26:32.078 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-08 04:26:32.550 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-08 04:26:33.022 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-08 04:26:33.495 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-08 04:26:33.967 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-08 04:26:34.440 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-08 04:26:34.910 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-08 04:26:35.381 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-08 04:26:35.855 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-08 04:26:36.328 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-08 04:26:36.800 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-08 04:26:37.273 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-08 04:26:37.746 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-08 04:26:38.218 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-08 04:26:38.689 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-08 04:26:39.163 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-08 04:26:39.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:26:39.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:26:39.190 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:26:39.190 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:26:39.208 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:26:39.208 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:26:39.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:26:39.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:26:39.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:26:39.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:26:39.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:26:39.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:26:39.216 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:26:39.216 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:26:39.216 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:26:39.216 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:26:39.250 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:26:39.251 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:26:39.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:26:39.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:26:39.635 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-08 04:26:40.107 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-08 04:26:40.581 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-08 04:26:41.053 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-08 04:26:41.526 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-08 04:26:41.997 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-02-08 04:26:42.470 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-02-08 04:26:42.942 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-02-08 04:26:43.415 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-02-08 04:26:43.886 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-02-08 04:26:44.359 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-02-08 04:26:44.832 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-02-08 04:26:45.304 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-02-08 04:26:45.775 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-02-08 04:26:46.246 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-02-08 04:26:46.716 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-02-08 04:26:47.189 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-02-08 04:26:47.662 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-02-08 04:26:48.135 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-02-08 04:26:48.606 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-02-08 04:26:49.079 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-02-08 04:26:49.552 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-02-08 04:26:50.024 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-02-08 04:26:50.497 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-02-08 04:26:50.970 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-02-08 04:26:51.442 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-02-08 04:26:51.916 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-02-08 04:26:52.388 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-02-08 04:26:52.860 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-02-08 04:26:53.331 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-02-08 04:26:53.802 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-02-08 04:26:54.273 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-02-08 04:26:54.746 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-02-08 04:26:55.219 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-02-08 04:26:55.691 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-02-08 04:26:56.162 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-02-08 04:26:56.632 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-02-08 04:26:57.106 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-02-08 04:26:57.578 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-02-08 04:26:58.051 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-02-08 04:26:58.521 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-02-08 04:26:58.992 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-02-08 04:26:59.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:26:59.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:26:59.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:26:59.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:26:59.272 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:26:59.272 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:26:59.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:26:59.278 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:26:59.278 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:26:59.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:26:59.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:26:59.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:26:59.280 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:26:59.280 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:26:59.280 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:26:59.280 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:26:59.317 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:26:59.318 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:26:59.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:26:59.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:26:59.462 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-02-08 04:26:59.934 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-02-08 04:27:00.407 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-02-08 04:27:00.880 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-02-08 04:27:01.352 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-02-08 04:27:01.823 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-02-08 04:27:02.296 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-02-08 04:27:02.769 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-02-08 04:27:03.241 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-02-08 04:27:03.714 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-02-08 04:27:04.187 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-02-08 04:27:04.659 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-02-08 04:27:05.133 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-02-08 04:27:05.605 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-02-08 04:27:06.077 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-02-08 04:27:06.548 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-02-08 04:27:07.021 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-02-08 04:27:07.494 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-02-08 04:27:07.967 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-02-08 04:27:08.437 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-02-08 04:27:08.911 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-02-08 04:27:09.383 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-02-08 04:27:09.856 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-02-08 04:27:10.327 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-02-08 04:27:10.800 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-02-08 04:27:11.272 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-02-08 04:27:11.745 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-02-08 04:27:12.215 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-02-08 04:27:12.689 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-02-08 04:27:13.161 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-02-08 04:27:13.634 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-02-08 04:27:14.107 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-02-08 04:27:14.579 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-02-08 04:27:15.052 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-02-08 04:27:15.523 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-02-08 04:27:15.996 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-02-08 04:27:16.468 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-02-08 04:27:16.940 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-02-08 04:27:17.411 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-02-08 04:27:17.885 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-02-08 04:27:18.357 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-02-08 04:27:18.830 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-02-08 04:27:19.301 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-02-08 04:27:19.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:19.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:27:19.330 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:19.330 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:19.340 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:27:19.340 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:27:19.340 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:27:19.340 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:27:19.345 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:27:19.345 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:27:19.345 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:27:19.345 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:27:19.346 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:27:19.346 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:27:19.346 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:27:19.346 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=17453 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:27:19.346 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=17453 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:27:19.346 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=17453 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:27:19.347 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=17453 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:27:19.347 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=17453 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:27:19.347 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=17453 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:27:19.347 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=17454 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:27:19.347 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=17454 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:27:19.347 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=17454 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:27:19.347 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=17454 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:27:19.347 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=17454 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:27:19.347 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=17454 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:27:19.347 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=17454 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:27:19.347 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=17454 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:27:24.350 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:27:24.350 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:27:24.350 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:27:24.350 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:27:24.350 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:27:24.350 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:27:24.354 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:27:24.354 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:27:24.354 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:27:24.354 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:27:24.354 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:27:24.356 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:27:24.356 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:27:24.356 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:27:24.356 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:27:24.356 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:27:24.356 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:27:24.356 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:27:24.356 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:27:24.358 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:27:24.358 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:27:24.358 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:27:24.358 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:27:24.358 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:27:24.358 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:27:24.358 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:27:24.358 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:27:24.360 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:27:24.360 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:27:24.360 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:27:24.360 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:27:24.360 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:27:24.360 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:27:24.360 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:27:24.360 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:27:24.363 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:27:24.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:27:24.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:27:24.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:27:24.363 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:27:24.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:27:24.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:27:24.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:27:24.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:27:24.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:27:24.363 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:27:24.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:27:24.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:27:24.363 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:27:24.363 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:27:24.364 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:27:24.364 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:27:24.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:27:24.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:27:24.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:27:24.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:27:24.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:27:24.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:27:24.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:27:24.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:27:24.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:27:24.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:27:24.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:27:24.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:27:24.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:27:24.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:27:24.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:27:24.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:27:24.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:27:24.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:27:24.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:27:24.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:27:24.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:27:24.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:27:24.365 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:27:24.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:27:24.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:27:24.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:27:24.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:27:24.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:27:24.365 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:27:24.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:27:24.365 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:27:24.365 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:27:24.365 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:27:24.365 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:27:24.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:27:29.372 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:27:29.372 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:27:29.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:27:29.372 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:27:29.373 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:27:29.373 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:27:29.381 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:27:29.382 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:27:29.382 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:27:29.382 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:27:29.382 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:27:29.385 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:27:29.385 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:27:29.386 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:27:29.386 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:27:29.386 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:27:29.386 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:27:29.386 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:27:29.386 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:27:29.388 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:27:29.389 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:27:29.389 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:27:29.389 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:27:29.389 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:27:29.389 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:27:29.389 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:27:29.389 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:27:29.391 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:27:29.391 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:27:29.391 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:27:29.391 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:27:29.392 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:27:29.392 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:27:29.392 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:27:29.392 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:27:29.394 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:27:29.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:27:29.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:27:29.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:27:29.394 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:27:29.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:27:29.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:27:29.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:27:29.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:27:29.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:27:29.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:27:29.395 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:27:29.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:27:29.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:27:29.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:27:29.395 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:27:29.395 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:27:29.395 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:27:29.395 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:27:29.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:27:29.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:27:29.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:27:29.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:27:29.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:27:29.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:27:29.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:27:29.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:27:29.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:27:29.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:27:29.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:27:29.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:27:29.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:27:29.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:27:29.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:27:29.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:27:29.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:27:29.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:27:29.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:27:29.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:27:29.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:27:29.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:27:29.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:27:29.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:27:29.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:27:29.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:27:29.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:27:29.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:27:29.400 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:27:29.877 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:27:29.915 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:27:29.916 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:27:29.917 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:27:29.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:27:29.933 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:29.933 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:29.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:27:29.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:29.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:29.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:27:29.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:27:29.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:29.972 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:27:29.972 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:27:29.973 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:27:29.973 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:27:30.015 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:27:30.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:27:30.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:30.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:30.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:30.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:27:30.219 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:30.219 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:30.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:27:30.236 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:30.236 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:30.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:27:30.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:30.238 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:27:30.238 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:27:30.238 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:27:30.238 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:27:30.248 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:27:30.248 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:27:30.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:30.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:30.349 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:27:30.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:27:30.398 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:27:30.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:27:30.398 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:27:30.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:30.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:27:30.458 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:30.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:30.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:27:30.475 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:30.475 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:30.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:27:30.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:30.477 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:27:30.477 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:27:30.477 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:27:30.477 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:27:30.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:27:30.483 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:27:30.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:30.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:30.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:30.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:27:30.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:30.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:30.716 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:30.716 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:30.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:27:30.722 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:30.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:30.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:27:30.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:27:30.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:30.724 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:27:30.724 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:27:30.724 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:27:30.724 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:27:30.768 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:27:30.769 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:27:30.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:30.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:30.820 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:27:31.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:31.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:27:31.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:31.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:31.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:27:31.096 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:31.096 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:31.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:27:31.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:31.098 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:27:31.098 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:27:31.098 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:27:31.098 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:27:31.148 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:27:31.148 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:27:31.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:31.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:31.292 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:27:31.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:27:31.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:27:31.400 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:27:31.400 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:27:31.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:31.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:27:31.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:31.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:31.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:27:31.454 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:31.454 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:31.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:27:31.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:31.456 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:27:31.456 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:27:31.456 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:27:31.456 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:27:31.471 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:27:31.471 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:27:31.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:31.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:31.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:31.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:27:31.761 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:31.761 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:31.762 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:27:31.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:31.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:31.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:27:31.782 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:31.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:31.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:27:31.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:27:31.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:31.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:27:31.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:27:31.784 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:27:31.784 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:27:31.805 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:27:31.805 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:27:31.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:31.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:32.233 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:27:32.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:27:32.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:27:32.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:27:32.401 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:27:32.706 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:27:33.179 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:27:33.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:27:33.402 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:27:33.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:27:33.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:27:33.651 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:27:34.122 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:27:34.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:34.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:27:34.281 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:34.281 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:34.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:27:34.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:34.294 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:34.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:27:34.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:34.296 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:27:34.296 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:27:34.296 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:27:34.296 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:27:34.301 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:27:34.301 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:27:34.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:34.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:34.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:27:34.403 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:27:34.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:27:34.404 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:27:34.594 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:27:35.068 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:27:35.540 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:27:36.011 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:27:36.484 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:27:36.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:36.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:27:36.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:36.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:36.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:27:36.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:36.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:36.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:27:36.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:36.892 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:27:36.892 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:27:36.892 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:27:36.892 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:27:36.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:27:36.897 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:27:36.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:36.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:36.957 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:27:37.429 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:27:37.900 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:27:38.373 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:27:38.846 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:27:39.318 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:27:39.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:39.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:27:39.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:39.477 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:39.492 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:39.492 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:39.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:27:39.498 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:39.498 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:39.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:27:39.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:27:39.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:39.500 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:27:39.500 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:27:39.500 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:27:39.500 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:27:39.549 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:27:39.549 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:27:39.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:39.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:39.788 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:27:40.260 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:27:40.733 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:27:41.206 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:27:41.678 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:27:41.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:41.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:27:42.000 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:42.000 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:42.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:27:42.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:42.012 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:42.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:27:42.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:42.014 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:27:42.014 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:27:42.014 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:27:42.014 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:27:42.050 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:27:42.050 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:27:42.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:42.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:42.148 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:27:42.619 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:27:43.093 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:27:43.565 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:27:44.038 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:27:44.511 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:27:44.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:44.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:27:44.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:44.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:44.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:27:44.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:44.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:44.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:27:44.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:44.614 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:27:44.614 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:27:44.614 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:27:44.614 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:27:44.645 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:27:44.645 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:27:44.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:44.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:44.982 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 04:27:45.455 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 04:27:45.926 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 04:27:46.397 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 04:27:46.870 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 04:27:47.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:47.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:27:47.188 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:47.188 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:47.195 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:27:47.195 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:27:47.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:27:47.195 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:27:47.196 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:27:47.196 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:27:47.196 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:27:47.196 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:27:47.196 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:27:47.196 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:27:47.196 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:27:52.204 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:27:52.204 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:27:52.204 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:27:52.204 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:27:52.204 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:27:52.204 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:27:52.216 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:27:52.218 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:27:52.218 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:27:52.218 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:27:52.219 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:27:52.224 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:27:52.224 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:27:52.225 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:27:52.225 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:27:52.225 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:27:52.226 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:27:52.226 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:27:52.226 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:27:52.230 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:27:52.230 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:27:52.230 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:27:52.231 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:27:52.231 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:27:52.231 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:27:52.232 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:27:52.232 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:27:52.235 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:27:52.235 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:27:52.235 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:27:52.235 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:27:52.236 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:27:52.236 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:27:52.236 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:27:52.236 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:27:52.241 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:27:52.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:27:52.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:27:52.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:27:52.241 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:27:52.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:27:52.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:27:52.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:27:52.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:27:52.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:27:52.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:27:52.242 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:27:52.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:27:52.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:27:52.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:27:52.242 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:27:52.242 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:27:52.242 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:27:52.242 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:27:52.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:27:52.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:27:52.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:27:52.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:27:52.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:27:52.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:27:52.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:27:52.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:27:52.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:27:52.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:27:52.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:27:52.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:27:52.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:27:52.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:27:52.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:27:52.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:27:52.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:27:52.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:27:52.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:27:52.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:27:52.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:27:52.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:27:52.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:27:52.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:27:52.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:27:52.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:27:52.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:27:52.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:27:52.247 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:27:52.725 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:27:52.768 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:27:52.769 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:27:52.770 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:27:52.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:27:52.783 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:52.783 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:52.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:27:52.805 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:52.805 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:52.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:27:52.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:27:52.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:52.820 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:27:52.820 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:27:52.820 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:27:52.820 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:27:52.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:27:52.863 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:27:52.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:52.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:53.195 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:27:53.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:27:53.246 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:27:53.247 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:27:53.248 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:27:53.668 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:27:54.141 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:27:54.249 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:27:54.249 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:27:54.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:27:54.249 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:27:54.614 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:27:55.087 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:27:55.249 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:27:55.250 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:27:55.250 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:27:55.250 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:27:55.560 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:27:55.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:55.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:27:55.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:55.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:55.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:55.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:55.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:27:55.989 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:55.989 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:55.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:27:55.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:27:55.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:55.991 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:27:55.991 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:27:55.991 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:27:55.991 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:27:56.027 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:27:56.027 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:27:56.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:27:56.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:56.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:56.250 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:27:56.250 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:27:56.250 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:27:56.250 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:27:56.492 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:27:56.956 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:27:57.251 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:27:57.252 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:27:57.252 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:27:57.252 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:27:57.424 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:27:57.895 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:27:58.366 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:27:58.832 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:27:59.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:59.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:27:59.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:59.220 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:59.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:59.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:59.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:27:59.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:27:59.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:27:59.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:27:59.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:27:59.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:59.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:27:59.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:27:59.234 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:27:59.234 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:27:59.246 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:27:59.246 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:27:59.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:59.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:27:59.295 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:27:59.758 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:28:00.225 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:28:00.692 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:28:01.157 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:28:01.619 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:28:02.084 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:28:02.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:02.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:28:02.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:02.516 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:02.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:02.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:02.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:28:02.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:02.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:02.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:28:02.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:28:02.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:02.530 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:28:02.530 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:28:02.530 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:28:02.530 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:28:02.546 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:28:02.546 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:28:02.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:02.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:02.547 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:28:03.013 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:28:03.482 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:28:03.951 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:28:04.420 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:28:04.889 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:28:05.355 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:28:05.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:05.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:28:05.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:05.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:05.715 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:28:05.715 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:28:05.716 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:28:05.716 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:28:05.717 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:28:05.717 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:28:05.717 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:28:05.717 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:28:05.717 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:28:05.717 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:28:05.717 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:28:05.717 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2937 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:28:05.717 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2937 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:28:05.717 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2937 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:28:05.717 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2937 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:28:05.717 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2937 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:28:05.717 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2937 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:28:05.717 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2937 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:28:05.717 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2937 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:28:10.730 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:28:10.730 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:28:10.730 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:28:10.730 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:28:10.730 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:28:10.730 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:28:10.743 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:28:10.744 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:28:10.744 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:28:10.744 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:28:10.745 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:28:10.748 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:28:10.748 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:28:10.748 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:28:10.748 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:28:10.748 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:28:10.749 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:28:10.749 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:28:10.749 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:28:10.751 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:28:10.751 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:28:10.751 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:28:10.751 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:28:10.751 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:28:10.751 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:28:10.751 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:28:10.751 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:28:10.753 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:28:10.753 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:28:10.754 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:28:10.754 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:28:10.754 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:28:10.754 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:28:10.754 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:28:10.754 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:28:10.757 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:28:10.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:28:10.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:28:10.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:28:10.757 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:28:10.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:28:10.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:28:10.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:28:10.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:28:10.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:28:10.757 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:28:10.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:28:10.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:28:10.757 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:28:10.757 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:28:10.757 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:28:10.757 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:28:10.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:28:10.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:28:10.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:28:10.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:28:10.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:28:10.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:28:10.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:28:10.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:28:10.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:28:10.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:28:10.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:28:10.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:28:10.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:28:10.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:28:10.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:28:10.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:28:10.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:28:10.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:28:10.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:28:10.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:28:10.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:28:10.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:28:10.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:28:10.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:28:10.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:28:10.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:28:10.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:28:10.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:28:10.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:28:10.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:28:10.762 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:28:11.227 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:28:11.275 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:28:11.276 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:28:11.276 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:28:11.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:28:11.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:11.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:11.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:28:11.287 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:11.287 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:11.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:28:11.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:28:11.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:11.322 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:28:11.322 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:28:11.322 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:28:11.322 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:28:11.362 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:28:11.362 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:28:11.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:11.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:11.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:11.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:28:11.688 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:11.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:11.691 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:28:11.701 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:11.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:11.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:28:11.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:28:11.726 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:11.726 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:11.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:28:11.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:11.733 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:28:11.733 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:28:11.733 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:28:11.733 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:28:11.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:28:11.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:28:11.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:28:11.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:28:11.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:28:11.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:28:11.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:11.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:12.156 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:28:12.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:12.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:28:12.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:12.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:12.257 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:12.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:12.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:28:12.267 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:12.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:12.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:28:12.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:28:12.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:12.271 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:28:12.271 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:28:12.271 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:28:12.271 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:28:12.290 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:28:12.290 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:28:12.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:12.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:12.623 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:28:12.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:28:12.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:28:12.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:28:12.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:28:13.092 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:28:13.556 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:28:13.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:28:13.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:28:13.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:28:13.762 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:28:14.020 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:28:14.486 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:28:14.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:28:14.763 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:28:14.764 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:28:14.764 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:28:14.952 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:28:15.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:15.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:28:15.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:15.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:15.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:15.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:15.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:28:15.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:15.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:15.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:28:15.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:28:15.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:15.354 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:28:15.354 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:28:15.354 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:28:15.354 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:28:15.364 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:28:15.364 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:28:15.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:15.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:15.415 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:28:15.764 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:28:15.765 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:28:15.765 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:28:15.765 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:28:15.881 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:28:16.345 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:28:16.818 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:28:17.290 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:28:17.753 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:28:18.218 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:28:18.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:18.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:28:18.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:18.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:18.300 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:28:18.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:28:18.300 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:28:18.300 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:28:18.301 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:28:18.301 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:28:18.301 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:28:18.301 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:28:18.301 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:28:18.301 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:28:18.301 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:28:23.314 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:28:23.314 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:28:23.314 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:28:23.314 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:28:23.314 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:28:23.314 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:28:23.325 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:28:23.326 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:28:23.326 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:28:23.326 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:28:23.326 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:28:23.328 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:28:23.329 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:28:23.329 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:28:23.329 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:28:23.329 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:28:23.329 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:28:23.329 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:28:23.329 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:28:23.332 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:28:23.332 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:28:23.332 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:28:23.332 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:28:23.332 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:28:23.332 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:28:23.332 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:28:23.332 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:28:23.334 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:28:23.334 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:28:23.334 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:28:23.334 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:28:23.334 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:28:23.334 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:28:23.334 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:28:23.334 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:28:23.337 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:28:23.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:28:23.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:28:23.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:28:23.337 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:28:23.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:28:23.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:28:23.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:28:23.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:28:23.337 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:28:23.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:28:23.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:28:23.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:28:23.337 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:28:23.337 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:28:23.337 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:28:23.337 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:28:23.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:28:23.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:28:23.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:28:23.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:28:23.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:28:23.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:28:23.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:28:23.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:28:23.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:28:23.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:28:23.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:28:23.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:28:23.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:28:23.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:28:23.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:28:23.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:28:23.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:28:23.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:28:23.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:28:23.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:28:23.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:28:23.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:28:23.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:28:23.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:28:23.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:28:23.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:28:23.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:28:23.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:28:23.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:28:23.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:28:23.342 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:28:23.812 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:28:23.852 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:28:23.852 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:28:23.853 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:28:23.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:28:23.858 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:23.858 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:23.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:28:23.864 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:23.864 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:23.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:28:23.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:28:23.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:23.905 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:28:23.905 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:28:23.905 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:28:23.905 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:28:23.949 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:28:23.950 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:28:23.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:23.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:24.278 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:28:24.340 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:28:24.340 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:28:24.340 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:28:24.340 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:28:24.743 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:28:25.208 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:28:25.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:25.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:28:25.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:25.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:25.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:25.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:25.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:28:25.239 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:25.239 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:25.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:28:25.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:28:25.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:25.241 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:28:25.241 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:28:25.241 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:28:25.241 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:28:25.248 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:28:25.249 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:28:25.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:25.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:25.340 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:28:25.340 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:28:25.340 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:28:25.340 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:28:25.673 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:28:26.145 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:28:26.341 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:28:26.341 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:28:26.341 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:28:26.341 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:28:26.618 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:28:27.080 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:28:27.342 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:28:27.342 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:28:27.342 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:28:27.342 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:28:27.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:27.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:28:27.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:27.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:27.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:27.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:27.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:28:27.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:27.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:27.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:28:27.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:28:27.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:27.373 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:28:27.373 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:28:27.373 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:28:27.373 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:28:27.404 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:28:27.404 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:28:27.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:27.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:27.545 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:28:28.009 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:28:28.342 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:28:28.342 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:28:28.342 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:28:28.342 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:28:28.477 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:28:28.943 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:28:29.406 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:28:29.870 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:28:30.335 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:28:30.804 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:28:31.274 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:28:31.741 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:28:32.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:32.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:28:32.207 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:32.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:32.213 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:28:32.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:32.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:32.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:28:32.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:32.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:32.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:28:32.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:28:32.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:32.229 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:28:32.229 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:28:32.229 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:28:32.229 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:28:32.255 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:28:32.255 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:28:32.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:32.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:32.682 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:28:33.150 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:28:33.615 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:28:34.079 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:28:34.549 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:28:35.023 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:28:35.489 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:28:35.954 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:28:36.422 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:28:36.890 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:28:37.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:37.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:28:37.038 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:37.038 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:37.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:28:37.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:28:37.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:28:37.041 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:28:37.042 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:28:37.042 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:28:37.042 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:28:37.042 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:28:37.042 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:28:37.042 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:28:37.042 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:28:42.046 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:28:42.046 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:28:42.046 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:28:42.046 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:28:42.046 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:28:42.046 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:28:42.050 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:28:42.051 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:28:42.051 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:28:42.051 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:28:42.051 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:28:42.052 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:28:42.052 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:28:42.052 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:28:42.052 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:28:42.052 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:28:42.052 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:28:42.052 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:28:42.052 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:28:42.053 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:28:42.054 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:28:42.054 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:28:42.054 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:28:42.054 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:28:42.054 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:28:42.054 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:28:42.054 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:28:42.055 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:28:42.055 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:28:42.055 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:28:42.055 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:28:42.055 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:28:42.055 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:28:42.055 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:28:42.055 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:28:42.058 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:28:42.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:28:42.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:28:42.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:28:42.058 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:28:42.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:28:42.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:28:42.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:28:42.058 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:28:42.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:28:42.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:28:42.058 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:28:42.058 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:28:42.058 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:28:42.058 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:28:42.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:28:42.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:28:42.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:28:42.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:28:42.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:28:42.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:28:42.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:28:42.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:28:42.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:28:42.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:28:42.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:28:42.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:28:42.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:28:42.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:28:42.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:28:42.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:28:42.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:28:42.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:28:42.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:28:42.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:28:42.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:28:42.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:28:42.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:28:42.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:28:42.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:28:42.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:28:42.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:28:42.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:28:42.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:28:42.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:28:42.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:28:42.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:28:42.063 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:28:42.528 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:28:42.583 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:28:42.585 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:28:42.586 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:28:42.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:28:42.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:42.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:42.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:28:42.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:42.619 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:42.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:28:42.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:28:42.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:42.624 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:28:42.624 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:28:42.624 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:28:42.624 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:28:42.666 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:28:42.666 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:28:42.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:42.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:43.000 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:28:43.062 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:28:43.062 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:28:43.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:28:43.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:28:43.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:43.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:28:43.289 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:43.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:43.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:43.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:43.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:28:43.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:43.313 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:43.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:28:43.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:28:43.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:43.314 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:28:43.314 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:28:43.314 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:28:43.314 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:28:43.323 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:28:43.323 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:28:43.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:43.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:43.470 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:28:43.934 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:28:44.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:28:44.063 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:28:44.063 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:28:44.063 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:28:44.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:44.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:28:44.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:44.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:44.239 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:44.239 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:44.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:28:44.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:44.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:44.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:28:44.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:28:44.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:44.246 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:28:44.246 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:28:44.246 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:28:44.246 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:28:44.255 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:28:44.255 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:28:44.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:44.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:44.399 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:28:44.861 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:28:45.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:28:45.064 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:28:45.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:28:45.064 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:28:45.324 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:28:45.790 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:28:46.065 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:28:46.065 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:28:46.065 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:28:46.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:28:46.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:46.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:28:46.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:46.176 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:46.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:46.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:46.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:28:46.188 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:46.188 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:46.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:28:46.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:28:46.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:46.189 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:28:46.189 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:28:46.189 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:28:46.189 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:28:46.202 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:28:46.202 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:28:46.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:46.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:46.252 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:28:46.717 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:28:47.066 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:28:47.066 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:28:47.066 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:28:47.066 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:28:47.186 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:28:47.654 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:28:48.122 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:28:48.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:48.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:28:48.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:48.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:48.221 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:28:48.221 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:28:48.222 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:28:48.222 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:28:48.223 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:28:48.224 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:28:48.224 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:28:48.224 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:28:48.224 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:28:48.224 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:28:48.224 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:28:48.224 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1349 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:28:48.224 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1350 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:28:48.224 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1350 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:28:48.224 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1350 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:28:48.224 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1350 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:28:48.224 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1350 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:28:48.224 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1350 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:28:48.224 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1350 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:28:48.224 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1350 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:28:53.224 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:28:53.225 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:28:53.225 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:28:53.225 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:28:53.225 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:28:53.225 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:28:53.228 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:28:53.229 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:28:53.229 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:28:53.229 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:28:53.229 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:28:53.230 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:28:53.230 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:28:53.230 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:28:53.230 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:28:53.230 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:28:53.231 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:28:53.231 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:28:53.231 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:28:53.232 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:28:53.232 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:28:53.232 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:28:53.232 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:28:53.232 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:28:53.232 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:28:53.232 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:28:53.232 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:28:53.234 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:28:53.234 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:28:53.234 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:28:53.234 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:28:53.234 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:28:53.234 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:28:53.234 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:28:53.234 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:28:53.237 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:28:53.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:28:53.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:28:53.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:28:53.237 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:28:53.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:28:53.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:28:53.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:28:53.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:28:53.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:28:53.237 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:28:53.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:28:53.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:28:53.237 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:28:53.237 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:28:53.237 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:28:53.237 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:28:53.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:28:53.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:28:53.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:28:53.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:28:53.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:28:53.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:28:53.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:28:53.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:28:53.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:28:53.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:28:53.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:28:53.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:28:53.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:28:53.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:28:53.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:28:53.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:28:53.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:28:53.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:28:53.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:28:53.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:28:53.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:28:53.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:28:53.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:28:53.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:28:53.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:28:53.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:28:53.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:28:53.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:28:53.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:28:53.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:28:53.242 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:28:53.706 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:28:53.750 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:28:53.750 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:28:53.751 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:28:53.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:28:53.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:53.756 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:53.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:28:53.761 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:53.761 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:53.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:28:53.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:28:53.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:53.793 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:28:53.793 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:28:53.793 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:28:53.793 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:28:53.794 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:28:53.794 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:28:53.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:53.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:54.173 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:28:54.241 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:28:54.241 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:28:54.241 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:28:54.241 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:28:54.639 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:28:55.106 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:28:55.242 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:28:55.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:28:55.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:28:55.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:28:55.570 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:28:56.034 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:28:56.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:56.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:28:56.234 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:56.234 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:56.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:28:56.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:28:56.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:28:56.243 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:28:56.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:56.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:56.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:28:56.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:56.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:56.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:28:56.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:28:56.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:56.251 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:28:56.251 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:28:56.251 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:28:56.251 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:28:56.264 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:28:56.264 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:28:56.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:56.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:56.499 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:28:56.966 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:28:57.244 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:28:57.245 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:28:57.245 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:28:57.245 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:28:57.436 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:28:57.906 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:28:58.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:28:58.246 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:28:58.246 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:28:58.246 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:28:58.377 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:28:58.847 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:28:58.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:58.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:28:58.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:58.946 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:58.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:58.959 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:58.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:28:58.966 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:28:58.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:28:58.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:28:58.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:28:58.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:58.967 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:28:58.967 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:28:58.968 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:28:58.968 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:28:58.982 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:28:58.982 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:28:58.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:58.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:28:59.315 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:28:59.784 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:29:00.253 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:29:00.721 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:29:01.190 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:29:01.658 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:29:02.122 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:29:02.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:29:02.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:29:02.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:29:02.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:29:02.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:29:02.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:29:02.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:29:02.287 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:29:02.287 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:29:02.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:29:02.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:29:02.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:29:02.289 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:29:02.290 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:29:02.290 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:29:02.290 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:29:02.300 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:29:02.300 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:29:02.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:29:02.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:29:02.586 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:29:03.051 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:29:03.516 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:29:03.980 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:29:04.445 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:29:04.909 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:29:05.373 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:29:05.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:29:05.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:29:05.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:29:05.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:29:05.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:29:05.705 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:29:05.705 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:29:05.705 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:29:05.706 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:29:05.706 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:29:05.706 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:29:05.706 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:29:05.706 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:29:05.706 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:29:05.706 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:29:05.706 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2726 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:29:05.706 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2726 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:29:05.706 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2726 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:29:05.706 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2726 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:29:05.706 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2726 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:29:05.706 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2726 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:29:05.706 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2726 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:29:05.706 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2726 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:29:10.708 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:29:10.708 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:29:10.708 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:29:10.708 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:29:10.708 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:29:10.708 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:29:10.712 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:29:10.712 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:29:10.712 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:29:10.713 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:29:10.713 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:29:10.714 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:29:10.714 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:29:10.714 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:29:10.714 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:29:10.714 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:29:10.714 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:29:10.714 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:29:10.714 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:29:10.715 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:29:10.715 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:29:10.716 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:29:10.716 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:29:10.716 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:29:10.716 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:29:10.716 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:29:10.716 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:29:10.717 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:29:10.717 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:29:10.717 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:29:10.717 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:29:10.717 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:29:10.717 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:29:10.717 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:29:10.717 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:29:10.720 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:29:10.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:29:10.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:29:10.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:29:10.720 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:29:10.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:29:10.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:29:10.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:29:10.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:29:10.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:29:10.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:29:10.720 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:29:10.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:29:10.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:29:10.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:29:10.720 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:29:10.720 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:29:10.720 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:29:10.720 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:29:10.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:29:10.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:29:10.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:29:10.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:29:10.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:29:10.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:29:10.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:29:10.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:29:10.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:29:10.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:29:10.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:29:10.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:29:10.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:29:10.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:29:10.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:29:10.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:29:10.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:29:10.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:29:10.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:29:10.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:29:10.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:29:10.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:29:10.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:29:10.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:29:10.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:29:10.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:29:10.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:29:10.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:29:10.725 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:29:11.188 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:29:11.237 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:29:11.238 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:29:11.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:29:11.239 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:29:11.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:29:11.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:29:11.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:29:11.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:29:11.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:29:11.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:29:11.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:29:11.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:29:11.282 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:29:11.282 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:29:11.282 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:29:11.282 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:29:11.323 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:29:11.323 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:29:11.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:29:11.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:29:11.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:29:11.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:29:11.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:29:11.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:29:11.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:29:11.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:29:11.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:29:11.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:29:11.543 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:29:11.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:29:11.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:29:11.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:29:11.544 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:29:11.544 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:29:11.544 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:29:11.544 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:29:11.559 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:29:11.559 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:29:11.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:29:11.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:29:11.651 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:29:11.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:29:11.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:29:11.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:29:11.724 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:29:11.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:29:11.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:29:11.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:29:11.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:29:11.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:29:11.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:29:11.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:29:11.904 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:29:11.904 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:29:11.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:29:11.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:29:11.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:29:11.906 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:29:11.906 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:29:11.906 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:29:11.906 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:29:11.928 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:29:11.929 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:29:11.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:29:11.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:29:12.121 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:29:12.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:29:12.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:29:12.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:29:12.516 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:29:12.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:29:12.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:29:12.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:29:12.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:29:12.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:29:12.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:29:12.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:29:12.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:29:12.539 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:29:12.539 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:29:12.539 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:29:12.539 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:29:12.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:29:12.588 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:29:12.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:29:12.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:29:12.592 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:29:12.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:29:12.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:29:12.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:29:12.724 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:29:13.055 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:29:13.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:29:13.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:29:13.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:29:13.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:29:13.138 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:29:13.138 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:29:13.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:29:13.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:29:13.140 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:29:13.140 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:29:13.140 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:29:13.140 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:29:13.141 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:29:13.141 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:29:13.141 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:29:18.156 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:29:18.157 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:29:18.157 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:29:18.157 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:29:18.157 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:29:18.157 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:29:18.170 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:29:18.172 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:29:18.172 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:29:18.172 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:29:18.172 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:29:18.177 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:29:18.177 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:29:18.178 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:29:18.178 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:29:18.178 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:29:18.178 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:29:18.178 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:29:18.178 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:29:18.181 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:29:18.182 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:29:18.182 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:29:18.182 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:29:18.182 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:29:18.182 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:29:18.182 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:29:18.182 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:29:18.185 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:29:18.185 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:29:18.185 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:29:18.185 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:29:18.185 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:29:18.186 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:29:18.186 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:29:18.186 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:29:18.189 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:29:18.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:29:18.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:29:18.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:29:18.189 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:29:18.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:29:18.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:29:18.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:29:18.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:29:18.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:29:18.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:29:18.190 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:29:18.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:29:18.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:29:18.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:29:18.190 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:29:18.190 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:29:18.190 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:29:18.190 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:29:18.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:29:18.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:29:18.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:29:18.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:29:18.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:29:18.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:29:18.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:29:18.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:29:18.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:29:18.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:29:18.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:29:18.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:29:18.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:29:18.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:29:18.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:29:18.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:29:18.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:29:18.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:29:18.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:29:18.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:29:18.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:29:18.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:29:18.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:29:18.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:29:18.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:29:18.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:29:18.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:29:18.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:29:18.195 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:29:18.662 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:29:18.708 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:29:18.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:29:18.709 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:29:18.711 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:29:18.720 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:29:18.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:29:18.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:29:18.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:29:18.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:29:18.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:29:18.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:29:18.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:29:18.756 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:29:18.756 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:29:18.756 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:29:18.756 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:29:18.798 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:29:18.799 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:29:18.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:29:18.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:29:19.127 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:29:19.193 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:29:19.193 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:29:19.193 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:29:19.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:29:19.594 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:29:20.061 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:29:20.194 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:29:20.194 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:29:20.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:29:20.194 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:29:20.534 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:29:21.005 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:29:21.194 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:29:21.194 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:29:21.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:29:21.194 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:29:21.472 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:29:21.939 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:29:22.195 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:29:22.195 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:29:22.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:29:22.195 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:29:22.404 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:29:22.872 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:29:23.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:29:23.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:29:23.196 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:29:23.196 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:29:23.338 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:29:23.805 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:29:24.270 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:29:24.736 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:29:25.202 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:29:25.669 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:29:26.138 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:29:26.609 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:29:27.080 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:29:27.550 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:29:28.016 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:29:28.482 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:29:28.947 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:29:29.415 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:29:29.886 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:29:30.355 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:29:30.822 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:29:31.286 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:29:31.751 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:29:32.215 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:29:32.681 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:29:33.148 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:29:33.615 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 04:29:34.083 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 04:29:34.552 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 04:29:35.022 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 04:29:35.494 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 04:29:35.962 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 04:29:36.427 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 04:29:36.892 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 04:29:37.363 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 04:29:37.830 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 04:29:38.297 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 04:29:38.760 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 04:29:39.224 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 04:29:39.686 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 04:29:40.149 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 04:29:40.613 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 04:29:41.076 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 04:29:41.539 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 04:29:42.001 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 04:29:42.468 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 04:29:42.935 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 04:29:43.404 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 04:29:43.871 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 04:29:44.342 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 04:29:44.813 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 04:29:45.283 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 04:29:45.752 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 04:29:46.223 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 04:29:46.691 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 04:29:47.157 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-08 04:29:47.625 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-08 04:29:48.094 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-08 04:29:48.561 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-08 04:29:49.032 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-08 04:29:49.500 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-08 04:29:49.966 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-08 04:29:50.435 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-08 04:29:50.905 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-08 04:29:51.375 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-08 04:29:51.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:29:51.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:29:51.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:29:51.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:29:51.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:29:51.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:29:51.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:29:51.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:29:51.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:29:51.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:29:51.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:29:51.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:29:51.829 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:29:51.829 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:29:51.829 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:29:51.830 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:29:51.842 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:29:51.842 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:29:51.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:29:51.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:29:51.843 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-08 04:29:52.307 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-08 04:29:52.775 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-08 04:29:53.244 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-08 04:29:53.712 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-08 04:29:54.178 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-08 04:29:54.641 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-08 04:29:55.106 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-08 04:29:55.568 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-08 04:29:56.031 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-08 04:29:56.496 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-08 04:29:56.959 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-08 04:29:57.423 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-08 04:29:57.888 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-08 04:29:58.353 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-08 04:29:58.820 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-08 04:29:59.286 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-08 04:29:59.756 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-08 04:30:00.228 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-08 04:30:00.697 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-08 04:30:01.169 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-02-08 04:30:01.639 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-02-08 04:30:02.109 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-02-08 04:30:02.575 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-02-08 04:30:03.038 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-02-08 04:30:03.504 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-02-08 04:30:03.970 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-02-08 04:30:04.436 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-02-08 04:30:04.903 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-02-08 04:30:05.369 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-02-08 04:30:05.833 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-02-08 04:30:06.295 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-02-08 04:30:06.759 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-02-08 04:30:07.232 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-02-08 04:30:07.705 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-02-08 04:30:08.176 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-02-08 04:30:08.643 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-02-08 04:30:09.108 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-02-08 04:30:09.577 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-02-08 04:30:10.050 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-02-08 04:30:10.523 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-02-08 04:30:10.994 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-02-08 04:30:11.464 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-02-08 04:30:11.935 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-02-08 04:30:12.406 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-02-08 04:30:12.879 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-02-08 04:30:13.352 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-02-08 04:30:13.825 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-02-08 04:30:14.297 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-02-08 04:30:14.770 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-02-08 04:30:15.243 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-02-08 04:30:15.714 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-02-08 04:30:16.187 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-02-08 04:30:16.660 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-02-08 04:30:17.132 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-02-08 04:30:17.603 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-02-08 04:30:18.076 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-02-08 04:30:18.549 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-02-08 04:30:19.019 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-02-08 04:30:19.486 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-02-08 04:30:19.954 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-02-08 04:30:20.420 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-02-08 04:30:20.893 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-02-08 04:30:21.365 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-02-08 04:30:21.831 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-02-08 04:30:22.298 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-02-08 04:30:22.763 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-02-08 04:30:23.227 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-02-08 04:30:23.692 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-02-08 04:30:24.155 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-02-08 04:30:24.620 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-02-08 04:30:25.085 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-02-08 04:30:25.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:30:25.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:30:25.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:30:25.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:30:25.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:30:25.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:30:25.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:30:25.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:30:25.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:30:25.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:30:25.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:30:25.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:30:25.362 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:30:25.362 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:30:25.362 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:30:25.362 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:30:25.409 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:30:25.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:30:25.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:30:25.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:30:25.549 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-02-08 04:30:26.016 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-02-08 04:30:26.482 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-02-08 04:30:26.950 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-02-08 04:30:27.417 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-02-08 04:30:27.884 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-02-08 04:30:28.349 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-02-08 04:30:28.816 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-02-08 04:30:29.282 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-02-08 04:30:29.753 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-02-08 04:30:30.223 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-02-08 04:30:30.694 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-02-08 04:30:31.165 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-02-08 04:30:31.636 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-02-08 04:30:32.105 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-02-08 04:30:32.573 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-02-08 04:30:33.043 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-02-08 04:30:33.511 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-02-08 04:30:33.979 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-02-08 04:30:34.444 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-02-08 04:30:34.909 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-02-08 04:30:35.376 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-02-08 04:30:35.841 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-02-08 04:30:36.306 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-02-08 04:30:36.770 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-02-08 04:30:37.234 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-02-08 04:30:37.700 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-02-08 04:30:38.171 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-02-08 04:30:38.636 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-02-08 04:30:39.100 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-02-08 04:30:39.565 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-02-08 04:30:40.029 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-02-08 04:30:40.495 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-02-08 04:30:40.959 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-02-08 04:30:41.424 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-02-08 04:30:41.890 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-02-08 04:30:42.353 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-02-08 04:30:42.818 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-02-08 04:30:43.284 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-02-08 04:30:43.750 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-02-08 04:30:44.218 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-02-08 04:30:44.688 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-02-08 04:30:45.159 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-02-08 04:30:45.627 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-02-08 04:30:46.093 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-02-08 04:30:46.557 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-02-08 04:30:47.024 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-02-08 04:30:47.490 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-02-08 04:30:47.952 [DEBUG] clck_gen.py:113 IND CLOCK 19584
2026-02-08 04:30:48.417 [DEBUG] clck_gen.py:113 IND CLOCK 19686
2026-02-08 04:30:48.881 [DEBUG] clck_gen.py:113 IND CLOCK 19788
2026-02-08 04:30:49.349 [DEBUG] clck_gen.py:113 IND CLOCK 19890
2026-02-08 04:30:49.819 [DEBUG] clck_gen.py:113 IND CLOCK 19992
2026-02-08 04:30:50.284 [DEBUG] clck_gen.py:113 IND CLOCK 20094
2026-02-08 04:30:50.751 [DEBUG] clck_gen.py:113 IND CLOCK 20196
2026-02-08 04:30:51.219 [DEBUG] clck_gen.py:113 IND CLOCK 20298
2026-02-08 04:30:51.688 [DEBUG] clck_gen.py:113 IND CLOCK 20400
2026-02-08 04:30:52.158 [DEBUG] clck_gen.py:113 IND CLOCK 20502
2026-02-08 04:30:52.627 [DEBUG] clck_gen.py:113 IND CLOCK 20604
2026-02-08 04:30:53.092 [DEBUG] clck_gen.py:113 IND CLOCK 20706
2026-02-08 04:30:53.556 [DEBUG] clck_gen.py:113 IND CLOCK 20808
2026-02-08 04:30:54.022 [DEBUG] clck_gen.py:113 IND CLOCK 20910
2026-02-08 04:30:54.487 [DEBUG] clck_gen.py:113 IND CLOCK 21012
2026-02-08 04:30:54.952 [DEBUG] clck_gen.py:113 IND CLOCK 21114
2026-02-08 04:30:55.424 [DEBUG] clck_gen.py:113 IND CLOCK 21216
2026-02-08 04:30:55.895 [DEBUG] clck_gen.py:113 IND CLOCK 21318
2026-02-08 04:30:56.362 [DEBUG] clck_gen.py:113 IND CLOCK 21420
2026-02-08 04:30:56.827 [DEBUG] clck_gen.py:113 IND CLOCK 21522
2026-02-08 04:30:57.292 [DEBUG] clck_gen.py:113 IND CLOCK 21624
2026-02-08 04:30:57.756 [DEBUG] clck_gen.py:113 IND CLOCK 21726
2026-02-08 04:30:58.226 [DEBUG] clck_gen.py:113 IND CLOCK 21828
2026-02-08 04:30:58.690 [DEBUG] clck_gen.py:113 IND CLOCK 21930
2026-02-08 04:30:59.156 [DEBUG] clck_gen.py:113 IND CLOCK 22032
2026-02-08 04:30:59.621 [DEBUG] clck_gen.py:113 IND CLOCK 22134
2026-02-08 04:31:00.085 [DEBUG] clck_gen.py:113 IND CLOCK 22236
2026-02-08 04:31:00.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:31:00.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:31:00.388 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:31:00.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:31:00.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:31:00.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:31:00.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:31:00.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:31:00.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:31:00.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:31:00.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:31:00.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:31:00.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:31:00.408 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:31:00.408 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:31:00.408 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:31:00.455 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:31:00.455 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:31:00.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:31:00.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:31:00.552 [DEBUG] clck_gen.py:113 IND CLOCK 22338
2026-02-08 04:31:01.019 [DEBUG] clck_gen.py:113 IND CLOCK 22440
2026-02-08 04:31:01.484 [DEBUG] clck_gen.py:113 IND CLOCK 22542
2026-02-08 04:31:01.954 [DEBUG] clck_gen.py:113 IND CLOCK 22644
2026-02-08 04:31:02.425 [DEBUG] clck_gen.py:113 IND CLOCK 22746
2026-02-08 04:31:02.894 [DEBUG] clck_gen.py:113 IND CLOCK 22848
2026-02-08 04:31:03.358 [DEBUG] clck_gen.py:113 IND CLOCK 22950
2026-02-08 04:31:03.823 [DEBUG] clck_gen.py:113 IND CLOCK 23052
2026-02-08 04:31:04.287 [DEBUG] clck_gen.py:113 IND CLOCK 23154
2026-02-08 04:31:04.754 [DEBUG] clck_gen.py:113 IND CLOCK 23256
2026-02-08 04:31:05.220 [DEBUG] clck_gen.py:113 IND CLOCK 23358
2026-02-08 04:31:05.688 [DEBUG] clck_gen.py:113 IND CLOCK 23460
2026-02-08 04:31:06.159 [DEBUG] clck_gen.py:113 IND CLOCK 23562
2026-02-08 04:31:06.626 [DEBUG] clck_gen.py:113 IND CLOCK 23664
2026-02-08 04:31:07.091 [DEBUG] clck_gen.py:113 IND CLOCK 23766
2026-02-08 04:31:07.557 [DEBUG] clck_gen.py:113 IND CLOCK 23868
2026-02-08 04:31:08.026 [DEBUG] clck_gen.py:113 IND CLOCK 23970
2026-02-08 04:31:08.491 [DEBUG] clck_gen.py:113 IND CLOCK 24072
2026-02-08 04:31:08.956 [DEBUG] clck_gen.py:113 IND CLOCK 24174
2026-02-08 04:31:09.422 [DEBUG] clck_gen.py:113 IND CLOCK 24276
2026-02-08 04:31:09.889 [DEBUG] clck_gen.py:113 IND CLOCK 24378
2026-02-08 04:31:10.356 [DEBUG] clck_gen.py:113 IND CLOCK 24480
2026-02-08 04:31:10.821 [DEBUG] clck_gen.py:113 IND CLOCK 24582
2026-02-08 04:31:11.291 [DEBUG] clck_gen.py:113 IND CLOCK 24684
2026-02-08 04:31:11.762 [DEBUG] clck_gen.py:113 IND CLOCK 24786
2026-02-08 04:31:12.232 [DEBUG] clck_gen.py:113 IND CLOCK 24888
2026-02-08 04:31:12.701 [DEBUG] clck_gen.py:113 IND CLOCK 24990
2026-02-08 04:31:13.166 [DEBUG] clck_gen.py:113 IND CLOCK 25092
2026-02-08 04:31:13.630 [DEBUG] clck_gen.py:113 IND CLOCK 25194
2026-02-08 04:31:14.095 [DEBUG] clck_gen.py:113 IND CLOCK 25296
2026-02-08 04:31:14.558 [DEBUG] clck_gen.py:113 IND CLOCK 25398
2026-02-08 04:31:15.028 [DEBUG] clck_gen.py:113 IND CLOCK 25500
2026-02-08 04:31:15.491 [DEBUG] clck_gen.py:113 IND CLOCK 25602
2026-02-08 04:31:15.956 [DEBUG] clck_gen.py:113 IND CLOCK 25704
2026-02-08 04:31:16.419 [DEBUG] clck_gen.py:113 IND CLOCK 25806
2026-02-08 04:31:16.885 [DEBUG] clck_gen.py:113 IND CLOCK 25908
2026-02-08 04:31:17.356 [DEBUG] clck_gen.py:113 IND CLOCK 26010
2026-02-08 04:31:17.827 [DEBUG] clck_gen.py:113 IND CLOCK 26112
2026-02-08 04:31:18.290 [DEBUG] clck_gen.py:113 IND CLOCK 26214
2026-02-08 04:31:18.756 [DEBUG] clck_gen.py:113 IND CLOCK 26316
2026-02-08 04:31:19.222 [DEBUG] clck_gen.py:113 IND CLOCK 26418
2026-02-08 04:31:19.691 [DEBUG] clck_gen.py:113 IND CLOCK 26520
2026-02-08 04:31:20.157 [DEBUG] clck_gen.py:113 IND CLOCK 26622
2026-02-08 04:31:20.621 [DEBUG] clck_gen.py:113 IND CLOCK 26724
2026-02-08 04:31:21.083 [DEBUG] clck_gen.py:113 IND CLOCK 26826
2026-02-08 04:31:21.548 [DEBUG] clck_gen.py:113 IND CLOCK 26928
2026-02-08 04:31:22.016 [DEBUG] clck_gen.py:113 IND CLOCK 27030
2026-02-08 04:31:22.480 [DEBUG] clck_gen.py:113 IND CLOCK 27132
2026-02-08 04:31:22.945 [DEBUG] clck_gen.py:113 IND CLOCK 27234
2026-02-08 04:31:23.416 [DEBUG] clck_gen.py:113 IND CLOCK 27336
2026-02-08 04:31:23.887 [DEBUG] clck_gen.py:113 IND CLOCK 27438
2026-02-08 04:31:24.353 [DEBUG] clck_gen.py:113 IND CLOCK 27540
2026-02-08 04:31:24.817 [DEBUG] clck_gen.py:113 IND CLOCK 27642
2026-02-08 04:31:25.282 [DEBUG] clck_gen.py:113 IND CLOCK 27744
2026-02-08 04:31:25.746 [DEBUG] clck_gen.py:113 IND CLOCK 27846
2026-02-08 04:31:26.211 [DEBUG] clck_gen.py:113 IND CLOCK 27948
2026-02-08 04:31:26.675 [DEBUG] clck_gen.py:113 IND CLOCK 28050
2026-02-08 04:31:27.138 [DEBUG] clck_gen.py:113 IND CLOCK 28152
2026-02-08 04:31:27.605 [DEBUG] clck_gen.py:113 IND CLOCK 28254
2026-02-08 04:31:28.072 [DEBUG] clck_gen.py:113 IND CLOCK 28356
2026-02-08 04:31:28.539 [DEBUG] clck_gen.py:113 IND CLOCK 28458
2026-02-08 04:31:29.011 [DEBUG] clck_gen.py:113 IND CLOCK 28560
2026-02-08 04:31:29.478 [DEBUG] clck_gen.py:113 IND CLOCK 28662
2026-02-08 04:31:29.942 [DEBUG] clck_gen.py:113 IND CLOCK 28764
2026-02-08 04:31:30.404 [DEBUG] clck_gen.py:113 IND CLOCK 28866
2026-02-08 04:31:30.872 [DEBUG] clck_gen.py:113 IND CLOCK 28968
2026-02-08 04:31:31.342 [DEBUG] clck_gen.py:113 IND CLOCK 29070
2026-02-08 04:31:31.806 [DEBUG] clck_gen.py:113 IND CLOCK 29172
2026-02-08 04:31:32.269 [DEBUG] clck_gen.py:113 IND CLOCK 29274
2026-02-08 04:31:32.733 [DEBUG] clck_gen.py:113 IND CLOCK 29376
2026-02-08 04:31:33.199 [DEBUG] clck_gen.py:113 IND CLOCK 29478
2026-02-08 04:31:33.664 [DEBUG] clck_gen.py:113 IND CLOCK 29580
2026-02-08 04:31:34.132 [DEBUG] clck_gen.py:113 IND CLOCK 29682
2026-02-08 04:31:34.598 [DEBUG] clck_gen.py:113 IND CLOCK 29784
2026-02-08 04:31:35.070 [DEBUG] clck_gen.py:113 IND CLOCK 29886
2026-02-08 04:31:35.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:31:35.540 [DEBUG] clck_gen.py:113 IND CLOCK 29988
2026-02-08 04:31:35.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:31:35.551 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:31:35.551 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:31:35.561 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:31:35.561 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:31:35.561 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:31:35.561 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:31:35.563 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:31:35.563 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:31:35.563 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:31:35.563 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:31:35.563 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:31:35.563 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:31:35.563 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:31:35.563 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=29995 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:31:35.563 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=29995 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:31:35.564 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=29995 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:31:35.564 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=29995 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:31:35.564 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=29995 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:31:35.564 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=29995 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:31:40.564 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:31:40.564 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:31:40.564 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:31:40.564 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:31:40.564 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:31:40.564 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:31:40.574 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:31:40.574 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:31:40.575 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:31:40.575 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:31:40.575 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:31:40.577 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:31:40.577 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:31:40.577 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:31:40.577 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:31:40.577 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:31:40.577 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:31:40.577 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:31:40.577 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:31:40.580 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:31:40.580 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:31:40.580 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:31:40.580 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:31:40.581 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:31:40.581 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:31:40.581 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:31:40.581 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:31:40.584 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:31:40.584 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:31:40.584 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:31:40.584 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:31:40.584 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:31:40.584 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:31:40.584 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:31:40.584 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:31:40.589 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:31:40.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:31:40.589 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:31:40.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:31:40.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:31:40.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:31:40.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:31:40.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:31:40.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:31:40.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:31:40.589 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:31:40.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:31:40.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:31:40.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:31:40.589 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:31:40.589 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:31:40.589 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:31:40.590 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:31:40.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:31:40.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:31:40.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:31:40.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:31:40.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:31:40.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:31:40.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:31:40.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:31:40.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:31:40.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:31:40.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:31:40.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:31:40.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:31:40.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:31:40.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:31:40.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:31:40.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:31:40.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:31:40.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:31:40.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:31:40.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:31:40.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:31:40.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:31:40.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:31:40.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:31:40.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:31:40.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:31:40.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:31:40.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:31:40.592 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:31:40.592 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:31:40.592 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:31:40.592 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:31:40.592 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:31:40.592 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:31:40.592 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:31:45.595 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:31:45.595 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:31:45.596 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:31:45.596 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:31:45.596 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:31:45.596 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:31:45.605 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:31:45.606 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:31:45.606 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:31:45.606 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:31:45.606 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:31:45.608 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:31:45.608 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:31:45.609 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:31:45.609 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:31:45.609 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:31:45.609 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:31:45.609 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:31:45.609 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:31:45.611 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:31:45.612 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:31:45.612 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:31:45.612 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:31:45.612 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:31:45.612 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:31:45.612 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:31:45.612 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:31:45.615 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:31:45.615 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:31:45.615 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:31:45.615 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:31:45.615 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:31:45.615 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:31:45.615 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:31:45.615 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:31:45.620 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:31:45.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:31:45.620 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:31:45.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:31:45.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:31:45.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:31:45.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:31:45.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:31:45.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:31:45.620 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:31:45.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:31:45.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:31:45.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:31:45.620 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:31:45.620 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:31:45.620 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:31:45.620 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:31:45.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:31:45.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:31:45.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:31:45.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:31:45.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:31:45.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:31:45.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:31:45.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:31:45.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:31:45.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:31:45.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:31:45.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:31:45.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:31:45.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:31:45.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:31:45.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:31:45.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:31:45.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:31:45.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:31:45.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:31:45.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:31:45.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:31:45.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:31:45.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:31:45.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:31:45.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:31:45.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:31:45.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:31:45.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:31:45.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:31:45.625 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:31:46.090 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:31:46.141 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:31:46.142 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:31:46.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:31:46.143 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:31:46.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:31:46.153 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:31:46.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:31:46.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:31:46.163 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:31:46.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:31:46.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:31:46.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:31:46.166 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:31:46.166 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:31:46.166 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:31:46.167 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:31:46.179 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:31:46.180 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:31:46.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:31:46.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:31:46.554 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:31:46.624 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:31:46.624 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:31:46.625 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:31:46.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:31:47.019 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:31:47.486 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:31:47.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:31:47.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:31:47.566 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:31:47.566 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:31:47.576 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:31:47.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:31:47.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:31:47.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:31:47.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:31:47.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:31:47.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:31:47.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:31:47.590 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:31:47.590 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:31:47.590 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:31:47.590 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:31:47.619 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:31:47.620 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:31:47.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:31:47.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:31:47.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:31:47.625 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:31:47.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:31:47.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:31:47.950 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:31:48.415 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:31:48.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:31:48.625 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:31:48.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:31:48.630 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:31:48.879 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:31:49.343 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:31:49.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:31:49.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:31:49.627 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:31:49.630 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:31:49.808 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:31:49.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:31:49.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:31:49.837 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:31:49.837 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:31:49.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:31:49.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:31:49.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:31:49.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:31:49.862 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:31:49.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:31:49.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:31:49.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:31:49.866 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:31:49.866 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:31:49.866 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:31:49.866 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:31:49.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:31:49.895 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:31:49.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:31:49.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:31:50.272 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:31:50.626 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:31:50.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:31:50.627 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:31:50.631 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:31:50.736 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:31:51.200 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:31:51.664 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:31:52.129 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:31:52.593 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:31:53.058 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:31:53.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:31:53.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:31:53.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:31:53.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:31:53.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:31:53.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:31:53.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:31:53.235 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:31:53.235 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:31:53.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:31:53.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:31:53.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:31:53.239 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:31:53.239 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:31:53.239 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:31:53.239 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:31:53.287 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:31:53.287 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:31:53.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:31:53.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:31:53.522 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:31:53.986 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:31:54.451 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:31:54.915 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:31:55.379 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:31:55.843 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:31:56.308 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:31:56.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:31:56.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:31:56.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:31:56.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:31:56.627 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:31:56.627 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:31:56.627 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:31:56.627 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:31:56.629 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:31:56.629 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:31:56.629 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:31:56.629 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:31:56.629 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:31:56.629 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:31:56.629 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:31:56.629 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2418 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:31:56.629 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2418 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:31:56.629 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2418 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:31:56.630 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2418 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:32:01.633 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:32:01.633 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:32:01.633 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:32:01.633 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:32:01.633 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:32:01.633 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:32:01.640 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:32:01.640 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:32:01.640 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:32:01.640 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:32:01.640 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:32:01.642 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:32:01.643 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:32:01.643 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:32:01.643 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:32:01.643 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:32:01.643 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:32:01.643 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:32:01.643 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:32:01.645 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:32:01.645 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:32:01.645 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:32:01.646 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:32:01.646 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:32:01.646 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:32:01.646 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:32:01.646 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:32:01.648 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:32:01.648 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:32:01.648 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:32:01.648 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:32:01.649 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:32:01.649 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:32:01.649 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:32:01.649 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:32:01.653 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:32:01.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:32:01.653 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:32:01.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:32:01.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:32:01.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:32:01.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:32:01.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:32:01.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:32:01.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:32:01.653 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:32:01.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:32:01.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:32:01.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:32:01.653 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:32:01.653 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:32:01.653 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:32:01.653 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:32:01.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:32:01.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:32:01.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:32:01.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:32:01.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:32:01.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:32:01.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:32:01.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:32:01.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:32:01.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:32:01.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:32:01.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:32:01.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:32:01.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:32:01.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:32:01.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:32:01.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:32:01.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:32:01.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:32:01.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:32:01.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:32:01.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:32:01.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:32:01.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:32:01.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:32:01.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:32:01.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:32:01.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:32:01.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:32:01.658 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:32:02.123 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:32:02.174 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:32:02.175 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:32:02.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:32:02.176 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:32:02.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:32:02.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:32:02.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:32:02.197 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:32:02.197 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:32:02.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:32:02.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:32:02.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:32:02.202 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:32:02.202 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:32:02.202 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:32:02.202 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:32:02.213 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:32:02.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:32:02.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:32:02.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:32:02.587 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:32:02.658 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:32:02.658 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:32:02.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:32:02.663 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:32:03.051 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:32:03.516 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:32:03.659 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:32:03.659 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:32:03.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:32:03.663 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:32:03.980 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:32:04.444 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:32:04.659 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:32:04.659 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:32:04.663 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:32:04.664 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:32:04.909 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:32:05.373 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:32:05.660 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:32:05.660 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:32:05.663 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:32:05.664 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:32:05.837 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:32:06.302 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:32:06.660 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:32:06.660 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:32:06.663 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:32:06.665 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:32:06.766 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:32:07.230 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:32:07.695 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:32:08.160 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:32:08.624 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:32:09.089 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:32:09.554 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:32:10.019 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:32:10.489 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:32:10.958 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:32:11.428 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:32:11.899 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:32:12.370 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:32:12.841 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:32:13.311 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:32:13.778 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:32:14.246 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:32:14.715 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:32:15.185 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:32:15.651 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:32:16.115 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:32:16.579 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:32:16.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:32:16.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:32:16.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:32:16.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:32:16.874 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:32:16.874 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:32:16.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:32:16.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:32:16.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:32:16.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:32:16.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:32:16.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:32:16.888 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:32:16.888 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:32:16.888 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:32:16.888 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:32:16.903 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:32:16.903 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:32:16.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:32:16.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:32:17.043 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 04:32:17.508 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 04:32:17.973 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 04:32:18.440 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 04:32:18.904 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 04:32:19.369 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 04:32:19.833 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 04:32:20.297 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 04:32:20.760 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 04:32:21.222 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 04:32:21.684 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 04:32:22.146 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 04:32:22.609 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 04:32:23.071 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 04:32:23.533 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 04:32:23.995 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 04:32:24.459 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 04:32:24.926 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 04:32:25.393 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 04:32:25.859 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 04:32:26.326 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 04:32:26.793 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 04:32:27.255 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 04:32:27.717 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 04:32:28.179 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 04:32:28.641 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 04:32:29.103 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 04:32:29.565 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 04:32:30.028 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 04:32:30.493 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-08 04:32:30.961 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-08 04:32:31.432 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-08 04:32:31.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:32:31.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:32:31.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:32:31.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:32:31.789 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:32:31.789 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:32:31.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:32:31.794 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:32:31.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:32:31.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:32:31.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:32:31.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:32:31.796 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:32:31.796 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:32:31.797 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:32:31.797 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:32:31.800 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:32:31.800 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:32:31.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:32:31.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:32:31.900 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-08 04:32:32.368 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-08 04:32:32.839 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-08 04:32:33.310 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-08 04:32:33.775 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-08 04:32:34.241 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-08 04:32:34.706 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-08 04:32:35.176 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-08 04:32:35.650 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-08 04:32:36.119 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-08 04:32:36.585 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-08 04:32:37.049 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-08 04:32:37.518 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-08 04:32:37.985 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-08 04:32:38.450 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-08 04:32:38.916 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-08 04:32:39.383 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-08 04:32:39.848 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-08 04:32:40.316 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-08 04:32:40.788 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-08 04:32:41.258 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-08 04:32:41.729 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-08 04:32:42.199 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-08 04:32:42.663 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-08 04:32:43.125 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-08 04:32:43.589 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-08 04:32:44.055 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-08 04:32:44.524 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-02-08 04:32:44.990 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-02-08 04:32:45.459 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-02-08 04:32:45.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:32:45.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:32:45.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:32:45.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:32:45.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:32:45.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:32:45.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:32:45.921 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:32:45.921 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:32:45.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:32:45.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:32:45.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:32:45.922 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:32:45.923 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:32:45.923 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:32:45.923 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:32:45.924 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:32:45.924 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:32:45.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:32:45.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:32:45.929 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-02-08 04:32:46.397 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-02-08 04:32:46.861 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-02-08 04:32:47.328 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-02-08 04:32:47.795 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-02-08 04:32:48.261 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-02-08 04:32:48.726 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-02-08 04:32:49.193 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-02-08 04:32:49.660 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-02-08 04:32:50.124 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-02-08 04:32:50.590 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-02-08 04:32:51.061 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-02-08 04:32:51.532 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-02-08 04:32:52.001 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-02-08 04:32:52.466 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-02-08 04:32:52.931 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-02-08 04:32:53.395 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-02-08 04:32:53.863 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-02-08 04:32:54.332 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-02-08 04:32:54.798 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-02-08 04:32:55.264 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-02-08 04:32:55.728 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-02-08 04:32:56.193 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-02-08 04:32:56.655 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-02-08 04:32:57.119 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-02-08 04:32:57.587 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-02-08 04:32:58.051 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-02-08 04:32:58.524 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-02-08 04:32:58.996 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-02-08 04:32:59.467 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-02-08 04:32:59.940 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-02-08 04:33:00.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:00.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:33:00.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:33:00.333 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:33:00.350 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:33:00.350 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:33:00.350 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:33:00.350 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:33:00.351 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:33:00.351 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:33:00.351 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:33:00.351 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:33:00.351 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:33:00.351 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:33:00.351 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:33:00.351 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=12841 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:33:00.351 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=12841 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:33:05.363 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:33:05.363 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:33:05.363 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:33:05.363 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:33:05.363 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:33:05.363 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:33:05.373 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:33:05.374 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:33:05.374 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:33:05.374 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:33:05.374 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:33:05.377 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:33:05.377 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:33:05.377 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:33:05.378 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:33:05.378 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:33:05.378 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:33:05.378 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:33:05.379 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:33:05.381 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:33:05.381 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:33:05.381 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:33:05.381 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:33:05.381 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:33:05.381 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:33:05.382 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:33:05.382 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:33:05.384 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:33:05.384 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:33:05.385 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:33:05.385 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:33:05.385 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:33:05.385 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:33:05.385 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:33:05.385 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:33:05.389 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:33:05.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:33:05.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:33:05.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:33:05.389 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:33:05.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:33:05.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:33:05.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:33:05.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:33:05.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:33:05.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:33:05.389 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:33:05.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:33:05.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:33:05.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:33:05.390 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:33:05.390 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:33:05.390 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:33:05.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:33:05.390 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:33:05.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:33:05.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:33:05.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:33:05.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:33:05.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:33:05.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:33:05.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:33:05.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:33:05.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:33:05.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:33:05.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:33:05.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:33:05.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:33:05.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:33:05.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:33:05.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:33:05.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:33:05.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:33:05.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:33:05.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:33:05.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:33:05.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:33:05.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:33:05.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:33:05.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:33:05.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:33:05.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:33:05.394 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:33:05.872 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:33:05.917 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:33:05.919 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:33:05.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:33:05.921 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:33:05.943 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:33:05.943 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:33:05.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:33:05.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:33:05.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:33:05.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:33:05.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:33:05.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:05.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:33:05.972 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:33:05.972 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:33:05.972 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:33:06.009 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:33:06.009 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:33:06.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:06.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:06.343 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:33:06.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:33:06.394 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:33:06.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:33:06.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:33:06.816 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:33:07.286 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:33:07.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:33:07.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:33:07.395 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:33:07.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:33:07.757 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:33:08.231 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:33:08.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:33:08.397 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:33:08.397 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:33:08.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:33:08.703 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:33:09.176 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:33:09.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:33:09.398 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:33:09.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:33:09.398 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:33:09.647 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:33:10.120 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:33:10.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:33:10.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:33:10.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:33:10.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:33:10.593 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:33:11.065 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:33:11.536 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:33:12.009 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:33:12.482 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:33:12.955 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:33:13.426 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:33:13.899 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:33:14.372 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:33:14.844 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:33:15.315 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:33:15.786 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:33:16.259 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:33:16.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:16.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:33:16.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:33:16.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:33:16.484 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:33:16.484 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:33:16.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:33:16.490 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:33:16.490 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:33:16.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:33:16.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:33:16.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:16.491 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:33:16.492 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:33:16.492 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:33:16.492 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:33:16.537 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:33:16.537 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:33:16.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:16.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:16.732 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:33:17.204 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:33:17.675 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:33:18.148 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:33:18.621 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:33:19.093 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:33:19.566 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:33:20.039 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:33:20.512 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:33:20.985 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 04:33:21.457 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 04:33:21.930 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 04:33:22.401 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 04:33:22.871 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 04:33:23.342 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 04:33:23.815 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 04:33:24.288 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 04:33:24.761 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 04:33:25.234 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 04:33:25.707 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 04:33:26.179 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 04:33:26.653 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 04:33:26.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:26.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:33:26.823 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:33:26.823 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:33:26.836 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:33:26.836 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:33:26.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:33:26.841 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:33:26.841 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:33:26.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:33:26.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:33:26.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:26.843 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:33:26.843 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:33:26.843 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:33:26.843 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:33:26.883 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:33:26.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:33:26.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:26.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:27.125 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 04:33:27.597 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 04:33:28.068 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 04:33:28.541 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 04:33:29.014 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 04:33:29.486 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 04:33:29.957 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 04:33:30.428 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 04:33:30.901 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 04:33:31.374 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 04:33:31.846 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 04:33:32.317 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 04:33:32.791 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 04:33:33.263 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 04:33:33.736 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 04:33:33.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:33.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:33:33.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:33:33.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:33:33.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:33:33.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:33:33.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:33:33.798 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:33:33.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:33:33.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:33:33.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:33:33.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:33.800 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:33:33.800 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:33:33.800 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:33:33.800 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:33:33.825 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:33:33.825 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:33:33.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:33.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:34.206 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 04:33:34.680 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-08 04:33:35.153 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-08 04:33:35.625 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-08 04:33:36.096 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-08 04:33:36.569 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-08 04:33:37.042 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-08 04:33:37.514 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-08 04:33:37.985 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-08 04:33:38.455 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-08 04:33:38.929 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-08 04:33:39.401 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-08 04:33:39.873 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-08 04:33:40.344 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-08 04:33:40.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:40.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:33:40.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:33:40.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:33:40.815 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-08 04:33:40.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:33:40.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:33:40.820 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:33:40.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:33:40.821 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:33:40.821 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:33:40.821 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:33:40.821 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:33:40.821 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:33:40.821 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:33:40.821 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:33:45.829 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:33:45.829 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:33:45.829 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:33:45.829 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:33:45.829 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:33:45.829 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:33:45.839 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:33:45.841 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:33:45.841 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:33:45.841 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:33:45.842 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:33:45.846 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:33:45.846 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:33:45.846 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:33:45.846 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:33:45.847 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:33:45.847 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:33:45.847 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:33:45.848 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:33:45.851 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:33:45.851 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:33:45.851 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:33:45.851 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:33:45.852 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:33:45.852 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:33:45.852 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:33:45.852 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:33:45.855 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:33:45.855 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:33:45.855 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:33:45.855 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:33:45.856 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:33:45.856 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:33:45.856 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:33:45.856 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:33:45.861 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:33:45.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:33:45.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:33:45.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:33:45.861 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:33:45.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:33:45.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:33:45.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:33:45.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:33:45.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:33:45.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:33:45.862 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:33:45.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:33:45.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:33:45.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:33:45.862 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:33:45.862 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:33:45.862 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:33:45.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:33:45.862 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:33:45.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:33:45.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:33:45.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:33:45.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:33:45.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:33:45.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:33:45.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:33:45.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:33:45.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:33:45.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:33:45.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:33:45.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:33:45.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:33:45.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:33:45.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:33:45.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:33:45.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:33:45.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:33:45.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:33:45.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:33:45.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:33:45.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:33:45.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:33:45.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:33:45.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:33:45.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:33:45.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:33:45.867 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:33:46.346 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:33:46.387 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:33:46.389 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:33:46.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:33:46.391 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:33:46.410 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:33:46.410 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:33:46.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:33:46.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:33:46.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:33:46.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:33:46.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:33:46.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:46.424 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:33:46.424 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:33:46.424 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:33:46.424 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:33:46.436 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:33:46.436 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:33:46.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:46.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:46.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:46.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:33:46.746 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:33:46.746 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:33:46.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:33:46.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:33:46.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:33:46.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:33:46.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:33:46.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:33:46.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:33:46.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:46.771 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:33:46.772 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:33:46.772 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:33:46.772 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:33:46.816 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:33:46.816 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:33:46.816 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:33:46.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:46.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:46.865 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:33:46.866 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:33:46.866 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:33:46.866 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:33:47.289 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:33:47.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:47.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:33:47.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:33:47.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:33:47.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:33:47.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:33:47.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:33:47.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:33:47.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:33:47.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:33:47.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:33:47.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:47.333 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:33:47.333 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:33:47.333 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:33:47.333 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:33:47.380 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:33:47.381 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:33:47.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:47.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:47.761 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:33:47.866 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:33:47.866 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:33:47.867 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:33:47.867 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:33:48.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:48.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:33:48.156 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:33:48.156 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:33:48.166 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:33:48.166 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:33:48.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:33:48.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:33:48.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:33:48.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:33:48.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:33:48.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:48.173 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:33:48.174 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:33:48.174 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:33:48.174 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:33:48.176 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:33:48.176 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:33:48.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:48.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:48.232 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:33:48.702 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:33:48.868 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:33:48.868 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:33:48.869 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:33:48.869 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:33:49.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:49.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:33:49.024 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:33:49.024 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:33:49.033 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:33:49.033 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:33:49.033 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:33:49.033 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:33:49.034 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:33:49.034 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:33:49.034 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:33:49.034 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:33:49.034 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:33:49.034 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:33:49.034 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:33:49.035 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=686 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:33:49.035 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=686 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:33:49.035 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=686 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:33:49.035 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=686 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:33:49.035 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=686 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:33:49.035 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=686 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:33:54.042 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:33:54.042 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:33:54.042 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:33:54.042 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:33:54.042 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:33:54.042 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:33:54.052 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:33:54.054 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:33:54.054 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:33:54.055 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:33:54.055 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:33:54.060 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:33:54.061 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:33:54.061 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:33:54.061 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:33:54.061 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:33:54.061 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:33:54.061 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:33:54.061 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:33:54.065 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:33:54.066 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:33:54.066 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:33:54.066 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:33:54.066 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:33:54.066 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:33:54.066 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:33:54.066 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:33:54.070 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:33:54.070 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:33:54.071 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:33:54.071 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:33:54.071 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:33:54.071 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:33:54.071 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:33:54.071 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:33:54.077 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:33:54.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:33:54.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:33:54.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:33:54.077 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:33:54.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:33:54.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:33:54.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:33:54.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:33:54.078 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:33:54.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:33:54.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:33:54.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:33:54.078 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:33:54.078 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:33:54.078 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:33:54.078 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:33:54.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:33:54.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:33:54.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:33:54.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:33:54.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:33:54.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:33:54.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:33:54.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:33:54.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:33:54.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:33:54.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:33:54.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:33:54.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:33:54.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:33:54.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:33:54.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:33:54.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:33:54.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:33:54.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:33:54.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:33:54.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:33:54.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:33:54.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:33:54.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:33:54.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:33:54.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:33:54.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:33:54.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:33:54.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:33:54.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:33:54.083 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:33:54.562 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:33:54.606 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:33:54.607 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:33:54.608 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:33:54.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:33:54.623 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:33:54.623 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:33:54.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:33:54.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:33:54.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:33:54.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:33:54.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:33:54.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:54.664 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:33:54.665 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:33:54.665 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:33:54.665 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:33:54.700 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:33:54.700 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:33:54.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:54.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:55.032 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:33:55.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:33:55.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:33:55.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:33:55.083 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:33:55.503 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:33:55.976 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:33:56.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:33:56.084 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:33:56.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:33:56.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:33:56.449 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:33:56.922 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:33:57.085 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:33:57.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:33:57.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:33:57.086 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:33:57.395 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:33:57.867 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:33:57.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:57.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:33:57.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:33:57.931 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:33:57.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:33:57.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:33:57.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:33:57.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:33:57.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:33:57.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:33:57.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:33:57.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:57.958 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:33:57.958 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:33:57.958 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:33:57.958 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:33:58.004 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:33:58.004 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:33:58.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:58.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:33:58.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:33:58.087 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:33:58.087 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:33:58.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:33:58.338 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:33:58.809 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:33:59.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:33:59.089 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:33:59.089 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:33:59.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:33:59.280 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:33:59.753 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:34:00.225 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:34:00.698 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:34:01.171 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:34:01.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:01.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:34:01.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:01.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:01.357 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:01.357 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:01.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:34:01.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:01.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:01.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:34:01.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:34:01.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:01.366 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:34:01.366 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:34:01.366 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:34:01.366 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:34:01.402 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:34:01.403 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:34:01.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:01.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:01.644 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:34:02.116 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:34:02.587 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:34:03.058 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:34:03.531 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:34:04.004 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:34:04.476 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:34:04.947 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:34:05.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:05.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:34:05.107 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:05.107 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:05.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:05.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:05.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:34:05.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:05.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:05.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:34:05.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:34:05.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:05.129 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:34:05.129 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:34:05.129 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:34:05.129 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:34:05.180 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:34:05.180 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:34:05.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:05.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:05.417 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:34:05.891 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:34:06.363 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:34:06.836 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:34:07.308 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:34:07.781 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:34:08.253 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:34:08.726 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:34:08.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:08.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:34:08.809 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:08.810 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:08.822 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:34:08.823 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:34:08.823 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:34:08.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:34:08.829 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:34:08.829 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:34:08.829 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:34:08.829 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:34:08.829 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:34:08.829 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:34:08.830 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:34:08.830 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3186 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:34:08.830 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3186 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:34:08.830 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3186 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:34:08.830 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3186 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:34:08.830 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3186 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:34:08.830 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3186 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:34:08.831 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3186 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:34:08.831 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3186 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:34:08.831 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3187 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:34:08.831 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3187 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:34:08.831 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3187 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:34:08.831 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3187 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:34:08.831 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3187 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:34:08.831 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3187 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:34:08.831 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3187 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:34:08.831 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3187 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:34:13.830 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:34:13.830 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:34:13.830 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:34:13.830 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:34:13.830 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:34:13.830 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:34:13.840 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:34:13.841 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:34:13.841 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:34:13.842 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:34:13.842 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:34:13.844 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:34:13.845 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:34:13.845 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:34:13.845 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:34:13.845 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:34:13.846 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:34:13.846 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:34:13.846 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:34:13.848 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:34:13.848 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:34:13.848 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:34:13.848 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:34:13.848 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:34:13.849 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:34:13.849 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:34:13.849 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:34:13.850 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:34:13.851 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:34:13.851 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:34:13.851 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:34:13.851 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:34:13.851 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:34:13.851 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:34:13.851 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:34:13.854 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:34:13.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:34:13.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:34:13.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:34:13.854 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:34:13.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:34:13.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:34:13.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:34:13.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:34:13.854 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:34:13.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:34:13.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:34:13.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:34:13.855 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:34:13.855 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:34:13.855 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:34:13.855 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:34:13.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:34:13.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:34:13.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:34:13.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:34:13.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:34:13.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:34:13.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:34:13.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:34:13.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:34:13.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:34:13.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:34:13.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:34:13.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:34:13.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:34:13.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:34:13.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:34:13.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:34:13.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:34:13.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:34:13.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:34:13.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:34:13.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:34:13.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:34:13.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:34:13.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:34:13.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:34:13.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:34:13.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:34:13.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:34:13.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:34:13.859 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:34:14.337 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:34:14.377 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:34:14.380 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:34:14.382 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:34:14.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:34:14.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:14.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:14.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:34:14.422 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:14.422 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:14.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:34:14.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:34:14.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:14.427 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:34:14.427 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:34:14.428 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:34:14.428 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:34:14.474 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:34:14.475 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:34:14.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:14.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:14.807 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:34:14.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:14.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:34:14.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:14.853 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:14.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:34:14.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:34:14.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:34:14.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:34:14.872 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:14.872 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:14.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:34:14.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:14.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:14.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:34:14.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:34:14.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:14.880 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:34:14.880 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:34:14.880 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:34:14.880 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:34:14.892 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:34:14.892 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:34:14.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:14.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:15.278 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:34:15.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:15.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:34:15.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:15.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:15.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:15.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:15.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:34:15.478 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:15.478 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:15.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:34:15.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:34:15.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:15.480 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:34:15.480 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:34:15.480 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:34:15.480 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:34:15.508 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:34:15.509 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:34:15.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:15.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:15.750 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:34:15.860 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:34:15.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:34:15.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:34:15.860 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:34:16.223 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:34:16.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:16.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:34:16.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:16.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:16.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:16.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:16.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:34:16.640 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:16.640 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:16.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:34:16.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:34:16.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:16.642 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:34:16.642 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:34:16.642 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:34:16.642 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:34:16.691 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:34:16.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:34:16.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:16.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:16.693 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:34:16.861 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:34:16.862 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:34:16.862 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:34:16.862 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:34:17.164 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:34:17.638 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:34:17.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:17.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:34:17.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:17.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:17.728 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:34:17.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:34:17.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:34:17.728 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:34:17.729 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:34:17.729 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:34:17.729 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:34:17.729 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:34:17.729 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:34:17.730 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:34:17.730 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:34:22.736 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:34:22.736 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:34:22.736 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:34:22.736 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:34:22.736 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:34:22.736 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:34:22.747 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:34:22.749 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:34:22.750 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:34:22.750 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:34:22.750 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:34:22.756 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:34:22.756 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:34:22.756 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:34:22.756 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:34:22.757 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:34:22.757 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:34:22.757 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:34:22.757 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:34:22.762 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:34:22.762 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:34:22.762 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:34:22.762 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:34:22.762 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:34:22.762 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:34:22.763 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:34:22.763 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:34:22.767 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:34:22.767 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:34:22.767 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:34:22.767 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:34:22.767 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:34:22.767 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:34:22.767 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:34:22.767 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:34:22.773 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:34:22.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:34:22.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:34:22.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:34:22.773 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:34:22.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:34:22.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:34:22.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:34:22.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:34:22.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:34:22.773 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:34:22.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:34:22.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:34:22.773 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:34:22.773 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:34:22.773 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:34:22.774 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:34:22.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:34:22.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:34:22.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:34:22.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:34:22.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:34:22.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:34:22.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:34:22.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:34:22.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:34:22.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:34:22.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:34:22.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:34:22.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:34:22.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:34:22.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:34:22.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:34:22.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:34:22.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:34:22.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:34:22.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:34:22.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:34:22.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:34:22.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:34:22.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:34:22.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:34:22.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:34:22.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:34:22.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:34:22.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:34:22.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:34:22.778 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:34:23.257 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:34:23.304 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:34:23.307 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:34:23.309 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:34:23.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:34:23.334 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:23.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:23.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:34:23.347 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:23.347 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:23.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:34:23.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:34:23.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:23.355 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:34:23.355 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:34:23.355 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:34:23.355 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:34:23.396 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:34:23.397 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:34:23.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:23.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:23.730 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:34:23.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:34:23.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:34:23.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:34:23.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:34:24.201 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:34:24.672 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:34:24.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:34:24.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:34:24.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:34:24.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:34:25.145 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:34:25.618 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:34:25.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:34:25.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:34:25.781 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:34:25.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:34:26.090 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:34:26.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:26.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:34:26.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:26.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:26.266 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:26.266 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:26.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:34:26.273 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:26.273 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:26.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:34:26.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:34:26.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:26.274 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:34:26.274 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:34:26.274 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:34:26.274 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:34:26.324 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:34:26.325 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:34:26.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:26.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:26.563 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:34:26.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:34:26.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:34:26.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:34:26.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:34:27.036 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:34:27.508 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:34:27.783 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:34:27.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:34:27.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:34:27.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:34:27.979 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:34:28.448 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:34:28.913 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:34:29.386 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:34:29.859 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:34:30.332 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:34:30.804 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:34:30.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:30.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:34:30.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:30.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:30.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:30.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:30.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:34:30.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:30.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:30.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:34:30.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:34:30.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:30.859 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:34:30.860 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:34:30.860 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:34:30.860 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:34:30.896 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:34:30.896 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:34:30.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:30.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:31.276 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:34:31.747 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:34:32.221 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:34:32.693 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:34:33.165 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:34:33.636 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:34:34.110 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:34:34.583 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:34:35.055 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:34:35.526 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:34:35.999 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:34:36.472 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:34:36.944 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:34:37.415 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:34:37.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:37.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:34:37.573 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:37.573 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:37.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:37.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:37.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:34:37.595 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:37.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:37.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:34:37.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:34:37.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:37.597 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:34:37.597 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:34:37.597 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:34:37.597 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:34:37.648 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:34:37.649 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:34:37.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:37.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:37.885 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:34:38.359 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 04:34:38.831 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 04:34:39.304 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 04:34:39.777 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 04:34:40.249 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 04:34:40.722 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 04:34:41.195 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 04:34:41.668 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 04:34:42.140 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 04:34:42.611 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 04:34:43.084 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 04:34:43.557 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 04:34:44.029 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 04:34:44.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:44.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:34:44.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:44.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:44.363 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:34:44.363 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:34:44.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:34:44.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:34:44.364 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:34:44.364 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:34:44.364 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:34:44.364 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:34:44.364 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:34:44.364 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:34:44.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:34:44.364 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4665 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:34:44.364 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4665 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:34:44.364 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4665 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:34:44.365 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4665 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:34:44.365 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4665 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:34:44.365 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4665 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:34:44.365 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4665 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:34:44.365 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4665 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:34:49.377 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:34:49.377 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:34:49.378 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:34:49.378 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:34:49.378 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:34:49.378 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:34:49.386 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:34:49.388 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:34:49.388 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:34:49.389 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:34:49.389 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:34:49.395 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:34:49.395 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:34:49.396 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:34:49.396 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:34:49.396 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:34:49.397 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:34:49.397 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:34:49.397 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:34:49.401 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:34:49.401 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:34:49.401 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:34:49.402 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:34:49.402 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:34:49.402 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:34:49.403 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:34:49.403 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:34:49.405 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:34:49.406 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:34:49.406 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:34:49.406 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:34:49.407 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:34:49.407 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:34:49.407 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:34:49.407 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:34:49.411 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:34:49.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:34:49.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:34:49.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:34:49.411 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:34:49.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:34:49.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:34:49.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:34:49.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:34:49.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:34:49.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:34:49.412 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:34:49.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:34:49.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:34:49.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:34:49.412 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:34:49.412 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:34:49.412 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:34:49.412 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:34:49.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:34:49.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:34:49.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:34:49.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:34:49.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:34:49.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:34:49.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:34:49.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:34:49.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:34:49.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:34:49.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:34:49.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:34:49.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:34:49.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:34:49.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:34:49.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:34:49.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:34:49.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:34:49.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:34:49.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:34:49.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:34:49.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:34:49.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:34:49.414 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:34:49.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:34:49.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:34:49.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:34:49.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:34:49.417 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:34:49.895 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:34:49.942 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:34:49.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:34:49.945 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:34:49.949 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:34:49.970 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:49.970 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:49.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:34:49.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:49.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:49.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:34:49.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:34:49.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:49.998 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:34:49.998 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:34:49.998 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:34:49.998 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:34:50.033 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:34:50.033 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:34:50.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:50.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:50.366 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:34:50.416 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:34:50.416 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:34:50.416 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:34:50.418 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:34:50.839 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:34:51.311 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:34:51.417 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:34:51.417 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:34:51.417 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:34:51.419 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:34:51.785 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:34:51.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:51.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:34:51.800 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:51.800 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:51.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:51.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:51.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:34:51.823 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:51.823 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:51.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:34:51.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:34:51.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:51.825 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:34:51.825 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:34:51.825 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:34:51.825 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:34:51.874 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:34:51.874 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:34:51.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:51.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:52.255 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:34:52.418 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:34:52.418 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:34:52.419 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:34:52.419 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:34:52.728 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:34:53.200 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:34:53.419 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:34:53.419 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:34:53.420 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:34:53.420 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:34:53.671 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:34:54.145 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:34:54.421 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:34:54.421 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:34:54.421 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:34:54.421 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:34:54.617 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:34:54.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:54.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:34:54.624 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:54.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:54.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:54.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:54.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:34:54.651 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:54.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:54.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:34:54.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:34:54.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:54.653 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:34:54.653 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:34:54.653 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:34:54.653 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:34:54.660 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:34:54.661 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:34:54.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:54.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:55.089 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:34:55.560 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:34:56.034 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:34:56.506 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:34:56.978 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:34:57.449 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:34:57.934 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:34:58.406 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:34:58.877 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:34:59.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:59.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:34:59.037 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:59.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:59.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:59.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:59.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:34:59.064 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:34:59.064 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:34:59.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:34:59.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:34:59.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:59.066 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:34:59.066 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:34:59.066 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:34:59.066 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:34:59.110 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:34:59.110 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:34:59.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:59.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:34:59.348 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:34:59.819 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:35:00.292 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:35:00.765 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:35:01.237 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:35:01.708 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:35:02.181 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:35:02.653 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:35:03.126 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:35:03.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:35:03.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:03.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:35:03.447 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:35:03.460 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:35:03.460 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:35:03.460 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:35:03.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:35:03.466 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:35:03.467 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:35:03.468 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:35:03.468 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:35:03.468 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:35:03.468 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:35:03.468 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:35:03.468 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3033 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:03.468 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3033 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:03.469 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3033 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:03.469 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3033 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:03.469 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3033 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:03.469 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3033 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:03.469 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3033 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:03.469 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3033 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:03.469 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3034 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:03.469 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3034 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:03.469 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3034 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:03.469 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3034 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:03.469 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3034 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:03.470 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3034 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:03.470 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3034 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:03.470 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3034 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:08.469 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:35:08.469 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:35:08.469 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:35:08.469 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:35:08.469 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:35:08.469 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:35:08.479 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:35:08.481 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:35:08.481 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:35:08.482 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:35:08.482 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:35:08.488 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:35:08.488 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:35:08.488 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:35:08.488 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:35:08.489 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:35:08.489 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:35:08.489 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:35:08.489 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:35:08.494 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:35:08.494 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:35:08.494 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:35:08.494 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:35:08.494 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:35:08.494 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:35:08.494 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:35:08.495 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:35:08.499 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:35:08.499 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:35:08.499 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:35:08.499 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:35:08.499 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:35:08.499 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:35:08.499 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:35:08.499 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:35:08.505 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:35:08.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:35:08.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:35:08.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:35:08.505 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:35:08.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:35:08.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:35:08.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:35:08.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:35:08.506 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:35:08.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:08.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:08.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:08.506 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:35:08.506 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:35:08.506 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:35:08.506 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:35:08.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:08.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:08.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:08.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:35:08.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:08.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:08.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:08.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:08.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:08.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:08.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:08.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:08.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:08.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:08.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:08.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:08.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:08.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:08.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:08.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:08.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:08.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:08.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:08.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:08.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:08.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:08.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:08.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:08.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:08.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:08.511 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:35:08.989 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:35:09.031 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:35:09.033 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:35:09.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:09.035 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:35:09.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:09.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:09.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:09.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:09.461 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:35:09.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:35:09.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:35:09.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:35:09.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:35:09.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:09.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:09.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:09.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:09.935 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:35:10.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:10.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:10.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:10.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:10.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:10.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:10.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:35:10.376 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:35:10.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:35:10.376 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:35:10.378 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:35:10.378 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:35:10.378 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:35:10.378 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:35:10.378 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:35:10.378 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:35:10.378 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:35:10.378 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=404 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:15.385 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:35:15.385 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:35:15.385 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:35:15.385 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:35:15.385 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:35:15.385 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:35:15.393 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:35:15.393 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:35:15.393 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:35:15.394 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:35:15.394 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:35:15.396 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:35:15.396 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:35:15.396 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:35:15.396 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:35:15.397 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:35:15.397 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:35:15.397 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:35:15.397 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:35:15.399 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:35:15.399 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:35:15.399 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:35:15.399 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:35:15.399 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:35:15.399 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:35:15.400 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:35:15.400 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:35:15.401 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:35:15.401 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:35:15.402 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:35:15.402 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:35:15.402 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:35:15.402 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:35:15.402 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:35:15.402 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:35:15.405 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:35:15.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:35:15.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:35:15.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:35:15.405 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:35:15.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:35:15.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:35:15.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:35:15.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:35:15.406 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:35:15.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:15.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:15.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:15.406 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:35:15.406 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:35:15.406 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:35:15.406 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:35:15.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:15.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:15.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:15.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:35:15.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:15.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:15.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:15.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:15.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:15.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:15.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:15.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:15.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:15.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:15.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:15.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:15.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:15.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:15.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:15.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:15.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:15.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:15.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:15.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:15.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:15.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:15.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:15.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:15.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:15.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:15.411 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:35:15.890 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:35:15.931 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:35:15.933 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:35:15.935 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:35:15.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:15.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:15.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:15.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:15.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:16.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:16.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:16.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:16.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:16.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:16.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:16.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:16.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:16.361 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:35:16.409 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:35:16.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:35:16.410 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:35:16.410 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:35:16.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:16.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:16.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:16.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:16.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:16.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:16.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:16.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:16.832 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:35:16.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:16.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:16.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:16.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:16.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:16.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:16.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:16.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:17.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:17.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:17.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:17.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:17.295 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:35:17.295 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:35:17.295 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:35:17.295 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:35:17.296 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:35:17.296 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:35:17.296 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:35:17.296 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:35:17.296 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:35:17.296 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:35:17.296 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:35:22.303 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:35:22.303 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:35:22.303 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:35:22.303 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:35:22.303 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:35:22.303 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:35:22.312 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:35:22.312 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:35:22.312 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:35:22.313 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:35:22.313 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:35:22.317 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:35:22.317 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:35:22.318 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:35:22.318 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:35:22.318 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:35:22.318 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:35:22.319 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:35:22.319 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:35:22.322 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:35:22.322 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:35:22.322 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:35:22.322 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:35:22.322 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:35:22.323 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:35:22.323 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:35:22.323 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:35:22.325 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:35:22.325 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:35:22.326 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:35:22.326 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:35:22.326 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:35:22.326 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:35:22.326 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:35:22.326 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:35:22.330 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:35:22.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:35:22.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:35:22.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:35:22.330 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:35:22.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:35:22.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:35:22.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:35:22.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:35:22.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:22.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:22.330 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:35:22.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:22.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:22.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:22.331 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:35:22.331 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:35:22.331 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:35:22.331 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:35:22.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:22.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:22.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:22.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:35:22.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:22.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:22.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:22.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:22.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:22.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:22.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:22.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:22.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:22.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:22.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:22.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:22.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:22.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:22.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:22.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:22.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:22.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:22.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:22.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:22.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:22.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:22.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:22.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:22.335 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:35:22.813 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:35:22.860 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:35:22.862 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:35:22.864 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:35:22.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:22.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:22.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:23.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:23.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:23.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:23.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:23.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:23.282 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:35:23.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:35:23.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:35:23.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:35:23.335 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:35:23.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:23.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:23.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:23.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:23.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:23.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:23.752 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:35:23.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:23.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:23.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:23.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:23.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:23.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:24.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:24.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:24.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:24.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:35:24.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:35:24.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:35:24.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:35:24.217 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:35:24.217 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:35:24.217 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:35:24.217 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:35:24.217 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:35:24.217 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:35:24.217 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:35:24.217 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=408 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:24.217 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=408 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:24.217 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=408 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:29.224 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:35:29.224 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:35:29.224 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:35:29.224 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:35:29.224 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:35:29.224 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:35:29.236 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:35:29.237 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:35:29.237 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:35:29.237 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:35:29.237 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:35:29.239 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:35:29.239 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:35:29.239 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:35:29.239 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:35:29.240 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:35:29.240 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:35:29.240 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:35:29.240 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:35:29.241 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:35:29.241 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:35:29.241 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:35:29.241 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:35:29.241 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:35:29.241 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:35:29.241 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:35:29.241 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:35:29.243 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:35:29.243 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:35:29.243 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:35:29.243 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:35:29.243 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:35:29.243 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:35:29.243 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:35:29.243 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:35:29.246 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:35:29.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:35:29.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:35:29.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:35:29.246 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:35:29.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:35:29.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:35:29.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:35:29.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:35:29.246 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:35:29.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:29.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:29.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:29.246 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:35:29.246 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:35:29.246 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:35:29.246 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:35:29.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:29.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:29.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:29.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:35:29.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:29.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:29.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:29.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:29.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:29.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:29.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:29.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:29.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:29.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:29.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:29.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:29.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:29.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:29.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:29.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:29.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:29.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:29.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:29.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:29.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:29.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:29.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:29.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:29.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:29.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:29.251 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:35:29.729 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:35:29.768 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:35:29.770 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:35:29.771 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:35:29.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:29.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:30.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:30.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:30.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:30.201 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:35:30.250 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:35:30.251 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:35:30.251 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:35:30.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:35:30.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:30.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:30.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:30.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:30.672 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:35:30.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:30.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:30.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:30.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:31.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:31.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:31.106 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:35:31.106 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:35:31.106 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:35:31.106 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:35:31.107 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:35:31.107 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:35:31.107 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:35:31.107 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:35:31.108 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:35:31.108 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:35:31.108 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:35:36.115 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:35:36.115 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:35:36.115 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:35:36.115 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:35:36.115 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:35:36.115 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:35:36.124 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:35:36.124 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:35:36.125 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:35:36.125 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:35:36.125 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:35:36.128 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:35:36.128 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:35:36.128 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:35:36.128 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:35:36.129 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:35:36.129 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:35:36.129 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:35:36.129 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:35:36.131 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:35:36.131 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:35:36.131 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:35:36.131 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:35:36.131 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:35:36.132 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:35:36.132 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:35:36.132 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:35:36.134 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:35:36.134 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:35:36.134 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:35:36.134 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:35:36.134 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:35:36.134 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:35:36.134 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:35:36.134 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:35:36.137 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:35:36.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:35:36.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:35:36.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:35:36.137 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:35:36.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:35:36.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:35:36.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:36.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:35:36.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:35:36.137 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:35:36.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:36.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:36.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:36.138 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:35:36.138 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:35:36.138 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:35:36.138 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:35:36.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:36.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:36.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:36.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:35:36.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:36.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:36.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:36.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:36.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:36.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:36.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:36.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:36.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:36.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:36.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:36.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:36.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:36.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:36.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:36.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:36.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:36.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:36.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:36.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:36.142 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:35:36.618 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:35:36.664 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:35:36.666 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:35:36.668 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:35:36.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:36.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:36.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:37.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:37.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:37.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:37.087 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:35:37.140 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:35:37.140 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:35:37.141 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:35:37.141 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:35:37.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:37.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:37.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:37.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:37.557 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:35:37.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:37.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:37.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:37.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:38.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:38.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:38.012 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:35:38.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:35:38.012 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:35:38.012 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:35:38.013 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:35:38.013 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:35:38.013 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:35:38.013 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:35:38.013 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:35:38.013 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:35:38.013 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:35:38.013 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=407 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:38.013 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=407 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:38.013 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=407 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:38.013 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=407 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:38.013 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=407 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:38.013 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=407 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:43.021 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:35:43.021 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:35:43.021 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:35:43.021 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:35:43.021 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:35:43.021 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:35:43.028 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:35:43.029 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:35:43.029 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:35:43.029 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:35:43.029 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:35:43.031 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:35:43.032 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:35:43.032 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:35:43.032 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:35:43.032 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:35:43.032 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:35:43.033 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:35:43.033 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:35:43.035 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:35:43.035 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:35:43.036 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:35:43.036 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:35:43.036 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:35:43.036 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:35:43.036 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:35:43.036 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:35:43.038 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:35:43.039 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:35:43.039 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:35:43.039 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:35:43.039 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:35:43.039 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:35:43.039 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:35:43.039 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:35:43.043 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:35:43.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:35:43.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:35:43.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:35:43.043 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:35:43.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:35:43.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:35:43.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:35:43.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:35:43.044 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:35:43.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:43.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:43.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:43.044 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:35:43.044 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:35:43.044 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:35:43.044 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:35:43.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:43.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:43.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:43.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:35:43.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:43.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:43.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:43.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:43.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:43.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:43.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:43.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:43.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:43.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:43.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:43.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:43.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:43.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:43.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:43.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:43.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:43.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:43.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:43.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:43.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:43.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:43.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:43.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:43.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:43.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:43.049 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:35:43.527 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:35:43.574 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:35:43.576 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:35:43.579 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:35:43.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:43.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:43.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:43.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:43.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:43.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:43.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:43.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:43.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:43.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:43.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:43.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:43.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:43.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:43.998 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:35:44.049 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:35:44.049 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:35:44.069 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:35:44.070 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:35:44.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:44.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:44.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:44.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:44.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:44.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:44.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:44.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:44.469 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:35:44.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:44.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:44.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:44.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:44.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:44.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:44.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:44.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:44.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:44.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:44.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:44.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:44.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:35:44.924 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:35:44.924 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:35:44.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:35:44.930 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:35:44.930 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:35:44.930 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:35:44.930 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:35:44.931 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:35:44.931 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:35:44.931 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:35:44.931 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=406 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:44.931 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=406 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:44.931 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=406 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:44.932 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=406 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:44.932 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=406 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:44.932 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=406 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:44.932 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=406 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:44.932 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=406 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:44.932 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=407 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:44.932 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=407 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:44.932 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=407 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:44.932 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=407 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:44.932 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=407 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:44.933 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=407 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:44.933 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=407 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:44.933 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=407 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:49.932 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:35:49.932 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:35:49.932 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:35:49.932 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:35:49.932 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:35:49.932 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:35:49.940 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:35:49.941 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:35:49.941 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:35:49.941 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:35:49.941 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:35:49.946 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:35:49.947 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:35:49.947 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:35:49.947 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:35:49.947 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:35:49.947 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:35:49.947 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:35:49.947 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:35:49.952 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:35:49.952 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:35:49.952 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:35:49.952 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:35:49.952 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:35:49.952 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:35:49.952 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:35:49.952 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:35:49.956 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:35:49.956 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:35:49.957 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:35:49.957 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:35:49.957 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:35:49.957 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:35:49.957 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:35:49.957 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:35:49.962 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:35:49.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:35:49.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:35:49.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:35:49.962 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:35:49.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:35:49.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:35:49.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:35:49.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:35:49.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:49.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:49.963 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:35:49.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:49.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:49.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:49.963 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:35:49.963 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:35:49.963 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:35:49.963 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:35:49.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:49.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:49.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:49.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:35:49.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:49.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:49.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:49.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:49.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:49.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:49.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:49.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:49.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:49.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:49.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:49.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:49.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:49.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:49.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:49.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:49.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:49.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:49.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:49.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:49.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:49.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:49.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:49.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:49.968 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:35:50.444 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:35:50.490 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:35:50.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:50.493 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:35:50.494 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:35:50.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:50.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:50.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:50.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:50.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:50.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:50.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:50.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:50.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:50.908 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:35:50.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:35:50.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:35:50.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:35:50.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:35:51.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:51.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:51.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:51.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:51.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:51.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:51.378 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:35:51.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:51.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:51.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:51.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:51.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:51.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:51.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:51.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:51.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:51.833 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:35:51.833 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:35:51.833 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:35:51.833 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:35:51.834 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:35:51.834 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:35:51.834 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:35:51.834 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:35:51.834 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:35:51.834 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:35:51.834 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:35:51.834 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=407 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:51.834 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=407 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:51.834 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=407 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:51.834 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=407 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:51.834 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=407 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:51.834 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=407 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:56.842 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:35:56.842 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:35:56.842 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:35:56.842 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:35:56.842 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:35:56.842 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:35:56.850 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:35:56.851 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:35:56.851 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:35:56.851 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:35:56.851 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:35:56.855 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:35:56.856 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:35:56.856 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:35:56.856 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:35:56.856 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:35:56.856 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:35:56.857 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:35:56.857 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:35:56.860 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:35:56.860 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:35:56.860 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:35:56.860 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:35:56.860 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:35:56.860 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:35:56.861 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:35:56.861 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:35:56.863 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:35:56.863 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:35:56.864 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:35:56.864 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:35:56.864 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:35:56.864 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:35:56.864 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:35:56.864 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:35:56.867 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:35:56.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:35:56.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:35:56.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:35:56.867 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:35:56.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:35:56.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:35:56.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:35:56.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:56.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:35:56.868 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:35:56.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:56.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:56.868 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:35:56.868 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:35:56.868 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:35:56.868 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:35:56.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:56.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:56.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:56.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:35:56.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:56.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:56.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:56.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:56.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:56.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:56.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:56.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:56.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:56.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:56.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:56.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:56.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:56.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:56.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:56.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:56.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:35:56.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:56.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:56.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:56.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:56.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:56.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:35:56.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:56.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:35:56.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:35:56.873 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:35:57.351 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:35:57.388 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:35:57.390 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:35:57.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:57.392 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:35:57.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:57.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:57.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:57.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:57.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:57.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:57.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:57.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:57.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:57.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:57.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:57.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:57.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:57.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:57.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:57.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:57.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:57.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:57.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:57.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:57.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:57.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:57.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:57.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:35:57.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:35:57.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:35:57.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:35:57.467 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:35:57.469 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:35:57.469 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:35:57.469 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:35:57.469 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:35:57.469 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:35:57.469 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:35:57.469 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:35:57.469 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:57.469 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:57.469 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:35:57.469 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:36:02.478 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:36:02.478 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:36:02.478 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:36:02.478 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:36:02.478 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:36:02.478 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:36:02.487 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:36:02.488 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:36:02.488 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:36:02.488 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:36:02.488 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:36:02.491 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:36:02.492 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:36:02.492 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:36:02.492 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:36:02.492 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:36:02.492 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:36:02.493 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:36:02.493 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:36:02.495 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:36:02.495 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:36:02.495 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:36:02.495 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:36:02.495 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:36:02.495 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:36:02.496 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:36:02.496 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:36:02.498 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:36:02.498 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:36:02.498 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:36:02.498 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:36:02.498 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:36:02.498 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:36:02.498 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:36:02.498 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:36:02.501 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:36:02.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:36:02.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:36:02.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:36:02.501 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:36:02.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:36:02.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:36:02.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:36:02.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:36:02.502 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:36:02.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:02.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:02.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:02.502 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:36:02.502 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:36:02.502 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:36:02.502 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:36:02.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:02.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:02.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:02.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:36:02.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:02.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:02.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:02.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:02.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:02.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:02.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:02.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:02.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:02.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:02.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:02.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:02.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:02.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:02.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:02.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:02.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:02.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:02.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:02.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:02.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:02.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:02.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:02.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:02.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:02.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:02.507 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:36:02.985 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:36:03.019 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:36:03.020 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:36:03.021 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:36:03.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:03.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:36:03.154 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:36:03.154 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:36:03.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:36:03.155 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:36:03.155 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:36:03.155 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:36:03.155 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:36:03.155 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:36:03.155 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:36:03.155 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:36:08.167 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:36:08.167 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:36:08.167 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:36:08.167 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:36:08.167 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:36:08.168 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:36:08.175 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:36:08.176 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:36:08.176 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:36:08.176 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:36:08.176 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:36:08.179 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:36:08.179 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:36:08.179 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:36:08.179 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:36:08.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:36:08.180 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:36:08.180 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:36:08.180 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:36:08.182 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:36:08.182 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:36:08.182 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:36:08.182 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:36:08.183 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:36:08.183 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:36:08.183 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:36:08.183 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:36:08.185 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:36:08.185 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:36:08.185 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:36:08.185 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:36:08.185 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:36:08.185 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:36:08.185 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:36:08.185 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:36:08.189 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:36:08.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:36:08.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:36:08.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:36:08.189 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:36:08.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:36:08.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:36:08.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:36:08.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:36:08.189 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:36:08.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:08.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:08.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:08.190 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:36:08.190 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:36:08.190 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:36:08.190 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:36:08.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:08.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:08.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:08.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:36:08.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:08.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:08.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:08.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:08.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:08.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:08.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:08.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:08.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:08.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:08.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:08.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:08.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:08.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:08.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:08.194 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:36:08.670 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:36:08.713 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:36:08.716 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:36:08.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.718 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:36:08.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:08.830 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:36:08.830 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:36:08.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:36:08.830 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:36:08.831 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:36:08.831 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:36:08.831 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:36:08.831 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:36:08.831 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:36:08.832 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:36:08.832 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:36:13.839 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:36:13.839 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:36:13.839 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:36:13.839 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:36:13.839 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:36:13.839 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:36:13.850 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:36:13.853 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:36:13.853 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:36:13.853 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:36:13.853 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:36:13.858 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:36:13.858 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:36:13.858 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:36:13.858 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:36:13.859 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:36:13.859 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:36:13.859 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:36:13.859 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:36:13.863 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:36:13.863 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:36:13.863 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:36:13.863 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:36:13.864 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:36:13.864 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:36:13.864 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:36:13.864 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:36:13.869 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:36:13.869 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:36:13.869 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:36:13.869 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:36:13.869 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:36:13.869 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:36:13.869 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:36:13.869 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:36:13.875 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:36:13.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:36:13.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:36:13.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:36:13.875 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:36:13.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:36:13.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:36:13.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:36:13.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:36:13.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:13.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:13.875 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:36:13.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:13.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:13.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:13.875 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:36:13.875 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:36:13.875 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:36:13.876 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:36:13.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:13.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:13.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:13.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:36:13.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:13.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:13.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:13.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:13.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:13.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:13.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:13.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:13.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:13.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:13.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:13.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:13.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:13.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:13.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:13.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:13.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:13.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:13.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:13.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:13.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:13.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:13.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:13.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:13.880 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:36:14.357 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:36:14.404 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:36:14.406 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:36:14.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:14.407 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:36:14.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:14.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:14.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:14.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:14.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:14.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:14.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:14.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:14.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:14.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:14.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:14.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:14.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:14.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:14.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:14.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:14.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:14.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:14.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:14.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:14.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:14.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:14.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:14.520 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:36:14.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:36:14.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:36:14.521 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:36:14.523 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:36:14.523 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:36:14.523 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:36:14.523 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:36:14.523 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:36:14.524 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:36:14.524 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:36:14.524 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=140 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:36:14.524 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=140 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:36:14.524 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=140 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:36:14.524 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=140 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:36:19.530 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:36:19.530 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:36:19.530 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:36:19.530 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:36:19.530 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:36:19.530 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:36:19.539 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:36:19.539 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:36:19.539 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:36:19.540 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:36:19.540 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:36:19.542 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:36:19.542 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:36:19.543 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:36:19.543 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:36:19.543 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:36:19.543 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:36:19.544 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:36:19.544 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:36:19.545 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:36:19.545 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:36:19.546 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:36:19.546 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:36:19.546 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:36:19.546 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:36:19.546 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:36:19.546 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:36:19.548 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:36:19.548 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:36:19.548 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:36:19.548 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:36:19.548 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:36:19.548 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:36:19.548 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:36:19.548 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:36:19.551 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:36:19.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:36:19.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:36:19.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:36:19.551 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:36:19.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:36:19.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:36:19.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:36:19.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:36:19.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:19.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:19.552 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:36:19.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:19.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:19.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:19.552 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:36:19.552 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:36:19.552 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:36:19.552 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:36:19.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:19.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:19.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:19.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:36:19.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:19.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:19.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:19.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:19.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:19.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:19.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:19.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:19.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:19.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:19.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:19.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:19.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:19.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:19.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:19.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:19.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:19.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:19.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:19.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:19.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:19.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:19.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:19.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:19.556 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:36:20.034 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:36:20.076 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:36:20.079 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:36:20.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:20.081 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:36:20.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:20.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:20.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:20.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:20.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:20.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:20.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:20.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:20.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:20.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:20.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:20.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:20.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:20.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:20.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:20.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:20.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:20.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:20.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:20.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:20.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:20.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:20.187 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:36:20.187 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:36:20.187 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:36:20.187 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:36:20.189 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:36:20.189 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:36:20.189 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:36:20.189 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:36:20.189 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:36:20.189 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:36:20.189 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:36:25.197 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:36:25.197 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:36:25.197 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:36:25.197 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:36:25.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:36:25.197 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:36:25.207 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:36:25.209 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:36:25.210 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:36:25.210 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:36:25.210 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:36:25.216 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:36:25.216 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:36:25.216 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:36:25.216 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:36:25.216 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:36:25.216 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:36:25.217 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:36:25.217 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:36:25.221 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:36:25.221 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:36:25.221 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:36:25.221 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:36:25.221 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:36:25.222 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:36:25.222 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:36:25.222 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:36:25.226 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:36:25.226 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:36:25.226 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:36:25.226 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:36:25.226 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:36:25.226 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:36:25.226 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:36:25.226 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:36:25.232 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:36:25.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:36:25.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:36:25.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:36:25.232 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:36:25.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:36:25.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:36:25.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:36:25.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:36:25.232 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:36:25.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:25.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:25.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:25.233 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:36:25.233 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:36:25.233 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:36:25.233 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:36:25.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:25.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:25.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:25.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:36:25.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:25.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:25.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:25.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:25.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:25.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:25.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:25.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:25.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:25.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:25.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:25.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:25.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:25.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:25.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:25.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:25.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:25.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:25.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:25.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:25.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:25.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:25.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:25.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:25.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:25.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:25.237 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:36:25.715 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:36:25.756 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:36:25.757 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:36:25.758 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:36:25.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:25.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:25.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:36:25.856 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:36:25.856 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:36:25.856 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:36:25.857 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:36:25.857 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:36:25.857 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:36:25.857 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:36:25.857 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:36:25.857 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:36:25.857 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:36:30.875 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:36:30.875 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:36:30.875 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:36:30.875 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:36:30.875 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:36:30.875 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:36:30.883 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:36:30.884 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:36:30.884 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:36:30.884 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:36:30.884 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:36:30.886 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:36:30.887 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:36:30.887 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:36:30.887 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:36:30.887 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:36:30.887 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:36:30.887 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:36:30.887 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:36:30.889 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:36:30.889 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:36:30.889 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:36:30.889 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:36:30.889 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:36:30.889 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:36:30.889 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:36:30.889 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:36:30.891 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:36:30.891 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:36:30.891 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:36:30.891 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:36:30.891 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:36:30.891 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:36:30.891 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:36:30.891 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:36:30.894 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:36:30.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:36:30.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:36:30.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:36:30.894 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:36:30.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:36:30.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:36:30.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:36:30.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:36:30.894 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:36:30.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:30.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:30.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:30.894 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:36:30.894 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:36:30.894 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:36:30.894 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:36:30.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:30.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:30.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:30.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:36:30.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:30.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:30.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:30.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:30.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:30.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:30.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:30.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:30.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:30.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:30.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:30.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:30.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:30.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:30.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:30.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:30.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:30.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:30.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:30.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:30.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:30.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:30.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:30.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:30.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:30.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:30.899 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:36:31.377 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:36:31.410 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:36:31.411 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:36:31.412 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:36:31.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:31.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:31.531 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:36:31.531 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:36:31.531 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:36:31.531 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:36:31.532 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:36:31.532 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:36:31.533 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:36:31.533 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:36:31.533 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:36:31.533 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:36:31.533 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:36:36.542 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:36:36.542 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:36:36.542 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:36:36.542 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:36:36.542 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:36:36.542 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:36:36.550 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:36:36.552 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:36:36.552 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:36:36.552 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:36:36.552 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:36:36.556 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:36:36.556 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:36:36.556 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:36:36.556 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:36:36.557 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:36:36.557 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:36:36.557 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:36:36.557 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:36:36.559 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:36:36.559 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:36:36.560 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:36:36.560 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:36:36.560 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:36:36.560 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:36:36.560 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:36:36.560 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:36:36.562 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:36:36.562 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:36:36.562 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:36:36.562 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:36:36.562 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:36:36.562 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:36:36.563 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:36:36.563 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:36:36.566 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:36:36.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:36:36.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:36:36.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:36:36.566 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:36:36.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:36:36.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:36:36.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:36:36.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:36:36.566 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:36:36.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:36.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:36.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:36.566 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:36:36.566 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:36:36.566 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:36:36.567 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:36:36.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:36.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:36.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:36.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:36:36.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:36.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:36.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:36.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:36.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:36.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:36.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:36.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:36.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:36.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:36.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:36.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:36.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:36.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:36.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:36.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:36.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:36.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:36.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:36.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:36.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:36.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:36.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:36.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:36.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:36.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:36.571 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:36:37.048 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:36:37.089 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:36:37.090 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:36:37.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:37.091 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:36:37.093 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:36:37.093 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:36:37.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:36:37.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:36:37.093 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:36:37.093 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:36:37.093 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:36:37.093 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:36:37.519 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:36:37.571 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:36:37.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:36:37.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:36:37.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:36:37.991 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:36:38.465 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:36:38.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:36:38.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:36:38.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:36:38.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:36:38.937 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:36:39.409 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:36:39.573 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:36:39.574 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:36:39.574 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:36:39.574 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:36:39.883 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:36:40.355 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:36:40.558 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:36:40.558 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:36:40.561 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:36:40.561 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:36:40.561 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:36:40.561 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:36:40.562 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:36:40.562 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:36:40.562 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:36:40.562 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:36:40.562 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:36:40.562 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:36:40.562 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:36:45.571 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:36:45.571 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:36:45.571 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:36:45.571 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:36:45.571 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:36:45.571 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:36:45.579 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:36:45.581 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:36:45.581 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:36:45.581 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:36:45.581 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:36:45.584 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:36:45.584 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:36:45.584 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:36:45.585 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:36:45.585 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:36:45.585 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:36:45.585 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:36:45.585 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:36:45.587 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:36:45.587 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:36:45.588 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:36:45.588 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:36:45.588 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:36:45.588 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:36:45.588 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:36:45.588 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:36:45.590 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:36:45.590 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:36:45.590 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:36:45.590 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:36:45.590 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:36:45.590 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:36:45.590 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:36:45.590 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:36:45.594 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:36:45.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:36:45.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:36:45.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:36:45.594 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:36:45.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:36:45.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:36:45.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:36:45.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:36:45.594 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:36:45.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:45.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:45.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:45.594 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:36:45.594 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:36:45.594 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:36:45.594 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:36:45.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:45.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:45.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:45.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:36:45.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:45.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:45.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:45.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:45.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:45.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:45.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:45.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:45.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:45.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:45.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:45.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:45.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:45.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:45.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:45.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:45.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:45.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:45.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:45.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:45.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:45.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:45.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:45.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:45.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:45.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:45.599 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:36:46.076 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:36:46.115 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:36:46.116 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:36:46.117 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:36:46.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:46.131 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:36:46.131 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:36:46.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:36:46.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:36:46.134 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:36:46.134 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:36:46.134 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:36:46.134 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:36:46.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:36:46.172 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:36:46.173 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:36:46.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:36:46.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:36:46.549 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:36:46.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:36:46.597 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:36:46.597 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:36:46.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:36:46.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:36:46.670 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:36:46.670 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:36:46.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:36:46.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:36:46.671 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:36:46.671 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:36:46.671 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:36:46.671 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:36:46.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:46.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:36:46.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:36:46.697 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:36:46.697 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:36:46.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:36:46.698 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:36:46.699 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:36:46.699 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:36:46.699 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:36:46.699 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:36:46.699 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:36:46.699 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:36:46.699 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:36:51.705 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:36:51.705 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:36:51.705 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:36:51.705 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:36:51.705 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:36:51.705 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:36:51.715 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:36:51.717 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:36:51.718 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:36:51.718 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:36:51.718 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:36:51.724 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:36:51.724 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:36:51.725 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:36:51.725 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:36:51.725 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:36:51.726 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:36:51.726 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:36:51.726 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:36:51.729 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:36:51.729 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:36:51.730 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:36:51.730 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:36:51.730 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:36:51.730 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:36:51.731 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:36:51.731 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:36:51.734 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:36:51.734 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:36:51.734 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:36:51.734 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:36:51.734 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:36:51.734 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:36:51.734 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:36:51.734 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:36:51.740 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:36:51.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:36:51.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:36:51.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:36:51.740 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:36:51.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:36:51.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:36:51.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:36:51.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:36:51.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:51.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:51.741 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:36:51.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:51.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:51.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:51.741 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:36:51.741 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:36:51.741 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:36:51.741 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:36:51.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:51.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:51.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:51.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:36:51.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:51.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:51.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:51.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:51.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:51.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:51.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:51.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:51.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:51.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:51.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:51.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:51.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:51.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:51.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:51.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:51.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:51.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:36:51.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:36:51.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:51.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:51.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:36:51.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:51.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:36:51.746 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:36:52.224 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:36:52.269 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:36:52.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:52.273 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:36:52.275 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:36:52.292 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:36:52.292 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:36:52.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:36:52.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:36:52.294 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:36:52.294 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:36:52.294 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:36:52.294 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:36:52.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:36:52.326 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:36:52.326 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:36:52.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:36:52.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:36:52.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:36:52.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:36:52.440 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:36:52.440 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:36:52.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:36:52.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:36:52.441 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:36:52.441 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:36:52.441 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:36:52.441 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:36:52.694 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:36:52.746 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:36:52.746 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:36:52.746 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:36:52.747 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:36:53.168 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:36:53.640 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:36:53.748 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:36:53.748 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:36:53.748 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:36:53.748 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:36:54.111 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:36:54.584 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:36:54.749 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:36:54.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:36:54.750 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:36:54.750 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:36:55.057 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:36:55.530 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:36:55.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:36:55.751 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:36:55.751 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:36:55.751 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:36:56.000 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:36:56.474 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:36:56.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:36:56.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:36:56.752 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:36:56.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:36:56.946 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:36:57.419 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:36:57.892 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:36:58.365 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:36:58.837 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:36:59.310 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:36:59.783 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:37:00.256 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:37:00.728 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:37:01.202 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:37:01.674 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:37:02.145 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:37:02.616 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:37:03.089 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:37:03.562 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:37:04.034 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:37:04.507 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:37:04.980 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:37:05.453 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:37:05.923 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:37:06.396 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:37:06.870 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:37:07.342 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 04:37:07.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:37:07.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:37:07.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:37:07.638 [WARNING] transceiver.py:257 (MS@172.18.152.22:6700) RX TRXD message (fn=3432 tn=4 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:37:07.638 [WARNING] transceiver.py:257 (MS@172.18.152.22:6700) RX TRXD message (fn=3432 tn=5 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:37:07.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:37:07.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:37:07.646 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:37:07.646 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:37:07.646 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:37:07.646 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:37:07.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:37:07.669 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:37:07.669 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:37:07.676 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:37:07.677 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:37:07.677 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:37:07.677 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:37:07.681 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:37:07.681 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:37:07.681 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:37:07.681 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:37:07.681 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:37:07.681 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:37:07.681 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:37:07.681 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3441 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:37:07.681 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3441 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:37:07.681 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3441 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:37:07.681 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3441 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:37:07.681 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3441 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:37:07.681 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3441 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:37:12.684 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:37:12.684 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:37:12.684 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:37:12.684 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:37:12.684 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:37:12.684 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:37:12.699 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:37:12.700 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:37:12.701 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:37:12.701 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:37:12.701 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:37:12.708 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:37:12.708 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:37:12.708 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:37:12.708 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:37:12.709 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:37:12.709 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:37:12.710 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:37:12.710 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:37:12.713 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:37:12.713 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:37:12.713 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:37:12.713 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:37:12.714 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:37:12.714 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:37:12.715 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:37:12.715 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:37:12.717 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:37:12.717 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:37:12.718 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:37:12.718 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:37:12.718 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:37:12.718 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:37:12.718 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:37:12.718 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:37:12.724 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:37:12.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:37:12.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:37:12.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:37:12.724 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:37:12.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:37:12.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:37:12.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:37:12.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:37:12.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:37:12.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:37:12.724 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:37:12.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:37:12.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:37:12.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:37:12.725 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:37:12.725 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:37:12.725 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:37:12.725 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:37:12.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:37:12.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:37:12.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:37:12.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:37:12.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:37:12.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:37:12.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:37:12.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:37:12.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:37:12.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:37:12.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:37:12.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:37:12.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:37:12.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:37:12.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:37:12.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:37:12.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:37:12.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:37:12.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:37:12.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:37:12.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:37:12.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:37:12.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:37:12.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:37:12.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:37:12.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:37:12.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:37:12.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:37:12.729 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:37:13.206 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:37:13.250 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:37:13.252 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:37:13.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:37:13.253 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:37:13.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:37:13.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:37:13.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:37:13.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:37:13.273 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:37:13.273 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:37:13.274 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:37:13.274 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:37:13.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:37:13.309 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:37:13.310 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:37:13.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:37:13.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:37:13.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:37:13.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:37:13.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:37:13.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:37:13.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:37:13.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:37:13.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:37:13.603 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:37:13.603 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:37:13.603 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:37:13.603 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:37:13.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:37:13.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:37:13.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:37:13.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:37:13.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:37:13.638 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:37:13.638 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:37:13.640 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:37:13.640 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:37:13.640 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:37:13.640 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:37:13.640 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:37:13.640 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:37:13.640 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:37:18.646 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:37:18.646 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:37:18.646 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:37:18.646 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:37:18.646 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:37:18.646 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:37:18.654 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:37:18.655 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:37:18.655 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:37:18.656 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:37:18.656 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:37:18.659 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:37:18.660 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:37:18.660 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:37:18.660 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:37:18.661 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:37:18.661 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:37:18.661 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:37:18.661 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:37:18.663 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:37:18.663 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:37:18.664 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:37:18.664 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:37:18.664 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:37:18.664 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:37:18.664 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:37:18.664 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:37:18.666 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:37:18.667 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:37:18.667 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:37:18.667 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:37:18.667 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:37:18.667 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:37:18.667 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:37:18.667 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:37:18.671 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:37:18.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:37:18.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:37:18.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:37:18.671 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:37:18.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:37:18.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:37:18.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:37:18.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:37:18.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:37:18.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:37:18.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:37:18.672 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:37:18.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:37:18.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:37:18.672 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:37:18.672 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:37:18.672 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:37:18.672 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:37:18.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:37:18.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:37:18.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:37:18.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:37:18.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:37:18.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:37:18.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:37:18.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:37:18.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:37:18.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:37:18.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:37:18.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:37:18.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:37:18.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:37:18.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:37:18.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:37:18.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:37:18.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:37:18.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:37:18.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:37:18.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:37:18.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:37:18.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:37:18.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:37:18.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:37:18.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:37:18.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:37:18.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:37:18.677 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:37:19.155 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:37:19.200 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:37:19.202 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:37:19.203 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:37:19.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:37:19.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:37:19.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:37:19.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:37:19.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:37:19.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:37:19.227 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:37:19.227 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:37:19.227 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:37:19.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:37:19.257 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:37:19.257 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:37:19.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:37:19.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:37:19.628 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:37:19.676 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:37:19.676 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:37:19.676 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:37:19.676 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:37:20.099 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:37:20.572 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:37:20.677 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:37:20.677 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:37:20.678 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:37:20.678 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:37:21.045 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:37:21.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:37:21.269 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:37:21.269 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:37:21.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:37:21.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:37:21.288 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:37:21.288 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:37:21.289 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:37:21.289 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:37:21.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:37:21.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:37:21.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:37:21.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:37:21.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:37:21.334 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:37:21.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:37:21.335 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:37:21.335 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:37:21.335 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:37:21.335 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:37:21.335 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:37:21.335 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:37:21.335 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:37:26.349 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:37:26.349 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:37:26.349 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:37:26.349 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:37:26.349 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:37:26.349 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:37:26.357 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:37:26.358 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:37:26.358 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:37:26.358 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:37:26.358 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:37:26.360 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:37:26.360 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:37:26.360 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:37:26.360 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:37:26.361 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:37:26.361 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:37:26.361 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:37:26.361 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:37:26.362 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:37:26.362 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:37:26.363 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:37:26.363 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:37:26.363 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:37:26.363 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:37:26.363 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:37:26.363 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:37:26.364 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:37:26.364 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:37:26.364 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:37:26.364 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:37:26.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:37:26.364 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:37:26.364 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:37:26.364 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:37:26.367 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:37:26.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:37:26.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:37:26.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:37:26.367 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:37:26.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:37:26.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:37:26.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:37:26.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:37:26.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:37:26.367 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:37:26.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:37:26.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:37:26.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:37:26.367 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:37:26.367 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:37:26.367 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:37:26.367 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:37:26.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:37:26.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:37:26.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:37:26.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:37:26.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:37:26.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:37:26.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:37:26.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:37:26.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:37:26.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:37:26.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:37:26.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:37:26.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:37:26.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:37:26.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:37:26.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:37:26.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:37:26.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:37:26.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:37:26.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:37:26.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:37:26.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:37:26.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:37:26.369 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:37:26.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:37:26.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:37:26.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:37:26.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:37:26.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:37:26.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:37:26.369 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:37:26.369 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:37:26.369 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:37:26.369 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:37:26.369 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:37:26.369 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:37:31.373 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:37:31.373 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:37:31.373 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:37:31.373 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:37:31.373 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:37:31.373 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:37:31.377 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:37:31.377 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:37:31.377 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:37:31.378 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:37:31.378 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:37:31.379 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:37:31.379 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:37:31.379 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:37:31.379 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:37:31.379 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:37:31.379 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:37:31.379 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:37:31.379 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:37:31.380 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:37:31.380 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:37:31.380 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:37:31.380 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:37:31.380 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:37:31.380 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:37:31.380 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:37:31.380 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:37:31.382 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:37:31.382 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:37:31.382 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:37:31.382 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:37:31.382 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:37:31.382 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:37:31.382 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:37:31.382 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:37:31.384 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:37:31.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:37:31.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:37:31.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:37:31.384 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:37:31.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:37:31.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:37:31.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:37:31.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:37:31.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:37:31.384 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:37:31.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:37:31.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:37:31.385 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:37:31.385 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:37:31.385 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:37:31.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:37:31.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:37:31.385 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:37:31.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:37:31.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:37:31.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:37:31.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:37:31.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:37:31.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:37:31.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:37:31.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:37:31.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:37:31.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:37:31.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:37:31.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:37:31.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:37:31.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:37:31.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:37:31.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:37:31.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:37:31.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:37:31.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:37:31.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:37:31.386 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:37:31.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:37:31.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:37:31.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:37:31.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:37:31.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:37:31.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:37:31.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:37:31.386 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:37:31.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:37:31.386 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:37:31.386 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:37:31.386 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:37:31.386 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:37:31.386 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:37:36.001 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.152.20:5700'
2026-02-08 04:37:36.001 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.152.20:5802)
2026-02-08 04:37:36.001 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.152.20:5801)
2026-02-08 04:37:36.001 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.152.22:6700'
2026-02-08 04:37:36.001 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.152.22:6802)
2026-02-08 04:37:36.001 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.152.22:6801)
2026-02-08 04:37:36.001 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.152.20:5700/1'
2026-02-08 04:37:36.001 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.152.20:5804)
2026-02-08 04:37:36.001 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.152.20:5803)
2026-02-08 04:37:36.001 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.152.20:5700/2'
2026-02-08 04:37:36.001 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.152.20:5806)
2026-02-08 04:37:36.001 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.152.20:5805)
2026-02-08 04:37:36.001 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.152.20:5700/3'
2026-02-08 04:37:36.001 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.152.20:5808)
2026-02-08 04:37:36.001 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.152.20:5807)
2026-02-08 04:37:36.001 [INFO] fake_trx.py:429 Init complete
2026-02-08 04:37:36.001 [INFO] fake_trx.py:460 Setting real time process scheduler to SCHED_RR, priority 30
2026-02-08 04:37:36.520 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:37:36.520 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:37:36.520 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:37:36.520 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:37:36.520 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:37:36.520 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:37:53.598 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:37:53.598 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:37:53.599 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:37:53.599 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:37:53.599 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:37:53.599 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:37:58.644 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:37:58.644 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:37:58.644 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:37:58.644 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:37:58.644 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:37:58.645 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:38:03.678 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:38:03.679 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:38:03.679 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:38:03.679 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:38:03.679 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:38:03.679 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:38:08.707 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:38:08.707 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:38:08.707 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:38:08.707 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:38:08.707 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:38:08.707 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:38:13.748 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:38:13.748 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:38:13.748 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:38:13.748 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:38:13.748 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:38:13.748 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:38:18.781 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:38:18.781 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:38:18.781 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:38:18.781 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:38:18.781 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:38:18.781 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:38:23.804 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:38:23.804 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:38:23.804 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:38:23.804 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:38:23.804 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:38:23.804 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:38:28.827 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:38:28.827 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:38:28.827 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:38:28.827 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:38:28.827 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:38:28.827 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:38:33.851 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:38:33.851 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:38:33.851 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:38:33.851 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:38:33.851 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:38:33.851 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:38:38.874 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:38:38.874 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:38:38.875 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:38:38.875 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:38:38.875 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:38:38.875 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:38:38.884 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:38:38.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:38:38.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:38:38.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:38:38.884 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:38:38.884 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:38:38.884 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:38:38.884 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:38:38.884 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:38:38.884 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:38:38.884 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:38:38.884 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:38:38.885 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:38:38.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:38:38.885 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:38:38.885 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 0 -> 1
2026-02-08 04:38:38.885 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:38:38.885 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 0 -> 1
2026-02-08 04:38:38.885 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:38:38.885 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:38:38.885 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 0 -> 1
2026-02-08 04:38:38.885 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:38:38.885 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 0 -> 1
2026-02-08 04:38:43.901 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:38:43.901 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:38:43.901 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:38:43.901 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:38:43.901 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:38:43.901 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:38:48.925 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:38:48.925 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:38:48.925 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:38:48.925 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:38:48.925 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:38:48.925 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:38:48.925 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:38:48.925 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:38:48.925 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:38:48.925 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:38:53.954 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:38:53.954 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:38:53.954 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:38:53.955 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:38:53.955 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:38:53.955 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:38:58.986 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:38:58.986 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:38:58.986 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:38:58.986 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:38:58.986 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:38:58.986 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:39:04.009 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:39:04.009 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:39:04.009 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:39:04.009 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:39:04.009 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:39:04.009 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:39:09.054 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:39:09.054 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:39:09.054 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:39:09.054 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:39:09.054 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:39:09.054 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:39:15.281 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.152.20:5700'
2026-02-08 04:39:15.281 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.152.20:5802)
2026-02-08 04:39:15.281 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.152.20:5801)
2026-02-08 04:39:15.281 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.152.22:6700'
2026-02-08 04:39:15.281 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.152.22:6802)
2026-02-08 04:39:15.281 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.152.22:6801)
2026-02-08 04:39:15.281 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.152.20:5700/1'
2026-02-08 04:39:15.281 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.152.20:5804)
2026-02-08 04:39:15.281 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.152.20:5803)
2026-02-08 04:39:15.281 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.152.20:5700/2'
2026-02-08 04:39:15.281 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.152.20:5806)
2026-02-08 04:39:15.281 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.152.20:5805)
2026-02-08 04:39:15.281 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.152.20:5700/3'
2026-02-08 04:39:15.281 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.152.20:5808)
2026-02-08 04:39:15.281 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.152.20:5807)
2026-02-08 04:39:15.281 [INFO] fake_trx.py:429 Init complete
2026-02-08 04:39:15.281 [INFO] fake_trx.py:460 Setting real time process scheduler to SCHED_RR, priority 30
2026-02-08 04:39:15.843 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:39:15.843 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:39:15.844 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:39:15.844 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:39:15.844 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:39:15.844 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:39:19.852 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:39:19.854 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:39:19.854 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:39:19.854 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:39:19.854 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 0 -> 1
2026-02-08 04:39:19.860 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:39:19.860 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:39:19.861 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:39:19.861 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:39:19.861 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:39:19.861 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:39:19.861 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:39:19.861 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 0 -> 1
2026-02-08 04:39:19.867 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:39:19.867 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:39:19.867 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:39:19.867 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:39:19.867 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:39:19.867 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:39:19.868 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:39:19.868 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 0 -> 1
2026-02-08 04:39:19.873 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:39:19.873 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:39:19.873 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:39:19.873 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:39:19.873 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:39:19.873 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:39:19.873 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:39:19.873 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 0 -> 1
2026-02-08 04:39:19.878 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:39:19.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:39:19.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:39:19.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:39:19.878 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:39:19.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:39:19.879 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:39:19.879 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:39:19.879 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:39:19.879 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:39:19.879 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:39:19.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:39:19.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:39:19.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:19.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:19.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:39:19.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:19.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:19.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:19.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:19.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:19.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:19.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:19.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:19.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:19.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:19.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:39:19.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:19.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:19.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:19.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:19.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:19.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:19.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:19.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:19.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:19.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:19.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:19.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:19.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:19.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:19.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:19.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:19.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:19.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:19.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:19.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:19.884 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:39:20.362 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:39:20.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:20.422 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:39:20.425 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:39:20.426 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:39:20.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:20.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:20.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:39:20.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:20.452 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:39:20.452 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:39:20.453 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:39:20.453 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:39:20.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:20.635 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:39:20.635 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:39:20.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:20.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:20.835 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:39:20.885 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:39:20.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:39:20.886 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:39:20.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:39:21.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:21.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:21.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:21.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:21.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:21.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:21.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:39:21.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:21.049 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:39:21.049 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:39:21.049 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:39:21.049 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:39:21.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:21.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:39:21.134 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:39:21.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:21.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:21.306 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:39:21.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:21.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:21.529 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:21.529 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:21.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:21.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:21.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:39:21.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:21.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:39:21.542 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:39:21.542 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:39:21.542 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:39:21.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:21.779 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:39:21.812 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:39:21.812 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:39:21.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:21.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:21.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:39:21.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:39:21.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:39:21.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:39:22.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:22.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:22.217 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:22.217 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:22.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:22.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:22.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:39:22.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:22.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:39:22.227 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:39:22.227 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:39:22.227 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:39:22.251 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:39:22.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:22.315 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:39:22.316 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:39:22.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:22.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:22.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:22.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:22.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:22.711 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:22.724 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:39:22.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:22.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:22.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:39:22.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:22.732 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:39:22.732 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:39:22.732 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:39:22.732 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:39:22.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:22.888 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:39:22.888 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:39:22.889 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:39:22.889 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:39:22.994 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:39:22.994 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:39:22.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:22.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:23.195 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:39:23.668 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:39:23.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:23.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:23.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:23.731 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:23.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:23.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:23.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:39:23.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:23.750 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:39:23.750 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:39:23.750 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:39:23.750 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:39:23.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:23.890 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:39:23.890 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:39:23.890 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:39:23.890 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:39:23.938 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:39:23.938 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-02-08 04:39:23.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:23.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:24.141 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:39:24.614 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:39:24.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:24.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:24.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:24.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:24.757 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:39:24.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:24.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:24.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:39:24.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:24.777 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:39:24.777 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:39:24.777 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:39:24.777 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:39:24.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:24.884 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:39:24.884 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-02-08 04:39:24.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:24.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:25.087 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:39:25.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:25.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:25.299 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:25.299 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:25.299 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:39:25.317 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:25.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:25.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:39:25.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:25.318 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:39:25.318 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:39:25.319 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:39:25.319 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:39:25.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:25.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:25.557 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:39:25.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:39:25.590 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:39:25.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:25.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:26.030 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:39:26.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:26.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:26.324 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:26.324 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:26.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:26.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:26.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:39:26.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:26.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:39:26.340 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:39:26.340 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:39:26.340 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:39:26.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:26.502 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:39:26.538 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:39:26.538 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:39:26.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:26.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:26.974 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:39:27.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:27.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:27.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:27.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:27.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:27.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:27.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:39:27.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:27.364 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:39:27.364 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:39:27.364 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:39:27.364 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:39:27.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:27.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:27.446 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:39:27.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:39:27.480 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:39:27.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:27.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:27.920 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:39:28.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:28.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:28.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:28.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:28.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:28.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:28.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:39:28.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:28.259 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:39:28.259 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:39:28.259 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:39:28.259 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:39:28.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:28.392 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:39:28.427 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:39:28.427 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 04:39:28.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:28.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:28.865 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:39:29.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:29.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:29.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:29.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:29.209 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:39:29.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:29.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:29.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:39:29.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:29.228 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:39:29.228 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:39:29.228 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:39:29.228 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:39:29.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:29.335 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:39:29.368 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:39:29.369 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 04:39:29.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:29.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:29.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:29.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:29.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:29.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:29.750 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:39:29.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:29.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:29.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:39:29.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:29.770 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:39:29.770 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:39:29.770 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:39:29.770 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:39:29.807 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:39:29.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:29.867 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:39:29.867 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:39:29.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:29.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:29.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:29.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:29.964 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:29.964 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:29.964 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:39:29.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:29.974 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:29.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:39:29.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:29.975 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:39:29.975 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:39:29.975 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:39:29.975 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:39:30.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:30.075 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:39:30.075 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:39:30.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:30.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:30.278 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:39:30.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:30.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:30.458 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:30.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:30.458 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:39:30.474 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:30.474 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:30.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:39:30.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:30.476 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:39:30.476 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:39:30.476 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:39:30.476 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:39:30.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:30.578 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:39:30.578 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:39:30.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:30.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:30.750 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:39:30.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:30.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:30.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:30.946 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:30.946 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:39:30.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:30.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:30.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:39:30.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:30.956 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:39:30.956 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:39:30.956 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:39:30.956 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:39:31.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:31.049 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:39:31.049 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:39:31.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:31.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:31.222 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:39:31.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:31.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:31.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:31.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:31.436 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:39:31.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:31.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:31.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:39:31.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:31.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:39:31.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:39:31.447 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:39:31.447 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:39:31.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:31.519 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:39:31.520 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:39:31.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:31.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:31.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:31.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:31.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:31.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:31.615 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:39:31.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:31.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:31.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:39:31.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:31.633 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:39:31.633 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:39:31.633 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:39:31.633 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:39:31.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:31.695 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:39:31.728 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:39:31.728 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:39:31.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:31.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:32.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:32.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:32.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:32.105 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:32.106 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:39:32.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:32.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:32.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:39:32.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:32.126 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:39:32.127 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:39:32.127 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:39:32.127 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:39:32.168 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:39:32.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:32.232 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:39:32.232 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:39:32.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:32.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:32.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:32.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:32.600 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:32.600 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:32.600 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:39:32.619 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:32.619 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:32.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:39:32.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:32.621 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:39:32.621 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:39:32.621 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:39:32.621 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:39:32.640 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:39:32.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:32.704 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:39:32.704 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:39:32.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:32.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:33.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:39:33.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:33.089 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:33.089 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:33.089 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:39:33.104 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:39:33.105 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:39:33.105 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:39:33.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:39:33.111 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:39:33.111 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:39:33.112 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:39:33.112 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:39:33.112 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:39:33.112 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:39:33.112 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:39:33.112 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:39:33.113 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:33.113 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:33.113 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:33.113 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:33.113 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2857 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:33.113 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2857 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:33.113 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2857 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:33.113 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2857 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:33.114 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2857 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:33.114 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2857 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:33.114 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2857 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:33.114 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2857 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:33.114 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2858 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:33.114 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2858 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:33.114 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2858 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:33.114 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2858 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:33.114 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2858 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:33.114 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2858 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:33.114 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2858 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:33.115 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2858 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:38.113 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:39:38.113 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:39:38.113 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:39:38.113 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:39:38.113 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:39:38.113 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:39:38.122 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:39:38.124 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:39:38.124 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:39:38.124 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:39:38.124 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:39:38.129 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:39:38.130 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:39:38.130 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:39:38.130 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:39:38.130 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:39:38.130 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:39:38.130 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:39:38.130 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:39:38.135 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:39:38.135 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:39:38.135 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:39:38.135 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:39:38.135 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:39:38.135 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:39:38.135 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:39:38.135 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:39:38.139 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:39:38.139 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:39:38.139 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:39:38.139 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:39:38.139 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:39:38.139 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:39:38.139 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:39:38.139 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:39:38.143 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:39:38.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:39:38.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:39:38.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:39:38.143 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:39:38.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:39:38.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:39:38.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:39:38.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:39:38.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:38.144 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:39:38.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:38.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:38.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:38.144 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:39:38.144 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:39:38.144 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:39:38.144 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:39:38.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:38.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:38.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:38.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:39:38.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:38.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:38.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:38.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:38.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:38.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:38.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:38.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:38.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:38.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:38.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:38.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:38.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:38.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:38.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:38.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:38.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:38.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:38.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:38.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:38.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:38.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:38.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:38.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:38.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:38.148 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:39:38.627 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:39:38.666 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:39:38.667 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:39:38.669 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:39:38.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.689 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:38.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:38.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:39:38.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:38.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.093 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:39:39.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.146 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:39:39.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.146 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:39:39.146 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:39:39.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:39:39.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:39.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
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2026-02-08 04:39:39.557 [DEBUG] clck_gen.py:113 IND CLOCK 306
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2026-02-08 04:39:40.022 [DEBUG] clck_gen.py:113 IND CLOCK 408
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2026-02-08 04:39:40.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
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2026-02-08 04:39:40.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:39:40.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:39:40.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:39:40.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:39:40.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
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2026-02-08 04:39:40.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
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2026-02-08 04:39:40.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
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2026-02-08 04:39:40.486 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:39:40.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
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2026-02-08 04:39:40.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:40.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:39:40.790 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:39:40.790 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:39:40.790 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:39:40.792 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:39:40.792 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:39:40.792 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:39:40.792 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:39:40.792 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:39:40.793 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:39:40.793 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:39:40.793 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=579 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:40.793 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=579 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:40.793 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=579 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:40.793 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=579 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:40.793 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=579 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:40.793 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=579 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:45.797 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:39:45.797 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:39:45.797 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:39:45.797 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:39:45.797 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:39:45.797 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:39:45.807 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:39:45.808 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:39:45.808 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:39:45.808 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:39:45.808 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:39:45.811 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:39:45.812 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:39:45.812 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:39:45.812 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:39:45.812 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:39:45.812 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:39:45.812 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:39:45.812 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:39:45.815 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:39:45.815 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:39:45.815 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:39:45.815 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:39:45.815 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:39:45.815 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:39:45.815 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:39:45.815 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:39:45.817 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:39:45.817 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:39:45.817 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:39:45.817 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:39:45.817 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:39:45.817 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:39:45.817 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:39:45.817 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:39:45.820 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:39:45.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:39:45.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:39:45.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:39:45.820 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:39:45.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:39:45.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:39:45.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:39:45.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:39:45.820 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:39:45.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:45.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:45.821 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:39:45.821 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:39:45.821 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:39:45.821 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:39:45.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:45.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:45.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:45.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:39:45.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:45.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:45.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:45.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:45.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:45.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:45.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:45.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:45.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:45.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:45.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:45.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:45.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:45.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:45.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:45.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:45.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:45.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:45.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:45.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:45.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:45.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:45.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:45.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:45.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:45.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:45.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:45.825 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:39:46.302 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:39:46.349 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:39:46.353 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:39:46.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:46.356 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:39:46.378 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:46.378 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:46.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:39:46.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:46.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:46.422 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:39:46.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:39:46.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:39:46.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:39:46.424 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:39:46.424 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:39:46.424 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:39:46.424 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:39:46.424 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:39:46.424 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:39:46.424 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:39:46.424 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=130 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:46.424 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=130 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:46.424 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=130 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:46.425 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=130 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:46.425 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=130 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:46.425 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=130 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:51.430 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:39:51.430 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:39:51.430 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:39:51.430 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:39:51.430 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:39:51.430 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:39:51.439 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:39:51.440 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:39:51.440 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:39:51.441 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:39:51.441 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:39:51.445 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:39:51.446 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:39:51.446 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:39:51.446 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:39:51.446 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:39:51.446 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:39:51.446 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:39:51.446 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:39:51.451 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:39:51.451 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:39:51.451 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:39:51.451 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:39:51.452 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:39:51.452 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:39:51.452 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:39:51.452 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:39:51.456 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:39:51.456 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:39:51.456 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:39:51.456 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:39:51.456 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:39:51.456 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:39:51.456 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:39:51.456 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:39:51.461 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:39:51.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:39:51.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:39:51.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:39:51.461 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:39:51.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:39:51.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:39:51.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:39:51.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:39:51.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:51.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:51.461 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:39:51.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:51.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:51.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:51.462 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:39:51.462 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:39:51.462 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:39:51.462 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:39:51.462 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:51.462 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:51.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:51.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:39:51.462 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:51.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:51.462 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:51.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:51.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:51.462 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:51.462 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:51.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:51.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:51.462 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:51.462 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:51.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:51.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:51.462 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:51.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:51.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:51.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:51.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:51.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:51.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:51.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:51.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:51.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:51.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:51.466 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:39:51.945 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:39:51.987 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:39:51.989 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:39:51.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:51.991 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:39:52.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:52.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:52.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:39:52.047 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:39:52.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:39:52.048 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:39:52.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:39:52.050 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:39:52.050 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:39:52.050 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:39:52.050 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:39:52.050 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:39:52.050 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:39:52.050 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:39:52.050 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:52.050 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:52.050 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:52.050 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:52.050 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:52.050 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:52.050 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:52.050 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:52.050 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:52.050 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:52.050 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:52.050 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:52.050 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:57.056 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:39:57.057 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:39:57.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:39:57.057 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:39:57.057 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:39:57.057 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:39:57.064 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:39:57.064 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:39:57.064 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:39:57.064 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:39:57.064 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:39:57.067 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:39:57.067 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:39:57.067 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:39:57.067 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:39:57.067 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:39:57.068 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:39:57.068 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:39:57.068 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:39:57.070 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:39:57.070 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:39:57.070 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:39:57.070 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:39:57.071 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:39:57.071 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:39:57.071 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:39:57.071 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:39:57.073 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:39:57.073 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:39:57.073 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:39:57.073 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:39:57.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:39:57.074 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:39:57.074 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:39:57.074 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:39:57.077 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:39:57.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:39:57.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:39:57.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:39:57.077 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:39:57.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:39:57.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:39:57.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:39:57.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:39:57.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:57.078 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:39:57.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:57.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:57.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:57.078 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:39:57.078 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:39:57.078 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:39:57.078 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:39:57.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:57.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:57.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:57.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:39:57.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:57.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:57.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:57.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:57.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:57.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:57.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:57.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:57.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:57.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:57.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:57.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:57.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:57.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:57.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:57.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:57.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:57.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:39:57.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:57.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:57.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:57.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:57.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:39:57.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:39:57.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:39:57.082 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:39:57.560 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:39:57.606 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:39:57.608 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:39:57.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:39:57.611 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:39:57.629 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:57.629 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:57.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:39:57.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:57.677 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:57.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:39:57.686 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:57.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:57.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:39:57.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:57.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:57.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:39:57.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:57.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:57.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:39:57.707 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:57.707 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:57.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:39:57.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:57.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:57.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:39:57.722 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:57.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:57.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:39:57.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:57.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:57.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:39:57.736 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:57.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:57.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:39:57.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:57.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:57.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:39:57.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:57.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:57.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:39:57.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:39:57.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:39:57.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:39:57.762 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:39:57.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:39:57.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:39:57.762 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:39:57.765 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:39:57.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:39:57.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:39:57.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:39:57.765 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:39:57.765 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:39:57.765 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:39:57.765 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=148 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:57.765 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=148 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:57.765 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=148 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:57.765 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=148 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:57.765 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=148 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:39:57.765 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=148 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:40:02.772 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:40:02.772 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:40:02.772 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:40:02.772 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:40:02.772 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:40:02.772 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:40:02.779 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:40:02.780 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:40:02.780 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:40:02.780 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:40:02.780 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:40:02.783 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:40:02.783 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:40:02.783 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:40:02.783 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:40:02.783 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:40:02.783 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:40:02.783 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:40:02.783 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:40:02.787 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:40:02.787 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:40:02.787 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:40:02.787 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:40:02.787 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:40:02.787 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:40:02.787 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:40:02.787 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:40:02.790 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:40:02.790 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:40:02.791 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:40:02.791 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:40:02.791 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:40:02.791 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:40:02.791 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:40:02.791 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:40:02.795 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:40:02.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:40:02.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:40:02.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:40:02.795 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:40:02.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:40:02.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:40:02.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:40:02.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:40:02.796 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:40:02.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:40:02.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:40:02.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:40:02.796 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:40:02.796 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:40:02.796 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:40:02.796 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:40:02.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:40:02.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:40:02.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:40:02.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:40:02.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:40:02.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:40:02.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:40:02.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:40:02.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:40:02.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:40:02.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:40:02.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:40:02.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:40:02.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:40:02.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:40:02.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:40:02.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:40:02.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:40:02.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:40:02.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:40:02.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:40:02.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:40:02.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:40:02.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:40:02.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:40:02.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:40:02.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:40:02.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:40:02.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:40:02.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:40:02.801 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:40:03.279 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:40:03.322 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:40:03.325 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:40:03.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:03.328 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:40:03.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:40:03.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:40:03.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:40:03.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:03.356 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:40:03.357 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:40:03.357 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:40:03.357 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:40:03.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:03.383 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:40:03.383 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:40:03.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:03.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:03.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:03.751 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:40:03.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:40:03.800 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:40:03.800 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:40:03.800 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:40:04.223 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:40:04.696 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:40:04.801 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:40:04.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:40:04.802 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:40:04.802 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:40:05.169 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:40:05.641 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:40:05.802 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:40:05.803 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:40:05.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:40:05.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:40:06.112 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:40:06.585 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:40:06.803 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:40:06.804 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:40:06.804 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:40:06.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:40:07.058 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:40:07.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:07.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:07.486 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:40:07.486 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:40:07.503 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:40:07.503 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:40:07.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:40:07.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:07.504 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:40:07.504 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:40:07.504 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:40:07.504 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:40:07.529 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:40:07.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:07.535 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:40:07.535 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:40:07.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:07.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:07.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:07.804 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:40:07.811 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:40:07.812 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:40:07.812 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:40:08.001 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:40:08.474 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:40:08.947 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:40:09.419 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:40:09.893 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:40:10.365 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:40:10.837 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:40:11.311 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:40:11.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:11.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:11.753 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:40:11.754 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:40:11.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:40:11.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:40:11.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:40:11.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:11.772 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:40:11.772 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:40:11.772 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:40:11.772 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:40:11.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:11.776 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:40:11.776 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:40:11.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:11.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:11.783 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:40:12.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:12.254 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:40:12.726 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:40:13.199 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:40:13.672 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:40:14.144 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:40:14.616 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:40:15.089 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:40:15.562 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:40:16.035 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:40:16.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:16.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:16.224 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:40:16.224 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:40:16.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:40:16.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:40:16.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:40:16.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:16.241 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:40:16.242 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:40:16.242 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:40:16.242 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:40:16.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:16.275 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:40:16.275 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:40:16.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:16.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:16.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:16.508 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:40:16.980 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:40:17.451 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:40:17.925 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:40:18.397 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 04:40:18.869 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 04:40:19.343 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 04:40:19.816 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 04:40:20.288 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 04:40:20.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:20.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:20.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:40:20.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:40:20.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:40:20.510 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:40:20.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:40:20.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:20.511 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:40:20.511 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:40:20.511 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:40:20.511 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:40:20.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:20.521 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:40:20.521 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:40:20.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:20.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:20.759 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 04:40:21.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:21.233 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 04:40:21.705 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 04:40:22.178 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 04:40:22.651 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 04:40:23.124 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 04:40:23.598 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 04:40:24.070 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 04:40:24.543 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 04:40:25.017 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 04:40:25.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:25.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:25.104 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:40:25.104 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:40:25.114 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:40:25.114 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:40:25.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:40:25.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:25.115 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:40:25.115 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:40:25.115 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:40:25.115 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:40:25.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:25.161 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:40:25.161 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-02-08 04:40:25.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:25.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:25.489 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 04:40:25.961 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 04:40:25.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:26.435 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 04:40:26.908 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 04:40:27.382 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 04:40:27.856 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 04:40:28.329 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 04:40:28.802 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 04:40:29.275 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 04:40:29.748 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 04:40:29.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:29.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:29.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:40:29.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:40:29.988 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:40:30.006 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:40:30.006 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:40:30.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:40:30.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:30.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:40:30.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:40:30.008 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:40:30.008 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:40:30.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:30.035 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:40:30.035 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-02-08 04:40:30.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:30.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:30.220 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 04:40:30.694 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 04:40:30.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:31.166 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 04:40:31.636 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 04:40:32.106 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-08 04:40:32.578 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-08 04:40:33.051 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-08 04:40:33.524 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-08 04:40:33.997 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-08 04:40:34.467 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-08 04:40:34.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:34.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:34.875 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:40:34.875 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:40:34.875 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:40:34.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:40:34.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:40:34.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:40:34.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:34.885 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:40:34.885 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:40:34.885 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:40:34.885 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:40:34.939 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-08 04:40:34.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:40:34.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:34.948 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:40:34.948 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:40:34.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:34.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:35.412 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-08 04:40:35.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:35.884 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-08 04:40:36.357 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-08 04:40:36.828 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-08 04:40:37.299 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-08 04:40:37.772 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-08 04:40:38.245 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-08 04:40:38.716 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-08 04:40:39.190 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-08 04:40:39.662 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-08 04:40:39.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:39.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:39.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:40:39.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:40:39.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:40:39.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:40:39.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:40:39.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:39.759 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:40:39.759 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:40:39.759 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:40:39.759 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:40:39.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:39.812 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:40:39.813 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:40:39.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:39.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:40.134 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-08 04:40:40.606 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-08 04:40:40.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:41.076 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-08 04:40:41.550 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-08 04:40:42.023 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-08 04:40:42.494 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-08 04:40:42.967 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-08 04:40:43.440 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-08 04:40:43.911 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-08 04:40:44.382 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-08 04:40:44.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:44.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:44.619 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:40:44.619 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:40:44.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:40:44.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:40:44.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:40:44.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:44.638 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:40:44.638 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:40:44.638 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:40:44.638 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:40:44.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:40:44.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:44.668 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:40:44.669 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:40:44.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:44.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:44.853 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-08 04:40:45.326 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-08 04:40:45.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:45.799 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-08 04:40:46.271 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-02-08 04:40:46.745 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-02-08 04:40:47.218 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-02-08 04:40:47.690 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-02-08 04:40:48.163 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-02-08 04:40:48.636 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-02-08 04:40:49.109 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-02-08 04:40:49.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:49.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:49.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:40:49.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:40:49.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:40:49.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:40:49.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:40:49.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:49.388 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:40:49.388 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:40:49.388 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:40:49.388 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:40:49.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:49.446 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:40:49.446 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 04:40:49.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:49.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:49.582 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-02-08 04:40:50.055 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-02-08 04:40:50.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:50.528 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-02-08 04:40:51.002 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-02-08 04:40:51.475 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-02-08 04:40:51.949 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-02-08 04:40:52.422 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-02-08 04:40:52.895 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-02-08 04:40:53.368 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-02-08 04:40:53.841 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-02-08 04:40:54.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:54.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:54.194 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:40:54.194 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:40:54.194 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:40:54.207 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:40:54.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:40:54.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:40:54.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:54.209 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:40:54.209 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:40:54.209 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:40:54.209 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:40:54.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:54.270 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:40:54.271 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 04:40:54.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:54.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:54.312 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-02-08 04:40:54.786 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-02-08 04:40:55.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:55.256 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-02-08 04:40:55.729 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-02-08 04:40:56.202 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-02-08 04:40:56.676 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-02-08 04:40:57.148 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-02-08 04:40:57.621 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-02-08 04:40:58.095 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-02-08 04:40:58.568 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-02-08 04:40:59.041 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-02-08 04:40:59.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:59.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:59.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:40:59.078 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:40:59.078 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:40:59.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:40:59.090 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:40:59.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:40:59.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:59.092 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:40:59.092 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:40:59.092 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:40:59.092 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:40:59.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:59.146 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:40:59.146 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:40:59.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:59.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:40:59.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:40:59.513 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-02-08 04:40:59.985 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-02-08 04:41:00.458 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-02-08 04:41:00.931 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-02-08 04:41:01.404 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-02-08 04:41:01.877 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-02-08 04:41:02.350 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-02-08 04:41:02.822 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-02-08 04:41:03.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:03.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:03.202 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:03.203 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:03.203 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:41:03.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:03.222 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:03.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:41:03.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:03.224 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:03.224 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:03.224 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:41:03.224 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:41:03.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:03.246 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:41:03.246 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:41:03.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:03.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:03.296 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-02-08 04:41:03.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:03.768 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-02-08 04:41:04.242 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-02-08 04:41:04.715 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-02-08 04:41:05.188 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-02-08 04:41:05.661 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-02-08 04:41:06.133 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-02-08 04:41:06.605 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-02-08 04:41:07.078 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-02-08 04:41:07.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:07.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:07.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:07.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:07.470 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:41:07.488 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:07.488 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:07.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:41:07.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:07.490 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:07.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:07.490 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:41:07.490 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:41:07.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:07.493 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:41:07.493 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:41:07.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:07.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:07.550 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-02-08 04:41:07.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:08.022 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-02-08 04:41:08.494 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-02-08 04:41:08.968 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-02-08 04:41:09.440 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-02-08 04:41:09.914 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-02-08 04:41:10.387 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-02-08 04:41:10.858 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-02-08 04:41:11.332 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-02-08 04:41:11.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:11.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:11.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:11.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:11.750 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:41:11.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:11.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:11.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:41:11.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:11.771 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:11.771 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:11.771 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:41:11.771 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:41:11.804 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-02-08 04:41:11.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:11.812 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:41:11.812 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:41:11.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:11.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:12.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:12.275 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-02-08 04:41:12.747 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-02-08 04:41:13.221 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-02-08 04:41:13.693 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-02-08 04:41:14.165 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-02-08 04:41:14.638 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-02-08 04:41:15.111 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-02-08 04:41:15.584 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-02-08 04:41:16.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:16.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:16.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:16.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:16.021 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:41:16.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:16.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:16.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:41:16.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:16.041 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:16.041 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:16.041 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:41:16.041 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:41:16.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:16.049 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:41:16.049 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:41:16.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:16.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:16.054 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-02-08 04:41:16.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:16.526 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-02-08 04:41:16.998 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-02-08 04:41:17.470 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-02-08 04:41:17.943 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-02-08 04:41:18.416 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-02-08 04:41:18.889 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-02-08 04:41:19.362 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-02-08 04:41:19.835 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-02-08 04:41:20.307 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-02-08 04:41:20.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:20.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:20.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:20.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:20.449 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:41:20.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:20.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:20.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:41:20.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:20.467 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:20.467 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:20.467 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:41:20.467 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:41:20.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:20.499 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:41:20.499 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:41:20.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:20.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:20.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:20.778 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-02-08 04:41:21.252 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-02-08 04:41:21.725 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-02-08 04:41:22.198 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-02-08 04:41:22.670 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-02-08 04:41:23.143 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-02-08 04:41:23.616 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-02-08 04:41:24.089 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-02-08 04:41:24.562 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-02-08 04:41:24.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:24.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:24.720 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:24.720 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:24.721 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:41:24.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:24.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:24.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:41:24.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:24.731 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:24.731 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:24.731 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:41:24.731 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:41:24.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:24.745 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:41:24.745 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:41:24.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:24.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:24.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:25.032 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-02-08 04:41:25.506 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-02-08 04:41:25.978 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-02-08 04:41:26.450 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-02-08 04:41:26.923 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-02-08 04:41:27.396 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-02-08 04:41:27.868 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-02-08 04:41:28.342 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-02-08 04:41:28.814 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-02-08 04:41:28.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:28.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:28.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:28.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:28.994 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:41:29.014 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:29.014 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:29.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:41:29.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:29.015 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:29.015 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:29.016 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:41:29.016 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:41:29.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:29.061 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:41:29.061 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:41:29.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:29.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:29.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:29.286 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-02-08 04:41:29.758 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-02-08 04:41:30.232 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-02-08 04:41:30.704 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-02-08 04:41:31.175 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-02-08 04:41:31.646 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-02-08 04:41:32.119 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-02-08 04:41:32.592 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-02-08 04:41:33.065 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-02-08 04:41:33.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:33.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:33.267 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:33.267 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:33.267 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:41:33.274 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:41:33.274 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:41:33.274 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:41:33.274 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:41:33.275 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:41:33.275 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:41:33.275 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:41:33.275 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:41:33.275 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:41:33.275 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:41:33.275 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:41:33.276 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=19530 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:41:33.276 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=19530 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:41:33.276 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=19530 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:41:33.276 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=19530 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:41:33.276 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=19530 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:41:33.276 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=19530 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:41:33.276 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=19530 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:41:33.276 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=19530 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:41:38.282 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:41:38.282 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:41:38.282 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:41:38.282 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:41:38.282 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:41:38.282 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:41:38.289 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:41:38.290 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:41:38.290 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:41:38.291 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:41:38.291 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:41:38.293 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:41:38.294 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:41:38.294 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:41:38.294 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:41:38.294 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:41:38.295 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:41:38.295 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:41:38.295 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:41:38.298 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:41:38.298 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:41:38.299 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:41:38.299 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:41:38.299 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:41:38.299 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:41:38.300 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:41:38.300 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:41:38.302 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:41:38.302 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:41:38.303 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:41:38.303 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:41:38.303 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:41:38.303 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:41:38.303 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:41:38.303 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:41:38.308 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:41:38.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:41:38.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:41:38.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:41:38.308 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:41:38.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:41:38.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:41:38.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:41:38.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:41:38.308 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:41:38.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:41:38.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:41:38.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:41:38.309 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:41:38.309 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:41:38.309 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:41:38.309 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:41:38.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:41:38.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:41:38.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:41:38.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:41:38.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:41:38.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:41:38.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:41:38.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:41:38.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:41:38.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:41:38.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:41:38.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:41:38.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:41:38.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:41:38.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:41:38.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:41:38.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:41:38.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:41:38.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:41:38.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:41:38.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:41:38.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:41:38.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:41:38.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:41:38.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:41:38.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:41:38.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:41:38.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:41:38.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:41:38.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:41:38.311 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:41:38.311 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:41:38.311 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:41:38.311 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:41:38.311 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:41:38.311 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:41:38.311 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:41:43.320 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:41:43.320 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:41:43.320 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:41:43.320 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:41:43.320 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:41:43.320 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:41:43.327 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:41:43.327 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:41:43.328 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:41:43.328 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:41:43.328 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:41:43.330 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:41:43.330 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:41:43.331 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:41:43.331 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:41:43.331 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:41:43.331 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:41:43.331 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:41:43.332 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:41:43.333 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:41:43.333 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:41:43.333 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:41:43.333 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:41:43.334 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:41:43.334 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:41:43.334 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:41:43.334 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:41:43.336 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:41:43.336 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:41:43.336 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:41:43.336 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:41:43.336 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:41:43.336 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:41:43.337 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:41:43.337 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:41:43.339 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:41:43.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:41:43.339 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:41:43.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:41:43.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:41:43.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:41:43.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:41:43.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:41:43.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:41:43.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:41:43.339 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:41:43.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:41:43.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:41:43.339 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:41:43.339 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:41:43.339 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:41:43.339 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:41:43.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:41:43.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:41:43.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:41:43.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:41:43.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:41:43.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:41:43.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:41:43.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:41:43.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:41:43.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:41:43.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:41:43.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:41:43.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:41:43.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:41:43.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:41:43.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:41:43.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:41:43.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:41:43.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:41:43.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:41:43.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:41:43.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:41:43.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:41:43.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:41:43.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:41:43.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:41:43.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:41:43.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:41:43.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:41:43.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:41:43.344 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:41:43.822 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:41:43.857 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:41:43.858 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:41:43.859 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:41:43.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:43.868 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:43.868 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:43.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:41:43.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:43.871 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:43.871 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:43.871 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:41:43.871 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:41:43.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:43.924 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:43.924 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:43.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:43.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:44.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:44.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:44.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:44.029 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:44.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:44.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:44.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:41:44.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:44.047 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:44.047 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:44.047 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:41:44.047 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:41:44.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:44.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:44.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:44.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:44.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:44.294 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:41:44.341 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:41:44.341 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:41:44.342 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:41:44.342 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:41:44.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:44.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:44.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:44.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:44.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:44.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:44.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:41:44.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:44.538 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:44.538 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:44.538 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:41:44.538 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:41:44.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:44.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:44.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:44.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:44.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:44.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:44.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:44.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:44.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:44.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:44.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:44.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:41:44.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:44.751 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:44.751 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:44.751 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:41:44.751 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:41:44.765 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:41:44.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:44.800 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:44.800 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:44.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:44.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:45.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:45.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:45.224 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:45.224 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:45.231 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:45.231 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:45.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:41:45.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:45.233 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:45.233 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:45.233 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:41:45.233 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:41:45.236 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:41:45.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:45.289 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:45.289 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:45.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:45.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:45.342 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:41:45.342 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:41:45.343 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:41:45.343 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:41:45.708 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:41:45.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:45.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:45.745 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:45.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:45.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:45.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:45.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:41:45.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:45.764 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:45.764 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:45.764 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:41:45.765 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:41:45.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:45.821 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:41:45.821 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-02-08 04:41:45.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:45.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:46.180 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:41:46.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:46.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:46.285 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:46.285 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:46.286 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:41:46.302 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:46.302 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:46.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:41:46.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:46.304 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:46.304 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:46.304 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:41:46.304 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:41:46.342 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:41:46.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:46.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:41:46.344 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:41:46.344 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:41:46.350 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:41:46.351 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-02-08 04:41:46.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:46.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:46.649 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:41:46.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:46.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:46.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:46.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:46.825 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:41:46.842 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:46.842 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:46.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:41:46.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:46.844 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:46.844 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:46.844 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:41:46.844 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:41:46.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:41:46.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:46.900 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:46.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:46.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:46.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:47.120 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:41:47.344 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:41:47.345 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:41:47.345 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:41:47.345 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:41:47.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:47.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:47.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:47.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:47.383 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:47.383 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:47.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:41:47.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:47.386 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:47.386 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:47.386 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:41:47.386 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:41:47.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:47.435 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:47.436 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:47.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:47.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:47.593 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:41:47.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:47.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:47.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:47.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:47.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:47.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:47.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:41:47.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:47.928 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:47.928 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:47.928 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:41:47.928 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:41:47.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:41:47.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:47.981 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:47.981 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:47.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:47.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:48.065 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:41:48.345 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:41:48.345 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:41:48.346 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:41:48.346 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:41:48.538 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:41:48.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:48.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:48.811 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:48.811 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:48.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:48.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:48.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:41:48.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:48.830 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:48.830 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:48.830 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:41:48.830 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:41:48.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:48.883 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:41:48.883 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 04:41:48.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:48.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:49.011 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:41:49.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:49.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:49.292 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:49.293 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:49.293 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:41:49.310 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:49.310 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:49.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:41:49.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:49.312 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:49.312 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:49.312 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:41:49.312 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:41:49.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:49.352 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:41:49.352 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 04:41:49.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:49.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:49.481 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:41:49.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:49.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:49.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:49.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:49.833 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:41:49.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:49.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:49.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:41:49.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:49.854 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:49.854 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:49.854 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:41:49.854 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:41:49.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:49.908 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:41:49.908 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:41:49.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:49.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:49.951 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:41:50.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:50.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:50.110 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:50.110 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:50.110 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:41:50.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:50.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:50.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:41:50.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:50.129 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:50.129 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:50.129 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:41:50.129 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:41:50.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:50.192 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:41:50.192 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:41:50.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:50.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:50.424 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:41:50.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:50.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:50.603 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:50.603 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:50.604 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:41:50.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:50.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:50.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:41:50.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:50.614 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:50.614 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:50.614 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:41:50.614 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:41:50.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:50.669 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:41:50.669 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:41:50.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:50.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:50.897 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:41:51.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:51.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:51.092 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:51.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:51.092 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:41:51.110 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:51.110 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:51.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:41:51.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:51.112 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:51.112 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:51.112 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:41:51.112 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:41:51.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:51.165 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:41:51.165 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:41:51.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:51.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:51.369 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:41:51.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:51.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:51.581 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:51.581 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:51.581 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:41:51.601 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:51.601 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:51.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:41:51.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:51.603 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:51.603 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:51.603 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:41:51.604 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:41:51.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:51.660 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:41:51.660 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:41:51.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:51.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:51.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:51.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:51.761 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:51.761 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:51.761 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:41:51.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:51.780 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:51.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:41:51.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:51.782 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:51.782 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:51.783 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:41:51.783 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:41:51.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:51.842 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:41:51.846 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:41:51.846 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:41:51.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:51.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:52.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:52.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:52.255 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:52.255 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:52.255 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:41:52.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:52.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:52.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:41:52.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:52.277 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:52.277 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:52.277 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:41:52.277 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:41:52.313 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:41:52.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:52.331 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:41:52.331 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:41:52.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:52.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:52.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:52.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:52.745 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:52.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:52.745 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:41:52.755 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:52.755 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:52.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:41:52.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:52.757 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:52.757 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:52.757 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:41:52.757 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:41:52.785 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:41:52.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:52.809 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:41:52.809 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:41:52.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:52.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:53.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:53.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:53.235 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:53.235 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:53.235 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:41:53.242 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:41:53.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:41:53.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:41:53.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:41:53.243 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:41:53.243 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:41:53.243 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:41:53.243 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:41:53.243 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:41:53.243 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:41:53.243 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:41:58.250 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:41:58.250 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:41:58.250 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:41:58.250 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:41:58.250 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:41:58.250 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:41:58.259 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:41:58.261 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:41:58.261 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:41:58.261 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:41:58.262 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:41:58.265 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:41:58.265 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:41:58.265 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:41:58.265 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:41:58.266 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:41:58.266 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:41:58.266 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:41:58.266 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:41:58.269 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:41:58.269 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:41:58.269 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:41:58.269 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:41:58.269 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:41:58.269 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:41:58.270 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:41:58.270 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:41:58.273 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:41:58.273 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:41:58.273 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:41:58.273 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:41:58.273 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:41:58.273 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:41:58.273 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:41:58.273 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:41:58.278 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:41:58.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:41:58.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:41:58.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:41:58.278 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:41:58.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:41:58.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:41:58.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:41:58.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:41:58.278 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:41:58.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:41:58.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:41:58.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:41:58.279 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:41:58.279 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:41:58.279 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:41:58.279 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:41:58.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:41:58.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:41:58.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:41:58.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:41:58.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:41:58.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:41:58.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:41:58.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:41:58.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:41:58.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:41:58.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:41:58.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:41:58.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:41:58.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:41:58.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:41:58.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:41:58.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:41:58.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:41:58.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:41:58.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:41:58.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:41:58.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:41:58.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:41:58.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:41:58.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:41:58.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:41:58.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:41:58.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:41:58.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:41:58.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:41:58.283 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:41:58.761 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:41:58.797 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:41:58.797 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:41:58.798 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:41:58.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:58.810 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:58.811 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:58.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:41:58.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:58.818 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:58.818 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:58.818 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:41:58.818 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:41:58.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:58.864 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:58.865 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:58.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:58.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:59.233 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:41:59.282 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:41:59.282 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:41:59.283 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:41:59.283 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:41:59.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:59.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:59.704 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:41:59.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:59.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:59.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:59.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:59.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:41:59.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:41:59.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:41:59.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:59.918 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:59.918 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:59.918 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:41:59.918 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:41:59.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:41:59.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:41:59.972 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:41:59.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:41:59.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:00.176 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:42:00.283 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:42:00.283 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:42:00.283 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:42:00.284 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:42:00.649 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:42:00.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:00.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:01.121 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:42:01.284 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:42:01.284 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:42:01.284 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:42:01.284 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:42:01.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:01.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:01.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:01.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:01.354 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:01.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:01.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:42:01.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:01.356 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:42:01.356 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:42:01.356 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:42:01.356 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:42:01.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:01.412 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:42:01.413 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:42:01.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:01.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:01.594 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:42:02.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:02.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:02.065 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:42:02.285 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:42:02.286 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:42:02.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:42:02.286 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:42:02.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:02.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:02.503 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:02.503 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:02.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:02.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:02.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:42:02.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:02.524 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:42:02.524 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:42:02.524 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:42:02.524 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:42:02.538 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:42:02.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:02.575 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:42:02.576 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:42:02.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:02.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:03.010 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:42:03.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:42:03.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:42:03.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:42:03.288 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:42:03.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:03.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:03.483 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:42:03.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:03.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:03.941 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:03.941 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:03.954 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:42:03.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:03.957 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:03.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:42:03.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:03.959 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:42:03.959 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:42:03.959 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:42:03.959 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:42:04.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:04.007 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:42:04.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:42:04.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:04.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:04.425 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:42:04.898 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:42:05.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:05.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:05.371 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:42:05.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:05.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:05.503 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:05.503 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:05.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:05.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:05.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:42:05.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:05.514 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:42:05.514 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:42:05.514 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:42:05.514 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:42:05.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:05.563 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:42:05.563 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-02-08 04:42:05.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:05.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:05.843 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:42:06.317 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:42:06.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:06.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:06.789 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:42:07.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:07.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:07.008 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:07.008 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:07.008 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:42:07.009 [WARNING] transceiver.py:257 (MS@172.18.152.22:6700) RX TRXD message (fn=1885 tn=5 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:42:07.026 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:07.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:07.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:42:07.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:07.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:42:07.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:42:07.028 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:42:07.028 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:42:07.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:07.083 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:42:07.083 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-02-08 04:42:07.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:07.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:07.262 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:42:07.735 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:42:08.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:08.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:08.208 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:42:08.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:08.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:08.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:08.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:08.515 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:42:08.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:08.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:08.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:42:08.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:08.526 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:42:08.526 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:42:08.526 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:42:08.526 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:42:08.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:42:08.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:08.579 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:42:08.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:42:08.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:08.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:08.680 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:42:09.151 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:42:09.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:09.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:09.625 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:42:10.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:10.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:10.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:10.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:10.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:10.032 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:10.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:42:10.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:10.035 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:42:10.035 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:42:10.035 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:42:10.035 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:42:10.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:10.088 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:42:10.088 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:42:10.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:10.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:10.097 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:42:10.569 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:42:11.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:11.042 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:42:11.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:11.515 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:42:11.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:11.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:11.520 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:11.520 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:11.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:11.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:11.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:42:11.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:11.540 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:42:11.540 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:42:11.540 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:42:11.540 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:42:11.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:42:11.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:11.592 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:42:11.592 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:42:11.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:11.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:11.987 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:42:12.459 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:42:12.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:12.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:12.929 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:42:13.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:13.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:13.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:13.387 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:13.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:13.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:13.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:42:13.403 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:42:13.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:13.404 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:42:13.404 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:42:13.404 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:42:13.404 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:42:13.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:13.455 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:42:13.455 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 04:42:13.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:13.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:13.875 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 04:42:14.347 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 04:42:14.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:14.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:14.819 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 04:42:14.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:14.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:14.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:14.834 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:14.834 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:42:14.852 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:14.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:14.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:42:14.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:14.855 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:42:14.855 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:42:14.855 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:42:14.855 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:42:14.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:14.909 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:42:14.909 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 04:42:14.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:14.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:15.290 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 04:42:15.764 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 04:42:15.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:15.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:16.237 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 04:42:16.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:16.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:16.339 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:16.339 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:16.339 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:42:16.357 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:16.357 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:16.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:42:16.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:16.359 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:42:16.360 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:42:16.360 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:42:16.360 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:42:16.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:16.411 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:42:16.411 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:42:16.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:16.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:16.707 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 04:42:17.180 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 04:42:17.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:17.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:17.653 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 04:42:17.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:17.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:17.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:17.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:17.812 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:42:17.823 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:17.823 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:17.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:42:17.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:17.825 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:42:17.825 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:42:17.825 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:42:17.825 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:42:17.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:17.878 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:42:17.878 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:42:17.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:17.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:18.126 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 04:42:18.599 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 04:42:18.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:18.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:19.072 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 04:42:19.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:19.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:19.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:19.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:19.250 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:42:19.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:19.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:19.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:42:19.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:19.262 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:42:19.262 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:42:19.262 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:42:19.262 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:42:19.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:19.317 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:42:19.317 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:42:19.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:19.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:19.544 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 04:42:20.015 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 04:42:20.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:20.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:20.488 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 04:42:20.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:20.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:20.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:20.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:20.681 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:42:20.701 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:20.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:20.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:42:20.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:20.704 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:42:20.704 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:42:20.704 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:42:20.704 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:42:20.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:20.755 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:42:20.755 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:42:20.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:20.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:20.961 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 04:42:21.433 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 04:42:21.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:21.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:21.907 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 04:42:22.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:22.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:22.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:22.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:22.117 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:42:22.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:22.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:22.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:42:22.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:22.137 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:42:22.137 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:42:22.137 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:42:22.137 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:42:22.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:22.193 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:42:22.193 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:42:22.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:22.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:22.379 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 04:42:22.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:22.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:22.851 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 04:42:23.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:23.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:23.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:23.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:23.246 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:42:23.264 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:23.264 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:23.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:42:23.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:23.267 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:42:23.267 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:42:23.267 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:42:23.267 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:42:23.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:23.323 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 04:42:23.329 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:42:23.329 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:42:23.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:23.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:23.794 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 04:42:24.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:24.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:24.267 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 04:42:24.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:24.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:24.676 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:24.676 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:24.677 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:42:24.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:24.693 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:24.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:42:24.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:24.695 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:42:24.695 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:42:24.695 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:42:24.695 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:42:24.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:24.739 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 04:42:24.743 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:42:24.743 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:42:24.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:24.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:25.211 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 04:42:25.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:25.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:25.682 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 04:42:26.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:26.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:26.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:26.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:26.112 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:42:26.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:26.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:26.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:42:26.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:26.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:42:26.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:42:26.123 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:42:26.123 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:42:26.155 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 04:42:26.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:26.175 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:42:26.175 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:42:26.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:26.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:26.626 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 04:42:27.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:27.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:27.098 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 04:42:27.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:27.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:27.549 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:27.549 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:27.549 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:42:27.561 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:42:27.561 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:42:27.561 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:42:27.561 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:42:27.563 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:42:27.563 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:42:27.563 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:42:27.563 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:42:27.563 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:42:27.563 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:42:27.563 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:42:27.563 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6324 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:42:27.563 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6324 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:42:27.563 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6324 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:42:27.563 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6324 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:42:27.563 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6324 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:42:27.563 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6324 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:42:27.563 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6324 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:42:27.563 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6324 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:42:32.576 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:42:32.577 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:42:32.577 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:42:32.577 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:42:32.577 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:42:32.577 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:42:32.587 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:42:32.588 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:42:32.588 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:42:32.589 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:42:32.589 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:42:32.593 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:42:32.593 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:42:32.593 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:42:32.594 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:42:32.594 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:42:32.594 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:42:32.595 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:42:32.595 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:42:32.598 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:42:32.598 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:42:32.598 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:42:32.598 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:42:32.599 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:42:32.599 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:42:32.599 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:42:32.599 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:42:32.602 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:42:32.602 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:42:32.602 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:42:32.603 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:42:32.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:42:32.603 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:42:32.603 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:42:32.603 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:42:32.608 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:42:32.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:42:32.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:42:32.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:42:32.608 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:42:32.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:42:32.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:42:32.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:42:32.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:42:32.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:42:32.608 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:42:32.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:42:32.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:42:32.609 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:42:32.609 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:42:32.609 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:42:32.609 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:42:32.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:42:32.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:42:32.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:42:32.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:42:32.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:42:32.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:42:32.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:42:32.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:42:32.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:42:32.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:42:32.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:42:32.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:42:32.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:42:32.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:42:32.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:42:32.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:42:32.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:42:32.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:42:32.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:42:32.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:42:32.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:42:32.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:42:32.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:42:32.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:42:32.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:42:32.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:42:32.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:42:32.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:42:32.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:42:32.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:42:32.614 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:42:33.092 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:42:33.132 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:42:33.134 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:42:33.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:33.136 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:42:33.161 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:33.162 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:33.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:42:33.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:33.173 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:42:33.173 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:42:33.174 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:42:33.174 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:42:33.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:33.194 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:42:33.194 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:42:33.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:33.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:33.564 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:42:33.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:42:33.612 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:42:33.612 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:42:33.613 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:42:34.035 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:42:34.509 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:42:34.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:42:34.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:42:34.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:42:34.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:42:34.981 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:42:35.453 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:42:35.615 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:42:35.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:42:35.615 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:42:35.616 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:42:35.927 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:42:36.400 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:42:36.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:42:36.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:42:36.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:42:36.616 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:42:36.872 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:42:37.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:37.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:37.077 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:37.077 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:37.094 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:37.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:37.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:42:37.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:37.097 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:42:37.097 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:42:37.097 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:42:37.097 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:42:37.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:37.148 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:42:37.148 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:42:37.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:37.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:37.345 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:42:37.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:42:37.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:42:37.618 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:42:37.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:42:37.818 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:42:38.290 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:42:38.761 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:42:39.232 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:42:39.705 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:42:40.178 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:42:40.650 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:42:41.121 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:42:41.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:41.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:41.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:41.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:41.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:41.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:41.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:42:41.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:41.365 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:42:41.365 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:42:41.365 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:42:41.365 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:42:41.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:41.419 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:42:41.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:42:41.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:41.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:41.592 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:42:42.065 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:42:42.538 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:42:43.010 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:42:43.481 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:42:43.955 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:42:44.427 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:42:44.908 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:42:45.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:45.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:45.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:45.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:45.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:45.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:45.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:42:45.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:45.361 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:42:45.361 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:42:45.361 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:42:45.361 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:42:45.380 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:42:45.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:45.413 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:42:45.413 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:42:45.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:45.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:45.851 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:42:46.324 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:42:46.797 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:42:47.269 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:42:47.740 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:42:48.213 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 04:42:48.686 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 04:42:49.159 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 04:42:49.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:49.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:49.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:49.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:49.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:49.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:49.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:42:49.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:49.630 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:42:49.630 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:42:49.630 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:42:49.630 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:42:49.632 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 04:42:49.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:49.681 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:42:49.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:42:49.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:49.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:50.105 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 04:42:50.578 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 04:42:51.048 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 04:42:51.522 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 04:42:51.995 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 04:42:52.469 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 04:42:52.941 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 04:42:53.414 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 04:42:53.885 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 04:42:54.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:54.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:54.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:54.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:54.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:54.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:54.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:42:54.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:54.312 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:42:54.312 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:42:54.312 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:42:54.312 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:42:54.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:54.358 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 04:42:54.363 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:42:54.363 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-02-08 04:42:54.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:54.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:54.830 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 04:42:55.303 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 04:42:55.773 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 04:42:56.245 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 04:42:56.719 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 04:42:57.191 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 04:42:57.664 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 04:42:58.137 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 04:42:58.610 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 04:42:58.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:58.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:58.688 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:58.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:58.688 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:42:58.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:42:58.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:42:58.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:42:58.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:58.708 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:42:58.708 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:42:58.708 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:42:58.708 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:42:58.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:42:58.759 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:42:58.760 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-02-08 04:42:58.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:58.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:42:59.080 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 04:42:59.554 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 04:43:00.026 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 04:43:00.499 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 04:43:00.972 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 04:43:01.445 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 04:43:01.918 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-08 04:43:02.388 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-08 04:43:02.860 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-08 04:43:03.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:43:03.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:03.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:43:03.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:43:03.083 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:43:03.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:43:03.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:43:03.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:43:03.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:03.101 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:43:03.101 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:43:03.101 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:43:03.101 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:43:03.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:43:03.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:43:03.151 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:43:03.151 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:43:03.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:03.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:03.333 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-08 04:43:03.806 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-08 04:43:04.280 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-08 04:43:04.752 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-08 04:43:05.223 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-08 04:43:05.694 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-08 04:43:06.165 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-08 04:43:06.636 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-08 04:43:07.106 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-08 04:43:07.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:43:07.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:07.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:43:07.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:43:07.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:43:07.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:43:07.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:43:07.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:07.492 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:43:07.492 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:43:07.492 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:43:07.492 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:43:07.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:43:07.547 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:43:07.547 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:43:07.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:07.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:07.577 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-08 04:43:08.048 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-08 04:43:08.519 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-08 04:43:08.990 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-08 04:43:09.464 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-08 04:43:09.949 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-08 04:43:10.422 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-08 04:43:10.895 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-08 04:43:11.368 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-08 04:43:11.841 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-08 04:43:11.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:43:11.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:11.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:43:11.880 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:43:11.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:43:11.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:43:11.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:43:11.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:11.903 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:43:11.903 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:43:11.903 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:43:11.903 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:43:11.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:43:11.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:43:11.952 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:43:11.952 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:43:11.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:11.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:12.311 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-08 04:43:12.785 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-08 04:43:13.258 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-08 04:43:13.729 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-08 04:43:14.203 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-08 04:43:14.675 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-08 04:43:15.146 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-08 04:43:15.620 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-08 04:43:16.092 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-02-08 04:43:16.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:43:16.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:16.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:43:16.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:43:16.175 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:43:16.175 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:43:16.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:43:16.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:16.178 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:43:16.178 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:43:16.178 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:43:16.178 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:43:16.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:43:16.232 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:43:16.232 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 04:43:16.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:16.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:16.563 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-02-08 04:43:17.035 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-02-08 04:43:17.508 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-02-08 04:43:17.981 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-02-08 04:43:18.454 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-02-08 04:43:18.928 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-02-08 04:43:19.401 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-02-08 04:43:19.875 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-02-08 04:43:20.348 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-02-08 04:43:20.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:43:20.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:20.495 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:43:20.495 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:43:20.495 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:43:20.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:43:20.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:43:20.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:43:20.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:20.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:43:20.516 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:43:20.516 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:43:20.516 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:43:20.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:43:20.568 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:43:20.568 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 04:43:20.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:20.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:20.819 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-02-08 04:43:21.292 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-02-08 04:43:21.765 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-02-08 04:43:22.239 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-02-08 04:43:22.711 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-02-08 04:43:23.184 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-02-08 04:43:23.657 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-02-08 04:43:24.130 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-02-08 04:43:24.601 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-02-08 04:43:24.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:43:24.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:24.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:43:24.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:43:24.888 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:43:24.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:43:24.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:43:24.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:43:24.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:24.909 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:43:24.909 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:43:24.910 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:43:24.910 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:43:24.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:43:24.960 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:43:24.960 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:43:24.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:24.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:25.073 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-02-08 04:43:25.546 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-02-08 04:43:26.018 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-02-08 04:43:26.490 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-02-08 04:43:26.964 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-02-08 04:43:27.437 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-02-08 04:43:27.910 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-02-08 04:43:28.383 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-02-08 04:43:28.856 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-02-08 04:43:29.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:43:29.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:29.011 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:43:29.011 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:43:29.011 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:43:29.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:43:29.028 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:43:29.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:43:29.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:29.030 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:43:29.030 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:43:29.030 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:43:29.030 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:43:29.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:43:29.081 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:43:29.081 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:43:29.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:29.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:29.328 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-02-08 04:43:29.800 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-02-08 04:43:30.274 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-02-08 04:43:30.747 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-02-08 04:43:31.218 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-02-08 04:43:31.691 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-02-08 04:43:32.164 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-02-08 04:43:32.636 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-02-08 04:43:33.109 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-02-08 04:43:33.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:43:33.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:33.284 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:43:33.284 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:43:33.284 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:43:33.303 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:43:33.303 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:43:33.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:43:33.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:33.306 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:43:33.306 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:43:33.306 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:43:33.306 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:43:33.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:43:33.379 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:43:33.379 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:43:33.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:33.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:33.582 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-02-08 04:43:34.054 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-02-08 04:43:34.527 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-02-08 04:43:35.001 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-02-08 04:43:35.473 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-02-08 04:43:35.944 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-02-08 04:43:36.418 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-02-08 04:43:36.890 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-02-08 04:43:37.362 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-02-08 04:43:37.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:43:37.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:37.558 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:43:37.558 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:43:37.558 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:43:37.576 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:43:37.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:43:37.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:43:37.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:37.578 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:43:37.578 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:43:37.579 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:43:37.579 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:43:37.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:43:37.633 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:43:37.633 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:43:37.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:37.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:37.835 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-02-08 04:43:38.308 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-02-08 04:43:38.782 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-02-08 04:43:39.255 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-02-08 04:43:39.727 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-02-08 04:43:40.201 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-02-08 04:43:40.674 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-02-08 04:43:41.146 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-02-08 04:43:41.617 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-02-08 04:43:41.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:43:41.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:41.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:43:41.831 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:43:41.831 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:43:41.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:43:41.849 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:43:41.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:43:41.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:41.852 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:43:41.852 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:43:41.852 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:43:41.852 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:43:41.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:43:41.909 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:43:41.909 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:43:41.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:41.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:42.090 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-02-08 04:43:42.563 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-02-08 04:43:43.035 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-02-08 04:43:43.506 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-02-08 04:43:43.980 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-02-08 04:43:44.452 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-02-08 04:43:44.924 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-02-08 04:43:45.396 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-02-08 04:43:45.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:43:45.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:45.789 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:43:45.789 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:43:45.789 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:43:45.808 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:43:45.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:43:45.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:43:45.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:45.810 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:43:45.810 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:43:45.810 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:43:45.811 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:43:45.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:43:45.869 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-02-08 04:43:45.877 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:43:45.877 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:43:45.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:45.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:46.342 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-02-08 04:43:46.815 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-02-08 04:43:47.288 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-02-08 04:43:47.761 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-02-08 04:43:48.235 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-02-08 04:43:48.708 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-02-08 04:43:49.181 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-02-08 04:43:49.654 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-02-08 04:43:50.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:43:50.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:50.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:43:50.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:43:50.068 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:43:50.087 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:43:50.087 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:43:50.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:43:50.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:50.089 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:43:50.089 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:43:50.089 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:43:50.089 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:43:50.125 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-02-08 04:43:50.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:43:50.139 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:43:50.140 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:43:50.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:50.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:50.598 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-02-08 04:43:51.071 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-02-08 04:43:51.544 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-02-08 04:43:52.017 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-02-08 04:43:52.489 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-02-08 04:43:52.962 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-02-08 04:43:53.433 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-02-08 04:43:53.906 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-02-08 04:43:54.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:43:54.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:54.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:43:54.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:43:54.334 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:43:54.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:43:54.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:43:54.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:43:54.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:54.355 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:43:54.355 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:43:54.355 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:43:54.355 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:43:54.378 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-02-08 04:43:54.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:43:54.405 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:43:54.405 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:43:54.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:54.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:54.851 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-02-08 04:43:55.324 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-02-08 04:43:55.797 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-02-08 04:43:56.270 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-02-08 04:43:56.742 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-02-08 04:43:57.215 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-02-08 04:43:57.689 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-02-08 04:43:58.161 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-02-08 04:43:58.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:43:58.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:43:58.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:43:58.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:43:58.613 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:43:58.629 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:43:58.629 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:43:58.629 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:43:58.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:43:58.633 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-02-08 04:43:58.635 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:43:58.636 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:43:58.636 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:43:58.636 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:43:58.636 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:43:58.636 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:43:58.636 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:43:58.637 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=18566 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:43:58.637 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=18566 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:43:58.637 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=18566 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:43:58.637 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=18566 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:43:58.637 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=18566 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:43:58.637 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=18566 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:43:58.637 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=18567 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:43:58.637 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=18567 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:43:58.637 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=18567 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:43:58.637 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=18567 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:43:58.638 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=18567 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:43:58.638 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=18567 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:43:58.638 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=18567 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:43:58.638 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=18567 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:44:03.636 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:44:03.636 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:44:03.636 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:44:03.636 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:44:03.636 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:44:03.637 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:44:03.643 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:44:03.643 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:44:03.643 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:44:03.644 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:44:03.644 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:44:03.646 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:44:03.646 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:44:03.647 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:44:03.647 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:44:03.647 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:44:03.647 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:44:03.647 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:44:03.647 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:44:03.650 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:44:03.650 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:44:03.650 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:44:03.650 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:44:03.650 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:44:03.650 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:44:03.651 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:44:03.651 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:44:03.653 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:44:03.653 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:44:03.653 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:44:03.653 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:44:03.653 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:44:03.653 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:44:03.653 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:44:03.653 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:44:03.657 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:44:03.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:44:03.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:44:03.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:44:03.657 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:44:03.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:44:03.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:44:03.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:44:03.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:44:03.658 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:44:03.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:44:03.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:44:03.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:44:03.658 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:44:03.658 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:44:03.658 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:44:03.658 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:44:03.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:44:03.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:44:03.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:44:03.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:44:03.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:44:03.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:44:03.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:44:03.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:44:03.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:44:03.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:44:03.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:44:03.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:44:03.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:44:03.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:44:03.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:44:03.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:44:03.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:44:03.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:44:03.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:44:03.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:44:03.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:44:03.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:44:03.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:44:03.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:44:03.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:44:03.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:44:03.660 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:44:03.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:44:03.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:44:03.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:44:03.660 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:44:03.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:44:03.660 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:44:03.660 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:44:03.660 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:44:03.660 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:44:03.660 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:44:08.670 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:44:08.670 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:44:08.670 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:44:08.670 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:44:08.670 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:44:08.670 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:44:08.678 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:44:08.679 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:44:08.679 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:44:08.679 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:44:08.679 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:44:08.682 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:44:08.682 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:44:08.682 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:44:08.682 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:44:08.683 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:44:08.683 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:44:08.683 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:44:08.683 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:44:08.685 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:44:08.685 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:44:08.685 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:44:08.685 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:44:08.686 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:44:08.686 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:44:08.686 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:44:08.686 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:44:08.688 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:44:08.688 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:44:08.688 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:44:08.688 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:44:08.688 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:44:08.688 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:44:08.688 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:44:08.688 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:44:08.691 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:44:08.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:44:08.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:44:08.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:44:08.691 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:44:08.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:44:08.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:44:08.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:44:08.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:44:08.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:44:08.691 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:44:08.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:44:08.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:44:08.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:44:08.691 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:44:08.691 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:44:08.691 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:44:08.691 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:44:08.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:44:08.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:44:08.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:44:08.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:44:08.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:44:08.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:44:08.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:44:08.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:44:08.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:44:08.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:44:08.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:44:08.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:44:08.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:44:08.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:44:08.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:44:08.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:44:08.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:44:08.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:44:08.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:44:08.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:44:08.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:44:08.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:44:08.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:44:08.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:44:08.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:44:08.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:44:08.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:44:08.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:44:08.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:44:08.696 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:44:09.172 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:44:09.222 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:44:09.225 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:44:09.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:44:09.227 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:44:09.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:44:09.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:44:09.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:44:09.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:09.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:44:09.256 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:44:09.256 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:44:09.256 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:44:09.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:44:09.274 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:44:09.274 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:44:09.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:09.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:09.644 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:44:09.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:44:09.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:44:09.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:44:09.696 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:44:10.116 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:44:10.589 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:44:10.695 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:44:10.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:44:10.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:44:10.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:44:11.062 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:44:11.534 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:44:11.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:44:11.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:44:11.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:44:11.698 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:44:12.008 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:44:12.480 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:44:12.698 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:44:12.698 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:44:12.699 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:44:12.699 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:44:12.952 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:44:13.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:44:13.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:13.319 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:44:13.319 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:44:13.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:44:13.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:44:13.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:44:13.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:13.339 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:44:13.340 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:44:13.340 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:44:13.340 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:44:13.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:44:13.391 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:44:13.392 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:44:13.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:13.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:13.423 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:44:13.700 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:44:13.700 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:44:13.700 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:44:13.700 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:44:13.897 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:44:14.369 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:44:14.841 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:44:15.312 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:44:15.786 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:44:16.258 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:44:16.731 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:44:17.202 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:44:17.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:44:17.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:17.593 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:44:17.593 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:44:17.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:44:17.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:44:17.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:44:17.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:17.614 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:44:17.614 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:44:17.614 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:44:17.614 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:44:17.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:44:17.664 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:44:17.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:44:17.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:17.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:17.675 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:44:18.147 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:44:18.619 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:44:19.090 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:44:19.561 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:44:20.034 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:44:20.507 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:44:20.979 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:44:21.453 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:44:21.926 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:44:22.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:44:22.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:22.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:44:22.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:44:22.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:44:22.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:44:22.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:44:22.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:22.076 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:44:22.077 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:44:22.077 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:44:22.077 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:44:22.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:44:22.130 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:44:22.130 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:44:22.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:22.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:22.399 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:44:22.872 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:44:23.344 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:44:23.815 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:44:24.289 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 04:44:24.761 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 04:44:25.235 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 04:44:25.708 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 04:44:26.180 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 04:44:26.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:44:26.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:26.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:44:26.333 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:44:26.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:44:26.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:44:26.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:44:26.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:26.350 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:44:26.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:44:26.350 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:44:26.350 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:44:26.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:44:26.399 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:44:26.399 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:44:26.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:26.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:26.651 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 04:44:27.125 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 04:44:27.598 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 04:44:28.068 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 04:44:28.542 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 04:44:29.015 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 04:44:29.487 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 04:44:29.961 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 04:44:30.434 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 04:44:30.905 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 04:44:30.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:44:30.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:30.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:44:30.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:44:30.979 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:44:30.979 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:44:30.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:44:30.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:30.982 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:44:30.982 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:44:30.982 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:44:30.982 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:44:31.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:44:31.031 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:44:31.031 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-02-08 04:44:31.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:31.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:31.376 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 04:44:31.849 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 04:44:32.322 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 04:44:32.796 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 04:44:33.269 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 04:44:33.742 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 04:44:34.215 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 04:44:34.688 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 04:44:35.161 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 04:44:35.634 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 04:44:35.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:44:35.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:35.840 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:44:35.840 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:44:35.841 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:44:35.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:44:35.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:44:35.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:44:35.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:35.860 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:44:35.860 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:44:35.860 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:44:35.860 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:44:35.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:44:35.914 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:44:35.914 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-02-08 04:44:35.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:35.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:36.106 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 04:44:36.577 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 04:44:37.050 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 04:44:37.523 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 04:44:37.996 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-08 04:44:38.468 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-08 04:44:38.942 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-08 04:44:39.414 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-08 04:44:39.888 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-08 04:44:40.360 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-08 04:44:40.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:44:40.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:40.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:44:40.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:44:40.734 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:44:40.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:44:40.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:44:40.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:44:40.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:40.752 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:44:40.752 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:44:40.752 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:44:40.752 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:44:40.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:44:40.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:44:40.808 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:44:40.808 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:44:40.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:40.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:40.833 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-08 04:44:41.304 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-08 04:44:41.774 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-08 04:44:42.248 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-08 04:44:42.720 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-08 04:44:43.197 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-08 04:44:43.670 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-08 04:44:44.141 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-08 04:44:44.614 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-08 04:44:45.087 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-08 04:44:45.559 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-08 04:44:45.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:44:45.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:45.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:44:45.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:44:45.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:44:45.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:44:45.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:44:45.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:45.613 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:44:45.613 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:44:45.613 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:44:45.613 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:44:45.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:44:45.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:44:45.663 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:44:45.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:45.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:46.030 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-08 04:44:46.503 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-08 04:44:46.976 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-08 04:44:47.448 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-08 04:44:47.922 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-08 04:44:48.394 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-08 04:44:48.866 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-08 04:44:49.339 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-08 04:44:49.812 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-08 04:44:50.284 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-08 04:44:50.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:44:50.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:50.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:44:50.477 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:44:50.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:44:50.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:44:50.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:44:50.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:50.484 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:44:50.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:44:50.485 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:44:50.485 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:44:50.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:44:50.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:44:50.536 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:44:50.537 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:44:50.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:50.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:50.755 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-08 04:44:51.229 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-08 04:44:51.702 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-08 04:44:52.175 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-02-08 04:44:52.648 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-02-08 04:44:53.121 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-02-08 04:44:53.594 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-02-08 04:44:54.067 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-02-08 04:44:54.540 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-02-08 04:44:55.013 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-02-08 04:44:55.486 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-02-08 04:44:55.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:44:55.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:55.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:44:55.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:44:55.738 [WARNING] transceiver.py:257 (MS@172.18.152.22:6700) RX TRXD message (fn=10154 tn=7 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:44:55.744 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:44:55.744 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:44:55.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:44:55.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:55.746 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:44:55.746 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:44:55.746 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:44:55.746 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:44:55.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:44:55.795 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:44:55.795 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 04:44:55.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:55.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:44:55.958 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-02-08 04:44:56.431 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-02-08 04:44:56.904 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-02-08 04:44:57.377 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-02-08 04:44:57.851 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-02-08 04:44:58.324 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-02-08 04:44:58.798 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-02-08 04:44:59.270 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-02-08 04:44:59.743 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-02-08 04:45:00.217 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-02-08 04:45:00.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:00.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:00.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:45:00.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:45:00.541 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:45:00.559 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:45:00.559 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:45:00.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:45:00.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:00.561 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:45:00.562 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:45:00.562 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:45:00.562 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:45:00.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:00.612 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:45:00.612 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 04:45:00.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:00.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:00.689 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-02-08 04:45:01.161 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-02-08 04:45:01.635 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-02-08 04:45:02.108 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-02-08 04:45:02.582 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-02-08 04:45:03.055 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-02-08 04:45:03.529 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-02-08 04:45:04.001 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-02-08 04:45:04.475 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-02-08 04:45:04.947 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-02-08 04:45:05.419 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-02-08 04:45:05.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:05.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:05.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:45:05.424 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:45:05.424 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:45:05.442 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:45:05.442 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:45:05.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:45:05.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:05.444 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:45:05.444 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:45:05.444 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:45:05.444 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:45:05.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:05.496 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:45:05.497 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:45:05.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:05.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:05.891 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-02-08 04:45:06.364 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-02-08 04:45:06.836 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-02-08 04:45:07.309 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-02-08 04:45:07.782 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-02-08 04:45:08.254 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-02-08 04:45:08.726 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-02-08 04:45:09.198 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-02-08 04:45:09.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:09.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:09.520 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:45:09.520 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:45:09.520 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:45:09.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:45:09.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:45:09.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:45:09.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:09.541 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:45:09.541 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:45:09.541 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:45:09.542 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:45:09.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:09.591 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:45:09.592 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:45:09.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:09.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:09.670 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-02-08 04:45:10.143 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-02-08 04:45:10.615 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-02-08 04:45:11.089 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-02-08 04:45:11.561 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-02-08 04:45:12.034 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-02-08 04:45:12.507 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-02-08 04:45:12.979 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-02-08 04:45:13.452 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-02-08 04:45:13.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:13.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:13.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:45:13.792 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:45:13.793 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:45:13.802 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:45:13.802 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:45:13.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:45:13.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:13.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:45:13.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:45:13.804 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:45:13.804 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:45:13.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:13.856 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:45:13.856 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:45:13.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:13.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:13.924 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-02-08 04:45:14.397 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-02-08 04:45:14.869 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-02-08 04:45:15.343 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-02-08 04:45:15.815 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-02-08 04:45:16.288 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-02-08 04:45:16.761 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-02-08 04:45:17.233 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-02-08 04:45:17.706 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-02-08 04:45:18.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:18.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:18.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:45:18.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:45:18.065 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:45:18.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:45:18.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:45:18.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:45:18.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:18.085 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:45:18.085 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:45:18.085 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:45:18.085 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:45:18.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:18.145 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:45:18.145 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:45:18.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:18.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:18.179 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-02-08 04:45:18.651 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-02-08 04:45:19.124 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-02-08 04:45:19.597 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-02-08 04:45:20.069 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-02-08 04:45:20.541 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-02-08 04:45:21.013 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-02-08 04:45:21.487 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-02-08 04:45:21.959 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-02-08 04:45:22.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:22.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:22.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:45:22.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:45:22.337 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:45:22.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:45:22.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:45:22.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:45:22.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:22.358 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:45:22.358 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:45:22.358 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:45:22.358 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:45:22.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:22.412 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:45:22.412 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:45:22.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:22.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:22.431 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-02-08 04:45:22.903 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-02-08 04:45:23.375 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-02-08 04:45:23.848 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-02-08 04:45:24.319 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-02-08 04:45:24.793 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-02-08 04:45:25.265 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-02-08 04:45:25.738 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-02-08 04:45:26.211 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-02-08 04:45:26.683 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-02-08 04:45:26.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:26.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:26.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:45:26.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:45:26.773 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:45:26.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:45:26.790 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:45:26.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:45:26.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:26.792 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:45:26.792 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:45:26.792 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:45:26.792 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:45:26.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:26.848 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:45:26.848 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:45:26.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:26.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:27.155 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-02-08 04:45:27.628 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-02-08 04:45:28.101 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-02-08 04:45:28.572 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-02-08 04:45:29.045 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-02-08 04:45:29.517 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-02-08 04:45:29.990 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-02-08 04:45:30.463 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-02-08 04:45:30.936 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-02-08 04:45:31.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:31.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:31.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:45:31.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:45:31.042 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:45:31.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:45:31.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:45:31.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:45:31.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:31.066 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:45:31.066 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:45:31.067 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:45:31.067 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:45:31.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:31.116 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:45:31.116 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:45:31.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:31.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:31.408 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-02-08 04:45:31.881 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-02-08 04:45:32.354 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-02-08 04:45:32.826 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-02-08 04:45:33.297 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-02-08 04:45:33.771 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-02-08 04:45:34.243 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-02-08 04:45:34.715 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-02-08 04:45:35.187 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-02-08 04:45:35.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:35.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:35.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:45:35.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:45:35.309 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:45:35.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:45:35.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:45:35.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:45:35.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:35.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:45:35.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:45:35.329 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:45:35.329 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:45:35.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:35.380 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:45:35.380 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:45:35.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:35.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:35.659 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-02-08 04:45:36.132 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-02-08 04:45:36.604 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-02-08 04:45:37.078 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-02-08 04:45:37.550 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-02-08 04:45:38.023 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-02-08 04:45:38.496 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-02-08 04:45:38.969 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-02-08 04:45:39.440 [DEBUG] clck_gen.py:113 IND CLOCK 19584
2026-02-08 04:45:39.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:39.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:39.582 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:45:39.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:45:39.583 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:45:39.603 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:45:39.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:45:39.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:45:39.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:45:39.608 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:45:39.609 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:45:39.609 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:45:39.609 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:45:39.609 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:45:39.610 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:45:39.610 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:45:39.610 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=19622 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:45:39.610 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=19622 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:45:39.610 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=19622 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:45:39.610 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=19622 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:45:39.610 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=19622 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:45:39.610 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=19622 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:45:39.610 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=19622 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:45:44.610 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:45:44.610 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:45:44.610 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:45:44.610 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:45:44.610 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:45:44.610 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:45:44.619 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:45:44.619 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:45:44.619 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:45:44.619 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:45:44.619 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:45:44.622 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:45:44.623 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:45:44.623 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:45:44.623 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:45:44.623 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:45:44.624 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:45:44.624 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:45:44.624 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:45:44.627 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:45:44.627 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:45:44.627 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:45:44.627 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:45:44.628 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:45:44.628 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:45:44.628 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:45:44.628 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:45:44.631 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:45:44.631 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:45:44.631 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:45:44.631 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:45:44.631 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:45:44.631 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:45:44.631 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:45:44.631 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:45:44.636 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:45:44.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:45:44.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:45:44.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:45:44.636 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:45:44.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:45:44.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:45:44.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:45:44.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:45:44.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:45:44.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:45:44.637 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:45:44.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:45:44.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:45:44.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:45:44.637 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:45:44.637 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:45:44.637 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:45:44.637 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:45:44.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:45:44.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:45:44.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:45:44.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:45:44.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:45:44.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:45:44.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:45:44.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:45:44.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:45:44.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:45:44.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:45:44.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:45:44.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:45:44.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:45:44.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:45:44.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:45:44.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:45:44.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:45:44.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:45:44.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:45:44.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:45:44.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:45:44.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:45:44.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:45:44.639 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:45:44.639 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:45:44.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:45:44.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:45:44.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:45:44.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:45:44.640 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:45:44.640 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:45:44.640 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:45:44.640 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:45:44.640 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:45:49.648 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:45:49.648 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:45:49.648 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:45:49.648 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:45:49.648 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:45:49.648 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:45:49.656 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:45:49.656 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:45:49.657 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:45:49.657 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:45:49.657 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:45:49.660 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:45:49.660 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:45:49.661 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:45:49.661 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:45:49.661 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:45:49.661 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:45:49.662 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:45:49.662 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:45:49.664 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:45:49.664 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:45:49.664 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:45:49.664 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:45:49.664 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:45:49.665 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:45:49.665 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:45:49.665 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:45:49.667 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:45:49.668 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:45:49.668 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:45:49.668 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:45:49.668 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:45:49.668 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:45:49.668 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:45:49.668 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:45:49.672 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:45:49.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:45:49.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:45:49.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:45:49.672 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:45:49.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:45:49.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:45:49.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:45:49.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:45:49.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:45:49.673 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:45:49.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:45:49.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:45:49.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:45:49.673 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:45:49.673 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:45:49.673 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:45:49.673 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:45:49.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:45:49.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:45:49.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:45:49.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:45:49.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:45:49.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:45:49.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:45:49.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:45:49.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:45:49.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:45:49.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:45:49.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:45:49.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:45:49.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:45:49.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:45:49.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:45:49.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:45:49.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:45:49.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:45:49.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:45:49.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:45:49.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:45:49.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:45:49.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:45:49.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:45:49.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:45:49.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:45:49.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:45:49.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:45:49.678 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:45:50.157 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:45:50.197 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:45:50.198 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:45:50.200 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:45:50.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:50.217 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:45:50.217 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:45:50.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:45:50.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:50.226 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:45:50.226 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:45:50.226 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:45:50.226 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:45:50.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:50.262 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:45:50.262 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:45:50.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:50.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:50.627 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:45:50.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:45:50.676 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:45:50.676 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:45:50.677 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:45:51.100 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:45:51.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:51.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:51.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:45:51.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:45:51.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:45:51.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:45:51.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:45:51.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:51.325 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:45:51.325 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:45:51.325 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:45:51.325 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:45:51.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:51.376 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:45:51.377 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:45:51.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:51.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:51.572 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:45:51.676 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:45:51.678 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:45:51.678 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:45:51.678 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:45:52.043 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:45:52.517 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:45:52.678 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:45:52.678 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:45:52.679 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:45:52.679 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:45:52.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:52.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:52.736 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:45:52.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:45:52.754 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:45:52.755 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:45:52.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:45:52.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:52.758 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:45:52.758 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:45:52.758 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:45:52.758 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:45:52.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:52.811 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:45:52.812 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:45:52.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:52.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:52.989 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:45:53.461 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:45:53.678 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:45:53.680 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:45:53.680 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:45:53.680 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:45:53.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:53.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:53.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:45:53.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:45:53.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:45:53.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:45:53.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:45:53.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:53.923 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:45:53.923 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:45:53.923 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:45:53.923 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:45:53.932 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:45:53.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:53.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:45:53.971 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:45:53.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:53.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:54.403 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:45:54.679 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:45:54.682 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:45:54.682 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:45:54.682 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:45:54.874 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:45:55.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:55.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:55.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:45:55.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:45:55.339 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:45:55.339 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:45:55.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:45:55.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:55.341 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:45:55.342 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:45:55.342 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:45:55.342 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:45:55.347 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:45:55.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:55.400 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:45:55.400 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:45:55.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:55.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:55.818 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:45:56.291 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:45:56.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:56.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:56.413 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:45:56.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:45:56.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:45:56.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:45:56.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:45:56.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:56.430 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:45:56.430 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:45:56.430 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:45:56.430 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:45:56.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:56.485 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:45:56.486 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-02-08 04:45:56.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:56.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:56.763 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:45:57.237 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:45:57.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:57.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:57.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:45:57.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:45:57.438 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:45:57.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:45:57.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:45:57.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:45:57.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:57.455 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:45:57.455 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:45:57.455 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:45:57.456 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:45:57.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:57.511 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:45:57.511 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-02-08 04:45:57.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:57.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:57.710 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:45:58.181 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:45:58.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:58.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:58.458 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:45:58.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:45:58.458 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:45:58.458 [WARNING] transceiver.py:257 (MS@172.18.152.22:6700) RX TRXD message (fn=1898 tn=5 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:45:58.475 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:45:58.475 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:45:58.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:45:58.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:58.478 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:45:58.478 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:45:58.478 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:45:58.478 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:45:58.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:45:58.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:58.528 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:45:58.528 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:45:58.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:58.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:58.651 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:45:59.122 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:45:59.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:59.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:59.478 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:45:59.478 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:45:59.499 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:45:59.499 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:45:59.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:45:59.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:59.501 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:45:59.501 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:45:59.502 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:45:59.502 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:45:59.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:45:59.551 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:45:59.551 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:45:59.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:59.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:45:59.593 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:46:00.064 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:46:00.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:00.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:00.498 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:00.499 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:00.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:00.516 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:00.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:46:00.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:00.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:46:00.519 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:46:00.519 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:46:00.519 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:46:00.534 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:46:00.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:46:00.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:00.572 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:46:00.573 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:46:00.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:00.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:01.006 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:46:01.479 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:46:01.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:01.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:01.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:01.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:01.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:01.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:01.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:46:01.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:01.898 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:46:01.898 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:46:01.898 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:46:01.898 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:46:01.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:01.951 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:46:01.955 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:46:01.956 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 04:46:01.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:01.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:02.423 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:46:02.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:02.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:02.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:02.846 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:02.846 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:46:02.865 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:02.865 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:02.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:46:02.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:02.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:46:02.867 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:46:02.868 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:46:02.868 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:46:02.894 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:46:02.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:02.920 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:46:02.920 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 04:46:02.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:02.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:03.368 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:46:03.841 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:46:03.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:03.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:03.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:03.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:03.870 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:46:03.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:03.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:03.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:46:03.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:03.886 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:46:03.886 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:46:03.886 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:46:03.886 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:46:03.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:03.940 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:46:03.940 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:46:03.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:03.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:04.312 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:46:04.786 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:46:04.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:04.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:04.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:04.946 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:04.946 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:46:04.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:04.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:04.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:46:04.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:04.958 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:46:04.958 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:46:04.958 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:46:04.958 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:46:05.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:05.008 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:46:05.008 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:46:05.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:05.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:05.257 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 04:46:05.729 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 04:46:06.203 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 04:46:06.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:06.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:06.376 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:06.376 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:06.376 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:46:06.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:06.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:06.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:46:06.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:06.392 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:46:06.392 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:46:06.392 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:46:06.392 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:46:06.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:06.443 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:46:06.444 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:46:06.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:06.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:06.675 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 04:46:07.147 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 04:46:07.621 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 04:46:07.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:07.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:07.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:07.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:07.815 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:46:07.823 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:07.823 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:07.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:46:07.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:07.825 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:46:07.825 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:46:07.825 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:46:07.825 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:46:07.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:07.875 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:46:07.875 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:46:07.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:07.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:08.093 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 04:46:08.566 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 04:46:09.039 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 04:46:09.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:09.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:09.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:09.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:09.251 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:46:09.264 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:09.264 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:09.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:46:09.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:09.268 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:46:09.268 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:46:09.268 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:46:09.268 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:46:09.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:09.327 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:46:09.327 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:46:09.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:09.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:09.512 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 04:46:09.987 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 04:46:10.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:10.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:10.382 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:10.383 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:10.383 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:46:10.399 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:10.400 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:10.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:46:10.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:10.402 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:46:10.402 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:46:10.402 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:46:10.402 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:46:10.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:10.455 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:46:10.456 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:46:10.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:10.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:10.458 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 04:46:10.930 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 04:46:11.402 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 04:46:11.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:11.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:11.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:11.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:11.815 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:46:11.824 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:11.824 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:11.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:46:11.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:11.826 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:46:11.826 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:46:11.826 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:46:11.826 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:46:11.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:11.874 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:46:11.874 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:46:11.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:11.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:11.875 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 04:46:12.348 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 04:46:12.820 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 04:46:13.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:13.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:13.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:13.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:13.251 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:46:13.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:13.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:13.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:46:13.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:13.272 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:46:13.272 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:46:13.272 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:46:13.272 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:46:13.293 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 04:46:13.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:13.326 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:46:13.326 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:46:13.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:13.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:13.765 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 04:46:14.238 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 04:46:14.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:14.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:14.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:14.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:14.687 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:46:14.699 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:46:14.699 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:46:14.699 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:46:14.699 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:46:14.705 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:46:14.705 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:46:14.706 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:46:14.706 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:46:14.706 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:46:14.706 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:46:14.706 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:46:14.707 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5406 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:46:14.707 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5406 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:46:14.707 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5406 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:46:14.707 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5407 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:46:14.707 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5407 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:46:14.707 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5407 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:46:14.707 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5407 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:46:14.707 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5407 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:46:14.707 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5407 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:46:14.707 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5407 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:46:14.707 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5407 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:46:19.707 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:46:19.707 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:46:19.707 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:46:19.707 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:46:19.707 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:46:19.707 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:46:19.716 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:46:19.718 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:46:19.718 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:46:19.718 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:46:19.718 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:46:19.723 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:46:19.724 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:46:19.724 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:46:19.724 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:46:19.724 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:46:19.724 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:46:19.724 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:46:19.724 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:46:19.729 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:46:19.729 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:46:19.729 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:46:19.729 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:46:19.729 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:46:19.729 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:46:19.729 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:46:19.729 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:46:19.734 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:46:19.734 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:46:19.734 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:46:19.734 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:46:19.734 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:46:19.734 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:46:19.734 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:46:19.734 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:46:19.740 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:46:19.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:46:19.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:46:19.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:46:19.740 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:46:19.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:46:19.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:46:19.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:46:19.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:46:19.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:46:19.741 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:46:19.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:46:19.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:46:19.741 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:46:19.741 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:46:19.741 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:46:19.741 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:46:19.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:46:19.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:46:19.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:46:19.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:46:19.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:46:19.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:46:19.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:46:19.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:46:19.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:46:19.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:46:19.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:46:19.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:46:19.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:46:19.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:46:19.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:46:19.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:46:19.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:46:19.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:46:19.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:46:19.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:46:19.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:46:19.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:46:19.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:46:19.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:46:19.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:46:19.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:46:19.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:46:19.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:46:19.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:46:19.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:46:19.746 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:46:20.225 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:46:20.273 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:46:20.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:20.276 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:46:20.279 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:46:20.303 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:20.304 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:20.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:46:20.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:20.316 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:46:20.317 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:46:20.317 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:46:20.317 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:46:20.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:46:20.372 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:46:20.372 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:46:20.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:20.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:20.697 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:46:20.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:46:20.745 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:46:20.745 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:46:20.748 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:46:21.169 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:46:21.642 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:46:21.745 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:46:21.746 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:46:21.746 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:46:21.749 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:46:22.115 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:46:22.587 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:46:22.747 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:46:22.747 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:46:22.747 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:46:22.750 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:46:23.061 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:46:23.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:23.534 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:46:23.748 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:46:23.748 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:46:23.748 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:46:23.751 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:46:24.005 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:46:24.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:24.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:24.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:24.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:24.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:46:24.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:24.080 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:46:24.080 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:46:24.080 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:46:24.080 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:46:24.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:46:24.097 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:46:24.098 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:46:24.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:24.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:24.476 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:46:24.749 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:46:24.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:46:24.750 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:46:24.752 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:46:24.949 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:46:25.422 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:46:25.894 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:46:26.368 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:46:26.840 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:46:27.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:27.313 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:46:27.784 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:46:27.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:27.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:27.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:27.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:27.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:27.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:27.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:46:27.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:27.952 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:46:27.952 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:46:27.952 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:46:27.952 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:46:28.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:46:28.005 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:46:28.005 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 04:46:28.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:28.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:28.256 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:46:28.726 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:46:29.199 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:46:29.671 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:46:30.143 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:46:30.617 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:46:31.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:31.090 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:46:31.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:31.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:31.546 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:31.546 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:31.547 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:46:31.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:46:31.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:31.547 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:46:31.548 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:46:31.548 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:46:31.548 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:46:31.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:46:31.562 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:46:31.565 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:46:31.565 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 04:46:31.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:31.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:32.035 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:46:32.508 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:46:32.981 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:46:33.455 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:46:33.927 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:46:34.400 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:46:34.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:34.873 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:46:35.346 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 04:46:35.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:35.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:35.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:35.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:35.403 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:46:35.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:35.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:35.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:46:35.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:35.423 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:46:35.423 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:46:35.423 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:46:35.423 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:46:35.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:46:35.473 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:46:35.473 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:46:35.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:35.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:35.820 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 04:46:36.292 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 04:46:36.763 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 04:46:37.237 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 04:46:37.709 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 04:46:38.182 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 04:46:38.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:38.655 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 04:46:39.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:39.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:39.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:39.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:39.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:46:39.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:39.093 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:46:39.093 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:46:39.093 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:46:39.093 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:46:39.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:46:39.124 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:46:39.124 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:46:39.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:39.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:39.128 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 04:46:39.600 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 04:46:40.071 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 04:46:40.544 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 04:46:41.017 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 04:46:41.489 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 04:46:41.960 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 04:46:42.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:42.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:42.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:42.400 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:42.400 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:42.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:42.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:42.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:46:42.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:42.419 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:46:42.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:46:42.419 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:46:42.419 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:46:42.433 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 04:46:42.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:46:42.465 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:46:42.465 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:46:42.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:42.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:42.906 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 04:46:43.378 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 04:46:43.850 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 04:46:44.324 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 04:46:44.796 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 04:46:45.270 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 04:46:45.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:45.743 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 04:46:46.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:46.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:46.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:46.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:46.139 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:46:46.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:46:46.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:46.140 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:46:46.140 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:46:46.140 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:46:46.140 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:46:46.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:46:46.166 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:46:46.167 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:46:46.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:46.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:46.215 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 04:46:46.687 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 04:46:47.160 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 04:46:47.633 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 04:46:48.107 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 04:46:48.579 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 04:46:49.051 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-08 04:46:49.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:49.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:49.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:49.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:49.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:49.445 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:46:49.451 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:46:49.451 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:46:49.451 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:46:49.451 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:46:49.452 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:46:49.452 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:46:49.452 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:46:49.452 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:46:49.452 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:46:49.452 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:46:49.452 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:46:49.452 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6413 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:46:49.452 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6413 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:46:49.452 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6413 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:46:49.452 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6413 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:46:49.452 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6413 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:46:49.452 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6413 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:46:54.459 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:46:54.459 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:46:54.459 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:46:54.459 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:46:54.459 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:46:54.459 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:46:54.468 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:46:54.469 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:46:54.469 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:46:54.470 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:46:54.470 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:46:54.475 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:46:54.475 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:46:54.475 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:46:54.475 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:46:54.475 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:46:54.475 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:46:54.476 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:46:54.476 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:46:54.480 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:46:54.480 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:46:54.481 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:46:54.481 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:46:54.481 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:46:54.481 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:46:54.481 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:46:54.481 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:46:54.485 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:46:54.485 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:46:54.485 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:46:54.485 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:46:54.486 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:46:54.486 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:46:54.486 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:46:54.486 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:46:54.491 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:46:54.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:46:54.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:46:54.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:46:54.491 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:46:54.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:46:54.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:46:54.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:46:54.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:46:54.492 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:46:54.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:46:54.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:46:54.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:46:54.492 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:46:54.492 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:46:54.492 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:46:54.492 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:46:54.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:46:54.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:46:54.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:46:54.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:46:54.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:46:54.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:46:54.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:46:54.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:46:54.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:46:54.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:46:54.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:46:54.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:46:54.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:46:54.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:46:54.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:46:54.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:46:54.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:46:54.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:46:54.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:46:54.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:46:54.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:46:54.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:46:54.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:46:54.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:46:54.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:46:54.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:46:54.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:46:54.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:46:54.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:46:54.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:46:54.497 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:46:54.976 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:46:55.020 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:46:55.022 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:46:55.024 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:46:55.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:55.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:55.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:55.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:46:55.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:55.054 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:46:55.054 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:46:55.054 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:46:55.054 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:46:55.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:46:55.075 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:46:55.075 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:46:55.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:55.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:55.448 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:46:55.496 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:46:55.497 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:46:55.497 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:46:55.497 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:46:55.919 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:46:56.393 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:46:56.498 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:46:56.498 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:46:56.498 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:46:56.498 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:46:56.866 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:46:57.338 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:46:57.499 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:46:57.499 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:46:57.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:46:57.500 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:46:57.812 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:46:58.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:58.285 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:46:58.500 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:46:58.501 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:46:58.501 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:46:58.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:46:58.757 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:46:58.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:46:58.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:58.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:46:58.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:46:58.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:46:58.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:58.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:46:58.835 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:46:58.835 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:46:58.835 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:46:58.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:46:58.851 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:46:58.851 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:46:58.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:58.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:46:59.231 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:46:59.501 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:46:59.501 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:46:59.501 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:46:59.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:46:59.704 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:47:00.175 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:47:00.648 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:47:01.121 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:47:01.593 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:47:01.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:47:02.067 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:47:02.539 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:47:02.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:47:02.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:02.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:47:02.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:47:02.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:47:02.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:02.691 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:47:02.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:47:02.692 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:47:02.692 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:47:02.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:47:02.728 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:47:02.729 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:47:02.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:02.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:03.012 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:47:03.485 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:47:03.958 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:47:04.431 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:47:04.902 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:47:05.375 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:47:05.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:47:05.848 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:47:06.319 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:47:06.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:47:06.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:06.540 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:47:06.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:47:06.541 [WARNING] transceiver.py:257 (MS@172.18.152.22:6700) RX TRXD message (fn=2600 tn=6 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:47:06.541 [WARNING] transceiver.py:257 (MS@172.18.152.22:6700) RX TRXD message (fn=2600 tn=7 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:47:06.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:47:06.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:06.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:47:06.542 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:47:06.543 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:47:06.543 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:47:06.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:47:06.554 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:47:06.554 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:47:06.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:06.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:06.792 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:47:07.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:47:07.266 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:47:07.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:47:07.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:07.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:47:07.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:47:07.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:47:07.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:47:07.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:47:07.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:07.527 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:47:07.527 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:47:07.527 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:47:07.527 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:47:07.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:47:07.573 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:47:07.573 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 04:47:07.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:07.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:07.739 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:47:08.212 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:47:08.685 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:47:09.159 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:47:09.632 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:47:10.106 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 04:47:10.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:47:10.579 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 04:47:11.052 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 04:47:11.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:47:11.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:11.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:47:11.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:47:11.125 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:47:11.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:47:11.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:11.126 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:47:11.126 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:47:11.126 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:47:11.126 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:47:11.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:47:11.143 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:47:11.143 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 04:47:11.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:11.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:11.524 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 04:47:11.998 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 04:47:12.472 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 04:47:12.945 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 04:47:13.419 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 04:47:13.892 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 04:47:14.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:47:14.366 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 04:47:14.838 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 04:47:14.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:47:14.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:14.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:47:14.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:47:14.987 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:47:14.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:47:14.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:14.988 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:47:14.988 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:47:14.989 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:47:14.989 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:47:15.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:47:15.025 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:47:15.025 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 04:47:15.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:15.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:15.310 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 04:47:15.782 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 04:47:16.255 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 04:47:16.727 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 04:47:17.199 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 04:47:17.672 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 04:47:18.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:47:18.144 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 04:47:18.617 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 04:47:18.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:47:18.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:18.840 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:47:18.840 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:47:18.840 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:47:18.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:47:18.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:18.841 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:47:18.841 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:47:18.842 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:47:18.842 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:47:18.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:47:18.854 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:47:18.854 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 04:47:18.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:18.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:19.091 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 04:47:19.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:47:19.564 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 04:47:19.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:47:19.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:19.808 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:47:19.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:47:19.808 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:47:19.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:47:19.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:47:19.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:47:19.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:19.829 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:47:19.829 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:47:19.829 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:47:19.829 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:47:19.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:47:19.881 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:47:19.881 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:47:19.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:19.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:20.036 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 04:47:20.508 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 04:47:20.981 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 04:47:21.454 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 04:47:21.926 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 04:47:22.397 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 04:47:22.870 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 04:47:23.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:47:23.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:47:23.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:23.307 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:47:23.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:47:23.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:47:23.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:23.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:47:23.309 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:47:23.309 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:47:23.309 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:47:23.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:47:23.339 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:47:23.340 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:47:23.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:23.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:23.343 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 04:47:23.815 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-08 04:47:24.286 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-08 04:47:24.760 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-08 04:47:25.231 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-08 04:47:25.704 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-08 04:47:26.178 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-08 04:47:26.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:47:26.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:47:26.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:26.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:47:26.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:47:26.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:47:26.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:26.614 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:47:26.614 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:47:26.614 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:47:26.615 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:47:26.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:47:26.646 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:47:26.646 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:47:26.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:26.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:26.650 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-08 04:47:27.122 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-08 04:47:27.593 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-08 04:47:28.067 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-08 04:47:28.539 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-08 04:47:29.011 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-08 04:47:29.485 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-08 04:47:29.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:47:29.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:47:29.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:29.921 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:47:29.921 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:47:29.921 [WARNING] transceiver.py:257 (MS@172.18.152.22:6700) RX TRXD message (fn=7645 tn=3 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:47:29.921 [WARNING] transceiver.py:257 (MS@172.18.152.22:6700) RX TRXD message (fn=7645 tn=4 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:47:29.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:47:29.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:29.921 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:47:29.922 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:47:29.922 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:47:29.922 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:47:29.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:47:29.953 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:47:29.954 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:47:29.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:29.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:29.957 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-08 04:47:30.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:47:30.430 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-08 04:47:30.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:47:30.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:30.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:47:30.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:47:30.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:47:30.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:47:30.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:47:30.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:30.880 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:47:30.880 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:47:30.880 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:47:30.880 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:47:30.900 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-08 04:47:30.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:47:30.929 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:47:30.929 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:47:30.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:30.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:31.373 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-08 04:47:31.846 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-08 04:47:32.319 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-08 04:47:32.792 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-08 04:47:33.264 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-08 04:47:33.736 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-08 04:47:34.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:47:34.209 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-08 04:47:34.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:47:34.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:34.599 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:47:34.599 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:47:34.600 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:47:34.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:47:34.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:34.600 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:47:34.600 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:47:34.600 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:47:34.601 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:47:34.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:47:34.627 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:47:34.627 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:47:34.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:34.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:34.682 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-08 04:47:35.155 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-08 04:47:35.629 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-08 04:47:36.101 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-08 04:47:36.575 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-08 04:47:37.048 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-08 04:47:37.522 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-08 04:47:37.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:47:37.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:47:37.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:37.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:47:37.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:47:37.912 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:47:37.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:47:37.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:37.914 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:47:37.914 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:47:37.914 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:47:37.914 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:47:37.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:47:37.939 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:47:37.939 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:47:37.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:37.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:37.994 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-02-08 04:47:38.466 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-02-08 04:47:38.938 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-02-08 04:47:39.412 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-02-08 04:47:39.884 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-02-08 04:47:40.358 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-02-08 04:47:40.830 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-02-08 04:47:40.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:47:41.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:47:41.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:41.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:47:41.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:47:41.226 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:47:41.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:47:41.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:41.226 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:47:41.226 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:47:41.227 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:47:41.227 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:47:41.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:47:41.252 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:47:41.253 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:47:41.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:41.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:41.302 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-02-08 04:47:41.776 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-02-08 04:47:41.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:47:42.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:47:42.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:42.167 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:47:42.167 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:47:42.167 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:47:42.181 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:47:42.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:47:42.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:47:42.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:47:42.183 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:47:42.183 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:47:42.183 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:47:42.183 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:47:42.183 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:47:42.183 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:47:42.183 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:47:42.183 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=10290 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:47:42.183 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=10291 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:47:42.183 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=10291 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:47:42.183 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=10291 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:47:42.183 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=10291 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:47:42.183 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=10291 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:47:42.183 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=10291 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:47:42.183 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=10291 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:47:42.183 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=10291 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:47:47.189 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:47:47.189 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:47:47.190 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:47:47.190 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:47:47.190 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:47:47.190 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:47:47.198 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:47:47.199 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:47:47.199 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:47:47.199 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:47:47.199 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:47:47.202 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:47:47.202 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:47:47.202 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:47:47.202 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:47:47.203 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:47:47.203 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:47:47.203 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:47:47.203 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:47:47.207 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:47:47.207 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:47:47.207 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:47:47.207 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:47:47.207 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:47:47.208 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:47:47.208 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:47:47.208 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:47:47.212 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:47:47.212 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:47:47.212 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:47:47.212 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:47:47.212 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:47:47.212 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:47:47.213 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:47:47.213 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:47:47.218 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:47:47.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:47:47.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:47:47.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:47:47.218 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:47:47.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:47:47.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:47:47.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:47:47.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:47:47.219 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:47:47.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:47:47.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:47:47.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:47:47.219 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:47:47.219 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:47:47.219 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:47:47.219 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:47:47.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:47:47.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:47:47.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:47:47.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:47:47.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:47:47.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:47:47.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:47:47.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:47:47.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:47:47.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:47:47.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:47:47.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:47:47.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:47:47.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:47:47.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:47:47.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:47:47.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:47:47.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:47:47.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:47:47.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:47:47.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:47:47.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:47:47.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:47:47.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:47:47.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:47:47.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:47:47.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:47:47.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:47:47.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:47:47.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:47:47.224 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:47:47.702 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:47:47.742 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:47:47.744 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:47:47.745 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:47:47.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:47:47.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:47:47.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:47:47.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:47:47.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:47:47.752 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:47:47.752 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:47:47.752 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:47:47.752 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:47:48.170 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:47:48.222 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:47:48.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:47:48.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:47:48.224 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:47:48.640 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:47:49.111 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:47:49.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:47:49.224 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:47:49.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:47:49.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:47:49.584 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:47:50.057 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:47:50.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:47:50.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:47:50.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:47:50.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:47:50.530 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:47:51.000 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:47:51.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:47:51.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:47:51.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:47:51.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:47:51.471 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:47:51.941 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:47:52.228 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:47:52.228 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:47:52.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:47:52.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:47:52.412 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:47:52.882 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:47:53.354 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:47:53.826 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:47:54.297 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:47:54.768 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:47:55.239 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:47:55.713 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:47:56.185 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:47:56.533 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:47:56.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:47:56.539 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:47:56.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:47:56.540 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:47:56.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:47:56.544 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:47:56.544 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:47:56.545 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:47:56.545 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:47:56.545 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:47:56.545 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:47:56.545 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:47:56.545 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2017 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:47:56.546 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2017 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:47:56.546 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2017 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:47:56.546 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2017 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:47:56.546 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2017 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:47:56.546 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2017 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:47:56.546 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2018 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:47:56.546 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2018 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:47:56.546 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2018 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:47:56.546 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2018 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:47:56.546 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2018 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:47:56.546 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2018 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:47:56.547 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2018 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:47:56.547 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2018 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:48:01.546 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:48:01.546 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:48:01.546 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:48:01.546 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:48:01.546 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:48:01.546 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:48:01.557 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:48:01.559 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:48:01.559 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:48:01.559 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:48:01.560 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:48:01.565 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:48:01.566 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:48:01.566 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:48:01.566 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:48:01.567 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:48:01.567 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:48:01.567 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:48:01.568 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:48:01.571 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:48:01.571 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:48:01.572 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:48:01.572 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:48:01.572 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:48:01.573 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:48:01.573 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:48:01.573 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:48:01.576 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:48:01.576 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:48:01.576 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:48:01.576 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:48:01.577 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:48:01.577 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:48:01.577 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:48:01.577 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:48:01.581 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:48:01.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:48:01.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:48:01.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:48:01.581 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:48:01.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:48:01.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:48:01.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:01.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:48:01.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:48:01.582 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:48:01.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:01.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:01.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:01.582 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:48:01.582 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:48:01.582 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:48:01.583 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:48:01.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:01.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:01.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:01.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:48:01.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:01.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:01.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:01.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:01.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:01.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:01.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:01.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:01.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:01.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:01.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:01.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:01.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:01.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:01.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:01.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:01.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:01.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:01.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:01.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:01.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:01.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:01.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:01.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:01.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:01.587 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:48:02.066 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:48:02.110 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:48:02.112 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:48:02.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:02.114 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:48:02.117 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:02.117 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:02.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:48:02.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:02.119 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:48:02.119 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:48:02.119 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:48:02.120 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:48:02.539 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:48:02.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:48:02.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:48:02.587 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:48:02.587 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:48:03.010 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:48:03.480 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:48:03.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:48:03.587 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:48:03.588 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:48:03.588 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:48:03.950 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:48:04.422 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:48:04.587 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:48:04.587 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:48:04.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:48:04.589 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:48:04.892 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:48:05.363 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:48:05.588 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:48:05.588 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:48:05.590 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:48:05.590 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:48:05.834 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:48:06.305 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:48:06.589 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:48:06.590 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:48:06.591 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:48:06.591 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:48:06.776 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:48:07.246 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:48:07.717 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:48:08.187 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:48:08.658 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:48:09.129 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:48:09.600 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:48:10.070 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:48:10.542 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:48:10.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:10.913 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:10.919 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:48:10.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:48:10.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:48:10.920 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:48:10.924 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:48:10.925 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:48:10.925 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:48:10.925 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:48:10.925 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:48:10.925 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:48:10.926 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:48:10.926 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2021 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:48:10.926 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2021 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:48:10.926 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2021 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:48:10.926 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2022 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:48:10.926 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2022 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:48:10.926 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2022 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:48:10.927 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2022 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:48:10.927 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2022 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:48:10.927 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2022 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:48:10.927 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2022 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:48:10.927 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2022 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:48:10.927 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2023 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:48:10.927 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2023 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:48:10.927 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2023 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:48:10.927 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2023 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:48:10.927 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2023 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:48:10.927 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2023 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:48:10.928 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2023 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:48:10.928 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2023 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:48:15.928 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:48:15.928 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:48:15.928 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:48:15.928 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:48:15.928 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:48:15.928 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:48:15.932 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:48:15.932 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:48:15.932 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:48:15.932 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:48:15.932 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:48:15.934 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:48:15.934 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:48:15.934 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:48:15.934 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:48:15.934 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:48:15.934 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:48:15.935 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:48:15.935 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:48:15.936 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:48:15.936 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:48:15.936 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:48:15.936 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:48:15.936 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:48:15.936 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:48:15.936 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:48:15.936 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:48:15.938 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:48:15.938 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:48:15.938 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:48:15.938 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:48:15.938 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:48:15.938 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:48:15.938 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:48:15.938 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:48:15.940 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:48:15.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:48:15.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:48:15.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:48:15.940 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:48:15.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:48:15.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:48:15.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:48:15.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:48:15.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:15.941 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:48:15.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:15.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:15.941 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:48:15.941 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:48:15.941 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:48:15.941 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:48:15.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:15.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:15.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:15.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:48:15.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:15.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:15.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:15.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:15.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:15.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:15.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:15.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:15.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:15.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:15.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:15.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:15.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:15.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:15.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:15.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:15.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:15.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:15.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:15.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:15.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:15.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:15.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:15.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:15.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:15.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:15.946 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:48:16.424 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:48:16.465 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:48:16.467 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:48:16.469 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:48:16.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:16.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:16.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:16.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:48:16.893 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:48:16.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:48:16.945 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:48:16.965 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:48:16.965 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:48:17.359 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:48:17.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:17.474 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:48:17.474 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:48:17.474 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:48:17.474 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:48:17.828 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:48:17.946 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:48:17.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:48:17.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:48:17.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:48:18.299 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:48:18.770 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:48:18.947 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:48:18.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:48:18.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:48:18.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:48:19.241 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:48:19.712 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:48:19.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:48:19.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:48:19.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:48:19.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:48:20.182 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:48:20.653 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:48:20.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:48:20.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:48:20.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:48:20.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:48:21.124 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:48:21.595 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:48:22.068 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:48:22.536 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:48:23.007 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:48:23.478 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:48:23.950 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:48:24.420 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:48:24.891 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:48:25.361 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:48:25.831 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:48:26.302 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:48:26.773 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:48:27.244 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:48:27.718 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:48:28.190 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:48:28.662 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:48:29.133 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:48:29.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:29.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:29.272 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:48:29.272 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:48:29.272 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:48:29.272 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:48:29.273 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:48:29.273 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:48:29.273 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:48:29.273 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:48:29.273 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:48:29.273 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:48:29.273 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:48:34.280 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:48:34.280 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:48:34.280 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:48:34.280 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:48:34.280 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:48:34.280 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:48:34.296 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:48:34.297 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:48:34.297 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:48:34.297 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:48:34.297 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:48:34.299 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:48:34.299 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:48:34.299 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:48:34.299 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:48:34.299 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:48:34.300 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:48:34.300 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:48:34.300 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:48:34.301 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:48:34.301 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:48:34.301 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:48:34.301 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:48:34.302 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:48:34.302 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:48:34.302 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:48:34.302 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:48:34.303 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:48:34.303 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:48:34.303 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:48:34.303 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:48:34.303 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:48:34.304 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:48:34.304 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:48:34.304 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:48:34.306 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:48:34.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:48:34.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:48:34.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:48:34.306 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:48:34.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:48:34.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:48:34.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:34.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:48:34.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:48:34.306 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:48:34.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:34.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:34.306 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:48:34.307 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:48:34.307 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:48:34.307 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:48:34.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:34.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:34.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:34.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:48:34.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:34.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:34.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:34.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:34.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:34.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:34.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:34.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:34.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:34.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:34.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:34.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:34.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:34.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:34.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:34.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:34.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:34.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:34.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:34.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:34.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:34.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:34.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:34.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:34.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:34.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:34.311 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:48:34.788 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:48:34.831 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:48:34.833 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:48:34.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:34.836 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:48:34.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:34.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:34.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:48:34.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:34.840 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:48:34.841 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:48:34.841 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:48:34.841 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:48:35.260 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:48:35.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:48:35.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:48:35.311 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:48:35.312 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:48:35.731 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:48:35.878 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:48:36.205 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:48:36.312 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:48:36.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:48:36.313 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:48:36.313 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:48:36.404 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:48:36.677 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:48:36.926 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:48:37.150 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:48:37.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:48:37.314 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:48:37.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:48:37.314 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:48:37.621 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:48:38.094 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:48:38.316 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:48:38.316 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:48:38.316 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:48:38.316 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:48:38.580 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:48:38.941 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:48:39.052 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:48:39.317 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:48:39.317 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:48:39.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:48:39.317 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:48:39.488 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:48:39.526 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:48:39.998 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:48:40.011 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:48:40.470 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:48:40.528 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:48:40.941 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:48:41.414 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:48:41.887 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:48:42.359 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:48:42.535 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:48:42.830 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:48:43.304 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:48:43.776 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:48:44.248 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:48:44.579 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:44.579 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:44.585 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:48:44.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:48:44.586 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:48:44.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:48:44.588 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:48:44.588 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:48:44.588 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:48:44.588 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:48:44.588 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:48:44.588 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:48:44.588 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:48:49.592 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:48:49.592 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:48:49.592 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:48:49.592 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:48:49.592 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:48:49.592 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:48:49.602 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:48:49.603 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:48:49.603 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:48:49.604 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:48:49.604 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:48:49.607 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:48:49.608 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:48:49.608 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:48:49.608 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:48:49.608 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:48:49.609 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:48:49.609 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:48:49.609 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:48:49.611 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:48:49.612 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:48:49.612 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:48:49.612 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:48:49.612 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:48:49.612 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:48:49.612 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:48:49.612 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:48:49.615 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:48:49.615 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:48:49.615 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:48:49.615 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:48:49.615 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:48:49.615 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:48:49.616 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:48:49.616 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:48:49.619 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:48:49.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:48:49.619 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:48:49.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:48:49.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:48:49.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:48:49.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:48:49.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:49.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:48:49.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:48:49.620 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:48:49.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:49.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:49.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:49.620 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:48:49.620 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:48:49.620 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:48:49.620 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:48:49.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:49.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:49.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:49.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:48:49.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:49.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:49.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:49.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:49.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:49.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:49.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:49.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:49.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:49.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:49.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:49.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:49.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:49.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:49.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:49.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:49.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:49.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:49.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:49.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:49.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:49.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:49.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:49.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:49.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:49.625 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:48:50.103 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:48:50.148 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:48:50.149 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:48:50.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:50.152 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:48:50.171 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:50.171 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:50.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:48:50.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:50.173 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:48:50.174 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:48:50.174 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:48:50.174 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:48:50.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:48:50.204 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:48:50.204 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:48:50.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:50.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:50.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:50.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:50.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:50.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:50.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:50.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:50.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:50.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:48:50.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:50.293 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:48:50.293 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:48:50.293 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:48:50.293 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:48:50.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:48:50.346 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:48:50.347 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:48:50.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:50.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:50.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:50.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:50.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:50.530 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:50.530 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:50.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:50.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:50.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:48:50.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:50.548 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:48:50.549 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:48:50.549 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:48:50.549 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:48:50.575 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:48:50.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:48:50.581 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:48:50.581 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:48:50.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:50.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:50.622 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:48:50.622 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:48:50.623 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:48:50.624 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:48:50.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:50.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:50.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:50.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:50.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:50.809 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:50.809 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:50.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:48:50.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:50.810 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:48:50.810 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:48:50.810 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:48:50.810 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:48:50.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:48:50.864 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:48:50.864 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:48:50.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:50.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:51.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:51.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.046 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:51.046 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:51.046 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:48:51.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:51.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:51.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:48:51.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.063 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:48:51.063 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:48:51.063 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:48:51.063 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:48:51.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:48:51.100 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:48:51.101 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:48:51.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:51.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:51.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.110 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:51.110 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:51.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:51.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:51.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:48:51.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.127 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:48:51.127 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:48:51.127 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:48:51.127 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:48:51.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:48:51.135 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:48:51.135 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-02-08 04:48:51.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:51.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:51.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:51.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:51.141 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:48:51.152 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:51.152 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:51.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:48:51.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.154 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:48:51.154 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:48:51.154 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:48:51.154 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:48:51.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:48:51.187 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:48:51.187 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-02-08 04:48:51.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:51.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:51.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:51.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:51.201 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:48:51.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:51.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:51.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:48:51.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.217 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:48:51.217 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:48:51.217 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:48:51.217 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:48:51.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:51.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:48:51.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:48:51.228 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:48:51.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:51.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:51.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:51.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:51.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:51.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:51.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:48:51.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.241 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:48:51.241 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:48:51.241 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:48:51.241 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:48:51.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:48:51.287 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:48:51.288 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:48:51.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:51.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:51.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:51.304 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:51.321 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:51.321 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:51.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:48:51.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.323 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:48:51.323 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:48:51.323 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:48:51.323 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:48:51.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:51.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:48:51.380 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:48:51.381 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:48:51.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:51.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:51.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:51.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:51.405 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:51.405 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:51.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:48:51.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.406 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:48:51.406 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:48:51.406 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:48:51.406 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:48:51.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:48:51.418 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:48:51.418 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 04:48:51.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:51.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:51.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:51.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:51.429 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:48:51.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:51.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:51.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:48:51.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.440 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:48:51.440 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:48:51.440 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:48:51.440 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:48:51.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:48:51.467 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:48:51.467 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 04:48:51.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:51.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:51.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:51.482 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:51.483 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:48:51.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:51.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:51.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:48:51.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.499 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:48:51.499 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:48:51.499 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:48:51.499 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:48:51.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:48:51.514 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:48:51.515 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:48:51.515 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:48:51.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:51.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:51.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.581 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:51.581 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:51.581 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:48:51.600 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:51.600 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:51.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:48:51.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.602 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:48:51.602 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:48:51.602 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:48:51.602 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:48:51.623 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:48:51.623 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:48:51.623 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:48:51.625 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:48:51.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:48:51.659 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:48:51.659 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:48:51.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:51.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:51.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.836 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:51.836 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:51.836 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:48:51.855 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:51.855 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:51.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:48:51.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.856 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:48:51.856 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:48:51.856 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:48:51.856 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:48:51.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:48:51.893 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:48:51.893 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:48:51.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:51.985 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:48:52.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:52.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:52.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:52.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:52.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:52.099 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:48:52.099 [WARNING] transceiver.py:257 (MS@172.18.152.22:6700) RX TRXD message (fn=537 tn=5 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:48:52.118 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:52.118 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:52.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:48:52.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:52.119 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:48:52.119 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:48:52.120 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:48:52.120 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:48:52.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:48:52.176 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:48:52.176 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:48:52.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:52.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:52.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:52.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:52.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:52.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:52.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:52.343 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:48:52.358 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:52.358 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:52.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:48:52.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:52.359 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:48:52.359 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:48:52.359 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:48:52.359 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:48:52.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:48:52.411 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:48:52.411 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:48:52.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:52.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:52.458 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:48:52.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:52.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:52.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:52.601 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:52.601 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:52.601 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:48:52.620 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:52.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:52.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:48:52.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:52.622 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:48:52.622 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:48:52.622 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:48:52.622 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:48:52.624 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:48:52.624 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:48:52.624 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:48:52.625 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:48:52.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:48:52.647 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:48:52.647 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:48:52.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:52.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:52.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:52.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:52.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:52.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:52.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:52.857 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:48:52.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:52.877 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:52.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:48:52.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:52.878 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:48:52.878 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:48:52.879 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:48:52.879 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:48:52.930 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:48:52.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:48:52.939 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:48:52.940 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:48:52.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:52.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:53.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:53.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:53.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:53.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:53.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:53.119 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:48:53.137 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:53.137 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:53.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:48:53.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:53.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:48:53.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:48:53.139 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:48:53.139 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:48:53.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:48:53.175 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:48:53.175 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:48:53.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:53.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:53.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:53.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:53.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:53.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:53.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:53.363 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:48:53.373 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:48:53.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:48:53.374 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:48:53.374 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:48:53.376 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:48:53.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:48:53.376 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:48:53.376 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:48:53.376 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:48:53.376 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:48:53.376 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:48:58.381 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:48:58.381 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:48:58.381 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:48:58.381 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:48:58.381 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:48:58.381 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:48:58.391 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:48:58.394 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:48:58.394 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:48:58.394 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:48:58.394 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:48:58.401 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:48:58.402 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:48:58.402 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:48:58.402 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:48:58.403 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:48:58.403 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:48:58.404 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:48:58.404 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:48:58.407 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:48:58.408 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:48:58.408 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:48:58.408 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:48:58.409 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:48:58.409 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:48:58.409 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:48:58.409 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:48:58.412 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:48:58.413 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:48:58.413 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:48:58.413 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:48:58.413 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:48:58.413 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:48:58.413 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:48:58.413 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:48:58.419 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:48:58.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:48:58.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:48:58.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:48:58.419 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:48:58.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:48:58.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:48:58.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:48:58.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:48:58.419 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:48:58.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:58.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:58.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:58.420 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:48:58.420 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:48:58.420 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:48:58.420 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:48:58.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:58.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:58.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:58.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:48:58.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:58.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:58.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:58.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:58.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:58.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:58.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:58.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:58.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:58.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:58.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:58.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:58.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:58.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:58.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:58.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:58.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:58.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:58.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:58.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:58.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:48:58.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:58.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:58.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:48:58.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:48:58.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:48:58.425 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:48:58.903 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:48:58.950 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:48:58.953 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:48:58.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:58.955 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:48:58.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:48:58.977 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:48:58.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:48:58.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:58.981 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:48:58.981 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:48:58.982 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:48:58.982 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:48:58.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 04:48:59.002 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:48:59.002 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:48:59.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:59.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:48:59.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:48:59.376 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:48:59.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:48:59.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:48:59.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:48:59.424 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:48:59.847 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:49:00.320 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:49:00.425 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:49:00.426 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:49:00.426 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:49:00.426 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:49:00.793 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:49:01.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:49:01.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:49:01.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:49:01.071 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:49:01.071 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:49:01.071 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:49:01.072 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:49:01.072 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:49:01.072 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:49:01.072 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:49:01.072 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:49:01.072 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:49:01.072 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:49:06.078 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:49:06.078 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:49:06.078 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:49:06.078 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:49:06.078 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:49:06.078 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:49:06.089 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:49:06.091 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:49:06.091 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:49:06.092 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:49:06.092 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:49:06.098 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:49:06.098 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:49:06.099 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:49:06.099 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:49:06.099 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:49:06.100 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:49:06.100 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:49:06.100 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:49:06.103 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:49:06.104 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:49:06.104 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:49:06.104 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:49:06.104 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:49:06.105 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:49:06.105 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:49:06.105 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:49:06.108 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:49:06.109 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:49:06.109 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:49:06.109 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:49:06.109 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:49:06.109 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:49:06.110 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:49:06.110 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:49:06.114 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:49:06.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:49:06.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:49:06.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:49:06.115 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:49:06.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:49:06.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:49:06.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:49:06.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:06.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:49:06.116 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:49:06.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:06.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:06.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:06.116 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:49:06.116 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:49:06.116 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:49:06.116 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:49:06.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:06.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:06.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:06.118 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:49:06.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:06.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:06.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:06.118 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:49:06.118 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:49:06.118 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:49:06.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:06.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:06.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:11.127 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:49:11.127 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:49:11.127 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:49:11.127 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:49:11.127 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:49:11.127 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:49:11.135 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:49:11.136 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:49:11.136 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:49:11.136 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:49:11.136 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:49:11.139 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:49:11.139 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:49:11.139 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:49:11.139 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:49:11.140 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:49:11.140 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:49:11.140 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:49:11.140 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:49:11.142 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:49:11.142 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:49:11.142 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:49:11.142 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:49:11.142 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:49:11.142 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:49:11.142 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:49:11.142 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:49:11.145 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:49:11.145 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:49:11.145 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:49:11.145 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:49:11.146 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:49:11.146 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:49:11.146 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:49:11.146 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:49:11.151 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:49:11.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:49:11.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:49:11.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:49:11.151 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:49:11.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:49:11.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:49:11.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:11.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:49:11.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:49:11.152 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:49:11.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:11.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:11.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:11.152 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:49:11.152 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:49:11.152 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:49:11.152 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:49:11.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:11.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:11.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:11.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:49:11.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:11.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:11.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:11.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:11.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:11.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:11.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:11.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:11.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:11.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:11.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:11.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:11.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:11.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:11.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:11.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:11.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:11.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:11.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:11.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:11.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:11.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:11.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:11.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:11.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:11.157 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:49:11.635 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:49:11.680 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:49:11.682 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:49:11.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:49:11.685 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:49:12.108 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:49:12.156 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:49:12.156 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:49:12.157 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:49:12.157 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:49:12.582 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:49:13.054 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:49:13.158 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:49:13.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:49:13.158 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:49:13.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:49:13.526 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:49:13.999 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:49:14.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:49:14.160 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:49:14.160 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:49:14.160 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:49:14.470 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:49:14.943 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:49:15.161 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:49:15.161 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:49:15.161 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:49:15.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:49:15.415 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:49:15.889 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:49:16.163 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:49:16.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:49:16.164 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:49:16.164 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:49:16.359 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:49:16.825 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:49:17.176 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:49:17.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:49:17.177 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:49:17.177 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:49:17.179 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:49:17.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:49:17.179 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:49:17.179 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:49:17.179 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:49:17.179 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:49:17.179 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:49:17.179 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1302 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:49:17.179 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1302 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:49:17.179 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1303 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:49:17.179 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1303 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:49:17.179 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1303 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:49:17.179 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1303 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:49:17.179 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1303 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:49:17.179 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1303 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:49:17.179 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1303 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:49:17.179 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1303 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:49:22.186 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:49:22.186 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:49:22.186 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:49:22.186 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:49:22.186 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:49:22.186 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:49:22.195 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:49:22.195 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:49:22.195 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:49:22.195 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:49:22.195 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:49:22.199 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:49:22.199 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:49:22.199 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:49:22.199 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:49:22.199 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:49:22.199 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:49:22.199 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:49:22.199 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:49:22.204 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:49:22.205 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:49:22.205 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:49:22.205 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:49:22.205 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:49:22.205 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:49:22.205 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:49:22.205 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:49:22.208 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:49:22.209 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:49:22.209 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:49:22.209 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:49:22.209 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:49:22.209 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:49:22.209 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:49:22.209 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:49:22.214 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:49:22.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:49:22.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:49:22.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:49:22.214 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:49:22.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:49:22.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:49:22.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:49:22.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:49:22.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:22.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:22.214 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:49:22.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:22.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:22.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:22.215 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:49:22.215 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:49:22.215 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:49:22.215 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:49:22.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:22.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:22.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:22.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:49:22.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:22.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:22.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:22.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:22.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:22.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:22.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:22.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:22.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:22.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:22.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:22.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:22.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:22.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:22.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:22.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:22.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:22.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:22.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:22.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:22.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:22.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:22.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:22.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:22.219 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:49:22.698 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:49:22.744 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:49:22.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:49:22.747 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:49:22.750 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:49:23.164 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:49:23.219 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:49:23.219 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:49:23.219 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:49:23.219 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:49:23.636 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:49:24.108 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:49:24.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:49:24.220 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:49:24.220 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:49:24.220 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:49:24.582 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:49:25.058 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:49:25.221 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:49:25.222 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:49:25.222 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:49:25.222 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:49:25.531 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:49:26.004 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:49:26.223 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:49:26.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:49:26.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:49:26.224 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:49:26.477 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:49:26.948 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:49:27.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:49:27.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:49:27.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:49:27.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:49:27.414 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:49:27.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:49:27.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:49:27.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:49:27.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:49:27.761 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:49:27.761 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:49:27.761 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:49:27.761 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:49:27.761 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:49:27.761 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:49:27.761 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:49:27.761 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1199 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:49:27.761 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1199 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:49:27.761 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1199 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:49:27.761 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1199 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:49:27.761 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1199 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:49:27.761 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1199 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:49:32.770 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:49:32.770 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:49:32.770 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:49:32.770 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:49:32.770 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:49:32.770 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:49:32.778 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:49:32.779 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:49:32.780 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:49:32.780 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:49:32.780 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:49:32.783 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:49:32.783 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:49:32.783 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:49:32.783 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:49:32.784 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:49:32.784 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:49:32.784 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:49:32.784 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:49:32.788 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:49:32.788 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:49:32.788 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:49:32.788 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:49:32.788 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:49:32.788 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:49:32.788 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:49:32.788 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:49:32.791 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:49:32.791 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:49:32.791 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:49:32.791 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:49:32.791 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:49:32.791 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:49:32.791 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:49:32.791 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:49:32.794 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:49:32.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:49:32.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:49:32.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:49:32.794 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:49:32.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:49:32.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:49:32.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:49:32.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:49:32.795 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:49:32.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:32.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:32.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:32.795 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:49:32.795 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:49:32.795 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:49:32.795 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:49:32.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:32.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:32.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:32.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:49:32.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:32.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:32.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:32.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:32.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:32.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:32.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:32.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:32.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:32.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:32.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:32.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:32.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:32.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:32.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:32.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:32.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:32.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:32.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:32.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:32.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:32.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:32.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:32.796 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:49:32.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:32.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:32.796 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:49:32.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:32.796 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:49:32.797 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:49:32.797 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:49:32.797 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:49:32.797 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:49:37.806 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:49:37.806 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:49:37.806 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:49:37.806 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:49:37.806 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:49:37.807 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:49:37.815 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:49:37.816 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:49:37.816 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:49:37.816 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:49:37.816 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:49:37.820 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:49:37.820 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:49:37.821 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:49:37.821 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:49:37.821 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:49:37.821 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:49:37.821 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:49:37.821 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:49:37.823 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:49:37.823 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:49:37.823 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:49:37.824 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:49:37.824 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:49:37.824 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:49:37.824 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:49:37.824 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:49:37.826 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:49:37.826 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:49:37.826 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:49:37.826 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:49:37.826 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:49:37.826 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:49:37.826 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:49:37.826 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:49:37.829 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:49:37.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:49:37.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:49:37.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:49:37.830 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:49:37.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:49:37.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:49:37.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:37.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:49:37.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:49:37.830 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:49:37.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:37.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:37.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:37.830 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:49:37.830 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:49:37.830 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:49:37.830 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:49:37.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:37.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:37.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:37.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:49:37.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:37.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:37.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:37.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:37.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:37.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:37.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:37.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:37.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:37.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:37.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:37.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:37.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:37.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:37.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:37.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:37.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:37.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:37.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:37.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:37.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:37.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:37.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:37.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:37.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:37.835 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:49:38.313 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:49:38.359 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:49:38.361 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:49:38.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:49:38.363 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:49:38.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:49:38.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:49:38.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:49:38.778 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:49:38.833 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:49:38.833 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:49:38.833 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:49:38.833 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:49:39.249 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:49:39.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:49:39.368 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:49:39.369 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:49:39.370 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:49:39.370 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:49:39.722 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:49:39.834 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:49:39.835 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:49:39.835 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:49:39.835 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:49:40.195 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:49:40.665 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:49:40.835 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:49:40.836 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:49:40.836 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:49:40.836 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:49:41.137 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:49:41.607 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:49:41.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:49:41.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:49:41.838 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:49:41.838 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:49:42.077 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:49:42.548 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:49:42.839 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:49:42.839 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:49:42.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:49:42.840 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:49:43.020 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:49:43.493 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:49:43.966 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:49:44.436 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:49:44.907 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:49:45.378 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:49:45.849 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:49:46.320 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:49:46.790 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:49:47.261 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:49:47.732 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:49:48.202 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:49:48.674 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:49:49.147 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:49:49.620 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:49:50.092 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:49:50.563 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:49:51.036 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:49:51.509 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:49:51.981 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:49:52.452 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:49:52.925 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:49:53.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:49:53.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:49:53.143 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:49:53.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:49:53.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:49:53.144 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:49:53.149 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:49:53.150 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:49:53.150 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:49:53.150 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:49:53.150 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:49:53.150 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:49:53.151 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:49:53.151 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3313 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:49:53.151 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3313 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:49:53.151 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3313 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:49:53.151 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3314 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:49:53.151 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3314 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:49:53.151 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3314 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:49:53.151 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3314 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:49:53.151 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3314 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:49:53.151 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3314 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:49:53.152 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3314 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:49:53.152 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3314 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:49:53.152 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3315 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:49:53.152 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3315 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:49:53.152 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3315 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:49:53.152 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3315 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:49:53.152 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3315 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:49:53.152 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3315 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:49:53.152 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3315 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:49:53.152 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3315 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:49:58.151 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:49:58.151 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:49:58.151 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:49:58.151 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:49:58.151 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:49:58.151 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:49:58.159 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:49:58.160 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:49:58.160 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:49:58.160 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:49:58.160 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:49:58.163 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:49:58.163 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:49:58.163 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:49:58.163 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:49:58.163 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:49:58.163 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:49:58.164 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:49:58.164 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:49:58.166 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:49:58.166 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:49:58.166 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:49:58.166 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:49:58.166 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:49:58.166 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:49:58.166 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:49:58.166 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:49:58.168 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:49:58.168 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:49:58.168 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:49:58.168 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:49:58.168 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:49:58.168 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:49:58.168 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:49:58.168 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:49:58.171 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:49:58.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:49:58.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:49:58.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:49:58.171 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:49:58.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:49:58.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:49:58.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:49:58.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:49:58.171 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:49:58.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:58.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:58.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:58.171 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:49:58.171 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:49:58.171 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:49:58.171 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:49:58.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:58.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:58.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:58.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:49:58.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:58.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:58.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:58.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:58.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:58.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:58.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:58.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:58.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:58.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:58.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:58.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:58.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:58.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:58.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:58.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:58.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:58.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:58.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:58.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:49:58.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:58.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:58.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:58.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:49:58.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:49:58.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:49:58.176 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:49:58.654 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:49:58.689 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:49:58.690 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:49:58.691 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:49:58.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:49:58.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:49:58.706 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:49:58.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:49:58.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:49:58.712 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:49:58.713 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:49:58.713 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:49:58.713 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:49:58.747 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:49:58.751 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:49:58.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:49:58.765 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:49:58.765 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:49:58.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:49:58.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:49:59.126 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:49:59.174 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:49:59.174 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:49:59.174 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:49:59.174 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:49:59.598 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:50:00.069 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:50:00.174 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:50:00.175 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:50:00.175 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:50:00.175 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:50:00.542 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:50:01.015 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:50:01.175 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:50:01.176 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:50:01.176 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:50:01.176 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:50:01.488 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:50:01.958 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:50:02.178 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:50:02.178 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:50:02.178 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:50:02.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:50:02.426 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:50:02.891 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:50:03.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:50:03.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:50:03.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:50:03.180 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:50:03.354 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:50:03.823 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:50:04.294 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:50:04.762 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:50:05.228 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:50:05.695 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:50:06.158 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:50:06.629 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:50:06.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:50:06.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:50:06.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:50:06.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:50:06.770 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:50:06.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:50:06.770 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:50:06.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:50:06.771 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:50:06.771 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:50:06.771 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:50:06.771 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:50:06.771 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:50:06.771 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:50:06.771 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:50:06.771 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1869 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:06.771 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1869 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:06.771 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1869 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:06.771 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1869 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:06.771 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1869 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:06.771 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1869 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:11.783 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:50:11.784 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:50:11.784 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:50:11.784 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:50:11.784 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:50:11.784 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:50:11.795 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:50:11.796 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:50:11.796 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:50:11.796 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:50:11.796 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:50:11.798 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:50:11.798 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:50:11.799 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:50:11.799 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:50:11.799 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:50:11.799 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:50:11.799 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:50:11.799 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:50:11.801 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:50:11.802 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:50:11.802 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:50:11.802 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:50:11.802 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:50:11.802 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:50:11.802 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:50:11.802 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:50:11.804 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:50:11.805 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:50:11.805 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:50:11.805 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:50:11.805 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:50:11.805 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:50:11.805 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:50:11.805 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:50:11.808 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:50:11.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:50:11.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:50:11.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:50:11.808 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:50:11.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:50:11.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:50:11.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:50:11.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:50:11.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:11.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:11.808 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:50:11.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:11.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:11.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:11.809 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:50:11.809 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:50:11.809 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:50:11.809 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:50:11.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:11.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:11.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:11.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:50:11.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:11.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:11.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:11.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:11.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:11.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:11.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:11.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:11.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:11.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:11.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:11.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:11.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:11.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:11.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:11.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:11.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:11.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:11.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:11.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:11.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:11.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:11.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:11.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:11.813 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:50:12.284 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:50:12.323 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:50:12.324 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:50:12.325 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:50:12.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:50:12.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:50:12.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:50:12.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:50:12.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:50:12.338 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:50:12.338 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:50:12.338 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:50:12.338 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:50:12.376 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:50:12.379 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:50:12.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:50:12.388 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:50:12.388 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:50:12.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:50:12.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:50:12.752 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:50:12.811 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:50:12.812 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:50:12.812 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:50:12.812 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:50:13.223 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:50:13.694 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:50:13.813 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:50:13.813 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:50:13.813 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:50:13.813 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:50:14.163 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:50:14.630 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:50:14.813 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:50:14.814 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:50:14.814 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:50:14.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:50:15.099 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:50:15.569 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:50:15.814 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:50:15.815 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:50:15.815 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:50:15.815 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:50:16.038 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:50:16.505 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:50:16.815 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:50:16.815 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:50:16.815 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:50:16.815 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:50:16.971 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:50:17.438 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:50:17.902 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:50:18.366 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:50:18.831 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:50:19.301 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:50:19.767 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:50:20.233 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:50:20.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:50:20.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:50:20.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:50:20.391 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:50:20.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:50:20.394 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:50:20.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:50:20.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:50:20.397 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:50:20.397 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:50:20.397 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:50:20.397 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:50:20.397 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:50:20.397 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:50:20.397 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:50:20.398 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1873 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:20.398 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1873 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:20.398 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1873 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:20.398 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1873 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:25.402 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:50:25.402 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:50:25.402 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:50:25.402 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:50:25.402 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:50:25.402 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:50:25.410 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:50:25.411 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:50:25.411 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:50:25.411 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:50:25.411 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:50:25.415 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:50:25.416 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:50:25.416 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:50:25.416 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:50:25.416 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:50:25.416 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:50:25.416 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:50:25.416 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:50:25.422 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:50:25.422 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:50:25.422 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:50:25.422 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:50:25.423 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:50:25.423 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:50:25.423 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:50:25.423 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:50:25.427 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:50:25.427 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:50:25.427 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:50:25.427 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:50:25.427 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:50:25.427 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:50:25.427 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:50:25.427 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:50:25.433 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:50:25.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:50:25.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:50:25.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:50:25.433 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:50:25.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:50:25.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:50:25.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:50:25.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:50:25.433 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:50:25.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:25.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:25.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:25.434 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:50:25.434 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:50:25.434 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:50:25.434 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:50:25.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:25.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:25.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:25.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:50:25.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:25.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:25.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:25.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:25.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:25.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:25.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:25.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:25.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:25.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:25.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:25.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:25.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:25.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:25.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:25.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:25.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:25.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:25.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:25.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:25.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:25.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:25.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:25.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:25.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:25.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:25.439 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:50:25.915 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:50:25.958 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:50:25.960 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:50:25.962 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:50:25.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:50:25.980 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:50:25.980 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:50:25.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:50:25.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:50:25.984 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:50:25.985 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:50:25.985 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:50:25.985 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:50:26.007 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:50:26.011 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:50:26.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:50:26.024 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:50:26.024 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 04:50:26.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:50:26.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:50:26.386 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:50:26.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:50:26.438 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:50:26.439 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:50:26.439 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:50:26.859 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:50:27.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:50:27.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:50:27.061 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:50:27.064 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:50:27.064 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:50:27.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:50:27.064 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:50:27.065 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:50:27.065 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:50:27.065 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:50:27.065 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:50:27.065 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:50:27.065 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:50:27.065 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:50:27.065 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=352 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:27.065 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=352 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:27.065 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=352 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:27.065 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=352 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:32.073 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:50:32.073 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:50:32.073 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:50:32.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:50:32.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:50:32.073 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:50:32.082 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:50:32.083 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:50:32.083 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:50:32.083 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:50:32.084 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:50:32.086 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:50:32.086 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:50:32.086 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:50:32.087 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:50:32.087 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:50:32.087 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:50:32.087 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:50:32.087 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:50:32.089 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:50:32.089 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:50:32.090 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:50:32.090 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:50:32.090 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:50:32.090 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:50:32.090 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:50:32.090 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:50:32.092 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:50:32.092 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:50:32.092 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:50:32.092 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:50:32.092 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:50:32.092 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:50:32.092 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:50:32.092 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:50:32.095 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:50:32.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:50:32.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:50:32.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:50:32.096 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:50:32.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:50:32.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:50:32.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:50:32.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:50:32.096 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:50:32.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:32.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:32.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:32.096 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:50:32.096 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:50:32.096 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:50:32.096 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:50:32.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:32.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:32.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:32.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:50:32.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:32.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:32.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:32.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:32.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:32.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:32.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:32.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:32.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:32.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:32.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:32.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:32.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:32.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:32.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:32.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:32.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:32.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:32.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:32.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:32.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:32.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:32.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:32.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:32.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:32.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:32.101 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:50:32.579 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:50:32.621 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:50:32.624 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:50:32.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:50:32.626 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:50:32.648 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:50:32.648 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:50:32.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:50:32.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:50:32.654 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:50:32.655 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:50:32.655 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:50:32.655 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:50:32.671 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:50:32.675 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:50:32.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:50:32.684 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:50:32.684 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 04:50:32.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:50:32.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:50:33.050 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:50:33.098 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:50:33.098 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:50:33.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:50:33.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:50:33.522 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:50:33.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:50:33.723 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:50:33.723 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:50:33.729 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:50:33.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:50:33.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:50:33.730 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:50:33.736 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:50:33.736 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:50:33.736 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:50:33.736 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:50:33.736 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:50:33.736 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:50:33.736 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:50:33.737 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=352 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:33.737 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=352 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:33.737 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=352 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:33.737 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=352 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:33.737 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=352 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:33.737 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=353 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:33.737 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=353 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:33.737 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=353 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:33.738 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=353 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:33.738 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=353 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:33.738 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=353 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:33.738 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=353 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:33.738 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=353 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:33.738 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=354 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:33.738 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=354 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:33.738 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=354 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:33.738 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=354 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:33.738 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=354 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:33.738 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=354 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:33.738 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=354 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:33.739 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=354 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:38.737 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:50:38.738 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:50:38.738 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:50:38.738 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:50:38.738 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:50:38.738 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:50:38.746 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:50:38.746 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:50:38.746 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:50:38.747 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:50:38.747 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:50:38.749 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:50:38.750 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:50:38.750 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:50:38.750 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:50:38.750 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:50:38.750 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:50:38.750 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:50:38.750 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:50:38.752 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:50:38.753 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:50:38.753 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:50:38.753 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:50:38.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:50:38.753 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:50:38.753 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:50:38.753 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:50:38.755 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:50:38.755 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:50:38.755 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:50:38.755 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:50:38.755 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:50:38.755 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:50:38.755 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:50:38.756 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:50:38.758 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:50:38.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:50:38.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:50:38.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:50:38.758 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:50:38.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:50:38.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:50:38.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:50:38.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:50:38.759 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:50:38.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:38.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:38.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:38.759 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:50:38.759 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:50:38.759 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:50:38.759 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:50:38.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:38.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:38.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:38.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:50:38.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:38.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:38.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:38.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:38.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:38.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:38.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:38.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:38.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:38.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:38.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:38.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:38.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:38.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:38.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:38.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:38.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:38.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:38.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:38.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:38.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:38.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:38.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:38.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:38.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:38.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:38.764 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:50:39.243 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:50:39.283 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:50:39.285 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:50:39.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:50:39.288 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:50:39.315 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:50:39.315 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:50:39.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:50:39.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:50:39.324 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:50:39.324 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:50:39.324 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:50:39.324 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:50:39.336 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:50:39.339 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:50:39.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:50:39.356 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:50:39.356 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 04:50:39.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:50:39.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:50:39.715 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:50:39.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:50:39.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:50:39.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:50:39.762 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:50:40.189 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:50:40.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:50:40.387 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:50:40.387 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:50:40.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:50:40.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:50:40.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:50:40.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:50:40.394 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:50:40.394 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:50:40.394 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:50:40.394 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:50:40.394 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:50:40.394 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:50:40.394 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:50:45.402 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:50:45.402 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:50:45.402 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:50:45.402 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:50:45.402 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:50:45.402 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:50:45.411 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:50:45.412 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:50:45.412 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:50:45.412 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:50:45.413 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:50:45.416 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:50:45.416 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:50:45.416 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:50:45.416 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:50:45.417 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:50:45.417 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:50:45.417 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:50:45.417 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:50:45.419 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:50:45.420 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:50:45.420 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:50:45.420 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:50:45.420 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:50:45.420 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:50:45.420 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:50:45.420 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:50:45.422 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:50:45.422 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:50:45.422 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:50:45.422 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:50:45.422 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:50:45.422 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:50:45.423 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:50:45.423 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:50:45.426 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:50:45.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:50:45.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:50:45.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:50:45.426 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:50:45.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:50:45.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:50:45.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:50:45.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:50:45.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:45.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:45.426 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:50:45.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:45.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:45.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:45.426 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:50:45.426 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:50:45.426 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:50:45.426 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:50:45.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:45.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:45.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:45.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:50:45.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:45.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:45.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:45.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:45.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:45.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:45.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:45.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:45.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:45.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:45.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:45.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:45.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:45.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:45.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:45.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:45.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:50:45.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:45.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:45.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:50:45.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:45.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:45.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:50:45.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:50:45.431 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:50:45.908 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:50:45.952 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:50:45.954 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:50:45.956 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:50:45.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:50:45.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:50:45.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:50:45.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:50:45.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:50:45.976 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:50:45.976 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:50:45.977 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:50:45.977 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:50:46.002 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:50:46.005 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:50:46.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:50:46.012 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:50:46.012 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:50:46.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:50:46.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:50:46.380 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:50:46.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:50:46.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:50:46.430 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:50:46.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:50:46.852 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:50:47.323 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:50:47.430 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:50:47.431 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:50:47.431 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:50:47.431 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:50:47.796 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:50:48.269 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:50:48.431 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:50:48.432 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:50:48.432 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:50:48.432 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:50:48.742 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:50:49.215 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:50:49.432 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:50:49.433 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:50:49.433 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:50:49.434 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:50:49.688 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:50:50.162 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:50:50.434 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:50:50.434 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:50:50.434 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:50:50.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:50:50.635 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:50:51.107 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:50:51.581 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:50:52.053 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:50:52.526 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:50:52.997 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:50:53.470 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:50:53.943 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:50:54.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:50:54.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:50:54.018 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:50:54.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:50:54.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:50:54.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:50:54.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:50:54.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:50:54.037 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:50:54.037 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:50:54.037 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:50:54.037 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:50:54.082 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:50:54.087 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:50:54.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:50:54.096 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:50:54.096 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-02-08 04:50:54.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:50:54.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:50:54.416 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:50:54.889 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:50:55.123 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:50:55.123 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:50:55.123 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:50:55.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:50:55.128 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:50:55.129 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:50:55.129 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:50:55.131 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:50:55.131 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:50:55.131 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:50:55.131 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:50:55.131 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:50:55.131 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:50:55.131 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:50:55.131 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2095 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:55.131 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2095 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:55.131 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2095 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:55.131 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2095 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:55.131 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2095 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:50:55.131 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2095 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:00.134 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:51:00.134 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:51:00.134 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:51:00.134 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:51:00.134 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:51:00.134 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:51:00.143 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:51:00.145 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:51:00.145 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:51:00.145 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:51:00.145 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:51:00.150 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:51:00.150 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:51:00.150 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:51:00.150 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:51:00.151 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:51:00.151 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:51:00.152 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:51:00.152 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:51:00.155 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:51:00.155 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:51:00.155 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:51:00.155 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:51:00.156 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:51:00.156 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:51:00.156 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:51:00.156 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:51:00.159 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:51:00.159 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:51:00.159 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:51:00.160 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:51:00.160 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:51:00.160 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:51:00.160 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:51:00.160 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:51:00.165 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:51:00.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:51:00.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:51:00.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:51:00.165 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:51:00.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:51:00.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:51:00.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:51:00.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:00.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:51:00.166 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:51:00.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:00.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:00.166 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:51:00.166 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:51:00.166 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:51:00.166 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:51:00.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:00.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:00.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:00.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:51:00.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:00.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:00.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:00.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:00.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:00.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:00.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:00.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:00.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:00.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:00.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:00.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:00.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:00.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:00.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:00.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:00.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:00.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:00.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:00.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:00.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:00.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:00.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:00.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:00.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:00.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:00.171 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:51:00.648 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:51:00.696 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:51:00.698 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:51:00.700 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:51:00.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:51:00.731 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:51:00.731 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:51:00.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:51:00.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:51:00.736 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:51:00.737 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:51:00.737 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:51:00.737 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:51:00.787 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:51:00.791 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:51:00.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:51:00.806 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:51:00.806 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 04:51:00.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:51:00.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:51:01.121 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:51:01.169 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:51:01.176 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:51:01.176 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:51:01.176 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:51:01.595 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:51:01.795 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:51:01.796 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:51:01.796 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:51:01.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:51:01.798 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:51:01.799 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:51:01.799 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:51:01.805 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:51:01.805 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:51:01.806 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:51:01.806 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:51:01.806 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:51:01.806 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:51:01.806 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:51:01.806 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=352 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:01.806 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=352 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:01.807 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=352 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:01.807 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=352 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:01.807 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=352 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:01.807 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=353 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:01.807 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=353 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:01.807 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=353 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:01.807 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=353 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:01.807 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=353 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:01.807 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=353 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:01.807 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=353 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:01.807 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=353 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:01.808 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=354 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:01.808 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=354 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:01.808 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=354 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:01.808 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=354 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:01.808 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=354 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:01.808 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=354 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:01.808 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=354 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:01.808 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=354 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:06.807 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:51:06.807 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:51:06.807 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:51:06.807 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:51:06.807 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:51:06.807 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:51:06.815 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:51:06.817 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:51:06.817 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:51:06.817 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:51:06.817 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:51:06.821 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:51:06.821 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:51:06.821 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:51:06.821 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:51:06.821 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:51:06.821 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:51:06.821 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:51:06.821 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:51:06.825 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:51:06.825 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:51:06.825 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:51:06.825 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:51:06.825 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:51:06.825 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:51:06.825 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:51:06.826 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:51:06.829 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:51:06.829 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:51:06.829 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:51:06.829 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:51:06.829 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:51:06.829 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:51:06.829 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:51:06.829 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:51:06.834 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:51:06.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:51:06.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:51:06.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:51:06.834 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:51:06.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:51:06.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:51:06.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:51:06.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:51:06.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:06.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:06.834 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:51:06.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:06.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:06.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:06.834 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:51:06.835 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:51:06.835 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:51:06.835 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:51:06.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:06.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:06.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:06.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:51:06.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:06.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:06.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:06.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:06.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:06.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:06.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:06.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:06.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:06.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:06.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:06.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:06.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:06.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:06.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:06.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:06.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:06.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:06.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:06.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:06.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:06.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:06.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:06.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:06.839 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:51:07.318 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:51:07.359 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:51:07.360 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:51:07.361 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:51:07.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:51:07.381 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:51:07.381 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:51:07.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:51:07.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:51:07.388 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:51:07.388 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:51:07.388 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:51:07.388 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:51:07.410 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:51:07.413 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:51:07.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:51:07.425 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:51:07.426 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:51:07.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:51:07.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:51:07.789 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:51:07.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:51:07.839 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:51:07.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:51:07.839 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:51:08.261 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:51:08.735 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:51:08.840 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:51:08.840 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:51:08.840 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:51:08.840 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:51:09.207 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:51:09.680 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:51:09.841 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:51:09.841 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:51:09.841 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:51:09.841 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:51:10.153 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:51:10.626 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:51:10.841 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:51:10.842 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:51:10.842 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:51:10.842 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:51:11.098 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:51:11.571 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:51:11.843 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:51:11.843 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:51:11.843 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:51:11.843 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:51:12.044 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:51:12.516 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:51:12.987 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:51:13.460 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:51:13.933 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:51:14.406 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:51:14.879 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:51:15.352 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:51:15.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:51:15.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:51:15.431 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:51:15.431 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:51:15.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:51:15.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:51:15.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:51:15.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:51:15.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:51:15.451 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:51:15.451 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:51:15.451 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:51:15.490 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:51:15.493 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:51:15.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:51:15.506 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:51:15.506 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:51:15.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:51:15.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:51:15.824 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:51:16.295 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:51:16.768 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:51:17.241 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:51:17.713 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:51:18.184 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:51:18.657 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:51:19.130 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:51:19.603 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:51:20.076 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:51:20.549 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:51:21.021 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:51:21.492 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:51:21.965 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:51:22.438 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 04:51:22.910 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 04:51:23.384 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 04:51:23.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:51:23.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:51:23.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:51:23.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:51:23.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:51:23.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:51:23.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:51:23.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:51:23.527 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:51:23.527 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:51:23.527 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:51:23.527 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:51:23.564 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:51:23.567 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:51:23.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:51:23.579 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:51:23.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:51:23.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:51:23.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:51:23.856 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 04:51:24.328 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 04:51:24.799 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 04:51:25.273 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 04:51:25.745 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 04:51:26.218 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 04:51:26.691 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 04:51:27.164 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 04:51:27.636 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 04:51:28.107 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 04:51:28.580 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 04:51:29.052 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 04:51:29.525 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 04:51:29.996 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 04:51:30.469 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 04:51:30.942 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 04:51:31.414 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 04:51:31.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:51:31.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:51:31.584 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:51:31.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:51:31.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:51:31.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:51:31.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:51:31.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:51:31.606 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:51:31.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:51:31.606 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:51:31.606 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:51:31.648 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:51:31.652 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:51:31.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:51:31.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:51:31.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:51:31.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:51:31.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:51:31.885 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 04:51:32.358 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 04:51:32.830 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 04:51:33.303 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 04:51:33.774 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 04:51:34.247 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 04:51:34.720 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 04:51:35.192 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 04:51:35.664 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 04:51:36.137 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-08 04:51:36.610 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-08 04:51:37.081 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-08 04:51:37.554 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-08 04:51:38.027 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-08 04:51:38.499 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-08 04:51:38.970 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-08 04:51:39.443 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-08 04:51:39.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:51:39.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:51:39.670 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:51:39.670 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:51:39.682 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:51:39.683 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:51:39.683 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:51:39.683 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:51:39.685 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:51:39.685 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:51:39.685 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:51:39.685 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:51:39.685 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:51:39.685 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:51:39.685 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:51:39.685 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7093 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:39.685 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7093 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:39.685 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7093 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:39.685 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7093 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:39.685 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7093 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:39.685 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7093 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:44.689 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:51:44.689 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:51:44.689 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:51:44.689 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:51:44.689 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:51:44.689 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:51:44.699 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:51:44.701 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:51:44.701 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:51:44.702 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:51:44.702 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:51:44.711 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:51:44.712 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:51:44.712 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:51:44.712 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:51:44.713 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:51:44.713 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:51:44.714 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:51:44.714 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:51:44.718 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:51:44.718 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:51:44.719 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:51:44.719 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:51:44.719 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:51:44.720 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:51:44.720 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:51:44.720 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:51:44.723 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:51:44.724 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:51:44.724 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:51:44.724 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:51:44.724 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:51:44.725 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:51:44.725 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:51:44.725 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:51:44.730 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:51:44.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:51:44.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:51:44.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:51:44.730 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:51:44.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:51:44.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:51:44.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:44.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:51:44.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:51:44.731 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:51:44.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:44.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:44.731 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:51:44.731 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:51:44.731 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:51:44.731 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:51:44.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:44.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:44.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:44.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:51:44.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:44.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:44.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:44.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:44.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:44.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:44.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:44.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:44.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:44.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:44.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:44.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:44.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:44.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:44.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:44.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:44.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:44.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:44.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:44.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:44.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:44.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:44.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:44.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:44.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:44.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:44.736 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:51:45.213 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:51:45.253 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:51:45.254 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:51:45.254 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:51:45.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:51:45.273 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:51:45.273 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:51:45.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:51:45.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:51:45.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:51:45.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:51:45.278 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:51:45.278 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:51:45.305 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:51:45.309 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:51:45.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:51:45.320 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:51:45.320 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:51:45.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:51:45.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:51:45.684 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:51:45.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:51:45.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:51:45.734 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:51:45.734 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:51:46.157 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:51:46.629 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:51:46.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:51:46.735 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:51:46.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:51:46.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:51:47.103 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:51:47.575 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:51:47.736 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:51:47.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:51:47.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:51:47.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:51:47.805 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:51:47.805 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:51:47.805 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:51:47.811 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:51:47.811 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:51:47.811 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:51:47.811 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:51:47.817 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:51:47.817 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:51:47.817 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:51:47.817 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:51:47.817 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:51:47.817 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:51:47.817 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:51:47.818 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=664 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:47.818 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=664 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:47.818 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=664 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:47.818 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=664 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:47.818 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=665 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:47.818 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=665 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:47.819 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=665 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:47.819 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=665 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:47.819 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=665 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:47.819 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=665 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:47.819 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=665 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:47.819 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=665 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:47.819 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=666 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:47.819 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=666 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:47.819 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=666 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:47.819 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=666 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:47.819 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=666 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:47.820 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=666 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:47.820 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=666 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:47.820 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=666 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:52.819 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:51:52.819 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:51:52.819 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:51:52.819 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:51:52.819 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:51:52.819 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:51:52.827 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:51:52.828 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:51:52.828 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:51:52.829 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:51:52.829 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:51:52.832 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:51:52.832 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:51:52.833 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:51:52.833 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:51:52.833 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:51:52.833 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:51:52.834 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:51:52.834 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:51:52.835 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:51:52.836 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:51:52.836 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:51:52.836 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:51:52.836 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:51:52.836 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:51:52.836 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:51:52.836 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:51:52.838 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:51:52.838 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:51:52.839 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:51:52.839 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:51:52.839 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:51:52.839 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:51:52.839 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:51:52.839 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:51:52.842 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:51:52.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:51:52.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:51:52.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:51:52.842 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:51:52.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:51:52.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:51:52.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:51:52.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:51:52.842 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:51:52.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:52.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:52.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:52.842 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:51:52.842 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:51:52.842 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:51:52.842 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:51:52.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:52.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:52.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:52.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:51:52.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:52.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:52.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:52.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:52.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:52.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:52.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:52.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:52.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:52.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:52.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:52.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:52.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:52.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:52.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:52.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:52.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:52.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:52.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:52.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:52.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:52.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:52.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:52.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:52.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:52.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:52.847 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:51:53.326 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:51:53.366 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:51:53.368 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:51:53.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:51:53.371 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:51:53.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:51:53.395 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:51:53.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:51:53.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:51:53.401 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:51:53.401 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:51:53.402 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:51:53.402 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:51:53.418 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:51:53.422 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:51:53.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:51:53.432 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:51:53.432 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 04:51:53.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:51:53.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:51:53.797 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:51:53.845 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:51:53.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:51:53.846 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:51:53.846 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:51:54.270 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:51:54.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:51:54.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:51:54.470 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:51:54.476 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:51:54.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:51:54.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:51:54.476 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:51:54.477 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:51:54.478 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:51:54.478 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:51:54.478 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:51:54.478 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:51:54.478 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:51:54.478 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:51:54.478 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=352 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:54.478 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=352 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:54.478 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=352 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:54.478 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=352 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:54.478 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=353 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:54.478 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=353 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:54.478 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=353 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:54.478 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=353 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:54.478 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=353 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:54.478 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=353 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:54.478 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=353 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:54.478 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=353 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:51:59.485 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:51:59.485 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:51:59.485 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:51:59.485 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:51:59.485 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:51:59.485 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:51:59.497 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:51:59.498 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:51:59.498 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:51:59.498 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:51:59.498 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:51:59.500 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:51:59.500 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:51:59.501 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:51:59.501 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:51:59.501 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:51:59.501 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:51:59.501 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:51:59.501 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:51:59.502 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:51:59.502 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:51:59.503 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:51:59.503 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:51:59.503 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:51:59.503 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:51:59.503 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:51:59.503 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:51:59.505 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:51:59.505 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:51:59.505 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:51:59.505 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:51:59.505 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:51:59.505 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:51:59.505 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:51:59.505 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:51:59.508 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:51:59.508 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:51:59.508 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:59.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:59.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:59.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:59.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:51:59.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:51:59.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:51:59.513 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:51:59.991 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:52:00.035 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:52:00.037 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:52:00.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:52:00.040 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:52:00.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:52:00.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:52:00.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:52:00.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:52:00.066 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:52:00.066 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:52:00.066 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:52:00.067 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:52:00.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:52:00.095 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:52:00.095 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:52:00.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:52:00.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:52:00.463 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:52:00.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:52:00.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:52:00.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:52:00.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:52:00.934 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:52:01.408 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:52:01.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:52:01.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:52:01.513 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:52:01.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:52:01.880 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:52:02.353 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:52:02.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:52:02.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:52:02.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:52:02.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:52:02.827 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:52:03.299 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:52:03.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:52:03.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:52:03.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:52:03.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:52:03.772 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:52:04.243 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:52:04.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:52:04.518 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:52:04.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:52:04.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:52:04.716 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:52:05.189 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:52:05.662 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:52:06.135 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:52:06.608 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:52:07.081 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:52:07.553 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:52:08.026 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:52:08.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:52:08.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:52:08.103 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:52:08.103 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:52:08.121 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:52:08.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:52:08.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:52:08.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:52:08.123 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:52:08.123 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:52:08.123 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:52:08.123 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:52:08.123 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:52:08.123 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:52:08.123 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:52:08.123 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1859 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:52:08.123 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1859 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:52:08.123 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1859 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:52:08.123 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1859 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:52:08.123 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1859 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:52:08.123 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1859 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:52:08.123 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1859 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:52:08.123 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1859 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:52:13.129 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:52:13.129 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:52:13.129 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:52:13.129 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:52:13.129 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:52:13.129 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:52:13.138 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:52:13.139 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:52:13.139 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:52:13.139 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:52:13.139 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:52:13.144 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:52:13.144 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:52:13.144 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:52:13.144 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:52:13.145 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:52:13.145 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:52:13.145 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:52:13.145 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:52:13.149 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:52:13.149 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:52:13.150 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:52:13.150 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:52:13.150 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:52:13.150 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:52:13.150 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:52:13.150 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:52:13.154 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:52:13.154 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:52:13.154 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:52:13.154 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:52:13.154 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:52:13.155 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:52:13.155 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:52:13.155 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:52:13.160 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:52:13.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:52:13.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:52:13.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:52:13.160 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:52:13.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:52:13.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:52:13.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:52:13.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:52:13.161 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:52:13.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:13.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:13.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:13.161 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:52:13.161 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:52:13.161 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:52:13.161 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:52:13.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:13.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:13.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:13.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:52:13.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:13.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:13.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:13.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:13.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:13.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:13.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:13.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:13.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:13.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:13.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:13.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:13.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:13.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:13.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:13.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:13.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:13.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:13.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:13.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:13.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:13.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:13.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:13.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:13.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:13.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:13.166 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:52:13.643 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:52:13.680 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:52:13.680 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:52:13.681 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:52:13.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:52:13.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:52:13.693 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:52:13.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:52:13.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:52:13.697 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:52:13.697 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:52:13.697 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:52:13.697 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:52:13.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:52:13.746 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:52:13.746 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 04:52:13.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:52:13.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:52:14.116 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:52:14.165 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:52:14.165 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:52:14.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:52:14.166 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:52:14.586 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:52:15.059 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:52:15.167 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:52:15.167 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:52:15.167 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:52:15.168 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:52:15.533 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:52:16.006 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:52:16.168 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:52:16.169 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:52:16.169 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:52:16.169 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:52:16.479 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:52:16.952 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:52:17.171 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:52:17.171 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:52:17.171 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:52:17.171 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:52:17.425 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:52:17.898 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:52:18.172 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:52:18.172 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:52:18.173 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:52:18.173 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:52:18.371 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:52:18.843 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:52:19.317 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:52:19.790 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:52:20.265 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:52:20.738 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:52:21.212 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:52:21.685 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:52:21.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:52:21.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:52:21.754 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:52:21.754 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:52:21.755 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:52:21.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:52:21.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:52:21.774 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:52:21.774 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:52:21.775 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:52:21.775 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:52:21.775 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:52:21.775 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:52:21.775 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:52:21.775 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:52:21.775 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:52:26.782 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:52:26.782 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:52:26.782 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:52:26.782 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:52:26.782 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:52:26.782 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:52:26.791 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:52:26.792 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:52:26.792 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:52:26.793 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:52:26.793 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:52:26.797 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:52:26.797 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:52:26.797 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:52:26.797 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:52:26.798 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:52:26.798 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:52:26.798 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:52:26.798 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:52:26.802 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:52:26.802 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:52:26.803 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:52:26.803 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:52:26.803 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:52:26.803 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:52:26.803 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:52:26.803 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:52:26.807 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:52:26.807 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:52:26.807 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:52:26.807 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:52:26.808 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:52:26.808 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:52:26.808 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:52:26.808 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:52:26.814 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:52:26.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:52:26.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:52:26.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:52:26.814 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:52:26.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:52:26.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:52:26.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:52:26.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:52:26.814 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:52:26.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:26.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:26.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:26.814 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:52:26.814 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:52:26.814 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:52:26.815 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:52:26.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:26.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:26.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:26.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:52:26.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:26.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:26.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:26.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:26.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:26.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:26.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:26.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:26.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:26.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:26.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:26.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:26.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:26.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:26.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:26.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:26.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:26.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:26.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:26.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:26.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:26.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:26.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:26.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:26.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:26.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:26.819 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:52:27.298 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:52:27.346 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:52:27.349 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:52:27.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:52:27.351 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:52:27.375 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:52:27.376 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:52:27.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:52:27.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:52:27.380 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:52:27.380 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:52:27.381 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:52:27.381 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:52:27.553 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:52:27.553 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:52:27.558 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:52:27.558 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:52:27.558 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:52:27.558 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:52:27.559 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:52:27.559 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:52:27.559 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:52:27.559 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:52:27.559 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:52:27.559 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:52:27.559 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:52:27.559 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=160 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:52:27.559 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=160 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:52:27.559 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=160 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:52:27.559 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=160 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:52:27.559 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=160 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:52:32.567 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:52:32.567 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:52:32.567 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:52:32.567 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:52:32.567 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:52:32.567 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:52:32.575 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:52:32.576 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:52:32.576 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:52:32.577 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:52:32.577 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:52:32.580 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:52:32.581 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:52:32.581 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:52:32.581 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:52:32.581 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:52:32.581 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:52:32.582 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:52:32.582 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:52:32.584 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:52:32.584 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:52:32.584 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:52:32.584 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:52:32.585 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:52:32.585 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:52:32.585 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:52:32.585 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:52:32.587 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:52:32.587 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:52:32.587 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:52:32.587 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:52:32.587 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:52:32.587 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:52:32.587 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:52:32.587 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:52:32.590 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:52:32.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:52:32.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:52:32.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:52:32.590 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:52:32.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:52:32.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:52:32.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:52:32.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:52:32.591 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:52:32.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:32.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:32.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:32.591 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:52:32.591 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:52:32.591 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:52:32.591 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:52:32.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:32.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:32.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:32.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:52:32.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:32.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:32.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:32.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:32.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:32.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:32.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:32.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:32.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:32.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:32.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:32.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:32.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:32.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:32.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:32.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:32.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:32.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:32.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:32.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:32.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:32.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:32.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:32.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:32.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:32.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:32.595 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:52:33.074 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:52:33.115 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:52:33.117 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:52:33.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:52:33.120 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:52:33.138 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:52:33.138 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:52:33.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:52:33.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:52:33.143 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:52:33.143 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:52:33.143 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:52:33.143 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:52:33.546 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:52:33.593 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:52:33.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:52:33.593 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:52:33.594 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:52:34.017 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:52:34.491 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:52:34.593 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:52:34.594 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:52:34.594 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:52:34.595 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:52:34.963 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:52:35.435 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:52:35.595 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:52:35.595 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:52:35.596 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:52:35.596 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:52:35.906 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:52:36.380 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:52:36.596 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:52:36.597 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:52:36.597 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:52:36.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:52:36.852 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:52:37.324 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:52:37.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:52:37.597 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:52:37.598 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:52:37.598 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:52:37.795 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:52:37.827 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:52:37.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:52:37.828 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:52:37.828 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:52:37.829 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:52:37.829 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:52:37.830 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:52:37.830 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:52:37.830 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:52:37.830 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:52:37.830 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1131 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:52:37.830 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1131 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:52:37.830 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1131 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:52:37.830 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1131 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:52:38.274 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:52:38.754 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:52:39.233 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:52:39.714 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:52:40.194 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:52:40.672 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:52:41.152 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:52:41.632 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:52:42.113 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:52:42.594 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:52:42.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:52:42.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:52:42.834 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:52:42.837 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:52:42.837 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:52:42.837 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:52:42.837 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:52:42.837 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:52:42.837 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:52:42.842 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:52:42.842 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:52:42.842 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:52:42.842 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:52:42.842 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:52:42.843 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:52:42.844 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:52:42.844 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:52:42.844 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:52:42.844 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:52:42.844 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:52:42.844 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:52:42.844 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:52:42.845 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:52:42.845 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:52:42.845 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:52:42.845 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:52:42.846 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:52:42.846 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:52:42.846 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:52:42.846 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:52:42.847 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:52:42.847 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:52:42.847 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:52:42.847 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:52:42.847 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:52:42.847 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:52:42.847 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:52:42.847 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:52:42.850 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:52:42.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:52:42.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:52:42.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:52:42.850 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:52:42.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:52:42.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:52:42.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:42.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:52:42.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:52:42.850 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:52:42.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:42.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:42.850 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:52:42.850 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:52:42.850 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:52:42.850 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:52:42.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:42.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:42.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:42.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:52:42.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:42.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:42.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:42.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:42.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:42.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:42.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:42.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:42.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:42.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:42.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:42.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:42.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:42.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:42.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:42.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:42.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:42.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:42.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:42.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:42.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:42.852 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:52:42.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:42.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:42.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:42.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:42.852 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:52:42.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:42.852 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:52:42.852 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:52:42.852 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:52:42.852 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:52:42.852 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:52:47.861 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:52:47.861 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:52:47.861 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:52:47.862 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:52:47.862 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:52:47.862 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:52:47.870 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:52:47.871 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:52:47.871 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:52:47.871 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:52:47.871 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:52:47.874 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:52:47.875 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:52:47.875 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:52:47.875 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:52:47.875 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:52:47.875 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:52:47.875 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:52:47.875 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:52:47.880 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:52:47.881 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:52:47.881 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:52:47.881 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:52:47.881 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:52:47.881 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:52:47.881 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:52:47.881 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:52:47.884 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:52:47.884 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:52:47.884 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:52:47.884 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:52:47.884 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:52:47.884 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:52:47.884 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:52:47.884 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:52:47.888 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:52:47.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:52:47.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:52:47.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:52:47.888 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:52:47.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:52:47.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:52:47.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:52:47.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:52:47.888 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:52:47.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:47.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:47.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:47.889 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:52:47.889 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:52:47.889 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:52:47.889 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:52:47.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:47.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:47.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:47.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:52:47.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:47.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:47.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:47.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:47.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:47.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:47.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:47.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:47.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:47.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:47.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:47.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:47.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:47.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:47.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:47.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:47.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:47.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:47.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:47.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:47.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:52:47.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:47.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:47.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:52:47.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:52:47.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:52:47.893 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:52:48.371 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:52:48.413 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:52:48.415 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:52:48.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:52:48.417 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:52:48.442 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:52:48.443 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:52:48.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:52:48.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:52:48.453 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:52:48.453 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:52:48.453 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:52:48.453 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:52:48.843 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:52:48.892 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:52:48.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:52:48.892 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:52:48.892 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:52:49.315 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:52:49.788 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:52:49.893 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:52:49.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:52:49.894 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:52:49.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:52:50.261 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:52:50.733 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:52:50.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:52:50.895 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:52:50.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:52:50.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:52:51.204 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:52:51.677 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:52:51.895 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:52:51.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:52:51.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:52:51.896 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:52:52.150 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:52:52.621 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:52:52.898 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:52:52.898 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:52:52.899 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:52:52.899 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:52:53.093 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:52:53.566 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:52:54.039 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:52:54.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:52:54.511 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:52:54.982 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:52:55.114 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:52:55.455 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:52:55.928 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:52:56.115 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:52:56.400 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:52:56.871 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:52:57.117 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:52:57.344 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:52:57.816 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:52:58.118 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:52:58.118 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:52:58.289 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:52:58.763 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:52:59.235 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:52:59.709 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:53:00.181 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:53:00.653 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:53:01.128 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:53:01.361 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:53:01.600 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:53:02.072 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:53:02.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:53:02.543 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:53:03.016 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:53:03.362 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:53:03.489 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 04:53:03.961 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 04:53:04.363 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:53:04.432 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 04:53:04.906 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 04:53:05.364 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:53:05.378 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 04:53:05.850 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 04:53:06.321 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 04:53:06.365 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:53:06.795 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 04:53:07.267 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 04:53:07.739 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 04:53:08.211 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 04:53:08.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:53:08.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:53:08.578 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:53:08.578 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:53:08.578 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:53:08.578 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:53:08.579 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:53:08.579 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:53:08.579 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:53:08.579 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:53:08.579 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:53:08.579 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:53:08.579 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:53:13.586 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:53:13.586 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:53:13.586 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:53:13.586 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:53:13.586 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:53:13.587 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:53:13.599 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:53:13.600 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:53:13.600 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:53:13.600 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:53:13.600 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:53:13.602 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:53:13.602 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:53:13.602 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:53:13.602 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:53:13.602 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:53:13.603 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:53:13.603 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:53:13.603 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:53:13.604 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:53:13.604 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:53:13.604 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:53:13.604 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:53:13.604 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:53:13.604 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:53:13.604 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:53:13.604 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:53:13.606 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:53:13.606 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:53:13.606 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:53:13.606 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:53:13.606 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:53:13.606 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:53:13.606 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:53:13.606 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:53:13.609 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:53:13.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:53:13.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:53:13.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:53:13.609 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:53:13.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:53:13.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:53:13.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:53:13.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:53:13.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:53:13.609 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:53:13.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:53:13.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:53:13.609 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:53:13.609 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:53:13.609 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:53:13.609 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:53:13.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:53:13.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:53:13.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:53:13.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:53:13.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:53:13.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:53:13.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:53:13.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:53:13.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:53:13.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:53:13.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:53:13.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:53:13.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:53:13.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:53:13.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:53:13.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:53:13.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:53:13.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:53:13.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:53:13.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:53:13.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:53:13.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:53:13.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:53:13.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:53:13.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:53:13.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:53:13.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:53:13.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:53:13.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:53:13.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:53:13.614 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:53:14.091 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:53:14.134 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:53:14.135 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:53:14.137 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:53:14.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:53:14.160 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:53:14.160 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:53:14.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:53:14.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:53:14.166 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:53:14.166 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:53:14.166 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:53:14.166 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:53:14.183 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:53:14.187 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:53:14.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD NOHANDOVER
2026-02-08 04:53:14.197 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:53:14.197 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:53:14.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:53:14.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:53:14.562 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:53:14.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:53:14.612 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:53:14.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:53:14.613 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:53:15.035 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:53:15.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD NOHANDOVER
2026-02-08 04:53:15.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:53:15.481 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:53:15.481 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:53:15.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:53:15.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:53:15.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:53:15.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:53:15.490 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:53:15.490 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:53:15.490 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:53:15.490 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:53:15.490 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:53:15.490 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:53:15.490 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:53:20.498 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:53:20.498 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:53:20.498 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:53:20.498 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:53:20.498 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:53:20.498 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:53:20.506 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:53:20.507 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:53:20.507 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:53:20.507 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:53:20.508 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:53:20.515 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:53:20.516 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:53:20.516 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:53:20.516 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:53:20.517 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:53:20.517 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:53:20.517 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:53:20.517 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:53:20.522 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:53:20.523 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:53:20.523 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:53:20.523 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:53:20.523 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:53:20.524 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:53:20.524 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:53:20.524 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:53:20.527 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:53:20.527 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:53:20.527 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:53:20.527 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:53:20.527 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:53:20.527 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:53:20.527 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:53:20.527 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:53:20.532 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:53:20.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:53:20.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:53:20.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:53:20.532 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:53:20.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:53:20.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:53:20.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:53:20.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:53:20.532 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:53:20.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:53:20.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:53:20.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:53:20.532 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:53:20.532 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:53:20.533 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:53:20.533 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:53:20.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:53:20.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:53:20.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:53:20.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:53:20.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:53:20.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:53:20.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:53:20.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:53:20.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:53:20.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:53:20.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:53:20.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:53:20.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:53:20.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:53:20.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:53:20.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:53:20.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:53:20.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:53:20.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:53:20.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:53:20.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:53:20.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:53:20.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:53:20.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:53:20.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:53:20.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:53:20.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:53:20.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:53:20.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:53:20.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:53:20.537 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:53:21.016 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:53:21.054 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:53:21.054 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:53:21.056 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:53:21.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:53:21.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:53:21.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:53:21.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:53:21.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:53:21.090 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:53:21.090 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:53:21.091 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:53:21.091 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:53:21.108 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:53:21.112 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:53:21.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD NOHANDOVER
2026-02-08 04:53:21.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:53:21.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:53:21.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:53:21.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:53:21.487 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:53:21.536 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:53:21.536 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:53:21.536 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:53:21.537 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:53:21.960 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:53:22.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD NOHANDOVER
2026-02-08 04:53:22.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:53:22.405 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:53:22.405 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:53:22.415 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:53:22.415 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:53:22.416 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:53:22.416 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:53:22.416 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:53:22.417 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:53:22.417 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:53:22.417 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:53:22.417 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:53:22.417 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:53:22.417 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:53:22.417 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=407 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:53:22.417 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=407 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:53:22.417 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=407 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:53:22.417 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=407 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:53:22.417 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=407 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:53:22.417 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=407 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:53:22.417 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=407 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:53:27.433 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:53:27.433 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:53:27.434 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:53:27.434 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:53:27.434 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:53:27.434 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:53:27.442 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:53:27.443 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:53:27.443 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:53:27.443 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:53:27.443 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:53:27.447 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:53:27.447 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:53:27.447 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:53:27.447 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:53:27.447 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:53:27.448 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:53:27.448 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:53:27.448 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:53:27.450 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:53:27.451 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:53:27.451 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:53:27.451 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:53:27.451 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:53:27.451 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:53:27.451 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:53:27.451 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:53:27.453 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:53:27.454 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:53:27.454 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:53:27.454 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:53:27.454 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:53:27.454 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:53:27.454 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:53:27.454 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:53:27.457 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:53:27.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:53:27.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:53:27.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:53:27.457 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:53:27.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:53:27.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:53:27.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:53:27.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:53:27.458 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:53:27.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:53:27.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:53:27.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:53:27.458 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:53:27.458 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:53:27.458 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:53:27.458 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:53:27.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:53:27.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:53:27.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:53:27.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:53:27.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:53:27.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:53:27.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:53:27.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:53:27.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:53:27.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:53:27.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:53:27.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:53:27.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:53:27.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:53:27.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:53:27.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:53:27.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:53:27.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:53:27.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:53:27.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:53:27.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:53:27.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:53:27.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:53:27.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:53:27.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:53:27.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:53:27.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:53:27.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:53:27.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:53:27.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:53:27.462 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:53:27.940 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:53:27.981 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:53:27.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:53:27.983 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:53:27.985 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:53:28.011 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:53:28.011 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:53:28.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:53:28.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:53:28.017 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:53:28.018 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:53:28.018 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:53:28.018 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:53:28.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:53:28.045 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:53:28.045 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:53:28.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:53:28.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:53:28.412 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:53:28.461 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:53:28.461 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:53:28.461 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:53:28.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:53:28.884 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:53:29.357 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:53:29.462 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:53:29.462 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:53:29.463 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:53:29.463 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:53:29.830 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:53:30.302 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:53:30.463 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:53:30.463 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:53:30.464 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:53:30.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:53:30.776 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:53:31.249 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:53:31.464 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:53:31.465 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:53:31.465 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:53:31.465 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:53:31.721 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:53:32.192 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:53:32.466 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:53:32.466 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:53:32.466 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:53:32.466 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:53:32.666 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:53:33.138 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:53:33.610 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:53:34.081 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:53:34.555 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:53:35.028 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:53:35.519 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:53:35.991 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:53:36.465 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:53:36.938 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:53:37.408 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:53:37.879 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:53:38.353 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:53:38.825 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:53:39.298 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:53:39.772 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:53:40.244 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:53:40.717 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:53:41.191 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:53:41.664 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:53:42.134 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:53:42.608 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:53:43.081 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 04:53:43.553 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 04:53:43.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:53:43.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:53:43.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:53:43.862 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:53:43.872 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:53:43.872 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:53:43.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:53:43.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:53:43.873 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:53:43.873 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:53:43.873 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:53:43.873 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:53:43.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:53:43.877 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:53:43.877 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-02-08 04:53:43.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:53:43.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:53:44.025 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 04:53:44.499 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 04:53:44.972 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 04:53:45.446 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 04:53:45.919 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 04:53:46.392 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 04:53:46.865 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 04:53:47.338 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 04:53:47.811 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 04:53:48.284 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 04:53:48.758 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 04:53:49.231 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 04:53:49.702 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 04:53:50.176 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 04:53:50.649 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 04:53:51.123 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 04:53:51.596 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 04:53:52.070 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 04:53:52.542 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 04:53:53.016 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 04:53:53.489 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 04:53:53.961 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 04:53:54.434 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 04:53:54.907 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 04:53:55.381 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 04:53:55.854 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 04:53:56.326 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 04:53:56.800 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-08 04:53:57.272 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-08 04:53:57.744 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-08 04:53:58.218 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-08 04:53:58.691 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-08 04:53:59.164 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-08 04:53:59.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:53:59.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:53:59.354 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:53:59.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:53:59.354 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:53:59.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:53:59.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:53:59.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:53:59.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:53:59.370 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:53:59.370 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:53:59.370 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:53:59.370 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:53:59.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:53:59.400 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:53:59.400 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-02-08 04:53:59.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:53:59.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:53:59.636 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-08 04:54:00.108 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-08 04:54:00.581 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-08 04:54:01.054 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-08 04:54:01.526 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-08 04:54:01.999 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-08 04:54:02.473 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-08 04:54:02.945 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-08 04:54:03.419 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-08 04:54:03.892 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-08 04:54:04.365 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-08 04:54:04.839 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-08 04:54:05.311 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-08 04:54:05.783 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-08 04:54:06.256 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-08 04:54:06.729 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-08 04:54:07.202 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-08 04:54:07.676 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-08 04:54:08.148 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-08 04:54:08.622 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-08 04:54:09.094 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-08 04:54:09.567 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-08 04:54:10.041 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-08 04:54:10.514 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-08 04:54:10.987 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-02-08 04:54:11.460 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-02-08 04:54:11.933 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-02-08 04:54:12.406 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-02-08 04:54:12.878 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-02-08 04:54:13.351 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-02-08 04:54:13.822 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-02-08 04:54:14.293 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-02-08 04:54:14.766 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-02-08 04:54:14.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:54:14.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:54:14.841 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:54:14.841 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:54:14.841 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:54:14.855 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:54:14.855 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:54:14.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:54:14.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:54:14.857 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:54:14.857 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:54:14.857 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:54:14.857 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:54:14.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:54:14.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:54:14.911 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:54:14.912 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:54:14.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:54:14.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:54:15.239 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-02-08 04:54:15.712 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-02-08 04:54:16.185 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-02-08 04:54:16.658 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-02-08 04:54:17.129 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-02-08 04:54:17.603 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-02-08 04:54:18.074 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-02-08 04:54:18.547 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-02-08 04:54:19.021 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-02-08 04:54:19.494 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-02-08 04:54:19.968 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-02-08 04:54:20.441 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-02-08 04:54:20.914 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-02-08 04:54:21.387 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-02-08 04:54:21.859 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-02-08 04:54:22.333 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-02-08 04:54:22.806 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-02-08 04:54:23.278 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-02-08 04:54:23.749 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-02-08 04:54:24.222 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-02-08 04:54:24.695 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-02-08 04:54:25.168 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-02-08 04:54:25.641 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-02-08 04:54:26.115 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-02-08 04:54:26.587 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-02-08 04:54:27.061 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-02-08 04:54:27.534 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-02-08 04:54:28.005 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-02-08 04:54:28.475 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-02-08 04:54:28.949 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-02-08 04:54:29.421 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-02-08 04:54:29.893 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-02-08 04:54:30.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:54:30.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:54:30.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:54:30.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:54:30.338 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:54:30.339 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:54:30.339 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:54:30.339 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:54:30.344 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:54:30.344 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:54:30.345 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:54:30.345 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:54:30.345 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:54:30.345 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:54:30.345 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:54:30.345 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=13563 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:54:30.345 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=13563 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:54:30.345 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=13563 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:54:30.346 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=13563 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:54:30.346 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=13563 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:54:30.346 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=13563 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:54:30.346 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=13563 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:54:30.346 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=13564 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:54:30.346 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=13564 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:54:30.346 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=13564 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:54:30.346 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=13564 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:54:30.346 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=13564 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:54:30.346 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=13564 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:54:30.346 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=13564 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:54:30.347 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=13564 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:54:35.346 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:54:35.346 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:54:35.346 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:54:35.346 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:54:35.346 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:54:35.346 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:54:35.355 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:54:35.356 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:54:35.356 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:54:35.357 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:54:35.357 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:54:35.361 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:54:35.362 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:54:35.362 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:54:35.362 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:54:35.362 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:54:35.362 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:54:35.362 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:54:35.362 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:54:35.367 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:54:35.367 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:54:35.367 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:54:35.367 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:54:35.367 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:54:35.367 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:54:35.368 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:54:35.368 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:54:35.372 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:54:35.372 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:54:35.372 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:54:35.372 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:54:35.372 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:54:35.372 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:54:35.372 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:54:35.372 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:54:35.379 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:54:35.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:54:35.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:54:35.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:54:35.380 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:54:35.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:54:35.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:54:35.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:54:35.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:54:35.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:54:35.380 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:54:35.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:54:35.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:54:35.380 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:54:35.380 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:54:35.381 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:54:35.381 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:54:35.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:54:35.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:54:35.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:54:35.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:54:35.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:54:35.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:54:35.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:54:35.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:54:35.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:54:35.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:54:35.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:54:35.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:54:35.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:54:35.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:54:35.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:54:35.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:54:35.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:54:35.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:54:35.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:54:35.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:54:35.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:54:35.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:54:35.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:54:35.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:54:35.384 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:54:35.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:54:35.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:54:35.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:54:35.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:54:35.384 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:54:35.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:54:35.384 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:54:35.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:54:35.384 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:54:35.384 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:54:35.384 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:54:35.384 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:54:40.405 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:54:40.405 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:54:40.406 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:54:40.406 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:54:40.406 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:54:40.406 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:54:40.416 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:54:40.418 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:54:40.418 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:54:40.418 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:54:40.419 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:54:40.424 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:54:40.425 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:54:40.425 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:54:40.425 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:54:40.425 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:54:40.426 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:54:40.426 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:54:40.426 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:54:40.429 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:54:40.429 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:54:40.430 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:54:40.430 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:54:40.430 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:54:40.431 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:54:40.431 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:54:40.431 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:54:40.434 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:54:40.434 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:54:40.434 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:54:40.434 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:54:40.435 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:54:40.435 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:54:40.435 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:54:40.435 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:54:40.439 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:54:40.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:54:40.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:54:40.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:54:40.439 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:54:40.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:54:40.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:54:40.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:54:40.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:54:40.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:54:40.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:54:40.440 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:54:40.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:54:40.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:54:40.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:54:40.440 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:54:40.440 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:54:40.440 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:54:40.440 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:54:40.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:54:40.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:54:40.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:54:40.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:54:40.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:54:40.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:54:40.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:54:40.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:54:40.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:54:40.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:54:40.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:54:40.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:54:40.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:54:40.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:54:40.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:54:40.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:54:40.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:54:40.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:54:40.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:54:40.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:54:40.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:54:40.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:54:40.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:54:40.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:54:40.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:54:40.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:54:40.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:54:40.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:54:40.445 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:54:40.923 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:54:40.967 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:54:40.970 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:54:40.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:54:40.971 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:54:41.005 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:54:41.005 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:54:41.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:54:41.013 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:54:41.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:54:41.017 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:54:41.017 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:54:41.017 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:54:41.017 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:54:41.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:54:41.073 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:54:41.073 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:54:41.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:54:41.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:54:41.394 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:54:41.443 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:54:41.443 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:54:41.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:54:41.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:54:41.866 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:54:42.337 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:54:42.445 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:54:42.445 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:54:42.445 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:54:42.446 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:54:42.808 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:54:43.281 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:54:43.446 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:54:43.447 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:54:43.447 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:54:43.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:54:43.754 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:54:44.227 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:54:44.447 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:54:44.448 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:54:44.448 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:54:44.448 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:54:44.697 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:54:45.171 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:54:45.449 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:54:45.449 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:54:45.449 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:54:45.450 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:54:45.644 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:54:46.116 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:54:46.587 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:54:47.058 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:54:47.531 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:54:48.004 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:54:48.475 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:54:48.948 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:54:49.421 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:54:49.894 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:54:50.365 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:54:50.835 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:54:51.309 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:54:51.781 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:54:51.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:54:51.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:54:51.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:54:51.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:54:51.889 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:54:51.889 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:54:51.889 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:54:51.889 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:54:51.890 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:54:51.890 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:54:51.890 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:54:51.890 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:54:51.890 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:54:51.891 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:54:51.891 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:54:56.897 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:54:56.897 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:54:56.897 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:54:56.897 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:54:56.897 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:54:56.897 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:54:56.908 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:54:56.909 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:54:56.910 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:54:56.910 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:54:56.910 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:54:56.914 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:54:56.914 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:54:56.915 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:54:56.915 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:54:56.915 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:54:56.916 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:54:56.916 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:54:56.916 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:54:56.919 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:54:56.919 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:54:56.920 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:54:56.920 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:54:56.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:54:56.920 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:54:56.921 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:54:56.921 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:54:56.923 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:54:56.924 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:54:56.924 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:54:56.924 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:54:56.924 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:54:56.924 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:54:56.924 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:54:56.924 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:54:56.929 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:54:56.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:54:56.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:54:56.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:54:56.929 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:54:56.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:54:56.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:54:56.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:54:56.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:54:56.930 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:54:56.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:54:56.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:54:56.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:54:56.930 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:54:56.930 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:54:56.930 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:54:56.930 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:54:56.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:54:56.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:54:56.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:54:56.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:54:56.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:54:56.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:54:56.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:54:56.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:54:56.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:54:56.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:54:56.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:54:56.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:54:56.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:54:56.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:54:56.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:54:56.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:54:56.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:54:56.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:54:56.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:54:56.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:54:56.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:54:56.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:54:56.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:54:56.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:54:56.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:54:56.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:54:56.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:54:56.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:54:56.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:54:56.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:54:56.935 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:54:57.413 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:54:57.455 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:54:57.457 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:54:57.460 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:54:57.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:54:57.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:54:57.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:54:57.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:54:57.498 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:54:57.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:54:57.500 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:54:57.500 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:54:57.500 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:54:57.500 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:54:57.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:54:57.511 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:54:57.511 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:54:57.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:54:57.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:54:57.885 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:54:57.934 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:54:57.934 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:54:57.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:54:57.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:54:58.357 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:54:58.828 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:54:58.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:54:58.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:54:58.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:54:58.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:54:59.301 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:54:59.774 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:54:59.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:54:59.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:54:59.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:54:59.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:55:00.247 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:55:00.720 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:55:00.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:55:00.938 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:55:00.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:55:00.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:55:01.193 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:55:01.665 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:55:01.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:55:01.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:55:01.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:55:01.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:55:02.139 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:55:02.611 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:55:03.084 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:55:03.558 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:55:04.031 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:55:04.504 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:55:04.977 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:55:05.449 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:55:05.923 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:55:06.395 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:55:06.868 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:55:07.339 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:55:07.813 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:55:07.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:55:07.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:55:07.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:55:07.898 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:55:07.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:55:07.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:55:07.914 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:55:07.914 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:55:07.916 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:55:07.916 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:55:07.916 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:55:07.916 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:55:07.916 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:55:07.916 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:55:07.916 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:55:07.916 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2370 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:55:07.916 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2370 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:55:07.916 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2370 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:55:07.916 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2370 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:55:07.916 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2370 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:55:07.916 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2370 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:55:07.916 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2370 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:55:07.916 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2370 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:55:12.921 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:55:12.921 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:55:12.921 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:55:12.921 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:55:12.921 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:55:12.921 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:55:12.930 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:55:12.931 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:55:12.932 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:55:12.932 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:55:12.932 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:55:12.935 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:55:12.936 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:55:12.936 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:55:12.936 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:55:12.936 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:55:12.937 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:55:12.937 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:55:12.937 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:55:12.939 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:55:12.939 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:55:12.939 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:55:12.939 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:55:12.940 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:55:12.940 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:55:12.940 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:55:12.940 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:55:12.942 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:55:12.943 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:55:12.943 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:55:12.943 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:55:12.943 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:55:12.943 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:55:12.944 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:55:12.944 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:55:12.946 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:55:12.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:55:12.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:55:12.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:55:12.946 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:55:12.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:55:12.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:55:12.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:55:12.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:55:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:55:12.947 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:55:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:55:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:55:12.947 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:55:12.947 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:55:12.947 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:55:12.947 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:55:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:55:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:55:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:55:12.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:55:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:55:12.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:55:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:55:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:55:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:55:12.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:55:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:55:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:55:12.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:55:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:55:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:55:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:55:12.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:55:12.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:55:12.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:55:12.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:55:12.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:55:12.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:55:12.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:55:12.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:55:12.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:55:12.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:55:12.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:55:12.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:55:12.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:55:12.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:55:12.951 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:55:13.430 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:55:13.469 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:55:13.471 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:55:13.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:55:13.472 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:55:13.499 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:55:13.499 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:55:13.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:55:13.504 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:55:13.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:55:13.506 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:55:13.506 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:55:13.506 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:55:13.506 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:55:13.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:55:13.527 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:55:13.527 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:55:13.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:55:13.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:55:13.901 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:55:13.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:55:13.949 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:55:13.949 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:55:13.950 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:55:14.374 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:55:14.390 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 04:55:14.846 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:55:14.950 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:55:14.950 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:55:14.950 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:55:14.951 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:55:15.320 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:55:15.792 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:55:15.951 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:55:15.951 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:55:15.951 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:55:15.952 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:55:16.264 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:55:16.736 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:55:16.953 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:55:16.953 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:55:16.953 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:55:16.953 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:55:17.209 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:55:17.682 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:55:17.954 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:55:17.954 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:55:17.954 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:55:17.954 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:55:18.156 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:55:18.628 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:55:19.101 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:55:19.574 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:55:20.047 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:55:20.521 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:55:20.994 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:55:21.468 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:55:21.941 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:55:22.412 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:55:22.885 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:55:23.358 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:55:23.829 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:55:24.303 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:55:24.776 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:55:25.249 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:55:25.722 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:55:26.194 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:55:26.668 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:55:27.141 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:55:27.612 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:55:28.086 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:55:28.558 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 04:55:29.029 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 04:55:29.500 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 04:55:29.974 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 04:55:30.446 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 04:55:30.919 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 04:55:31.390 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 04:55:31.863 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 04:55:32.336 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 04:55:32.808 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 04:55:33.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:55:33.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:55:33.114 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:55:33.114 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:55:33.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:55:33.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:55:33.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:55:33.127 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:55:33.129 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:55:33.129 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:55:33.129 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:55:33.130 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:55:33.130 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:55:33.130 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:55:33.130 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:55:33.130 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4356 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:55:33.130 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4356 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:55:33.130 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4356 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:55:33.130 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4356 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:55:33.130 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4356 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:55:33.130 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4356 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:55:33.131 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4356 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:55:33.131 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4356 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:55:38.135 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:55:38.135 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:55:38.135 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:55:38.135 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:55:38.135 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:55:38.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:55:38.150 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:55:38.152 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:55:38.152 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:55:38.153 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:55:38.153 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:55:38.159 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:55:38.159 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:55:38.159 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:55:38.159 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:55:38.159 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:55:38.159 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:55:38.160 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:55:38.160 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:55:38.164 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:55:38.164 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:55:38.164 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:55:38.164 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:55:38.164 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:55:38.164 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:55:38.164 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:55:38.164 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:55:38.168 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:55:38.168 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:55:38.168 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:55:38.168 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:55:38.168 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:55:38.168 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:55:38.168 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:55:38.168 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:55:38.172 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:55:38.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:55:38.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:55:38.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:55:38.172 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:55:38.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:55:38.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:55:38.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:55:38.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:55:38.172 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:55:38.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:55:38.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:55:38.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:55:38.172 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:55:38.172 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:55:38.172 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:55:38.173 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:55:38.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:55:38.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:55:38.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:55:38.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:55:38.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:55:38.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:55:38.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:55:38.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:55:38.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:55:38.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:55:38.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:55:38.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:55:38.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:55:38.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:55:38.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:55:38.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:55:38.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:55:38.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:55:38.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:55:38.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:55:38.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:55:38.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:55:38.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:55:38.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:55:38.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:55:38.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:55:38.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:55:38.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:55:38.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:55:38.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:55:38.177 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:55:38.654 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:55:38.697 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:55:38.699 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:55:38.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:55:38.702 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:55:38.736 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:55:38.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:55:38.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:55:38.741 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:55:38.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:55:38.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:55:38.743 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:55:38.743 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:55:38.743 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:55:38.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:55:38.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:55:38.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:55:38.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:55:38.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:55:39.126 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:55:39.176 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:55:39.176 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:55:39.176 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:55:39.176 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:55:39.597 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:55:40.071 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:55:40.092 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 04:55:40.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:55:40.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:55:40.177 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:55:40.177 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:55:40.544 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:55:41.016 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:55:41.058 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 04:55:41.178 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:55:41.178 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:55:41.179 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:55:41.179 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:55:41.490 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:55:41.962 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:55:42.025 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 04:55:42.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:55:42.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:55:42.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:55:42.180 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:55:42.435 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:55:42.906 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:55:42.984 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 04:55:43.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:55:43.182 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:55:43.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:55:43.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:55:43.379 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:55:43.852 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:55:43.951 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 04:55:44.324 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:55:44.795 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:55:44.910 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 04:55:45.268 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:55:45.741 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:55:45.877 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 04:55:46.213 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:55:46.684 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:55:46.837 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 04:55:47.158 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:55:47.631 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:55:47.803 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 04:55:48.103 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:55:48.574 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:55:48.763 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 04:55:49.047 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:55:49.520 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:55:49.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:55:49.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:55:49.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:55:49.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:55:49.621 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:55:49.621 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:55:49.621 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:55:49.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:55:49.622 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:55:49.622 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:55:49.622 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:55:49.623 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:55:49.623 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:55:49.623 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:55:49.623 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:55:49.623 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2472 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:55:49.623 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2472 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:55:49.623 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2472 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:55:49.623 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2472 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:55:49.623 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2472 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:55:49.623 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2472 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:55:54.630 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:55:54.630 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:55:54.630 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:55:54.630 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:55:54.630 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:55:54.630 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:55:54.644 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:55:54.646 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:55:54.646 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:55:54.647 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:55:54.647 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:55:54.651 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:55:54.652 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:55:54.652 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:55:54.652 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:55:54.652 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:55:54.652 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:55:54.652 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:55:54.652 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:55:54.656 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:55:54.657 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:55:54.657 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:55:54.657 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:55:54.657 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:55:54.657 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:55:54.657 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:55:54.657 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:55:54.661 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:55:54.661 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:55:54.661 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:55:54.661 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:55:54.661 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:55:54.661 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:55:54.661 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:55:54.661 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:55:54.667 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:55:54.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:55:54.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:55:54.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:55:54.667 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:55:54.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:55:54.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:55:54.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:55:54.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:55:54.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:55:54.667 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:55:54.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:55:54.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:55:54.668 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:55:54.668 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:55:54.668 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:55:54.668 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:55:54.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:55:54.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:55:54.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:55:54.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:55:54.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:55:54.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:55:54.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:55:54.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:55:54.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:55:54.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:55:54.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:55:54.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:55:54.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:55:54.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:55:54.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:55:54.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:55:54.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:55:54.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:55:54.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:55:54.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:55:54.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:55:54.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:55:54.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:55:54.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:55:54.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:55:54.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:55:54.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:55:54.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:55:54.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:55:54.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:55:54.672 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:55:55.150 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:55:55.196 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:55:55.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:55:55.199 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:55:55.200 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:55:55.228 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:55:55.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:55:55.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:55:55.234 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:55:55.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:55:55.237 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:55:55.237 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:55:55.237 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:55:55.237 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:55:55.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:55:55.247 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:55:55.247 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:55:55.248 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:55:55.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:55:55.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:55:55.621 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:55:55.673 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:55:55.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:55:55.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:55:55.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:55:56.093 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:55:56.109 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 04:55:56.566 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:55:56.674 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:55:56.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:55:56.675 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:55:56.675 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:55:57.037 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:55:57.510 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:55:57.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:55:57.676 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:55:57.676 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:55:57.676 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:55:57.983 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:55:58.455 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:55:58.676 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:55:58.677 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:55:58.677 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:55:58.677 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:55:58.926 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:55:59.400 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:55:59.678 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:55:59.678 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:55:59.678 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:55:59.679 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:55:59.872 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:56:00.345 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:56:00.818 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:56:01.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:56:01.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:56:01.257 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:56:01.257 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:56:01.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:56:01.257 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:56:01.258 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:56:01.258 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:56:01.258 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:56:01.258 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:56:01.258 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:56:01.258 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:56:01.258 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:56:01.258 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1424 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:01.258 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1424 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:01.258 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1424 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:01.258 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1424 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:01.258 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1424 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:01.258 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1424 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:06.265 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:56:06.265 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:56:06.265 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:56:06.265 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:56:06.265 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:56:06.265 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:56:06.274 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:56:06.275 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:56:06.275 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:56:06.275 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:56:06.275 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:56:06.278 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:56:06.278 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:56:06.279 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:56:06.279 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:56:06.279 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:56:06.279 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:56:06.279 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:56:06.279 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:56:06.281 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:56:06.282 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:56:06.282 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:56:06.282 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:56:06.282 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:56:06.282 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:56:06.282 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:56:06.282 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:56:06.284 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:56:06.284 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:56:06.284 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:56:06.284 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:56:06.284 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:56:06.284 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:56:06.285 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:56:06.285 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:56:06.288 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:56:06.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:56:06.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:56:06.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:56:06.288 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:56:06.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:56:06.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:56:06.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:56:06.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:56:06.289 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:56:06.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:06.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:06.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:06.289 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:56:06.289 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:56:06.289 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:56:06.289 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:56:06.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:06.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:06.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:06.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:56:06.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:06.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:06.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:06.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:06.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:06.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:06.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:06.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:06.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:06.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:06.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:06.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:06.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:06.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:06.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:06.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:06.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:06.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:06.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:06.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:06.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:06.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:06.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:06.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:06.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:06.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:06.294 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:56:06.772 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:56:06.815 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:56:06.817 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:56:06.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:56:06.819 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:56:06.834 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:56:06.834 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:56:06.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:56:06.840 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:56:06.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:06.843 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:56:06.843 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:56:06.843 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:56:06.843 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:56:06.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:56:06.878 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:56:06.878 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:56:06.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:06.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:07.243 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:56:07.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:56:07.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:56:07.292 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:56:07.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:56:07.716 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:56:07.732 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 04:56:08.188 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:56:08.292 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:56:08.292 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:56:08.293 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:56:08.293 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:56:08.659 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:56:09.130 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:56:09.294 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:56:09.294 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:56:09.294 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:56:09.294 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:56:09.601 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:56:10.073 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:56:10.295 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:56:10.296 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:56:10.296 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:56:10.296 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:56:10.547 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:56:11.019 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:56:11.296 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:56:11.297 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:56:11.297 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:56:11.297 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:56:11.490 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:56:11.964 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:56:12.436 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:56:12.909 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:56:13.382 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:56:13.860 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:56:14.332 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:56:14.805 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:56:15.278 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:56:15.751 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:56:16.224 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:56:16.697 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:56:16.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:56:16.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:16.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:56:16.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:56:16.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:56:16.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:56:16.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:56:16.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:56:16.888 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:56:16.888 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:56:16.888 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:56:16.888 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:56:16.888 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:56:16.889 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:56:16.889 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:56:21.895 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:56:21.895 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:56:21.895 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:56:21.895 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:56:21.895 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:56:21.895 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:56:21.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:56:21.905 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:56:21.905 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:56:21.905 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:56:21.905 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:56:21.909 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:56:21.909 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:56:21.909 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:56:21.909 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:56:21.910 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:56:21.910 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:56:21.910 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:56:21.910 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:56:21.912 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:56:21.912 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:56:21.912 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:56:21.912 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:56:21.912 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:56:21.912 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:56:21.913 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:56:21.913 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:56:21.915 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:56:21.915 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:56:21.915 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:56:21.915 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:56:21.915 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:56:21.915 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:56:21.915 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:56:21.915 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:56:21.918 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:56:21.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:56:21.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:56:21.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:56:21.918 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:56:21.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:56:21.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:56:21.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:56:21.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:56:21.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:21.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:21.919 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:56:21.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:21.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:21.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:21.919 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:56:21.919 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:56:21.919 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:56:21.919 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:56:21.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:21.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:21.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:21.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:56:21.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:21.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:21.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:21.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:21.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:21.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:21.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:21.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:21.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:21.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:21.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:21.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:21.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:21.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:21.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:21.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:21.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:21.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:21.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:21.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:21.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:21.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:21.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:21.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:21.923 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:56:22.402 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:56:22.438 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:56:22.440 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:56:22.442 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:56:22.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:56:22.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:56:22.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:56:22.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:56:22.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:22.455 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:56:22.455 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:56:22.456 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:56:22.456 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:56:22.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:56:22.506 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:56:22.506 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:56:22.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:22.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:22.873 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:56:22.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:56:22.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:22.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:56:22.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:56:22.903 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:56:22.903 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:56:22.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:56:22.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:22.904 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:56:22.904 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:56:22.904 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:56:22.904 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:56:22.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:56:22.919 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:56:22.919 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 04:56:22.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:22.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:22.921 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:56:22.921 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:56:22.921 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:56:22.921 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:56:23.346 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:56:23.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:56:23.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:23.606 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:56:23.606 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:56:23.606 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:56:23.624 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:56:23.624 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:56:23.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:56:23.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:23.625 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:56:23.625 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:56:23.626 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:56:23.626 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:56:23.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:56:23.681 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:56:23.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:56:23.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:23.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:23.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:56:23.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:23.785 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:56:23.785 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:56:23.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:56:23.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:56:23.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:56:23.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:23.805 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:56:23.805 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:56:23.805 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:56:23.805 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:56:23.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:56:23.813 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:56:23.813 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:56:23.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:23.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:23.818 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:56:23.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:56:23.923 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:56:23.923 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:56:23.923 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:56:24.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:56:24.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:24.205 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:56:24.205 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:56:24.205 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:56:24.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:56:24.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:56:24.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:56:24.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:56:24.216 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:56:24.216 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:56:24.216 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:56:24.216 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:56:24.216 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:56:24.216 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:56:24.217 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:56:24.217 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=496 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:24.217 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=496 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:24.217 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=496 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:24.217 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=496 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:24.217 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=496 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:24.217 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=496 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:24.217 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=497 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:24.218 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=497 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:24.218 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=497 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:24.218 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=497 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:24.218 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=497 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:24.218 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=497 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:24.218 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=497 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:24.218 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:29.242 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:56:29.242 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:56:29.242 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:56:29.242 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:56:29.242 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:56:29.242 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:56:29.261 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:56:29.262 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:56:29.262 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:56:29.263 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:56:29.263 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:56:29.266 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:56:29.266 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:56:29.266 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:56:29.266 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:56:29.266 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:56:29.266 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:56:29.266 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:56:29.266 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:56:29.269 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:56:29.269 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:56:29.269 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:56:29.269 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:56:29.269 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:56:29.269 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:56:29.269 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:56:29.269 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:56:29.272 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:56:29.272 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:56:29.272 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:56:29.272 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:56:29.272 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:56:29.272 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:56:29.272 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:56:29.273 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:56:29.276 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:56:29.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:56:29.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:56:29.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:56:29.276 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:56:29.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:56:29.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:56:29.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:56:29.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:56:29.277 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:56:29.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:29.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:29.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:29.277 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:56:29.277 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:56:29.277 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:56:29.277 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:56:29.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:29.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:29.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:29.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:56:29.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:29.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:29.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:29.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:29.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:29.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:29.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:29.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:29.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:29.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:29.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:29.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:29.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:29.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:29.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:29.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:29.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:29.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:29.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:29.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:29.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:29.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:29.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:29.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:29.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:29.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:29.282 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:56:29.759 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:56:29.808 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:56:29.810 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:56:29.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:56:29.812 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:56:29.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:56:29.831 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:56:29.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:56:29.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:29.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:56:29.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:56:29.835 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:56:29.835 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:56:29.851 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:56:29.854 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 04:56:29.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:56:29.859 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:56:29.859 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:56:29.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:29.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:30.229 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:56:30.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:56:30.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:30.238 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:56:30.238 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:56:30.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:56:30.248 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:56:30.248 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:56:30.248 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:56:30.250 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:56:30.250 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:56:30.250 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:56:30.250 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:56:30.250 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:56:30.250 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:56:30.250 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:56:30.250 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=210 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:30.250 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=210 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:30.250 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=210 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:30.250 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=210 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:30.250 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=211 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:30.250 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=211 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:30.250 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=211 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:30.250 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=211 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:30.250 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=211 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:30.250 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=211 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:30.250 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=211 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:30.250 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=211 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:35.257 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:56:35.257 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:56:35.257 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:56:35.257 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:56:35.257 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:56:35.257 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:56:35.268 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:56:35.269 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:56:35.269 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:56:35.269 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:56:35.269 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:56:35.271 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:56:35.271 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:56:35.271 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:56:35.271 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:56:35.271 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:56:35.271 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:56:35.272 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:56:35.272 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:56:35.273 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:56:35.273 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:56:35.273 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:56:35.273 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:56:35.273 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:56:35.273 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:56:35.273 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:56:35.273 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:56:35.275 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:56:35.275 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:56:35.275 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:56:35.275 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:56:35.275 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:56:35.275 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:56:35.275 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:56:35.275 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:56:35.278 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:56:35.278 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:56:35.278 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:35.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:35.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:35.283 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:56:35.760 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:56:35.802 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:56:35.803 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:56:35.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:56:35.804 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:56:35.820 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:56:35.820 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:56:35.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:56:35.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:35.826 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:56:35.826 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:56:35.826 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:56:35.826 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:56:35.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:56:35.866 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:56:35.866 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:56:35.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:35.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:35.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:56:36.233 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:56:36.281 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:56:36.282 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:56:36.282 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:56:36.282 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:56:36.706 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:56:37.179 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:56:37.284 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:56:37.284 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:56:37.284 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:56:37.284 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:56:37.651 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:56:38.125 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:56:38.285 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:56:38.286 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:56:38.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:56:38.286 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:56:38.597 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:56:38.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:56:38.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:38.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:56:38.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:56:39.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:56:39.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:56:39.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:56:39.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:39.009 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:56:39.009 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:56:39.009 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:56:39.009 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:56:39.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:56:39.016 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:56:39.016 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 04:56:39.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:39.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:39.069 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:56:39.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:56:39.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:56:39.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:56:39.287 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:56:39.288 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:56:39.542 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:56:40.016 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:56:40.288 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:56:40.288 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:56:40.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:56:40.288 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:56:40.488 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:56:40.962 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:56:41.433 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:56:41.906 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:56:42.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:56:42.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:42.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:56:42.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:56:42.165 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:56:42.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:56:42.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:56:42.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:56:42.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:42.183 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:56:42.183 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:56:42.183 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:56:42.183 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:56:42.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:56:42.237 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:56:42.237 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:56:42.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:42.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:42.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:56:42.378 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:56:42.849 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:56:43.322 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:56:43.795 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:56:44.267 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:56:44.738 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:56:45.209 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:56:45.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:56:45.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:45.378 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:56:45.378 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:56:45.399 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:56:45.399 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:56:45.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:56:45.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:45.400 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:56:45.401 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:56:45.401 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:56:45.401 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:56:45.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:56:45.453 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:56:45.453 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:56:45.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:45.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:45.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:56:45.680 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:56:46.150 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:56:46.623 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:56:47.096 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:56:47.568 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:56:48.041 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:56:48.514 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:56:48.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:56:48.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:48.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:56:48.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:56:48.608 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:56:48.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:56:48.619 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:56:48.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:56:48.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:56:48.625 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:56:48.625 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:56:48.625 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:56:48.625 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:56:48.626 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:56:48.626 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:56:48.626 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:56:48.626 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2880 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:48.626 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2880 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:48.626 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2881 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:48.626 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2881 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:48.627 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2881 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:48.627 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2881 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:48.627 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2881 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:48.627 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2881 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:48.627 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2881 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:48.627 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2881 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:48.627 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2882 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:48.627 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2882 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:48.627 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2882 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:48.627 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2882 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:48.627 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2882 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:48.627 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2882 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:48.628 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2882 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:48.628 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2882 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:56:53.634 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:56:53.634 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:56:53.635 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:56:53.635 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:56:53.635 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:56:53.635 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:56:53.643 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:56:53.644 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:56:53.644 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:56:53.644 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:56:53.644 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:56:53.647 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:56:53.647 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:56:53.647 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:56:53.647 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:56:53.647 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:56:53.647 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:56:53.647 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:56:53.647 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:56:53.650 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:56:53.650 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:56:53.650 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:56:53.650 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:56:53.650 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:56:53.651 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:56:53.651 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:56:53.651 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:56:53.653 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:56:53.653 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:56:53.653 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:56:53.653 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:56:53.653 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:56:53.653 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:56:53.653 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:56:53.653 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:56:53.655 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:56:53.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:56:53.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:56:53.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:56:53.655 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:56:53.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:56:53.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:56:53.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:53.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:56:53.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:56:53.656 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:56:53.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:53.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:53.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:53.656 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:56:53.656 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:56:53.656 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:56:53.656 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:56:53.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:53.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:53.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:53.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:56:53.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:53.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:53.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:53.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:53.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:53.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:53.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:53.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:53.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:53.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:53.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:53.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:53.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:53.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:53.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:53.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:53.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:56:53.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:53.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:53.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:53.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:53.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:53.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:56:53.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:56:53.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:56:53.661 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:56:54.139 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:56:54.179 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:56:54.181 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:56:54.184 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:56:54.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:56:54.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:56:54.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:56:54.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:56:54.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:56:54.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:56:54.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:56:54.188 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:56:54.188 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:56:54.611 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:56:54.659 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:56:54.660 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:56:54.660 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:56:54.660 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:56:55.082 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:56:55.553 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:56:55.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:56:55.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:56:55.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:56:55.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:56:56.026 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:56:56.499 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:56:56.662 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:56:56.662 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:56:56.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:56:56.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:56:56.971 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:56:57.442 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:56:57.663 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:56:57.663 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:56:57.664 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:56:57.664 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:56:57.915 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:56:58.388 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:56:58.664 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:56:58.664 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:56:58.665 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:56:58.665 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:56:58.860 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:56:59.331 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:56:59.804 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:57:00.277 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:57:00.749 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:57:01.220 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:57:01.693 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:57:02.166 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:57:02.638 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:57:03.109 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:57:03.580 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:57:04.053 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:57:04.525 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:57:04.997 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:57:05.469 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:57:05.942 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:57:06.415 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:57:06.887 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:57:07.358 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:57:07.831 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:57:08.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:57:08.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:57:08.124 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:57:08.124 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:57:08.125 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:57:08.125 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:57:08.126 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:57:08.126 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:57:08.126 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:57:08.126 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:57:08.126 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:57:08.126 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:57:08.126 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:57:08.126 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:57:08.126 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:57:08.126 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:57:13.139 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:57:13.139 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:57:13.140 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:57:13.140 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:57:13.140 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:57:13.141 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:57:13.156 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:57:13.157 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:57:13.157 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:57:13.158 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:57:13.158 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:57:13.160 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:57:13.161 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:57:13.161 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:57:13.161 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:57:13.161 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:57:13.161 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:57:13.161 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:57:13.161 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:57:13.164 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:57:13.164 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:57:13.164 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:57:13.164 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:57:13.165 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:57:13.165 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:57:13.165 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:57:13.165 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:57:13.168 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:57:13.168 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:57:13.168 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:57:13.168 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:57:13.168 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:57:13.168 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:57:13.168 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:57:13.168 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:57:13.175 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:57:13.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:57:13.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:57:13.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:57:13.175 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:57:13.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:57:13.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:57:13.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:57:13.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:57:13.175 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:57:13.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:57:13.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:57:13.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:57:13.175 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:57:13.175 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:57:13.175 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:57:13.175 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:57:13.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:57:13.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:57:13.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:57:13.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:57:13.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:57:13.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:57:13.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:57:13.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:57:13.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:57:13.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:57:13.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:57:13.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:57:13.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:57:13.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:57:13.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:57:13.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:57:13.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:57:13.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:57:13.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:57:13.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:57:13.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:57:13.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:57:13.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:57:13.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:57:13.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:57:13.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:57:13.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:57:13.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:57:13.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:57:13.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:57:13.180 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:57:13.656 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:57:13.687 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:57:13.687 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:57:13.688 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:57:13.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:57:13.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:57:13.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:57:13.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:57:13.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:57:13.695 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:57:13.695 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:57:13.695 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:57:13.695 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:57:13.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:57:13.740 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 04:57:13.740 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 04:57:13.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:57:13.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:57:14.127 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:57:14.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:57:14.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:57:14.179 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:57:14.179 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:57:14.599 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:57:15.073 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:57:15.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:57:15.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:57:15.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:57:15.180 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:57:15.545 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:57:15.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:57:15.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:57:15.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:57:15.742 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 04:57:15.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:57:15.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:57:15.745 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:57:15.745 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:57:15.745 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:57:15.745 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:57:16.016 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:57:16.181 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:57:16.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:57:16.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:57:16.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:57:16.488 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:57:16.961 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:57:17.183 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:57:17.183 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:57:17.183 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:57:17.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:57:17.433 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:57:17.905 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:57:18.184 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:57:18.184 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:57:18.184 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:57:18.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:57:18.376 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:57:18.850 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:57:19.322 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:57:19.794 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:57:20.265 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:57:20.738 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:57:21.211 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:57:21.683 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:57:22.157 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:57:22.629 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:57:23.102 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:57:23.572 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:57:24.046 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:57:24.518 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:57:24.990 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:57:25.461 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:57:25.935 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:57:26.407 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:57:26.879 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:57:27.350 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:57:27.824 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:57:28.296 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:57:28.769 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 04:57:29.240 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 04:57:29.710 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 04:57:30.183 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 04:57:30.656 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 04:57:31.127 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 04:57:31.600 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 04:57:32.070 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 04:57:32.541 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 04:57:33.015 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 04:57:33.487 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 04:57:33.960 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 04:57:34.430 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 04:57:34.904 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 04:57:35.376 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 04:57:35.848 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 04:57:36.319 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 04:57:36.792 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 04:57:37.265 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 04:57:37.737 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 04:57:38.208 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 04:57:38.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:57:38.481 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:57:38.481 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:57:38.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:57:38.494 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:57:38.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:57:38.495 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:57:38.498 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:57:38.498 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:57:38.498 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:57:38.498 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:57:38.498 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:57:38.498 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:57:38.498 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:57:38.498 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5471 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:57:38.498 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5471 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:57:38.498 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5471 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:57:38.498 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5471 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:57:38.498 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5471 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:57:38.498 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5471 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:57:43.501 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:57:43.501 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:57:43.501 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:57:43.501 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:57:43.501 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:57:43.501 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:57:43.511 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:57:43.512 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:57:43.512 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:57:43.512 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:57:43.512 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:57:43.515 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:57:43.515 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:57:43.515 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:57:43.515 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:57:43.515 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:57:43.516 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:57:43.516 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:57:43.516 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:57:43.518 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:57:43.518 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:57:43.519 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:57:43.519 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:57:43.519 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:57:43.519 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:57:43.519 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:57:43.519 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:57:43.521 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:57:43.522 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:57:43.522 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:57:43.522 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:57:43.522 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:57:43.522 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:57:43.522 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:57:43.522 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:57:43.526 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:57:43.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:57:43.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:57:43.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:57:43.526 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:57:43.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:57:43.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:57:43.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:57:43.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:57:43.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:57:43.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:57:43.526 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:57:43.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:57:43.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:57:43.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:57:43.527 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:57:43.527 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:57:43.527 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:57:43.527 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:57:43.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:57:43.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:57:43.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:57:43.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:57:43.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:57:43.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:57:43.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:57:43.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:57:43.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:57:43.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:57:43.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:57:43.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:57:43.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:57:43.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:57:43.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:57:43.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:57:43.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:57:43.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:57:43.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:57:43.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:57:43.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:57:43.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:57:43.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:57:43.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:57:43.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:57:43.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:57:43.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:57:43.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:57:43.531 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:57:44.009 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:57:44.051 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:57:44.052 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:57:44.053 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:57:44.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:57:44.055 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:57:44.055 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:57:44.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:57:44.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:57:44.055 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:57:44.055 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:57:44.055 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:57:44.055 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:57:44.482 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:57:44.531 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:57:44.531 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:57:44.531 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:57:44.532 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:57:44.953 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:57:45.424 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:57:45.532 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:57:45.532 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:57:45.533 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:57:45.533 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:57:45.897 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:57:46.369 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:57:46.534 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:57:46.534 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:57:46.534 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:57:46.534 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:57:46.841 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:57:47.312 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:57:47.535 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:57:47.536 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:57:47.536 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:57:47.536 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:57:47.786 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:57:48.258 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:57:48.537 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:57:48.537 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:57:48.537 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:57:48.537 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:57:48.730 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:57:49.201 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:57:49.675 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:57:50.147 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:57:50.619 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:57:51.090 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:57:51.564 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:57:52.036 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:57:52.508 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:57:52.979 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:57:53.452 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:57:53.924 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:57:54.396 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:57:54.868 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:57:55.341 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:57:55.813 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:57:56.286 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:57:56.757 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:57:57.230 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:57:57.702 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:57:58.174 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:57:58.645 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:57:59.119 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 04:57:59.591 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 04:58:00.063 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 04:58:00.534 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 04:58:01.005 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 04:58:01.479 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 04:58:01.951 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 04:58:02.423 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 04:58:02.894 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 04:58:03.367 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 04:58:03.840 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 04:58:04.312 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 04:58:04.786 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 04:58:05.258 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 04:58:05.545 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:58:05.545 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:58:05.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:58:05.551 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:58:05.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:58:05.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:58:05.556 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:58:05.557 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:58:05.557 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:58:05.557 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:58:05.557 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:58:05.557 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:58:05.557 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:58:05.557 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4757 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:58:05.558 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4757 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:58:05.558 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4757 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:58:05.558 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4758 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:58:05.558 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4758 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:58:05.558 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4758 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:58:05.558 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4758 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:58:05.558 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4758 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:58:05.558 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4758 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:58:05.558 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4758 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:58:05.558 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4758 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:58:10.559 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:58:10.559 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:58:10.559 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:58:10.559 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:58:10.559 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:58:10.559 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:58:10.570 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:58:10.570 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:58:10.570 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:58:10.571 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:58:10.571 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:58:10.572 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:58:10.573 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:58:10.573 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:58:10.573 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:58:10.573 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:58:10.573 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:58:10.573 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:58:10.573 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:58:10.574 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:58:10.574 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:58:10.574 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:58:10.574 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:58:10.575 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:58:10.575 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:58:10.575 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:58:10.575 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:58:10.576 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:58:10.576 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:58:10.576 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:58:10.576 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:58:10.576 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:58:10.576 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:58:10.577 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:58:10.577 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:58:10.579 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:58:10.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:58:10.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:58:10.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:58:10.579 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:58:10.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:58:10.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:58:10.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:58:10.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:58:10.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:58:10.579 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:58:10.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:58:10.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:58:10.579 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:58:10.579 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:58:10.579 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:58:10.580 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:58:10.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:58:10.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:58:10.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:58:10.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:58:10.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:58:10.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:58:10.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:58:10.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:58:10.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:58:10.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:58:10.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:58:10.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:58:10.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:58:10.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:58:10.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:58:10.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:58:10.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:58:10.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:58:10.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:58:10.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:58:10.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:58:10.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:58:10.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:58:10.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:58:10.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:58:10.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:58:10.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:58:10.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:58:10.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:58:10.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:58:10.584 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:58:11.063 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:58:11.098 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:58:11.099 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:58:11.100 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:58:11.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:58:11.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:58:11.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:58:11.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:58:11.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:58:11.101 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:58:11.102 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:58:11.102 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:58:11.102 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:58:11.535 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:58:11.582 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:58:11.582 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:58:11.583 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:58:11.583 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:58:12.007 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:58:12.480 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:58:12.583 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:58:12.583 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:58:12.584 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:58:12.584 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:58:12.952 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:58:13.425 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:58:13.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:58:13.584 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:58:13.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:58:13.585 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:58:13.896 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:58:14.369 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:58:14.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:58:14.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:58:14.586 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:58:14.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:58:14.841 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:58:15.313 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:58:15.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:58:15.587 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:58:15.587 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:58:15.587 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:58:15.785 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:58:16.258 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:58:16.730 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:58:17.202 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:58:17.673 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:58:18.146 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:58:18.619 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:58:19.091 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:58:19.562 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:58:20.033 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:58:20.506 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:58:20.978 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:58:21.451 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:58:21.922 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:58:22.395 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:58:22.867 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:58:23.340 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:58:23.811 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:58:24.284 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:58:24.756 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:58:25.228 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:58:25.700 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:58:26.173 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 04:58:26.646 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 04:58:27.118 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 04:58:27.589 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 04:58:28.062 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 04:58:28.535 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 04:58:29.007 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 04:58:29.478 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 04:58:29.951 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 04:58:30.424 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 04:58:30.896 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 04:58:31.367 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 04:58:31.840 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 04:58:32.313 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 04:58:32.597 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:58:32.597 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:58:32.604 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:58:32.604 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:58:32.604 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:58:32.604 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:58:32.610 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:58:32.610 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:58:32.610 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:58:32.610 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:58:32.610 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:58:32.610 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:58:32.611 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:58:32.611 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4756 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:58:32.611 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4756 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:58:32.611 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4756 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:58:32.611 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4756 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:58:32.611 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4756 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:58:32.611 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4757 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:58:32.612 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4757 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:58:32.612 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4757 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:58:32.612 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4757 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:58:32.612 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4757 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:58:32.612 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4757 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:58:32.612 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4757 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:58:32.612 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4757 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:58:32.612 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4758 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:58:32.612 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4758 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:58:32.612 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4758 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:58:32.612 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4758 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:58:32.613 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4758 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:58:32.613 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4758 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:58:32.613 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4758 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:58:32.613 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4758 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:58:37.611 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:58:37.611 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:58:37.611 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:58:37.611 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:58:37.611 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:58:37.611 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:58:37.624 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:58:37.625 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:58:37.626 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:58:37.626 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:58:37.626 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:58:37.630 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:58:37.631 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:58:37.631 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:58:37.631 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:58:37.631 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:58:37.632 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:58:37.632 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:58:37.632 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:58:37.635 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:58:37.635 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:58:37.635 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:58:37.635 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:58:37.635 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:58:37.636 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:58:37.636 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:58:37.636 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:58:37.638 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:58:37.638 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:58:37.638 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:58:37.638 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:58:37.638 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:58:37.638 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:58:37.638 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:58:37.638 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:58:37.642 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:58:37.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:58:37.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:58:37.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:58:37.642 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:58:37.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:58:37.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:58:37.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:58:37.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:58:37.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:58:37.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:58:37.642 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:58:37.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:58:37.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:58:37.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:58:37.642 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:58:37.642 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:58:37.642 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:58:37.642 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:58:37.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:58:37.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:58:37.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:58:37.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:58:37.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:58:37.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:58:37.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:58:37.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:58:37.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:58:37.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:58:37.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:58:37.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:58:37.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:58:37.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:58:37.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:58:37.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:58:37.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:58:37.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:58:37.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:58:37.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:58:37.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:58:37.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:58:37.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:58:37.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:58:37.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:58:37.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:58:37.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:58:37.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:58:37.647 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:58:38.124 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:58:38.159 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:58:38.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:58:38.162 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:58:38.163 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:58:38.164 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:58:38.164 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:58:38.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:58:38.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:58:38.165 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:58:38.165 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:58:38.165 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:58:38.165 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:58:38.596 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:58:38.645 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:58:38.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:58:38.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:58:38.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:58:39.067 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:58:39.541 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:58:39.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:58:39.647 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:58:39.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:58:39.647 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:58:40.013 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:58:40.486 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:58:40.647 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:58:40.647 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:58:40.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:58:40.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:58:40.956 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:58:41.427 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:58:41.648 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:58:41.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:58:41.649 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:58:41.649 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:58:41.901 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:58:42.373 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:58:42.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:58:42.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:58:42.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:58:42.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:58:42.845 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:58:43.316 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:58:43.787 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:58:44.260 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:58:44.733 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:58:45.205 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:58:45.676 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:58:46.149 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:58:46.622 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:58:47.094 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:58:47.565 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:58:48.038 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:58:48.511 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:58:48.983 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:58:49.454 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:58:49.927 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:58:50.399 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:58:50.872 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:58:51.343 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:58:51.816 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:58:52.289 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:58:52.761 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:58:53.232 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 04:58:53.705 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 04:58:54.177 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 04:58:54.649 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 04:58:55.121 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 04:58:55.592 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 04:58:56.063 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 04:58:56.535 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 04:58:57.008 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 04:58:57.480 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 04:58:57.951 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 04:58:58.422 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 04:58:58.895 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 04:58:59.367 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 04:58:59.839 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 04:59:00.310 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 04:59:00.783 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 04:59:01.256 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 04:59:01.728 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 04:59:02.199 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 04:59:02.670 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 04:59:03.143 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 04:59:03.616 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 04:59:04.088 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 04:59:04.561 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 04:59:05.034 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 04:59:05.506 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 04:59:05.980 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 04:59:06.452 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 04:59:06.924 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-08 04:59:07.395 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-08 04:59:07.869 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-08 04:59:08.341 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-08 04:59:08.813 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-08 04:59:09.284 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-08 04:59:09.755 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-08 04:59:10.228 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-08 04:59:10.701 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-08 04:59:11.173 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-08 04:59:11.647 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-08 04:59:11.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:59:11.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:59:11.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:59:11.670 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:59:11.670 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:59:11.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:59:11.671 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:59:11.671 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:59:11.671 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:59:11.671 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:59:11.671 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:59:11.671 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:59:11.671 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:59:11.671 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7351 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:59:11.671 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7351 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:59:11.671 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7351 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:59:11.671 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7351 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:59:11.671 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7352 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:59:11.671 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7352 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:59:11.671 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7352 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:59:11.671 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7352 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:59:11.671 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7352 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:59:11.671 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7352 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:59:11.671 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7352 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:59:11.671 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7352 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:59:16.676 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:59:16.676 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:59:16.676 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:59:16.677 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:59:16.677 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:59:16.677 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:59:16.685 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:59:16.686 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:59:16.686 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:59:16.686 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:59:16.687 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:59:16.690 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:59:16.691 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:59:16.691 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:59:16.691 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:59:16.691 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:59:16.691 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:59:16.691 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:59:16.691 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:59:16.695 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:59:16.695 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:59:16.695 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:59:16.695 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:59:16.695 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:59:16.695 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:59:16.696 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:59:16.696 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:59:16.698 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:59:16.699 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:59:16.699 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:59:16.699 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:59:16.699 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:59:16.699 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:59:16.699 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:59:16.699 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:59:16.703 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:59:16.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:59:16.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:59:16.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:59:16.703 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:59:16.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:59:16.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:59:16.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:59:16.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:59:16.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:59:16.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:59:16.703 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:59:16.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:59:16.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:59:16.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:59:16.703 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:59:16.703 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:59:16.703 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:59:16.703 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:59:16.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:59:16.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:59:16.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:59:16.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:59:16.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:59:16.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:59:16.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:59:16.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:59:16.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:59:16.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:59:16.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:59:16.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:59:16.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:59:16.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:59:16.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:59:16.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:59:16.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:59:16.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:59:16.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:59:16.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:59:16.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:59:16.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:59:16.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:59:16.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:59:16.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:59:16.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:59:16.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:59:16.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:59:16.708 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:59:17.187 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:59:17.226 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:59:17.229 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:59:17.230 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:59:17.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:59:17.231 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:59:17.231 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:59:17.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 04:59:17.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 04:59:17.233 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 04:59:17.233 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 04:59:17.234 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 04:59:17.234 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 04:59:17.659 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 04:59:17.706 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:59:17.706 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:59:17.706 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:59:17.706 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:59:18.131 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 04:59:18.604 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 04:59:18.707 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:59:18.707 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:59:18.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:59:18.707 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:59:19.076 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 04:59:19.548 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 04:59:19.708 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:59:19.708 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:59:19.708 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:59:19.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:59:20.019 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 04:59:20.493 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 04:59:20.709 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:59:20.709 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:59:20.709 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:59:20.710 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:59:20.965 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 04:59:21.438 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 04:59:21.710 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:59:21.710 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:59:21.710 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:59:21.711 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:59:21.908 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 04:59:22.382 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 04:59:22.854 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 04:59:23.327 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 04:59:23.797 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 04:59:24.268 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 04:59:24.739 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 04:59:25.211 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 04:59:25.685 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 04:59:26.157 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 04:59:26.628 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 04:59:27.101 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 04:59:27.574 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 04:59:28.046 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 04:59:28.517 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 04:59:28.990 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 04:59:29.463 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 04:59:29.935 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 04:59:30.406 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 04:59:30.877 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 04:59:31.350 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 04:59:31.822 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 04:59:32.294 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 04:59:32.765 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 04:59:33.236 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 04:59:33.709 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 04:59:34.182 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 04:59:34.654 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 04:59:35.125 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 04:59:35.598 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 04:59:36.071 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 04:59:36.543 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 04:59:37.016 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 04:59:37.489 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 04:59:37.961 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 04:59:38.435 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 04:59:38.907 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 04:59:39.379 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 04:59:39.850 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 04:59:40.324 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 04:59:40.796 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 04:59:41.268 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 04:59:41.739 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 04:59:42.213 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 04:59:42.685 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 04:59:43.157 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 04:59:43.625 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 04:59:44.097 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 04:59:44.569 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 04:59:44.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 04:59:44.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 04:59:44.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:59:44.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:59:44.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:59:44.724 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:59:44.725 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:59:44.725 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:59:44.725 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:59:44.725 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:59:44.725 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:59:44.725 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:59:44.725 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:59:49.732 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:59:49.732 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:59:49.732 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:59:49.732 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:59:49.732 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:59:49.732 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:59:49.747 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:59:49.748 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:59:49.748 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:59:49.749 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:59:49.749 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:59:49.752 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:59:49.752 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:59:49.752 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:59:49.752 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:59:49.752 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:59:49.753 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:59:49.753 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:59:49.753 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:59:49.756 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:59:49.756 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:59:49.756 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:59:49.756 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:59:49.756 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:59:49.757 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:59:49.757 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:59:49.757 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:59:49.759 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:59:49.759 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:59:49.759 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:59:49.759 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:59:49.760 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:59:49.760 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:59:49.760 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:59:49.760 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:59:49.764 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:59:49.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:59:49.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:59:49.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:59:49.764 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:59:49.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:59:49.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:59:49.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:59:49.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:59:49.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:59:49.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:59:49.765 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:59:49.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:59:49.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:59:49.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:59:49.765 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:59:49.765 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:59:49.765 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:59:49.765 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:59:49.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:59:49.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:59:49.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:59:49.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:59:49.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:59:49.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:59:49.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:59:49.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:59:49.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:59:49.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:59:49.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:59:49.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:59:49.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:59:49.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:59:49.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:59:49.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:59:49.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:59:49.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:59:49.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:59:49.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:59:49.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:59:49.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:59:49.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:59:49.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:59:49.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:59:49.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:59:49.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:59:49.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:59:49.770 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:59:50.247 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:59:50.287 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:59:50.288 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:59:50.289 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:59:50.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:59:50.344 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:59:50.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:59:50.344 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:59:50.344 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:59:50.345 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:59:50.345 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:59:50.345 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:59:50.345 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:59:50.345 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:59:50.345 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:59:50.345 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:59:50.345 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:59:50.345 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:59:50.345 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:59:50.345 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:59:50.345 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:59:50.345 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:59:50.345 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:59:55.353 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:59:55.353 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:59:55.353 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:59:55.353 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:59:55.353 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:59:55.353 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:59:55.362 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:59:55.363 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:59:55.363 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:59:55.363 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 04:59:55.363 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 04:59:55.367 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 04:59:55.367 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 04:59:55.367 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:59:55.367 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:59:55.367 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:59:55.367 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 04:59:55.368 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 04:59:55.368 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 04:59:55.372 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 04:59:55.372 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 04:59:55.372 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:59:55.372 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:59:55.372 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:59:55.372 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 04:59:55.373 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 04:59:55.373 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 04:59:55.376 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 04:59:55.377 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 04:59:55.377 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:59:55.377 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 04:59:55.377 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:59:55.377 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 04:59:55.377 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 04:59:55.377 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 04:59:55.382 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 04:59:55.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 04:59:55.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 04:59:55.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 04:59:55.382 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 04:59:55.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 04:59:55.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 04:59:55.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 04:59:55.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 04:59:55.383 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 04:59:55.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:59:55.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:59:55.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:59:55.383 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 04:59:55.383 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 04:59:55.383 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 04:59:55.383 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 04:59:55.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:59:55.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:59:55.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:59:55.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 04:59:55.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:59:55.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:59:55.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:59:55.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:59:55.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:59:55.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:59:55.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:59:55.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:59:55.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:59:55.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:59:55.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:59:55.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:59:55.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:59:55.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:59:55.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:59:55.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:59:55.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:59:55.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:59:55.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:59:55.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:59:55.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:59:55.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 04:59:55.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:59:55.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 04:59:55.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 04:59:55.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 04:59:55.388 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 04:59:55.865 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 04:59:55.910 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 04:59:55.912 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 04:59:55.914 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 04:59:55.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 04:59:55.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 04:59:55.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 04:59:55.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 04:59:55.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 04:59:55.970 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 04:59:55.970 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 04:59:55.970 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 04:59:55.970 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 04:59:55.970 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 04:59:55.970 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 04:59:55.970 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 04:59:55.970 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:59:55.970 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:59:55.970 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 04:59:55.970 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:00.979 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:00:00.979 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:00:00.979 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:00:00.979 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:00:00.979 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:00:00.979 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:00:00.988 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:00:00.989 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:00:00.989 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:00:00.989 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:00:00.990 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:00:00.993 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:00:00.993 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:00:00.993 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:00:00.993 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:00:00.993 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:00:00.993 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:00:00.994 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:00:00.994 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:00:00.997 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:00:00.997 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:00:00.997 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:00:00.997 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:00:00.998 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:00:00.998 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:00:00.998 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:00:00.998 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:00:01.000 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:00:01.000 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:00:01.000 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:00:01.000 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:00:01.000 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:00:01.000 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:00:01.000 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:00:01.000 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:00:01.003 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:00:01.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:00:01.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:00:01.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:00:01.003 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:00:01.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:00:01.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:00:01.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:00:01.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:00:01.004 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:00:01.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:01.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:01.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:01.004 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:00:01.004 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:00:01.004 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:00:01.004 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:00:01.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:01.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:01.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:01.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:00:01.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:01.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:01.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:01.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:01.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:01.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:01.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:01.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:01.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:01.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:01.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:01.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:01.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:01.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:01.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:01.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:01.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:01.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:01.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:01.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:01.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:01.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:01.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:01.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:01.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:01.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:01.009 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:00:01.486 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:00:01.526 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:00:01.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:00:01.530 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:00:01.532 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:00:01.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:00:01.584 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:00:01.584 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:00:01.584 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:00:01.590 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:00:01.590 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:00:01.590 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:00:01.590 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:00:01.590 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:00:01.590 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:00:01.591 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:00:01.591 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:01.591 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:01.591 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:01.591 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:01.591 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:01.591 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:01.592 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:01.592 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:01.592 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:01.592 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:01.592 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:01.592 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:01.592 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:01.592 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:01.592 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:01.592 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:01.592 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:01.592 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:01.593 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:01.593 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:06.593 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:00:06.593 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:00:06.593 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:00:06.593 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:00:06.593 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:00:06.593 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:00:06.602 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:00:06.603 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:00:06.603 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:00:06.603 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:00:06.604 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:00:06.606 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:00:06.606 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:00:06.607 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:00:06.607 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:00:06.607 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:00:06.607 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:00:06.607 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:00:06.607 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:00:06.610 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:00:06.610 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:00:06.610 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:00:06.610 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:00:06.610 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:00:06.611 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:00:06.611 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:00:06.611 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:00:06.612 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:00:06.613 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:00:06.613 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:00:06.613 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:00:06.613 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:00:06.613 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:00:06.613 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:00:06.613 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:00:06.616 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:00:06.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:00:06.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:00:06.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:00:06.616 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:00:06.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:00:06.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:00:06.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:06.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:00:06.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:00:06.616 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:00:06.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:06.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:06.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:06.617 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:00:06.617 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:00:06.617 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:00:06.617 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:00:06.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:06.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:06.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:06.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:00:06.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:06.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:06.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:06.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:06.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:06.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:06.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:06.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:06.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:06.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:06.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:06.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:06.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:06.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:06.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:06.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:06.618 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:06.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:06.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:06.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:06.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:06.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:06.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:06.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:06.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:06.621 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:00:07.100 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:00:07.138 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:00:07.139 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:00:07.139 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:00:07.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:00:07.141 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:00:07.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:00:07.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:00:07.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:00:07.141 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:00:07.141 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:00:07.141 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:00:07.141 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:00:07.573 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:00:07.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:00:07.619 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:00:07.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:00:07.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:00:08.044 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:00:08.515 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:00:08.620 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:00:08.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:00:08.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:00:08.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:00:08.988 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:00:09.460 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:00:09.622 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:00:09.622 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:00:09.622 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:00:09.622 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:00:09.932 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:00:10.403 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:00:10.623 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:00:10.623 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:00:10.623 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:00:10.624 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:00:10.874 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:00:11.348 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:00:11.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:00:11.625 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:00:11.625 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:00:11.625 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:00:11.820 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:00:12.292 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:00:12.763 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:00:13.237 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:00:13.709 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:00:14.181 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:00:14.652 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:00:15.126 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:00:15.154 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:00:15.154 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:00:15.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:00:15.159 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:00:15.159 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:00:15.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:00:15.162 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:00:15.163 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:00:15.163 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:00:15.163 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:00:15.163 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:00:15.163 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:00:15.163 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:00:15.164 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1846 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:15.164 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1846 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:15.164 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1846 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:15.164 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1846 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:15.164 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1847 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:15.164 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1847 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:15.164 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1847 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:15.164 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1847 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:15.164 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1847 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:15.164 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1847 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:15.165 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1847 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:20.168 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:00:20.168 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:00:20.168 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:00:20.168 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:00:20.168 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:00:20.168 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:00:20.176 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:00:20.177 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:00:20.177 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:00:20.177 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:00:20.177 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:00:20.181 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:00:20.181 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:00:20.181 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:00:20.182 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:00:20.182 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:00:20.182 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:00:20.182 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:00:20.183 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:00:20.185 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:00:20.185 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:00:20.185 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:00:20.185 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:00:20.185 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:00:20.185 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:00:20.186 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:00:20.186 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:00:20.187 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:00:20.188 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:00:20.188 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:00:20.188 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:00:20.188 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:00:20.188 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:00:20.188 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:00:20.188 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:00:20.191 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:00:20.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:00:20.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:00:20.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:00:20.191 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:00:20.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:00:20.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:00:20.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:00:20.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:00:20.191 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:00:20.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:20.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:20.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:20.191 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:00:20.191 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:00:20.191 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:00:20.191 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:00:20.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:20.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:20.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:20.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:00:20.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:20.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:20.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:20.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:20.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:20.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:20.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:20.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:20.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:20.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:20.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:20.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:20.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:20.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:20.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:20.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:20.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:20.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:20.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:20.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:20.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:20.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:20.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:20.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:20.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:20.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:20.196 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:00:20.674 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:00:20.712 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:00:20.714 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:00:20.715 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:00:20.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:00:20.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:00:20.719 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:00:20.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:00:20.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:00:20.720 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:00:20.720 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:00:20.720 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:00:20.720 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:00:21.146 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:00:21.194 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:00:21.195 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:00:21.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:00:21.195 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:00:21.617 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:00:22.091 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:00:22.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:00:22.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:00:22.196 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:00:22.196 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:00:22.563 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:00:23.035 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:00:23.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:00:23.197 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:00:23.197 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:00:23.197 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:00:23.506 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:00:23.977 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:00:24.198 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:00:24.198 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:00:24.198 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:00:24.199 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:00:24.450 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:00:24.923 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:00:25.199 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:00:25.200 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:00:25.200 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:00:25.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:00:25.395 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:00:25.866 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:00:26.339 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:00:26.812 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:00:27.284 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:00:27.755 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:00:28.228 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:00:28.701 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:00:28.767 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:00:28.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:00:28.771 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:00:28.771 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:00:28.772 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:00:28.772 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:00:28.773 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:00:28.773 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:00:28.773 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:00:28.773 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:00:28.773 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:00:28.773 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:00:28.773 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:00:28.773 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1853 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:28.773 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1853 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:28.773 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1853 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:33.778 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:00:33.778 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:00:33.779 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:00:33.779 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:00:33.779 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:00:33.779 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:00:33.789 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:00:33.791 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:00:33.791 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:00:33.791 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:00:33.791 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:00:33.797 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:00:33.797 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:00:33.798 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:00:33.798 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:00:33.798 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:00:33.798 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:00:33.799 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:00:33.799 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:00:33.801 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:00:33.801 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:00:33.801 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:00:33.801 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:00:33.802 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:00:33.802 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:00:33.802 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:00:33.802 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:00:33.803 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:00:33.803 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:00:33.803 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:00:33.803 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:00:33.803 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:00:33.803 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:00:33.803 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:00:33.803 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:00:33.806 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:00:33.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:00:33.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:00:33.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:00:33.806 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:00:33.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:00:33.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:00:33.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:00:33.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:00:33.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:33.806 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:00:33.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:33.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:33.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:33.807 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:00:33.807 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:00:33.807 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:00:33.807 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:00:33.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:33.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:33.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:33.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:00:33.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:33.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:33.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:33.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:33.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:33.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:33.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:33.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:33.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:33.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:33.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:33.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:33.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:33.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:33.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:33.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:33.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:33.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:33.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:33.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:33.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:33.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:33.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:33.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:33.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:33.811 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:00:34.290 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:00:34.331 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:00:34.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:00:34.334 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:00:34.335 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:00:34.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:00:34.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:00:34.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:00:34.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:00:34.338 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:00:34.338 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:00:34.338 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:00:34.338 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:00:34.762 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:00:34.809 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:00:34.809 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:00:34.809 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:00:34.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:00:35.233 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:00:35.707 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:00:35.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:00:35.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:00:35.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:00:35.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:00:36.179 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:00:36.651 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:00:36.811 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:00:36.811 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:00:36.811 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:00:36.812 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:00:37.122 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:00:37.595 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:00:37.812 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:00:37.813 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:00:37.813 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:00:37.813 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:00:38.068 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:00:38.540 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:00:38.814 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:00:38.814 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:00:38.814 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:00:38.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:00:39.013 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:00:39.486 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:00:39.958 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:00:40.429 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:00:40.902 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:00:41.375 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:00:41.847 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:00:42.318 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:00:42.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:00:42.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:00:42.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:00:42.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:00:42.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:00:42.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:00:42.395 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:00:42.395 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:00:42.395 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:00:42.395 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:00:42.395 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:00:42.395 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:00:42.395 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:00:42.395 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:42.395 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:42.395 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:42.395 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:42.395 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:42.395 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:42.396 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:47.399 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:00:47.399 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:00:47.399 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:00:47.399 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:00:47.399 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:00:47.399 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:00:47.407 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:00:47.407 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:00:47.407 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:00:47.407 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:00:47.407 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:00:47.410 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:00:47.410 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:00:47.410 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:00:47.410 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:00:47.411 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:00:47.411 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:00:47.411 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:00:47.411 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:00:47.415 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:00:47.415 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:00:47.415 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:00:47.415 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:00:47.415 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:00:47.415 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:00:47.415 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:00:47.415 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:00:47.419 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:00:47.419 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:00:47.419 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:00:47.419 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:00:47.419 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:00:47.419 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:00:47.419 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:00:47.420 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:00:47.424 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:00:47.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:00:47.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:00:47.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:00:47.425 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:00:47.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:00:47.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:00:47.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:00:47.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:00:47.425 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:00:47.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:47.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:47.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:47.425 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:00:47.425 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:00:47.425 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:00:47.425 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:00:47.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:47.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:47.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:47.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:00:47.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:47.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:47.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:47.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:47.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:47.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:47.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:47.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:47.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:47.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:47.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:47.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:47.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:47.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:47.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:47.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:47.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:47.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:47.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:47.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:00:47.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:47.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:47.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:47.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:00:47.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:00:47.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:00:47.430 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:00:47.908 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:00:47.954 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:00:47.957 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:00:47.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:00:47.959 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:00:47.962 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:00:47.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:00:47.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:00:47.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:00:47.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:00:47.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:00:47.963 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:00:47.963 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:00:48.380 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:00:48.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:00:48.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:00:48.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:00:48.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:00:48.852 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:00:49.325 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:00:49.430 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:00:49.430 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:00:49.431 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:00:49.431 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:00:49.798 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:00:50.270 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:00:50.431 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:00:50.431 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:00:50.432 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:00:50.432 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:00:50.743 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:00:51.216 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:00:51.432 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:00:51.432 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:00:51.433 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:00:51.433 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:00:51.688 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:00:52.159 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:00:52.434 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:00:52.434 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:00:52.434 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:00:52.434 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:00:52.632 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:00:53.105 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:00:53.577 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:00:54.048 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:00:54.521 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:00:54.994 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:00:55.466 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:00:55.937 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:00:56.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:00:56.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:00:56.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:00:56.014 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:00:56.014 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:00:56.014 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:00:56.020 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:00:56.020 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:00:56.021 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:00:56.021 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:00:56.021 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:00:56.021 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:00:56.021 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:00:56.021 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:56.021 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:56.021 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:56.022 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:56.022 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:56.022 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:56.022 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:56.022 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:56.022 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:56.022 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:56.022 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:56.022 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:56.022 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1856 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:56.022 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1856 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:56.022 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1856 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:56.022 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1856 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:56.022 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:56.022 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:56.022 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:00:56.023 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:01:01.022 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:01:01.022 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:01:01.022 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:01:01.022 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:01:01.022 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:01:01.022 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:01:01.031 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:01:01.032 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:01:01.032 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:01:01.033 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:01:01.033 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:01:01.038 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:01:01.038 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:01:01.038 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:01:01.038 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:01:01.039 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:01:01.039 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:01:01.039 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:01:01.039 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:01:01.043 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:01:01.044 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:01:01.044 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:01:01.044 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:01:01.044 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:01:01.044 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:01:01.044 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:01:01.044 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:01:01.048 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:01:01.048 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:01:01.049 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:01:01.049 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:01:01.049 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:01:01.049 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:01:01.049 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:01:01.049 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:01:01.054 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:01:01.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:01:01.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:01:01.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:01:01.054 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:01:01.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:01:01.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:01:01.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:01:01.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:01:01.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:01:01.054 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:01:01.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:01:01.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:01:01.054 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:01:01.054 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:01:01.054 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:01:01.055 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:01:01.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:01:01.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:01:01.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:01:01.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:01:01.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:01:01.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:01:01.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:01:01.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:01:01.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:01:01.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:01:01.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:01:01.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:01:01.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:01:01.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:01:01.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:01:01.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:01:01.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:01:01.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:01:01.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:01:01.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:01:01.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:01:01.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:01:01.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:01:01.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:01:01.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:01:01.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:01:01.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:01:01.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:01:01.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:01:01.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:01:01.059 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:01:01.538 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:01:01.584 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:01:01.586 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:01:01.588 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:01:01.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:01:01.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:01:01.591 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:01:01.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:01:01.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:01:01.592 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:01:01.592 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:01:01.592 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:01:01.592 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:01:02.010 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:01:02.058 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:01:02.058 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:01:02.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:01:02.059 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:01:02.481 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:01:02.952 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:01:03.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:01:03.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:01:03.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:01:03.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:01:03.423 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:01:03.896 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:01:04.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:01:04.061 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:01:04.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:01:04.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:01:04.369 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:01:04.841 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:01:05.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:01:05.063 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:01:05.063 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:01:05.063 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:01:05.312 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:01:05.785 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:01:06.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:01:06.064 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:01:06.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:01:06.064 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:01:06.258 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:01:06.730 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:01:07.201 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:01:07.674 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:01:08.147 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:01:08.619 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:01:09.090 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:01:09.563 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:01:09.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:01:09.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:01:09.643 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:01:09.643 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:01:09.643 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:01:09.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:01:09.645 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:01:09.645 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:01:09.645 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:01:09.645 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:01:09.645 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:01:09.645 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:01:09.645 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:01:09.645 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:01:09.645 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:01:09.645 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1856 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:01:09.645 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1856 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:01:09.645 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1856 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:01:09.645 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1856 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:01:09.645 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:01:09.645 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:01:09.645 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:01:09.645 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:01:14.651 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:01:14.651 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:01:14.651 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:01:14.651 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:01:14.651 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:01:14.651 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:01:14.660 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:01:14.662 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:01:14.662 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:01:14.662 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:01:14.662 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:01:14.666 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:01:14.666 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:01:14.666 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:01:14.666 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:01:14.667 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:01:14.667 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:01:14.667 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:01:14.667 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:01:14.669 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:01:14.670 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:01:14.670 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:01:14.670 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:01:14.670 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:01:14.670 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:01:14.670 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:01:14.670 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:01:14.672 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:01:14.672 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:01:14.672 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:01:14.672 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:01:14.672 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:01:14.672 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:01:14.673 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:01:14.673 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:01:14.676 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:01:14.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:01:14.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:01:14.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:01:14.676 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:01:14.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:01:14.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:01:14.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:01:14.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:01:14.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:01:14.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:01:14.676 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:01:14.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:01:14.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:01:14.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:01:14.676 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:01:14.676 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:01:14.676 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:01:14.676 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:01:14.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:01:14.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:01:14.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:01:14.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:01:14.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:01:14.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:01:14.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:01:14.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:01:14.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:01:14.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:01:14.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:01:14.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:01:14.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:01:14.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:01:14.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:01:14.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:01:14.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:01:14.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:01:14.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:01:14.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:01:14.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:01:14.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:01:14.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:01:14.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:01:14.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:01:14.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:01:14.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:01:14.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:01:14.681 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:01:15.159 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:01:15.195 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:01:15.196 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:01:15.197 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:01:15.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:01:15.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:01:15.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:01:15.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:01:15.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:01:15.199 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:01:15.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:01:15.199 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:01:15.199 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:01:15.631 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:01:15.678 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:01:15.679 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:01:15.679 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:01:15.679 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:01:16.103 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:01:16.576 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:01:16.679 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:01:16.680 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:01:16.680 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:01:16.680 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:01:17.048 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:01:17.521 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:01:17.680 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:01:17.681 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:01:17.681 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:01:17.681 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:01:17.992 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:01:18.465 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:01:18.682 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:01:18.686 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:01:18.687 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:01:18.687 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:01:18.937 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:01:19.409 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:01:19.682 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:01:19.687 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:01:19.687 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:01:19.687 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:01:19.881 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:01:20.353 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:01:20.826 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:01:21.299 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:01:21.772 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:01:22.244 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:01:22.716 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:01:23.187 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:01:23.658 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:01:24.132 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:01:24.604 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:01:25.076 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:01:25.548 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:01:26.021 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:01:26.494 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 05:01:26.966 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 05:01:27.437 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 05:01:27.908 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 05:01:28.381 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 05:01:28.854 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 05:01:29.326 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 05:01:29.797 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 05:01:30.270 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 05:01:30.743 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 05:01:31.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:01:31.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:01:31.215 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 05:01:31.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:01:31.220 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:01:31.220 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:01:31.220 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:01:31.222 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:01:31.222 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:01:31.222 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:01:31.222 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:01:31.222 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:01:31.222 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:01:31.223 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:01:36.227 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:01:36.227 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:01:36.228 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:01:36.228 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:01:36.228 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:01:36.228 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:01:36.236 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:01:36.237 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:01:36.237 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:01:36.238 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:01:36.238 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:01:36.241 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:01:36.241 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:01:36.242 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:01:36.242 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:01:36.242 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:01:36.242 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:01:36.243 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:01:36.243 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:01:36.245 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:01:36.245 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:01:36.245 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:01:36.245 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:01:36.245 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:01:36.245 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:01:36.245 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:01:36.246 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:01:36.247 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:01:36.247 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:01:36.247 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:01:36.247 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:01:36.248 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:01:36.248 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:01:36.248 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:01:36.248 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:01:36.251 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:01:36.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:01:36.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:01:36.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:01:36.251 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:01:36.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:01:36.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:01:36.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:01:36.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:01:36.251 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:01:36.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:01:36.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:01:36.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:01:36.251 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:01:36.251 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:01:36.251 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:01:36.251 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:01:36.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:01:36.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:01:36.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:01:36.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:01:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:01:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:01:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:01:36.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:01:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:01:36.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:01:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:01:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:01:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:01:36.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:01:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:01:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:01:36.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:01:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:01:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:01:36.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:01:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:01:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:01:36.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:01:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:01:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:01:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:01:36.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:01:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:01:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:01:36.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:01:36.256 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:01:36.734 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:01:36.779 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:01:36.781 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:01:36.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:01:36.784 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:01:36.794 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:01:36.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:01:36.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:01:36.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:01:36.796 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:01:36.796 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:01:36.796 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:01:36.797 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:01:37.206 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:01:37.253 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:01:37.254 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:01:37.254 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:01:37.254 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:01:37.677 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:01:38.151 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:01:38.254 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:01:38.255 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:01:38.255 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:01:38.255 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:01:38.624 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:01:39.096 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:01:39.255 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:01:39.256 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:01:39.256 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:01:39.256 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:01:39.567 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:01:40.040 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:01:40.257 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:01:40.257 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:01:40.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:01:40.257 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:01:40.512 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:01:40.985 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:01:41.259 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:01:41.259 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:01:41.259 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:01:41.259 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:01:41.456 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:01:41.929 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:01:42.401 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:01:42.873 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:01:43.345 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:01:43.818 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:01:44.290 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:01:44.762 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:01:44.834 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:01:44.834 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:01:44.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:01:44.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:01:44.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:01:44.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:01:44.849 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:01:44.849 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:01:44.849 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:01:44.849 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:01:44.849 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:01:44.849 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:01:44.849 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:01:44.849 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1857 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:01:44.849 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1857 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:01:44.849 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1857 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:01:44.849 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1857 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:01:44.849 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1857 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:01:44.849 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1857 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:01:49.854 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:01:49.854 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:01:49.854 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:01:49.854 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:01:49.854 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:01:49.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:01:49.861 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:01:49.862 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:01:49.862 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:01:49.862 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:01:49.862 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:01:49.866 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:01:49.867 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:01:49.867 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:01:49.867 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:01:49.867 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:01:49.867 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:01:49.867 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:01:49.867 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:01:49.870 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:01:49.870 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:01:49.870 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:01:49.870 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:01:49.870 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:01:49.870 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:01:49.870 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:01:49.870 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:01:49.873 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:01:49.874 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:01:49.874 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:01:49.874 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:01:49.874 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:01:49.874 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:01:49.874 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:01:49.874 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:01:49.879 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:01:49.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:01:49.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:01:49.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:01:49.880 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:01:49.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:01:49.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:01:49.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:01:49.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:01:49.880 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:01:49.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:01:49.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:01:49.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:01:49.880 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:01:49.880 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:01:49.880 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:01:49.880 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:01:49.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:01:49.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:01:49.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:01:49.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:01:49.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:01:49.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:01:49.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:01:49.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:01:49.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:01:49.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:01:49.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:01:49.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:01:49.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:01:49.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:01:49.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:01:49.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:01:49.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:01:49.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:01:49.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:01:49.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:01:49.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:01:49.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:01:49.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:01:49.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:01:49.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:01:49.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:01:49.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:01:49.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:01:49.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:01:49.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:01:49.885 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:01:50.363 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:01:50.407 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:01:50.409 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:01:50.410 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:01:50.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:01:50.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:01:50.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:01:50.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:01:50.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:01:50.419 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:01:50.420 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:01:50.420 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:01:50.420 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:01:50.835 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:01:50.884 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:01:50.884 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:01:50.885 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:01:50.885 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:01:51.306 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:01:51.780 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:01:51.886 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:01:51.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:01:51.886 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:01:51.886 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:01:52.252 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:01:52.724 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:01:52.886 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:01:52.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:01:52.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:01:52.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:01:53.195 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:01:53.666 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:01:53.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:01:53.888 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:01:53.888 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:01:53.888 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:01:54.139 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:01:54.612 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:01:54.888 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:01:54.889 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:01:54.889 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:01:54.889 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:01:55.084 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:01:55.555 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:01:56.028 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:01:56.501 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:01:56.973 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:01:57.444 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:01:57.917 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:01:58.390 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:01:58.862 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:01:59.333 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:01:59.807 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:02:00.279 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:02:00.751 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:02:01.222 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:02:01.695 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 05:02:02.168 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 05:02:02.640 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 05:02:03.111 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 05:02:03.585 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 05:02:04.057 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 05:02:04.529 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 05:02:05.000 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 05:02:05.473 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 05:02:05.946 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 05:02:06.437 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 05:02:06.462 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:02:06.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:02:06.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:02:06.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:02:06.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:02:06.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:02:06.477 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:02:06.477 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:02:06.477 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:02:06.477 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:02:06.477 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:02:06.477 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:02:06.478 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:02:11.483 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:02:11.483 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:02:11.483 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:02:11.483 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:02:11.483 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:02:11.483 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:02:11.492 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:02:11.494 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:02:11.494 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:02:11.494 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:02:11.494 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:02:11.499 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:02:11.499 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:02:11.499 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:02:11.500 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:02:11.500 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:02:11.500 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:02:11.500 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:02:11.500 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:02:11.504 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:02:11.504 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:02:11.505 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:02:11.505 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:02:11.505 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:02:11.505 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:02:11.505 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:02:11.505 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:02:11.509 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:02:11.509 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:02:11.509 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:02:11.509 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:02:11.509 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:02:11.509 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:02:11.509 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:02:11.509 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:02:11.514 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:02:11.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:02:11.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:02:11.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:02:11.514 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:02:11.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:02:11.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:02:11.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:02:11.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:02:11.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:11.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:11.514 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:02:11.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:11.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:11.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:11.515 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:02:11.515 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:02:11.515 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:02:11.515 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:02:11.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:11.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:11.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:11.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:02:11.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:11.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:11.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:11.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:11.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:11.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:11.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:11.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:11.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:11.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:11.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:11.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:11.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:11.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:11.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:11.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:11.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:11.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:11.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:11.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:11.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:11.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:11.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:11.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:11.519 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:02:11.998 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:02:12.040 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:02:12.041 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:02:12.041 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:02:12.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:02:12.060 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:02:12.060 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:02:12.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:02:12.098 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:02:12.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:02:12.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:02:12.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:02:12.101 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:02:12.101 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:02:12.101 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:02:12.101 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:02:12.101 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:02:12.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:02:12.101 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:02:12.101 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:12.101 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:12.101 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:12.101 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:12.101 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:12.101 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:12.101 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:12.101 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:12.102 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:12.102 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:12.102 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:17.109 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:02:17.109 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:02:17.109 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:02:17.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:02:17.109 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:02:17.109 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:02:17.114 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:02:17.114 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:02:17.114 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:02:17.115 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:02:17.115 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:02:17.116 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:02:17.116 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:02:17.116 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:02:17.116 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:02:17.117 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:02:17.117 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:02:17.117 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:02:17.117 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:02:17.118 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:02:17.118 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:02:17.118 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:02:17.118 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:02:17.118 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:02:17.118 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:02:17.118 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:02:17.118 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:02:17.120 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:02:17.120 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:02:17.120 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:02:17.120 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:02:17.120 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:02:17.120 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:02:17.120 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:02:17.120 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:02:17.122 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:02:17.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:02:17.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:02:17.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:02:17.122 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:02:17.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:02:17.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:02:17.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:02:17.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:02:17.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:17.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:17.122 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:02:17.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:17.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:17.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:17.122 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:02:17.122 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:02:17.122 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:02:17.123 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:02:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:17.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:02:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:17.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:17.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:17.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:17.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:17.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:17.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:17.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:17.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:17.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:17.127 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:02:17.605 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:02:17.644 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:02:17.646 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:02:17.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:02:17.647 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:02:17.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:02:17.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:02:17.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:02:17.706 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:02:17.707 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:02:17.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:02:17.707 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:02:17.707 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:02:17.708 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:02:17.708 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:02:17.708 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:02:17.708 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:02:17.708 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:02:17.708 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:02:17.708 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:17.708 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:17.708 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:17.708 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:17.708 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:17.708 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:22.715 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:02:22.715 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:02:22.715 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:02:22.715 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:02:22.715 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:02:22.715 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:02:22.725 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:02:22.726 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:02:22.726 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:02:22.727 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:02:22.727 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:02:22.729 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:02:22.730 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:02:22.730 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:02:22.730 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:02:22.730 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:02:22.730 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:02:22.731 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:02:22.731 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:02:22.733 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:02:22.733 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:02:22.734 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:02:22.734 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:02:22.734 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:02:22.734 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:02:22.735 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:02:22.735 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:02:22.737 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:02:22.737 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:02:22.737 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:02:22.737 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:02:22.738 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:02:22.738 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:02:22.738 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:02:22.738 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:02:22.742 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:02:22.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:02:22.742 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:02:22.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:02:22.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:02:22.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:02:22.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:02:22.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:02:22.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:22.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:02:22.742 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:02:22.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:22.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:22.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:22.743 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:02:22.743 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:02:22.743 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:02:22.743 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:02:22.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:22.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:22.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:22.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:02:22.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:22.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:22.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:22.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:22.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:22.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:22.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:22.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:22.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:22.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:22.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:22.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:22.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:22.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:22.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:22.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:22.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:22.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:22.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:22.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:22.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:22.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:22.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:22.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:22.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:22.747 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:02:23.226 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:02:23.270 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:02:23.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:02:23.274 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:02:23.277 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:02:23.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:02:23.299 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:02:23.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:02:23.339 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:02:23.340 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:02:23.340 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:02:23.340 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:02:23.344 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:02:23.344 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:02:23.344 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:02:23.344 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:02:23.345 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:02:23.345 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:02:23.345 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:02:23.345 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:23.345 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:23.345 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:23.345 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=129 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:23.345 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=129 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:23.345 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=129 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:23.345 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=129 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:23.345 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:23.346 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:23.346 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:23.346 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:28.348 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:02:28.348 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:02:28.348 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:02:28.348 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:02:28.348 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:02:28.348 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:02:28.360 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:02:28.361 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:02:28.361 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:02:28.361 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:02:28.361 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:02:28.363 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:02:28.363 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:02:28.363 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:02:28.364 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:02:28.364 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:02:28.364 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:02:28.364 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:02:28.364 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:02:28.365 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:02:28.365 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:02:28.366 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:02:28.366 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:02:28.366 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:02:28.366 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:02:28.366 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:02:28.366 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:02:28.367 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:02:28.367 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:02:28.367 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:02:28.367 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:02:28.367 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:02:28.367 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:02:28.368 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:02:28.368 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:02:28.370 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:02:28.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:02:28.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:02:28.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:02:28.370 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:02:28.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:02:28.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:02:28.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:28.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:02:28.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:02:28.370 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:02:28.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:28.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:28.370 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:02:28.370 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:02:28.370 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:02:28.371 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:02:28.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:28.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:28.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:28.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:02:28.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:28.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:28.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:28.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:28.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:28.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:28.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:28.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:28.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:28.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:28.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:28.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:28.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:28.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:28.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:28.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:28.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:28.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:28.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:28.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:28.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:28.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:28.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:28.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:28.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:28.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:28.375 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:02:28.853 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:02:28.897 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:02:28.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:02:28.900 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:02:28.902 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:02:28.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:02:28.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:02:28.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:02:28.974 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:02:28.974 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:02:28.974 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:02:28.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:02:28.978 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:02:28.978 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:02:28.978 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:02:28.979 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:02:28.979 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:02:28.979 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:02:28.979 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:02:28.979 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=131 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:28.979 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=131 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:28.979 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=131 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:28.979 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=131 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:28.979 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=131 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:28.979 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=131 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:33.981 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:02:33.981 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:02:33.981 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:02:33.981 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:02:33.981 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:02:33.981 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:02:33.990 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:02:33.991 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:02:33.991 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:02:33.991 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:02:33.992 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:02:33.995 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:02:33.996 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:02:33.996 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:02:33.996 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:02:33.996 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:02:33.997 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:02:33.997 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:02:33.997 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:02:34.000 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:02:34.000 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:02:34.001 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:02:34.001 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:02:34.001 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:02:34.002 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:02:34.002 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:02:34.002 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:02:34.005 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:02:34.005 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:02:34.005 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:02:34.005 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:02:34.006 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:02:34.006 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:02:34.006 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:02:34.006 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:02:34.010 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:02:34.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:02:34.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:02:34.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:02:34.010 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:02:34.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:02:34.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:02:34.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:02:34.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:02:34.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:34.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:34.011 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:02:34.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:34.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:34.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:34.011 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:02:34.011 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:02:34.011 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:02:34.011 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:02:34.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:34.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:34.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:34.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:02:34.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:34.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:34.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:34.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:34.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:34.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:34.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:34.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:34.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:34.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:34.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:34.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:34.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:34.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:34.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:34.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:34.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:34.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:34.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:34.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:34.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:34.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:34.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:34.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:34.016 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:02:34.494 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:02:34.533 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:02:34.534 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:02:34.535 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:02:34.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:02:34.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:02:34.551 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:02:34.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:02:34.597 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:02:34.597 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:02:34.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:02:34.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:02:34.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:02:34.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:02:34.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:02:34.604 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:02:34.604 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:02:34.604 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:02:34.604 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:02:34.604 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:02:34.604 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:02:34.604 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:02:39.611 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:02:39.611 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:02:39.611 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:02:39.611 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:02:39.611 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:02:39.611 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:02:39.619 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:02:39.620 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:02:39.620 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:02:39.621 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:02:39.621 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:02:39.624 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:02:39.625 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:02:39.625 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:02:39.625 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:02:39.625 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:02:39.625 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:02:39.625 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:02:39.626 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:02:39.628 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:02:39.628 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:02:39.628 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:02:39.628 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:02:39.628 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:02:39.628 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:02:39.628 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:02:39.628 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:02:39.631 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:02:39.631 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:02:39.631 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:02:39.631 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:02:39.631 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:02:39.631 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:02:39.631 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:02:39.631 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:02:39.634 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:02:39.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:02:39.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:02:39.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:02:39.634 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:02:39.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:02:39.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:02:39.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:02:39.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:02:39.634 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:02:39.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:39.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:39.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:39.634 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:02:39.634 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:02:39.634 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:02:39.635 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:02:39.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:39.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:39.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:39.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:02:39.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:39.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:39.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:39.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:39.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:39.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:39.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:39.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:39.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:39.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:39.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:39.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:39.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:39.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:39.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:39.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:39.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:39.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:39.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:39.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:39.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:39.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:39.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:39.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:39.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:39.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:39.639 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:02:40.118 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:02:40.156 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:02:40.157 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:02:40.158 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:02:40.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:02:40.174 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:02:40.174 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:02:40.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:02:40.228 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:02:40.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:02:40.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:02:40.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:02:40.234 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:02:40.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:02:40.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:02:40.236 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:02:40.236 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:02:40.236 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:02:40.236 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:02:40.237 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:02:40.237 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:02:40.237 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:02:40.237 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:40.237 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:40.237 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:40.237 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:02:45.243 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:02:45.243 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:02:45.243 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:02:45.243 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:02:45.243 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:02:45.243 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:02:45.251 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:02:45.252 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:02:45.253 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:02:45.253 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:02:45.253 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:02:45.256 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:02:45.256 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:02:45.257 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:02:45.257 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:02:45.257 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:02:45.257 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:02:45.258 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:02:45.258 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:02:45.260 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:02:45.260 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:02:45.260 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:02:45.260 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:02:45.260 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:02:45.260 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:02:45.260 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:02:45.260 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:02:45.262 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:02:45.263 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:02:45.263 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:02:45.263 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:02:45.263 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:02:45.263 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:02:45.263 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:02:45.263 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:02:45.266 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:02:45.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:02:45.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:02:45.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:02:45.266 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:02:45.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:02:45.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:02:45.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:02:45.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:02:45.266 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:02:45.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:45.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:45.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:45.267 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:02:45.267 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:02:45.267 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:02:45.267 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:02:45.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:45.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:45.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:45.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:02:45.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:45.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:45.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:45.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:45.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:45.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:45.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:45.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:45.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:45.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:45.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:45.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:45.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:45.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:45.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:45.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:45.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:45.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:45.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:45.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:02:45.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:45.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:45.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:45.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:02:45.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:02:45.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:02:45.271 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:02:45.749 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:02:45.798 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:02:45.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:02:45.801 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:02:45.803 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:02:45.810 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:02:45.810 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:02:45.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:02:45.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:02:45.811 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:02:45.812 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:02:45.812 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:02:45.812 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:02:46.221 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:02:46.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:02:46.270 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:02:46.270 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:02:46.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:02:46.693 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:02:47.167 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:02:47.271 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:02:47.272 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:02:47.272 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:02:47.272 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:02:47.639 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:02:48.111 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:02:48.272 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:02:48.273 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:02:48.273 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:02:48.273 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:02:48.582 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:02:49.055 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:02:49.274 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:02:49.274 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:02:49.274 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:02:49.274 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:02:49.528 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:02:50.000 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:02:50.275 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:02:50.275 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:02:50.275 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:02:50.275 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:02:50.471 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:02:50.944 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:02:51.417 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:02:51.889 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:02:52.360 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:02:52.833 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:02:53.306 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:02:53.777 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:02:54.249 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:02:54.722 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:02:55.194 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:02:55.667 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:02:56.138 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:02:56.611 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:02:57.083 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 05:02:57.555 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 05:02:58.026 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 05:02:58.497 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 05:02:58.970 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 05:02:59.443 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 05:02:59.915 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 05:03:00.389 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 05:03:00.861 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 05:03:01.333 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 05:03:01.804 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 05:03:02.277 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 05:03:02.750 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 05:03:03.221 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 05:03:03.693 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 05:03:04.166 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 05:03:04.639 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 05:03:05.110 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 05:03:05.581 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 05:03:06.052 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 05:03:06.523 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 05:03:06.997 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 05:03:07.469 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 05:03:07.941 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 05:03:08.412 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 05:03:08.886 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 05:03:09.358 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 05:03:09.830 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 05:03:10.301 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 05:03:10.775 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 05:03:11.247 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 05:03:11.719 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 05:03:12.190 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 05:03:12.664 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 05:03:13.136 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 05:03:13.608 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 05:03:14.079 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 05:03:14.553 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-08 05:03:15.025 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-08 05:03:15.497 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-08 05:03:15.968 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-08 05:03:16.441 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-08 05:03:16.914 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-08 05:03:17.386 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-08 05:03:17.857 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-08 05:03:18.328 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-08 05:03:18.801 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-08 05:03:19.274 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-08 05:03:19.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:03:19.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:03:19.296 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:03:19.296 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:03:19.296 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:03:19.296 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:03:19.297 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:03:19.297 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:03:19.297 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:03:19.297 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:03:19.297 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:03:19.297 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:03:19.298 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:03:19.298 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7351 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:03:19.298 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7351 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:03:19.298 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7351 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:03:19.298 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7351 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:03:19.298 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7351 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:03:19.298 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7351 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:03:24.304 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:03:24.304 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:03:24.304 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:03:24.304 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:03:24.304 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:03:24.304 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:03:24.314 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:03:24.316 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:03:24.316 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:03:24.317 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:03:24.317 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:03:24.322 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:03:24.322 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:03:24.323 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:03:24.323 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:03:24.323 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:03:24.324 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:03:24.324 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:03:24.324 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:03:24.327 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:03:24.327 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:03:24.328 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:03:24.328 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:03:24.328 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:03:24.329 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:03:24.329 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:03:24.329 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:03:24.332 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:03:24.332 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:03:24.332 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:03:24.332 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:03:24.333 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:03:24.333 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:03:24.333 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:03:24.333 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:03:24.338 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:03:24.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:03:24.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:03:24.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:03:24.338 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:03:24.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:03:24.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:03:24.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:03:24.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:03:24.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:03:24.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:03:24.339 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:03:24.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:03:24.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:03:24.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:03:24.339 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:03:24.339 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:03:24.339 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:03:24.339 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:03:24.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:03:24.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:03:24.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:03:24.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:03:24.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:03:24.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:03:24.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:03:24.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:03:24.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:03:24.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:03:24.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:03:24.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:03:24.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:03:24.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:03:24.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:03:24.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:03:24.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:03:24.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:03:24.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:03:24.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:03:24.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:03:24.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:03:24.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:03:24.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:03:24.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:03:24.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:03:24.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:03:24.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:03:24.344 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:03:24.821 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:03:24.867 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:03:24.868 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:03:24.869 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:03:24.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:03:25.293 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:03:25.344 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:03:25.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:03:25.345 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:03:25.348 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:03:25.763 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:03:26.235 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:03:26.345 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:03:26.346 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:03:26.346 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:03:26.350 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:03:26.707 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:03:27.181 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:03:27.347 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:03:27.347 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:03:27.347 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:03:27.351 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:03:27.651 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:03:27.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:03:27.897 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:03:27.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:03:27.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:03:27.897 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:03:27.898 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:03:27.898 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:03:27.898 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:03:27.898 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:03:27.898 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:03:27.898 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:03:27.898 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:03:27.898 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=769 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:03:27.898 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=769 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:03:27.898 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=770 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:03:27.898 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=770 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:03:27.898 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=770 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:03:27.898 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=770 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:03:27.898 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=770 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:03:27.898 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=770 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:03:27.898 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=770 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:03:27.898 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=770 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:03:32.905 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:03:32.905 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:03:32.905 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:03:32.905 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:03:32.905 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:03:32.905 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:03:32.914 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:03:32.916 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:03:32.916 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:03:32.916 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:03:32.917 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:03:32.921 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:03:32.921 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:03:32.922 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:03:32.922 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:03:32.922 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:03:32.922 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:03:32.923 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:03:32.923 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:03:32.928 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:03:32.928 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:03:32.928 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:03:32.928 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:03:32.929 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:03:32.929 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:03:32.929 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:03:32.929 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:03:32.934 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:03:32.934 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:03:32.934 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:03:32.934 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:03:32.934 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:03:32.934 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:03:32.935 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:03:32.935 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:03:32.939 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:03:32.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:03:32.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:03:32.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:03:32.939 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:03:32.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:03:32.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:03:32.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:03:32.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:03:32.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:03:32.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:03:32.940 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:03:32.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:03:32.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:03:32.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:03:32.940 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:03:32.940 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:03:32.940 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:03:32.940 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:03:32.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:03:32.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:03:32.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:03:32.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:03:32.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:03:32.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:03:32.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:03:32.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:03:32.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:03:32.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:03:32.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:03:32.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:03:32.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:03:32.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:03:32.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:03:32.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:03:32.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:03:32.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:03:32.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:03:32.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:03:32.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:03:32.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:03:32.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:03:32.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:03:32.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:03:32.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:03:32.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:03:32.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:03:32.945 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:03:33.423 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:03:33.467 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:03:33.469 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:03:33.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:03:33.472 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:03:33.896 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:03:33.944 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:03:33.944 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:03:33.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:03:33.945 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:03:34.369 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:03:34.842 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:03:34.946 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:03:34.946 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:03:34.946 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:03:34.947 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:03:35.314 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:03:35.784 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:03:35.947 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:03:35.948 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:03:35.948 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:03:35.948 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:03:36.259 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:03:36.731 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:03:36.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:03:36.949 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:03:36.949 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:03:36.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:03:37.203 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:03:37.677 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:03:37.950 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:03:37.951 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:03:37.951 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:03:37.951 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:03:38.149 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:03:38.621 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:03:39.095 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:03:39.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:03:39.485 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:03:39.485 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:03:39.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:03:39.486 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:03:39.486 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:03:39.486 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:03:39.486 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:03:39.486 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:03:39.487 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:03:39.487 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:03:44.493 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:03:44.493 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:03:44.493 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:03:44.494 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:03:44.494 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:03:44.494 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:03:44.503 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:03:44.504 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:03:44.504 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:03:44.505 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:03:44.505 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:03:44.510 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:03:44.510 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:03:44.510 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:03:44.510 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:03:44.511 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:03:44.511 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:03:44.511 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:03:44.512 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:03:44.515 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:03:44.515 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:03:44.515 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:03:44.515 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:03:44.515 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:03:44.515 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:03:44.515 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:03:44.515 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:03:44.519 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:03:44.519 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:03:44.519 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:03:44.519 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:03:44.520 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:03:44.520 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:03:44.520 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:03:44.520 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:03:44.525 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:03:44.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:03:44.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:03:44.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:03:44.525 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:03:44.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:03:44.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:03:44.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:03:44.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:03:44.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:03:44.526 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:03:44.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:03:44.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:03:44.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:03:44.526 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:03:44.526 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:03:44.526 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:03:44.526 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:03:44.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:03:44.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:03:44.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:03:44.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:03:44.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:03:44.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:03:44.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:03:44.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:03:44.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:03:44.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:03:44.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:03:44.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:03:44.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:03:44.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:03:44.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:03:44.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:03:44.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:03:44.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:03:44.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:03:44.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:03:44.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:03:44.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:03:44.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:03:44.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:03:44.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:03:44.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:03:44.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:03:44.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:03:44.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:03:44.531 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:03:45.009 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:03:45.055 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:03:45.057 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:03:45.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:03:45.059 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:03:45.481 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:03:45.530 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:03:45.530 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:03:45.531 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:03:45.532 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:03:45.954 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:03:46.427 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:03:46.531 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:03:46.531 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:03:46.532 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:03:46.534 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:03:46.899 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:03:47.373 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:03:47.533 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:03:47.533 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:03:47.533 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:03:47.536 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:03:47.845 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:03:48.317 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:03:48.534 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:03:48.534 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:03:48.535 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:03:48.537 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:03:48.791 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:03:49.263 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:03:49.536 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:03:49.536 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:03:49.536 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:03:49.539 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:03:49.735 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:03:50.209 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:03:50.679 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:03:51.074 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:03:51.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:03:51.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:03:51.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:03:51.075 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:03:51.075 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:03:51.075 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:03:51.075 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:03:51.075 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:03:51.075 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:03:51.075 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:03:56.080 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:03:56.080 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:03:56.080 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:03:56.080 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:03:56.080 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:03:56.081 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:03:56.088 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:03:56.089 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:03:56.089 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:03:56.090 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:03:56.090 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:03:56.093 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:03:56.094 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:03:56.094 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:03:56.094 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:03:56.094 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:03:56.095 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:03:56.095 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:03:56.095 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:03:56.098 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:03:56.098 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:03:56.099 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:03:56.099 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:03:56.099 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:03:56.099 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:03:56.100 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:03:56.100 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:03:56.102 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:03:56.102 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:03:56.102 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:03:56.103 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:03:56.103 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:03:56.103 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:03:56.103 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:03:56.103 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:03:56.107 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:03:56.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:03:56.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:03:56.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:03:56.107 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:03:56.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:03:56.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:03:56.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:03:56.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:03:56.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:03:56.107 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:03:56.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:03:56.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:03:56.107 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:03:56.107 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:03:56.107 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:03:56.108 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:03:56.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:03:56.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:03:56.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:03:56.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:03:56.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:03:56.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:03:56.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:03:56.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:03:56.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:03:56.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:03:56.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:03:56.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:03:56.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:03:56.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:03:56.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:03:56.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:03:56.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:03:56.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:03:56.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:03:56.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:03:56.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:03:56.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:03:56.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:03:56.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:03:56.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:03:56.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:03:56.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:03:56.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:03:56.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:03:56.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:03:56.112 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:03:56.590 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:03:56.631 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:03:56.632 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:03:56.633 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:03:56.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:03:57.055 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:03:57.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:03:57.111 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:03:57.111 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:03:57.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:03:57.524 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:03:57.998 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:03:58.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:03:58.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:03:58.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:03:58.114 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:03:58.470 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:03:58.937 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:03:59.115 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:03:59.115 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:03:59.115 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:03:59.115 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:03:59.408 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:03:59.882 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:04:00.116 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:04:00.116 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:04:00.116 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:04:00.117 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:04:00.355 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:04:00.827 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:04:01.117 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:04:01.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:04:01.118 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:04:01.118 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:04:01.297 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:04:01.771 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:04:02.244 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:04:02.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:04:02.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:04:02.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:04:02.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:04:02.647 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:04:02.647 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:04:02.647 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:04:02.647 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:04:02.647 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:04:02.647 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:04:02.647 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:04:07.654 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:04:07.655 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:04:07.655 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:04:07.655 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:04:07.655 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:04:07.655 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:04:07.663 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:04:07.663 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:04:07.663 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:04:07.664 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:04:07.664 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:04:07.666 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:04:07.666 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:04:07.667 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:04:07.667 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:04:07.667 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:04:07.667 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:04:07.667 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:04:07.667 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:04:07.670 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:04:07.670 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:04:07.670 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:04:07.670 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:04:07.670 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:04:07.671 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:04:07.671 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:04:07.671 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:04:07.673 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:04:07.674 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:04:07.674 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:04:07.674 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:04:07.674 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:04:07.674 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:04:07.674 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:04:07.674 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:04:07.679 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:04:07.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:04:07.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:04:07.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:04:07.679 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:04:07.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:04:07.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:04:07.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:04:07.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:04:07.680 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:04:07.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:07.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:07.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:07.680 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:04:07.680 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:04:07.680 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:04:07.680 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:04:07.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:07.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:07.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:07.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:04:07.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:07.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:07.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:07.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:07.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:07.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:07.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:07.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:07.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:07.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:07.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:07.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:07.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:07.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:07.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:07.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:07.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:07.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:07.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:07.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:07.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:07.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:07.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:07.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:07.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:07.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:07.685 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:04:08.163 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:04:08.204 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:04:08.205 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:04:08.207 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:04:08.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:04:08.635 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:04:08.683 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:04:08.684 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:04:08.684 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:04:08.684 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:04:09.105 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:04:09.572 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:04:09.685 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:04:09.685 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:04:09.686 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:04:09.686 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:04:10.041 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:04:10.513 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:04:10.687 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:04:10.687 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:04:10.687 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:04:10.687 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:04:10.985 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:04:11.458 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:04:11.688 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:04:11.688 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:04:11.689 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:04:11.689 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:04:11.931 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:04:12.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:04:12.403 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:04:12.689 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:04:12.690 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:04:12.690 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:04:12.690 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:04:12.877 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:04:13.349 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:04:13.821 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:04:14.296 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:04:14.768 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:04:15.242 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:04:15.714 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:04:16.186 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:04:16.235 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:04:16.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:04:16.235 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:04:16.235 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:04:16.236 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:04:16.236 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:04:16.236 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:04:16.236 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:04:16.236 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:04:16.236 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:04:16.236 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:04:21.243 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:04:21.243 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:04:21.243 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:04:21.243 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:04:21.243 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:04:21.243 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:04:21.251 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:04:21.252 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:04:21.252 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:04:21.252 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:04:21.252 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:04:21.255 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:04:21.255 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:04:21.256 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:04:21.256 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:04:21.256 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:04:21.257 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:04:21.257 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:04:21.257 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:04:21.260 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:04:21.260 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:04:21.260 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:04:21.261 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:04:21.261 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:04:21.261 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:04:21.261 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:04:21.261 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:04:21.264 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:04:21.264 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:04:21.265 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:04:21.265 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:04:21.265 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:04:21.265 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:04:21.265 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:04:21.265 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:04:21.270 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:04:21.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:04:21.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:04:21.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:04:21.270 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:04:21.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:04:21.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:04:21.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:04:21.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:04:21.271 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:04:21.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:21.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:21.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:21.271 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:04:21.271 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:04:21.271 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:04:21.271 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:04:21.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:21.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:21.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:21.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:04:21.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:21.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:21.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:21.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:21.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:21.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:21.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:21.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:21.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:21.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:21.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:21.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:21.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:21.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:21.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:21.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:21.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:21.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:21.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:21.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:21.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:21.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:21.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:21.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:21.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:21.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:21.276 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:04:21.756 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:04:21.796 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:04:21.797 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:04:21.798 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:04:21.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:04:22.228 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:04:22.275 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:04:22.275 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:04:22.276 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:04:22.277 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:04:22.701 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:04:23.173 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:04:23.277 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:04:23.277 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:04:23.277 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:04:23.278 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:04:23.636 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:04:24.103 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:04:24.278 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:04:24.279 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:04:24.279 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:04:24.279 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:04:24.567 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:04:25.038 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:04:25.280 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:04:25.280 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:04:25.280 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:04:25.280 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:04:25.512 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:04:25.811 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:04:25.811 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:04:25.811 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:04:25.812 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:04:25.812 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:04:25.812 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:04:25.813 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:04:25.813 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:04:25.813 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:04:25.813 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:04:25.813 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:04:30.820 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:04:30.820 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:04:30.820 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:04:30.820 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:04:30.820 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:04:30.820 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:04:30.828 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:04:30.829 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:04:30.829 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:04:30.829 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:04:30.829 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:04:30.833 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:04:30.833 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:04:30.833 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:04:30.833 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:04:30.833 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:04:30.833 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:04:30.834 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:04:30.834 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:04:30.837 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:04:30.837 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:04:30.838 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:04:30.838 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:04:30.838 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:04:30.838 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:04:30.838 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:04:30.838 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:04:30.841 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:04:30.841 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:04:30.841 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:04:30.841 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:04:30.841 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:04:30.841 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:04:30.841 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:04:30.841 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:04:30.845 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:04:30.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:04:30.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:04:30.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:04:30.845 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:04:30.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:04:30.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:04:30.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:04:30.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:04:30.845 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:04:30.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:30.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:30.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:30.846 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:04:30.846 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:04:30.846 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:04:30.846 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:04:30.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:30.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:30.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:30.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:04:30.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:30.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:30.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:30.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:30.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:30.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:30.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:30.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:30.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:30.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:30.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:30.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:30.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:30.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:30.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:30.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:30.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:30.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:30.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:30.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:30.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:30.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:30.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:30.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:30.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:30.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:30.850 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:04:31.328 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:04:31.367 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:04:31.368 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:04:31.369 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:04:31.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:04:31.378 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:04:31.378 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:04:31.378 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:04:31.378 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:04:31.381 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:04:31.381 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:04:31.381 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:04:31.381 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:04:31.381 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:04:31.381 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:04:31.381 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:04:31.381 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:04:31.381 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:04:31.381 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:04:31.382 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:04:31.382 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:04:31.382 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:04:36.386 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:04:36.386 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:04:36.386 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:04:36.386 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:04:36.386 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:04:36.386 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:04:36.395 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:04:36.396 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:04:36.396 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:04:36.396 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:04:36.396 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:04:36.400 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:04:36.400 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:04:36.400 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:04:36.400 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:04:36.401 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:04:36.401 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:04:36.401 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:04:36.401 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:04:36.404 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:04:36.404 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:04:36.404 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:04:36.404 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:04:36.404 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:04:36.404 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:04:36.405 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:04:36.405 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:04:36.407 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:04:36.407 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:04:36.407 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:04:36.408 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:04:36.408 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:04:36.408 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:04:36.408 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:04:36.408 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:04:36.412 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:04:36.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:04:36.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:04:36.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:04:36.412 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:04:36.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:04:36.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:04:36.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:04:36.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:04:36.412 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:04:36.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:36.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:36.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:36.413 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:04:36.413 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:04:36.413 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:04:36.413 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:04:36.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:36.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:36.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:36.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:04:36.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:36.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:36.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:36.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:36.414 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:36.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:36.414 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:36.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:36.414 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:36.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:36.414 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:36.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:36.414 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:36.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:36.414 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:36.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:36.414 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:36.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:36.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:36.414 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:36.414 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:36.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:36.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:36.414 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:36.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:36.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:36.417 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:04:36.894 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:04:36.939 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:04:36.942 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:04:36.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:04:36.945 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:04:36.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:04:36.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:04:36.993 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:04:36.993 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:04:36.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:04:36.994 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:04:36.994 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:04:36.994 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:04:36.994 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:04:36.994 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:04:36.994 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:04:36.994 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:04:36.994 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:04:36.994 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:04:36.994 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:04:42.002 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:04:42.002 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:04:42.002 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:04:42.002 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:04:42.002 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:04:42.002 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:04:42.011 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:04:42.012 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:04:42.013 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:04:42.013 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:04:42.013 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:04:42.017 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:04:42.017 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:04:42.017 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:04:42.018 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:04:42.018 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:04:42.018 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:04:42.018 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:04:42.018 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:04:42.021 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:04:42.021 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:04:42.021 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:04:42.021 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:04:42.021 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:04:42.021 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:04:42.021 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:04:42.021 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:04:42.024 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:04:42.024 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:04:42.024 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:04:42.024 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:04:42.024 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:04:42.024 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:04:42.024 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:04:42.024 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:04:42.027 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:04:42.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:04:42.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:04:42.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:04:42.027 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:04:42.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:04:42.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:04:42.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:04:42.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:04:42.028 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:04:42.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:42.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:42.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:42.028 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:04:42.028 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:04:42.028 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:04:42.028 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:04:42.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:42.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:42.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:42.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:04:42.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:42.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:42.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:42.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:42.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:42.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:42.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:42.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:42.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:42.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:42.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:42.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:42.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:42.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:42.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:42.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:42.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:42.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:42.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:42.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:42.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:42.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:42.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:42.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:42.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:42.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:42.032 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:04:42.510 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:04:42.550 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:04:42.551 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:04:42.552 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:04:42.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:04:42.605 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:04:42.606 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:04:42.606 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:04:42.606 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:04:42.606 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:04:42.607 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:04:42.607 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:04:42.607 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:04:42.607 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:04:42.607 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:04:42.607 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:04:47.616 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:04:47.616 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:04:47.616 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:04:47.616 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:04:47.616 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:04:47.616 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:04:47.625 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:04:47.627 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:04:47.627 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:04:47.627 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:04:47.627 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:04:47.632 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:04:47.632 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:04:47.632 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:04:47.632 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:04:47.632 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:04:47.632 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:04:47.632 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:04:47.632 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:04:47.636 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:04:47.636 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:04:47.636 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:04:47.636 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:04:47.636 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:04:47.636 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:04:47.637 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:04:47.637 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:04:47.640 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:04:47.640 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:04:47.640 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:04:47.640 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:04:47.640 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:04:47.640 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:04:47.640 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:04:47.640 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:04:47.645 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:04:47.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:04:47.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:04:47.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:04:47.645 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:04:47.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:04:47.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:04:47.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:04:47.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:04:47.645 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:04:47.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:47.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:47.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:47.646 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:04:47.646 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:04:47.646 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:04:47.646 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:04:47.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:47.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:47.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:47.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:04:47.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:47.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:47.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:47.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:47.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:47.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:47.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:47.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:47.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:47.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:47.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:47.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:47.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:47.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:47.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:47.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:47.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:47.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:47.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:47.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:47.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:47.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:47.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:47.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:47.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:47.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:47.650 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:04:48.128 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:04:48.171 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:04:48.173 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:04:48.175 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:04:48.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:04:48.181 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:04:48.181 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:04:48.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:04:48.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:04:48.182 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:04:48.182 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:04:48.182 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:04:48.182 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:04:48.601 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:04:48.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:04:48.649 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:04:48.649 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:04:48.649 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:04:49.072 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:04:49.545 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:04:49.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:04:49.651 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:04:49.651 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:04:49.651 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:04:50.018 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:04:50.490 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:04:50.652 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:04:50.652 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:04:50.652 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:04:50.652 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:04:50.961 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:04:51.245 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:04:51.245 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-02-08 05:04:51.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:04:51.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:04:51.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:04:51.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:04:51.291 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:04:51.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:04:51.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:04:51.297 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:04:51.297 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:04:51.297 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:04:51.298 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:04:51.298 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:04:51.298 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:04:51.298 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:04:51.298 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:04:51.298 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:04:51.298 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:04:56.305 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:04:56.305 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:04:56.305 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:04:56.305 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:04:56.305 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:04:56.305 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:04:56.314 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:04:56.316 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:04:56.316 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:04:56.316 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:04:56.316 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:04:56.321 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:04:56.321 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:04:56.322 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:04:56.322 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:04:56.322 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:04:56.322 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:04:56.322 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:04:56.322 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:04:56.326 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:04:56.327 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:04:56.327 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:04:56.327 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:04:56.327 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:04:56.327 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:04:56.327 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:04:56.327 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:04:56.331 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:04:56.331 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:04:56.331 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:04:56.331 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:04:56.331 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:04:56.332 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:04:56.332 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:04:56.332 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:04:56.337 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:04:56.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:04:56.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:04:56.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:04:56.337 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:04:56.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:04:56.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:04:56.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:04:56.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:04:56.338 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:04:56.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:56.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:56.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:56.338 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:04:56.338 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:04:56.338 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:04:56.338 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:04:56.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:56.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:56.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:56.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:04:56.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:56.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:56.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:56.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:56.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:56.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:56.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:56.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:56.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:56.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:56.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:56.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:56.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:56.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:56.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:56.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:56.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:56.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:56.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:56.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:04:56.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:56.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:56.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:56.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:04:56.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:04:56.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:04:56.343 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:04:56.819 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:04:56.869 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:04:56.871 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:04:56.873 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:04:56.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:04:56.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:04:56.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:04:56.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:04:56.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:04:56.880 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:04:56.880 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:04:56.880 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:04:56.880 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:04:57.286 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:04:57.341 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:04:57.342 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:04:57.342 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:04:57.343 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:04:57.757 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:04:58.228 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:04:58.342 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:04:58.343 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:04:58.343 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:04:58.343 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:04:58.699 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:04:59.170 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:04:59.344 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:04:59.345 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:04:59.345 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:04:59.345 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:04:59.643 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:04:59.924 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:04:59.924 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-02-08 05:04:59.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:04:59.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:05:00.116 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:05:00.346 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:05:00.347 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:05:00.347 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:05:00.347 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:05:00.588 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:05:00.598 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:05:00.598 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:05:00.598 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:05:00.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:05:00.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:05:00.606 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:05:00.606 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:05:00.606 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:05:00.607 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:05:00.607 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:05:00.607 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:05:00.607 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:05:00.607 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:05:00.607 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:05:00.607 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:05:00.607 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=924 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:05:00.607 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=924 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:05:00.607 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=924 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:05:00.607 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=924 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:05:00.607 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=924 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:05:05.614 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:05:05.614 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:05:05.614 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:05:05.614 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:05:05.614 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:05:05.614 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:05:05.622 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:05:05.623 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:05:05.623 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:05:05.623 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:05:05.623 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:05:05.626 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:05:05.626 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:05:05.627 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:05:05.627 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:05:05.627 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:05:05.627 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:05:05.628 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:05:05.628 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:05:05.631 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:05:05.631 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:05:05.631 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:05:05.632 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:05:05.632 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:05:05.632 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:05:05.632 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:05:05.633 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:05:05.635 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:05:05.636 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:05:05.636 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:05:05.636 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:05:05.636 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:05:05.636 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:05:05.637 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:05:05.637 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:05:05.641 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:05:05.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:05:05.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:05:05.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:05:05.641 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:05:05.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:05:05.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:05:05.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:05:05.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:05:05.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:05.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:05.642 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:05:05.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:05.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:05.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:05.642 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:05:05.642 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:05:05.642 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:05:05.642 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:05:05.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:05.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:05.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:05.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:05:05.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:05.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:05.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:05.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:05.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:05.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:05.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:05.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:05.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:05.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:05.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:05.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:05.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:05.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:05.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:05.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:05.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:05.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:05.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:05.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:05.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:05.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:05.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:05.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:05.647 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:05:06.123 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:05:06.173 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:05:06.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:05:06.176 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:05:06.178 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:05:06.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:05:06.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:05:06.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:05:06.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:05:06.187 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:05:06.187 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:05:06.187 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:05:06.187 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:05:06.595 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:05:06.645 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:05:06.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:05:06.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:05:06.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:05:07.067 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:05:07.538 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:05:07.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:05:07.647 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:05:07.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:05:07.647 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:05:08.009 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:05:08.481 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:05:08.648 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:05:08.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:05:08.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:05:08.649 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:05:08.954 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:05:09.239 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:05:09.239 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-02-08 05:05:09.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:05:09.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:05:09.427 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:05:09.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:05:09.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:05:09.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:05:09.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:05:09.898 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:05:10.371 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:05:10.651 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:05:10.651 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:05:10.651 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:05:10.651 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:05:10.843 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:05:11.314 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:05:11.786 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:05:12.259 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:05:12.732 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:05:13.204 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:05:13.675 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:05:14.148 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:05:14.242 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:05:14.242 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:05:14.243 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:05:14.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:05:14.261 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:05:14.261 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:05:14.262 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:05:14.262 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:05:14.265 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:05:14.266 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:05:14.266 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:05:14.266 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:05:14.266 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:05:14.266 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:05:14.266 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:05:14.266 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1864 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:05:14.266 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1864 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:05:14.266 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1864 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:05:14.267 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1864 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:05:14.267 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1864 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:05:14.267 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1864 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:05:19.268 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:05:19.268 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:05:19.268 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:05:19.268 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:05:19.268 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:05:19.268 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:05:19.277 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:05:19.278 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:05:19.278 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:05:19.279 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:05:19.279 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:05:19.283 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:05:19.283 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:05:19.283 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:05:19.283 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:05:19.283 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:05:19.283 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:05:19.283 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:05:19.283 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:05:19.288 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:05:19.288 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:05:19.288 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:05:19.288 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:05:19.288 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:05:19.288 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:05:19.288 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:05:19.288 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:05:19.292 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:05:19.292 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:05:19.292 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:05:19.292 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:05:19.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:05:19.293 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:05:19.293 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:05:19.293 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:05:19.298 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:05:19.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:05:19.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:05:19.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:05:19.298 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:05:19.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:05:19.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:05:19.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:05:19.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:05:19.299 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:05:19.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:19.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:19.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:19.299 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:05:19.299 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:05:19.299 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:05:19.299 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:05:19.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:19.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:19.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:19.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:05:19.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:19.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:19.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:19.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:19.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:19.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:19.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:19.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:19.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:19.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:19.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:19.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:19.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:19.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:19.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:19.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:19.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:19.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:19.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:19.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:19.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:19.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:19.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:19.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:19.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:19.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:19.304 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:05:19.781 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:05:19.823 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:05:19.823 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:05:19.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:05:19.825 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:05:19.834 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:05:19.834 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:05:19.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:05:19.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:05:19.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:05:19.835 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:05:19.835 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:05:19.835 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:05:20.253 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:05:20.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:05:20.303 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:05:20.304 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:05:20.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:05:20.725 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:05:21.198 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:05:21.303 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:05:21.304 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:05:21.306 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:05:21.306 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:05:21.671 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:05:22.142 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:05:22.305 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:05:22.305 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:05:22.307 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:05:22.307 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:05:22.615 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:05:22.896 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:05:22.896 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-02-08 05:05:22.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:05:22.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:05:23.088 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:05:23.306 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:05:23.306 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:05:23.307 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:05:23.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:05:23.561 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:05:24.032 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:05:24.306 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:05:24.307 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:05:24.309 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:05:24.309 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:05:24.506 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:05:24.978 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:05:25.449 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:05:25.922 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:05:26.394 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:05:26.866 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:05:27.338 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:05:27.811 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:05:27.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:05:27.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:05:27.899 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:05:27.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:05:27.916 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:05:27.916 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:05:27.917 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:05:27.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:05:27.919 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:05:27.919 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:05:27.919 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:05:27.919 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:05:27.919 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:05:27.919 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:05:27.919 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:05:27.919 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1862 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:05:27.919 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1862 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:05:27.919 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1862 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:05:27.919 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:05:27.919 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1862 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:05:27.919 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1862 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:05:27.919 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:05:27.919 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:05:32.925 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:05:32.925 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:05:32.925 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:05:32.925 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:05:32.925 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:05:32.925 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:05:32.932 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:05:32.934 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:05:32.934 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:05:32.934 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:05:32.934 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:05:32.938 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:05:32.938 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:05:32.939 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:05:32.939 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:05:32.939 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:05:32.939 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:05:32.939 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:05:32.939 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:05:32.942 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:05:32.942 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:05:32.942 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:05:32.942 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:05:32.942 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:05:32.943 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:05:32.943 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:05:32.943 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:05:32.945 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:05:32.945 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:05:32.945 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:05:32.945 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:05:32.945 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:05:32.945 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:05:32.945 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:05:32.945 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:05:32.949 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:05:32.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:05:32.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:05:32.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:05:32.949 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:05:32.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:05:32.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:05:32.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:05:32.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:05:32.950 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:05:32.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:32.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:32.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:32.950 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:05:32.950 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:05:32.950 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:05:32.950 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:05:32.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:32.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:32.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:32.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:05:32.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:32.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:32.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:32.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:32.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:32.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:32.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:32.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:32.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:32.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:32.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:32.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:32.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:32.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:32.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:32.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:32.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:32.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:32.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:32.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:32.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:32.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:32.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:32.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:32.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:32.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:32.954 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:05:33.432 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:05:33.470 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:05:33.471 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:05:33.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:05:33.472 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:05:33.477 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:05:33.477 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:05:33.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:05:33.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:05:33.477 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:05:33.477 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:05:33.477 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:05:33.477 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:05:33.903 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:05:33.953 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:05:33.953 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:05:33.953 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:05:33.953 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:05:34.376 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:05:34.848 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:05:34.954 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:05:34.954 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:05:34.954 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:05:34.955 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:05:35.319 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:05:35.790 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:05:35.955 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:05:35.955 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:05:35.955 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:05:35.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:05:36.260 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:05:36.544 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:05:36.544 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-02-08 05:05:36.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:05:36.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:05:36.734 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:05:36.957 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:05:36.957 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:05:36.957 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:05:36.957 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:05:37.206 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:05:37.678 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:05:37.958 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:05:37.958 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:05:37.958 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:05:37.958 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:05:38.152 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:05:38.624 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:05:39.096 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:05:39.567 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:05:40.039 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:05:40.512 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:05:40.984 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:05:41.456 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:05:41.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:05:41.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:05:41.547 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:05:41.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:05:41.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:05:41.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:05:41.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:05:41.566 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:05:41.567 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:05:41.567 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:05:41.568 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:05:41.568 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:05:41.568 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:05:41.568 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:05:41.568 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:05:46.573 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:05:46.573 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:05:46.573 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:05:46.573 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:05:46.573 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:05:46.573 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:05:46.591 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:05:46.593 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:05:46.593 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:05:46.593 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:05:46.593 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:05:46.597 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:05:46.598 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:05:46.598 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:05:46.598 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:05:46.598 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:05:46.598 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:05:46.598 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:05:46.598 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:05:46.602 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:05:46.602 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:05:46.602 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:05:46.602 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:05:46.602 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:05:46.602 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:05:46.602 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:05:46.602 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:05:46.605 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:05:46.605 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:05:46.606 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:05:46.606 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:05:46.606 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:05:46.606 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:05:46.606 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:05:46.606 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:05:46.610 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:05:46.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:05:46.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:05:46.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:05:46.610 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:05:46.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:05:46.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:05:46.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:05:46.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:05:46.611 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:05:46.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:46.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:46.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:46.611 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:05:46.611 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:05:46.611 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:05:46.611 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:05:46.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:46.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:46.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:46.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:05:46.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:46.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:46.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:46.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:46.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:46.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:46.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:46.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:46.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:46.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:46.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:46.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:46.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:46.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:46.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:46.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:46.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:46.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:46.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:46.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:46.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:46.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:46.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:46.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:46.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:46.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:46.616 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:05:47.091 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:05:47.138 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:05:47.140 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:05:47.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:05:47.141 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:05:47.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:05:47.146 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:05:47.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:05:47.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:05:47.147 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:05:47.147 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:05:47.147 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:05:47.147 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:05:47.182 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:05:47.182 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-02-08 05:05:47.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:05:47.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:05:47.563 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:05:47.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:05:47.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:05:47.615 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:05:47.617 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:05:48.035 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:05:48.508 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:05:48.615 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:05:48.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:05:48.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:05:48.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:05:48.980 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:05:49.452 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:05:49.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:05:49.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:05:49.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:05:49.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:05:49.924 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:05:50.397 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:05:50.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:05:50.619 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:05:50.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:05:50.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:05:50.869 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:05:51.342 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:05:51.620 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:05:51.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:05:51.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:05:51.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:05:51.813 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:05:52.184 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:05:52.184 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:05:52.184 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:05:52.197 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:05:52.198 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:05:52.198 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:05:52.198 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:05:52.199 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:05:52.199 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:05:52.199 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:05:52.199 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:05:52.199 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:05:52.199 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:05:52.199 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:05:52.199 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1208 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:05:52.199 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1208 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:05:52.199 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1208 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:05:52.199 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1208 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:05:52.199 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1208 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:05:52.199 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1208 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:05:57.205 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:05:57.205 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:05:57.205 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:05:57.205 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:05:57.205 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:05:57.205 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:05:57.213 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:05:57.215 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:05:57.215 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:05:57.215 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:05:57.215 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:05:57.221 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:05:57.221 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:05:57.221 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:05:57.221 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:05:57.222 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:05:57.222 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:05:57.222 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:05:57.222 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:05:57.227 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:05:57.227 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:05:57.227 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:05:57.227 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:05:57.227 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:05:57.227 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:05:57.227 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:05:57.227 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:05:57.231 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:05:57.231 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:05:57.232 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:05:57.232 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:05:57.232 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:05:57.232 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:05:57.232 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:05:57.232 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:05:57.237 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:05:57.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:05:57.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:05:57.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:05:57.237 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:05:57.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:05:57.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:05:57.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:05:57.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:05:57.237 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:05:57.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:57.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:57.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:57.237 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:05:57.237 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:05:57.237 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:05:57.238 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:05:57.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:57.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:57.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:57.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:05:57.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:57.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:57.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:57.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:57.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:57.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:57.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:57.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:57.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:57.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:57.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:57.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:57.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:57.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:57.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:57.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:57.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:57.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:57.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:57.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:57.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:05:57.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:57.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:57.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:05:57.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:05:57.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:05:57.242 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:05:57.720 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:05:57.763 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:05:57.766 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:05:57.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:05:57.768 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:05:57.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:05:57.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:05:57.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:05:57.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:05:57.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:05:57.779 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:05:57.779 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:05:57.779 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:05:58.192 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:05:58.241 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:05:58.241 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:05:58.241 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:05:58.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:05:58.663 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:05:59.137 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:05:59.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:05:59.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:05:59.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:05:59.243 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:05:59.609 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:06:00.081 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:06:00.245 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:06:00.245 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:06:00.245 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:06:00.245 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:06:00.552 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:06:00.835 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:06:00.836 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-02-08 05:06:00.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:06:00.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:06:01.026 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:06:01.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:06:01.246 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:06:01.246 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:06:01.246 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:06:01.496 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:06:01.969 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:06:02.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:06:02.248 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:06:02.248 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:06:02.248 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:06:02.440 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:06:02.837 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:06:02.837 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:06:02.837 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:06:02.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:06:02.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:06:02.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:06:02.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:06:02.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:06:02.850 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:06:02.851 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:06:02.851 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:06:02.851 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:06:02.851 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:06:02.851 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:06:02.851 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:06:02.851 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1212 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:02.851 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1213 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:02.851 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1213 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:02.851 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1213 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:02.851 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1213 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:02.851 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1213 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:02.851 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1213 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:02.851 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1213 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:02.851 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1213 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:07.858 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:06:07.858 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:06:07.858 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:06:07.858 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:06:07.858 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:06:07.858 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:06:07.869 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:06:07.871 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:06:07.871 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:06:07.871 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:06:07.871 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:06:07.876 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:06:07.877 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:06:07.877 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:06:07.877 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:06:07.877 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:06:07.877 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:06:07.877 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:06:07.877 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:06:07.882 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:06:07.882 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:06:07.882 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:06:07.882 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:06:07.882 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:06:07.882 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:06:07.883 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:06:07.883 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:06:07.887 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:06:07.887 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:06:07.887 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:06:07.887 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:06:07.887 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:06:07.887 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:06:07.887 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:06:07.887 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:06:07.893 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:06:07.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:06:07.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:06:07.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:06:07.893 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:06:07.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:06:07.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:06:07.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:06:07.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:06:07.894 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:06:07.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:07.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:07.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:07.894 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:06:07.894 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:06:07.894 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:06:07.894 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:06:07.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:07.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:07.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:07.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:06:07.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:07.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:07.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:07.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:07.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:07.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:07.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:07.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:07.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:07.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:07.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:07.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:07.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:07.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:07.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:07.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:07.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:07.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:07.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:07.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:07.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:07.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:07.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:07.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:07.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:07.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:07.899 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:06:08.377 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:06:08.418 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:06:08.420 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:06:08.421 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:06:08.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:06:08.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:06:08.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:06:08.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:06:08.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:06:08.431 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:06:08.431 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:06:08.431 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:06:08.431 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:06:08.849 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:06:08.901 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:06:08.902 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:06:08.902 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:06:08.902 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:06:09.320 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:06:09.794 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:06:09.902 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:06:09.902 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:06:09.902 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:06:09.902 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:06:10.266 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:06:10.738 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:06:10.904 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:06:10.904 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:06:10.905 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:06:10.905 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:06:11.209 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:06:11.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:06:11.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:06:11.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:06:11.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:06:11.529 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:06:11.529 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:06:11.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:06:11.530 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:06:11.530 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:06:11.530 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:06:11.530 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:06:11.530 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:06:11.530 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:06:11.531 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:06:11.531 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=785 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:11.531 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=785 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:11.531 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=785 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:16.537 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:06:16.537 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:06:16.537 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:06:16.537 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:06:16.537 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:06:16.537 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:06:16.547 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:06:16.548 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:06:16.548 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:06:16.548 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:06:16.548 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:06:16.552 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:06:16.552 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:06:16.553 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:06:16.553 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:06:16.553 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:06:16.553 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:06:16.553 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:06:16.553 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:06:16.557 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:06:16.557 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:06:16.557 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:06:16.557 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:06:16.558 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:06:16.558 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:06:16.558 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:06:16.558 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:06:16.560 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:06:16.561 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:06:16.561 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:06:16.561 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:06:16.561 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:06:16.561 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:06:16.561 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:06:16.561 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:06:16.564 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:06:16.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:06:16.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:06:16.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:06:16.564 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:06:16.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:06:16.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:06:16.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:06:16.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:06:16.565 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:06:16.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:16.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:16.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:16.565 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:06:16.565 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:06:16.565 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:06:16.565 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:06:16.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:16.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:16.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:16.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:06:16.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:16.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:16.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:16.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:16.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:16.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:16.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:16.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:16.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:16.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:16.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:16.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:16.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:16.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:16.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:16.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:16.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:16.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:16.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:16.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:16.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:16.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:16.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:16.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:16.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:16.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:16.570 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:06:17.047 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:06:17.095 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:06:17.096 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:06:17.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:06:17.097 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:06:17.102 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:06:17.102 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:06:17.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:06:17.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:06:17.103 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:06:17.103 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:06:17.103 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:06:17.103 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:06:17.519 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:06:17.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:06:17.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:06:17.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:06:17.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:06:17.990 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:06:18.461 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:06:18.569 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:06:18.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:06:18.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:06:18.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:06:18.934 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:06:19.406 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:06:19.571 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:06:19.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:06:19.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:06:19.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:06:19.879 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:06:20.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:06:20.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:06:20.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:06:20.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:06:20.200 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:06:20.200 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:06:20.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:06:20.201 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:06:20.201 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:06:20.201 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:06:20.201 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:06:20.201 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:06:20.201 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:06:20.201 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:06:20.201 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=786 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:20.201 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=786 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:20.201 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=786 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:20.201 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=786 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:20.201 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=786 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:20.201 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=786 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:25.209 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:06:25.209 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:06:25.209 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:06:25.209 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:06:25.209 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:06:25.209 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:06:25.218 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:06:25.219 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:06:25.219 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:06:25.219 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:06:25.220 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:06:25.223 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:06:25.223 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:06:25.223 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:06:25.223 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:06:25.224 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:06:25.224 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:06:25.224 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:06:25.225 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:06:25.227 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:06:25.227 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:06:25.227 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:06:25.227 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:06:25.227 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:06:25.227 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:06:25.227 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:06:25.227 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:06:25.230 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:06:25.230 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:06:25.231 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:06:25.231 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:06:25.231 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:06:25.231 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:06:25.231 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:06:25.231 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:06:25.234 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:06:25.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:06:25.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:06:25.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:06:25.234 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:06:25.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:06:25.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:06:25.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:25.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:06:25.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:06:25.235 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:06:25.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:25.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:25.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:25.235 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:06:25.235 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:06:25.235 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:06:25.235 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:06:25.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:25.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:25.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:25.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:06:25.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:25.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:25.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:25.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:25.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:25.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:25.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:25.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:25.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:25.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:25.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:25.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:25.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:25.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:25.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:25.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:25.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:25.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:25.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:25.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:25.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:25.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:25.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:25.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:25.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:25.240 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:06:25.717 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:06:25.755 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:06:25.756 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:06:25.757 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:06:25.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:06:25.761 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:06:25.761 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:06:25.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:06:25.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:06:25.762 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:06:25.762 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:06:25.762 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:06:25.762 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:06:26.034 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:06:26.034 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:06:26.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:06:26.040 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:06:26.040 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:06:26.040 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:06:26.041 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:06:26.041 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:06:26.041 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:06:26.041 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:06:26.041 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:06:26.041 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:06:26.041 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:06:26.041 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=174 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:26.041 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=174 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:26.041 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=174 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:26.041 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=174 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:26.041 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=174 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:26.041 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=174 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:31.049 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:06:31.049 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:06:31.049 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:06:31.049 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:06:31.049 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:06:31.049 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:06:31.059 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:06:31.061 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:06:31.062 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:06:31.062 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:06:31.062 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:06:31.068 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:06:31.069 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:06:31.069 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:06:31.069 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:06:31.070 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:06:31.070 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:06:31.071 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:06:31.071 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:06:31.077 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:06:31.077 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:06:31.077 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:06:31.077 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:06:31.078 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:06:31.078 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:06:31.079 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:06:31.079 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:06:31.082 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:06:31.082 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:06:31.083 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:06:31.083 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:06:31.083 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:06:31.083 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:06:31.083 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:06:31.083 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:06:31.088 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:06:31.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:06:31.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:06:31.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:06:31.088 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:06:31.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:06:31.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:06:31.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:06:31.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:06:31.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:31.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:31.089 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:06:31.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:31.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:31.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:31.089 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:06:31.089 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:06:31.089 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:06:31.089 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:06:31.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:31.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:31.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:31.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:06:31.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:31.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:31.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:31.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:31.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:31.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:31.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:31.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:31.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:31.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:31.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:31.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:31.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:31.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:31.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:31.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:31.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:31.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:31.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:31.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:31.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:31.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:31.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:31.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:31.094 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:06:31.570 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:06:31.607 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:06:31.607 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:06:31.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:06:31.608 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:06:31.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:06:31.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:06:31.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:06:31.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:06:31.611 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:06:31.612 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:06:31.612 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:06:31.612 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:06:31.651 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:06:31.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:06:31.658 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:06:31.658 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:06:31.658 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:06:31.658 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:06:31.659 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:06:31.659 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:06:31.659 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:06:31.659 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:06:31.659 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:06:31.659 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:06:31.659 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:06:31.659 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:31.659 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:31.659 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:31.659 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:31.659 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:31.659 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:31.659 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:36.666 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:06:36.666 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:06:36.666 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:06:36.666 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:06:36.666 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:06:36.666 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:06:36.675 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:06:36.676 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:06:36.677 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:06:36.677 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:06:36.677 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:06:36.681 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:06:36.681 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:06:36.681 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:06:36.681 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:06:36.681 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:06:36.681 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:06:36.681 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:06:36.681 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:06:36.685 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:06:36.686 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:06:36.686 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:06:36.686 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:06:36.686 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:06:36.686 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:06:36.686 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:06:36.686 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:06:36.689 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:06:36.689 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:06:36.689 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:06:36.689 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:06:36.689 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:06:36.689 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:06:36.689 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:06:36.689 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:06:36.693 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:06:36.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:06:36.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:06:36.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:06:36.693 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:06:36.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:06:36.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:06:36.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:06:36.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:06:36.694 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:06:36.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:36.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:36.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:36.694 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:06:36.694 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:06:36.694 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:06:36.694 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:06:36.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:36.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:36.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:36.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:06:36.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:36.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:36.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:36.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:36.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:36.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:36.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:36.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:36.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:36.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:36.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:36.699 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:06:37.177 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:06:37.220 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:06:37.222 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:06:37.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:06:37.223 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:06:37.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:06:37.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:06:37.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:06:37.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:06:37.228 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:06:37.229 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:06:37.229 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:06:37.229 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:06:37.650 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:06:37.697 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:06:37.698 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:06:37.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:06:37.698 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:06:38.123 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:06:38.596 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:06:38.698 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:06:38.699 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:06:38.699 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:06:38.699 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:06:39.068 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:06:39.539 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:06:39.700 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:06:39.700 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:06:39.700 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:06:39.700 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:06:40.012 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:06:40.485 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:06:40.701 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:06:40.702 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:06:40.702 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:06:40.702 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:06:40.957 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:06:41.428 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:06:41.703 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:06:41.703 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:06:41.703 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:06:41.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:06:41.901 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:06:42.374 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:06:42.846 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:06:43.319 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:06:43.792 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:06:44.264 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:06:44.735 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:06:45.206 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:06:45.679 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:06:46.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:06:46.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:06:46.068 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:06:46.068 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:06:46.068 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:06:46.068 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:06:46.072 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:06:46.073 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:06:46.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:06:46.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:06:46.073 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:06:46.073 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:06:46.073 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:06:46.074 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2025 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:46.074 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2025 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:46.074 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2025 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:46.074 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2025 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:46.074 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2025 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:46.074 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2026 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:46.074 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2026 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:46.075 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2026 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:46.075 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2026 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:46.075 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2026 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:46.075 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2026 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:46.075 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2026 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:46.075 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2026 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:06:51.075 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:06:51.075 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:06:51.075 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:06:51.075 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:06:51.075 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:06:51.075 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:06:51.083 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:06:51.084 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:06:51.084 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:06:51.084 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:06:51.084 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:06:51.088 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:06:51.089 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:06:51.089 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:06:51.089 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:06:51.089 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:06:51.089 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:06:51.089 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:06:51.089 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:06:51.093 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:06:51.093 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:06:51.093 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:06:51.093 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:06:51.093 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:06:51.093 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:06:51.093 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:06:51.093 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:06:51.096 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:06:51.096 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:06:51.096 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:06:51.096 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:06:51.096 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:06:51.097 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:06:51.097 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:06:51.097 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:06:51.101 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:06:51.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:06:51.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:06:51.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:06:51.101 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:06:51.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:06:51.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:06:51.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:06:51.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:06:51.101 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:06:51.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:51.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:51.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:51.102 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:06:51.102 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:06:51.102 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:06:51.102 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:06:51.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:51.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:51.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:51.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:06:51.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:51.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:51.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:51.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:51.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:51.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:51.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:51.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:51.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:51.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:06:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:06:51.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:06:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:06:51.106 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:06:51.584 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:06:51.623 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:06:51.624 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:06:51.625 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:06:51.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:06:51.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:06:51.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:06:51.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:06:51.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:06:51.629 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:06:51.629 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:06:51.629 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:06:51.629 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:06:52.056 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:06:52.104 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:06:52.105 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:06:52.105 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:06:52.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:06:52.528 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:06:53.001 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:06:53.106 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:06:53.106 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:06:53.107 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:06:53.107 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:06:53.473 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:06:53.946 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:06:54.107 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:06:54.107 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:06:54.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:06:54.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:06:54.417 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:06:54.890 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:06:55.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:06:55.108 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:06:55.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:06:55.109 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:06:55.362 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:06:55.834 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:06:56.109 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:06:56.109 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:06:56.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:06:56.110 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:06:56.305 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:06:56.776 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:06:57.249 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:06:57.722 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:06:58.195 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:06:58.665 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:06:59.139 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:06:59.611 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:07:00.083 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:07:00.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:07:00.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:07:00.453 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:07:00.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:07:00.453 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:07:00.453 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:07:00.458 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:07:00.459 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:07:00.459 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:07:00.459 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:07:00.459 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:07:00.459 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:07:00.459 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:07:00.459 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2021 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:07:00.459 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2021 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:07:00.460 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2021 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:07:00.460 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2021 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:07:00.460 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2021 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:07:00.460 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2021 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:07:05.460 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:07:05.460 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:07:05.461 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:07:05.461 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:07:05.461 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:07:05.461 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:07:05.469 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:07:05.470 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:07:05.470 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:07:05.471 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:07:05.471 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:07:05.474 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:07:05.474 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:07:05.475 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:07:05.475 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:07:05.475 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:07:05.475 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:07:05.476 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:07:05.476 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:07:05.478 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:07:05.478 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:07:05.478 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:07:05.478 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:07:05.478 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:07:05.478 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:07:05.478 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:07:05.478 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:07:05.481 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:07:05.481 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:07:05.481 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:07:05.481 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:07:05.481 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:07:05.481 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:07:05.482 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:07:05.482 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:07:05.484 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:07:05.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:07:05.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:07:05.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:07:05.484 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:07:05.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:07:05.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:07:05.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:05.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:07:05.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:07:05.485 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:07:05.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:05.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:05.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:05.485 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:07:05.485 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:07:05.485 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:07:05.485 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:07:05.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:05.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:05.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:05.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:07:05.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:05.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:05.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:05.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:05.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:05.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:05.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:05.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:05.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:05.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:05.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:05.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:05.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:05.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:05.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:05.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:05.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:05.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:05.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:05.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:05.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:05.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:05.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:05.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:05.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:05.490 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:07:05.966 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:07:06.006 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:07:06.009 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:07:06.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:07:06.011 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:07:06.018 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:07:06.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:07:06.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:07:06.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:07:06.021 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:07:06.021 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:07:06.021 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:07:06.021 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:07:06.438 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:07:06.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:07:06.488 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:07:06.488 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:07:06.488 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:07:06.909 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:07:07.382 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:07:07.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:07:07.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:07:07.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:07:07.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:07:07.855 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:07:08.327 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:07:08.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:07:08.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:07:08.490 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:07:08.490 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:07:08.798 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:07:09.082 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:07:09.082 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-02-08 05:07:09.082 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:07:09.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:07:09.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:07:09.271 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:07:09.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:07:09.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:07:09.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:07:09.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:07:09.744 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:07:10.131 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:07:10.131 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:07:10.131 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:07:10.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:07:10.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:07:10.135 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:07:10.135 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:07:10.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:07:10.136 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:07:10.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:07:10.136 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:07:10.136 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:07:10.136 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:07:10.136 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:07:10.136 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:07:15.144 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:07:15.144 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:07:15.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:07:15.144 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:07:15.144 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:07:15.144 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:07:15.154 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:07:15.155 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:07:15.155 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:07:15.155 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:07:15.155 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:07:15.158 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:07:15.159 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:07:15.159 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:07:15.159 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:07:15.159 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:07:15.159 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:07:15.159 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:07:15.159 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:07:15.164 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:07:15.164 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:07:15.164 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:07:15.164 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:07:15.164 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:07:15.164 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:07:15.164 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:07:15.164 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:07:15.168 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:07:15.169 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:07:15.169 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:07:15.169 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:07:15.169 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:07:15.169 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:07:15.169 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:07:15.169 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:07:15.175 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:07:15.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:07:15.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:07:15.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:07:15.175 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:07:15.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:07:15.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:07:15.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:07:15.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:07:15.175 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:07:15.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:15.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:15.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:15.175 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:07:15.176 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:07:15.176 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:07:15.176 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:07:15.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:15.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:15.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:15.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:07:15.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:15.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:15.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:15.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:15.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:15.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:15.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:15.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:15.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:15.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:15.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:15.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:15.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:15.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:15.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:15.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:15.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:15.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:15.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:15.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:15.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:15.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:15.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:15.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:15.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:15.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:15.180 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:07:15.658 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:07:15.703 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:07:15.705 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:07:15.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:07:15.707 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:07:15.851 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:07:15.851 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:07:15.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:07:15.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:07:15.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:07:15.854 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:07:15.854 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:07:15.854 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:07:15.854 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:07:15.855 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:07:15.855 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:07:15.855 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=146 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:07:15.855 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=146 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:07:15.855 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=146 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:07:15.855 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=146 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:07:15.855 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=146 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:07:15.855 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=146 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:07:20.860 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:07:20.860 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:07:20.860 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:07:20.860 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:07:20.860 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:07:20.860 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:07:20.867 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:07:20.868 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:07:20.868 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:07:20.868 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:07:20.868 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:07:20.872 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:07:20.872 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:07:20.872 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:07:20.872 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:07:20.872 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:07:20.872 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:07:20.872 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:07:20.872 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:07:20.876 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:07:20.876 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:07:20.876 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:07:20.876 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:07:20.876 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:07:20.876 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:07:20.876 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:07:20.876 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:07:20.879 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:07:20.879 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:07:20.879 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:07:20.879 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:07:20.879 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:07:20.879 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:07:20.879 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:07:20.879 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:07:20.882 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:07:20.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:07:20.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:07:20.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:07:20.882 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:07:20.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:07:20.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:07:20.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:07:20.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:07:20.883 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:07:20.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:20.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:20.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:20.883 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:07:20.883 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:07:20.883 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:07:20.883 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:07:20.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:20.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:20.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:20.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:07:20.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:20.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:20.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:20.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:20.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:20.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:20.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:20.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:20.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:20.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:20.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:20.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:20.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:20.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:20.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:20.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:20.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:20.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:20.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:20.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:20.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:20.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:20.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:20.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:20.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:20.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:20.888 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:07:21.364 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:07:21.408 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:07:21.410 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:07:21.412 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:07:21.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:07:21.836 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:07:21.886 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:07:21.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:07:21.886 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:07:21.886 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:07:22.307 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:07:22.780 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:07:22.888 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:07:22.888 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:07:22.888 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:07:22.888 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:07:23.253 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:07:23.725 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:07:23.889 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:07:23.890 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:07:23.890 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:07:23.890 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:07:24.198 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:07:24.671 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:07:24.891 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:07:24.891 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:07:24.891 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:07:24.891 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:07:25.143 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:07:25.617 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:07:25.893 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:07:25.893 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:07:25.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:07:25.893 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:07:26.090 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:07:26.562 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:07:27.035 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:07:27.508 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:07:27.979 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:07:28.453 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:07:28.926 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:07:29.394 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:07:29.857 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:07:30.322 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:07:30.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:07:30.446 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:07:30.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:07:30.447 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:07:30.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:07:30.449 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:07:30.449 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:07:30.449 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:07:30.449 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:07:30.449 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:07:30.449 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:07:30.449 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:07:30.449 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2069 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:07:30.449 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2069 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:07:30.449 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2069 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:07:30.449 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2069 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:07:35.453 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:07:35.454 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:07:35.454 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:07:35.454 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:07:35.454 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:07:35.454 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:07:35.462 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:07:35.464 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:07:35.464 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:07:35.464 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:07:35.464 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:07:35.469 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:07:35.469 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:07:35.469 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:07:35.469 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:07:35.470 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:07:35.470 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:07:35.470 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:07:35.470 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:07:35.474 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:07:35.474 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:07:35.474 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:07:35.474 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:07:35.475 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:07:35.475 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:07:35.475 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:07:35.475 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:07:35.479 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:07:35.479 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:07:35.479 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:07:35.479 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:07:35.479 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:07:35.479 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:07:35.480 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:07:35.480 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:07:35.485 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:07:35.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:07:35.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:07:35.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:07:35.485 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:07:35.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:07:35.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:07:35.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:07:35.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:07:35.486 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:07:35.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:35.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:35.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:35.486 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:07:35.486 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:07:35.486 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:07:35.486 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:07:35.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:35.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:35.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:35.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:07:35.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:35.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:35.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:35.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:35.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:35.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:35.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:35.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:35.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:35.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:35.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:35.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:35.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:35.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:35.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:35.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:35.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:35.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:35.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:35.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:35.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:35.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:35.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:35.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:35.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:35.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:35.491 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:07:35.969 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:07:36.022 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:07:36.024 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:07:36.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:07:36.027 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:07:36.442 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:07:36.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:07:36.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:07:36.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:07:36.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:07:36.912 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:07:37.383 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:07:37.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:07:37.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:07:37.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:07:37.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:07:37.858 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:07:38.330 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:07:38.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:07:38.494 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:07:38.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:07:38.494 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:07:38.805 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:07:39.277 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:07:39.496 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:07:39.496 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:07:39.496 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:07:39.496 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:07:39.751 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:07:40.223 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:07:40.497 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:07:40.497 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:07:40.498 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:07:40.498 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:07:40.695 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:07:41.169 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:07:41.642 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:07:42.114 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:07:42.584 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:07:43.055 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:07:43.529 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:07:44.000 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:07:44.467 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:07:44.930 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:07:45.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:07:45.058 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:07:45.058 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:07:45.058 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:07:45.058 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:07:45.059 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:07:45.059 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:07:45.059 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:07:45.059 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:07:45.059 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:07:45.059 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:07:45.059 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:07:50.067 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:07:50.067 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:07:50.067 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:07:50.067 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:07:50.067 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:07:50.067 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:07:50.075 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:07:50.076 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:07:50.076 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:07:50.076 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:07:50.076 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:07:50.079 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:07:50.079 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:07:50.079 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:07:50.079 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:07:50.080 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:07:50.080 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:07:50.080 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:07:50.080 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:07:50.082 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:07:50.083 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:07:50.083 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:07:50.083 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:07:50.083 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:07:50.083 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:07:50.083 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:07:50.083 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:07:50.085 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:07:50.085 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:07:50.085 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:07:50.086 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:07:50.086 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:07:50.086 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:07:50.086 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:07:50.086 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:07:50.089 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:07:50.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:07:50.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:07:50.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:07:50.089 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:07:50.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:07:50.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:07:50.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:07:50.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:07:50.090 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:07:50.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:50.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:50.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:50.090 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:07:50.090 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:07:50.090 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:07:50.090 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:07:50.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:50.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:50.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:50.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:07:50.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:50.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:50.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:50.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:50.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:50.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:50.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:50.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:50.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:50.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:50.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:50.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:50.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:50.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:50.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:50.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:50.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:50.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:50.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:50.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:50.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:50.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:50.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:50.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:50.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:50.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:50.095 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:07:50.572 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:07:50.619 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:07:50.621 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:07:50.624 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:07:50.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:07:51.044 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:07:51.093 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:07:51.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:07:51.093 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:07:51.093 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:07:51.518 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:07:51.990 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:07:52.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:07:52.095 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:07:52.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:07:52.095 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:07:52.462 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:07:52.936 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:07:53.096 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:07:53.096 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:07:53.097 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:07:53.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:07:53.405 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:07:53.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:07:53.670 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:07:53.670 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:07:53.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:07:53.670 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:07:53.672 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:07:53.672 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:07:53.672 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:07:53.672 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:07:53.672 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:07:53.672 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:07:53.672 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:07:53.672 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=773 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:07:53.672 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=773 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:07:53.672 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=773 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:07:53.672 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=773 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:07:53.672 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=774 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:07:53.672 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=774 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:07:53.672 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=774 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:07:53.672 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=774 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:07:53.672 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=774 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:07:53.672 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=774 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:07:53.672 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=774 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:07:53.672 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=774 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:07:58.678 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:07:58.678 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:07:58.678 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:07:58.678 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:07:58.678 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:07:58.678 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:07:58.687 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:07:58.688 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:07:58.688 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:07:58.689 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:07:58.689 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:07:58.693 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:07:58.694 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:07:58.694 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:07:58.694 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:07:58.694 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:07:58.694 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:07:58.694 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:07:58.694 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:07:58.697 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:07:58.697 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:07:58.697 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:07:58.697 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:07:58.697 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:07:58.697 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:07:58.697 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:07:58.697 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:07:58.700 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:07:58.700 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:07:58.700 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:07:58.700 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:07:58.700 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:07:58.700 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:07:58.700 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:07:58.700 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:07:58.704 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:07:58.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:07:58.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:07:58.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:07:58.704 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:07:58.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:07:58.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:07:58.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:07:58.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:07:58.704 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:07:58.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:58.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:58.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:58.704 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:07:58.704 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:07:58.704 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:07:58.704 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:07:58.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:58.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:58.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:58.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:07:58.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:58.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:58.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:58.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:58.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:58.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:58.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:58.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:58.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:58.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:58.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:58.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:58.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:58.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:58.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:58.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:58.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:58.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:58.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:58.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:58.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:07:58.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:58.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:58.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:07:58.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:07:58.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:07:58.709 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:07:59.187 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:07:59.225 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:07:59.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:07:59.227 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:07:59.229 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:07:59.255 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:07:59.255 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:07:59.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:07:59.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:07:59.265 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:07:59.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:07:59.266 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:07:59.266 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:07:59.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:07:59.287 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:07:59.287 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:07:59.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:07:59.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:07:59.657 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:07:59.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:07:59.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:07:59.668 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:07:59.668 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:07:59.674 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:07:59.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:07:59.674 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:07:59.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:07:59.675 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:07:59.675 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:07:59.675 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:07:59.675 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:07:59.675 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:07:59.676 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:07:59.676 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:08:04.682 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:08:04.682 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:08:04.682 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:08:04.682 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:08:04.682 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:08:04.682 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:08:04.690 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:08:04.691 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:08:04.691 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:08:04.691 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:08:04.691 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:08:04.694 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:08:04.694 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:08:04.694 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:08:04.694 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:08:04.695 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:08:04.695 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:08:04.695 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:08:04.695 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:08:04.701 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:08:04.701 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:08:04.701 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:08:04.701 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:08:04.702 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:08:04.702 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:08:04.702 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:08:04.702 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:08:04.706 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:08:04.706 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:08:04.706 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:08:04.706 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:08:04.706 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:08:04.706 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:08:04.707 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:08:04.707 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:08:04.712 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:08:04.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:08:04.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:08:04.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:08:04.712 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:08:04.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:08:04.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:08:04.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:08:04.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:08:04.713 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:08:04.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:04.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:04.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:04.713 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:08:04.713 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:08:04.713 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:08:04.713 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:08:04.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:04.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:04.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:04.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:08:04.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:04.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:04.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:04.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:04.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:04.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:04.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:04.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:04.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:04.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:04.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:04.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:04.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:04.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:04.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:04.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:04.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:04.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:04.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:04.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:04.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:04.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:04.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:04.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:04.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:04.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:04.718 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:08:05.196 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:08:05.242 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:08:05.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:08:05.245 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:08:05.249 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:08:05.262 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:08:05.263 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:08:05.263 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:08:05.263 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:08:05.266 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:08:05.266 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:08:05.266 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:08:05.266 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:08:05.266 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:08:05.266 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:08:05.266 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:08:05.266 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:05.266 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:05.266 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:05.266 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:05.266 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=119 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:05.266 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:05.266 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:05.266 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:05.266 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:05.266 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:05.266 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:05.266 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:10.282 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:08:10.282 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:08:10.282 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:08:10.282 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:08:10.282 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:08:10.282 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:08:10.291 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:08:10.292 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:08:10.292 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:08:10.293 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:08:10.293 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:08:10.296 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:08:10.296 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:08:10.296 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:08:10.296 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:08:10.297 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:08:10.297 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:08:10.297 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:08:10.297 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:08:10.299 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:08:10.299 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:08:10.299 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:08:10.300 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:08:10.300 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:08:10.300 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:08:10.300 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:08:10.300 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:08:10.302 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:08:10.302 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:08:10.302 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:08:10.302 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:08:10.302 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:08:10.302 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:08:10.302 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:08:10.302 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:08:10.305 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:08:10.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:08:10.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:08:10.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:08:10.305 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:08:10.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:08:10.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:08:10.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:08:10.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:08:10.305 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:08:10.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:10.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:10.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:10.305 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:08:10.305 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:08:10.305 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:08:10.305 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:08:10.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:10.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:10.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:10.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:08:10.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:10.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:10.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:10.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:10.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:10.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:10.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:10.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:10.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:10.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:10.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:10.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:10.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:10.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:10.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:10.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:10.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:10.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:10.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:10.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:10.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:10.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:10.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:10.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:10.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:10.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:10.310 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:08:10.788 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:08:10.831 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:08:10.833 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:08:10.835 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:08:10.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:08:11.260 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:08:11.307 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:08:11.308 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:08:11.308 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:08:11.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:08:11.734 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:08:12.206 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:08:12.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:08:12.309 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:08:12.309 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:08:12.309 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:08:12.678 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:08:12.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:08:12.859 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:08:12.859 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:08:12.859 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:08:12.859 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:08:12.859 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:08:12.859 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:08:12.860 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:08:12.860 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:08:12.860 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:08:12.860 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:08:17.876 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:08:17.876 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:08:17.876 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:08:17.876 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:08:17.876 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:08:17.876 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:08:17.891 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:08:17.892 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:08:17.892 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:08:17.892 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:08:17.892 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:08:17.897 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:08:17.897 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:08:17.897 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:08:17.897 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:08:17.897 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:08:17.897 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:08:17.897 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:08:17.897 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:08:17.903 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:08:17.903 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:08:17.903 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:08:17.903 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:08:17.903 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:08:17.904 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:08:17.904 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:08:17.904 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:08:17.908 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:08:17.908 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:08:17.908 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:08:17.908 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:08:17.909 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:08:17.909 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:08:17.909 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:08:17.909 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:08:17.914 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:08:17.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:08:17.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:08:17.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:08:17.914 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:08:17.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:08:17.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:08:17.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:08:17.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:08:17.915 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:08:17.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:17.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:17.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:17.915 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:08:17.915 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:08:17.915 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:08:17.915 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:08:17.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:17.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:17.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:17.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:08:17.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:17.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:17.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:17.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:17.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:17.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:17.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:17.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:17.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:17.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:17.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:17.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:17.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:17.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:17.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:17.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:17.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:17.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:17.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:17.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:17.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:17.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:17.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:17.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:17.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:17.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:17.920 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:08:18.399 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:08:18.446 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:08:18.449 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:08:18.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:08:18.452 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:08:18.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:08:18.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:08:18.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:08:18.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:08:18.455 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:08:18.455 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:08:18.456 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:08:18.456 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:08:18.872 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:08:18.918 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:08:18.918 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:08:18.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:08:18.920 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:08:19.343 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:08:19.813 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:08:19.919 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:08:19.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:08:19.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:08:19.921 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:08:20.287 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:08:20.759 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:08:20.920 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:08:20.920 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:08:20.921 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:08:20.922 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:08:21.231 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:08:21.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:08:21.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:08:21.255 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:08:21.255 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:08:21.256 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:08:21.256 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:08:21.257 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:08:21.257 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:08:21.257 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:08:21.257 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:08:21.257 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:08:21.257 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:08:21.257 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:08:21.257 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=721 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:21.257 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=721 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:21.257 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=721 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:21.257 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=721 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:26.269 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:08:26.269 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:08:26.269 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:08:26.270 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:08:26.270 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:08:26.270 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:08:26.280 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:08:26.282 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:08:26.282 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:08:26.282 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:08:26.282 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:08:26.287 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:08:26.287 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:08:26.288 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:08:26.288 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:08:26.288 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:08:26.289 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:08:26.289 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:08:26.289 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:08:26.292 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:08:26.293 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:08:26.293 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:08:26.293 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:08:26.293 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:08:26.293 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:08:26.293 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:08:26.293 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:08:26.297 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:08:26.297 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:08:26.297 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:08:26.297 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:08:26.297 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:08:26.298 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:08:26.298 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:08:26.298 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:08:26.302 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:08:26.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:08:26.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:08:26.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:08:26.302 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:08:26.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:08:26.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:08:26.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:26.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:08:26.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:08:26.302 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:08:26.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:26.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:26.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:26.302 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:08:26.303 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:08:26.303 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:08:26.303 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:08:26.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:26.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:26.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:26.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:08:26.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:26.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:26.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:26.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:26.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:26.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:26.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:26.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:26.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:26.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:26.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:26.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:26.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:26.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:26.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:26.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:26.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:26.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:26.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:26.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:26.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:26.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:26.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:26.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:26.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:26.307 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:08:26.784 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:08:26.828 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:08:26.830 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:08:26.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:08:26.831 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:08:26.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:08:26.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:08:26.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:08:26.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:08:26.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:08:26.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:08:26.834 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:08:26.834 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:08:27.256 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:08:27.306 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:08:27.306 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:08:27.306 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:08:27.306 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:08:27.728 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:08:28.199 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:08:28.307 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:08:28.308 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:08:28.308 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:08:28.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:08:28.672 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:08:28.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:08:28.922 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:08:28.926 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:08:28.926 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:08:28.926 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:08:28.926 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:08:28.927 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:08:28.927 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:08:28.927 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:08:28.927 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:08:28.927 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:08:28.927 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:08:28.927 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:08:28.927 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=568 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:28.927 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=568 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:28.927 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=568 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:28.927 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=568 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:28.927 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=568 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:28.927 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=568 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:33.934 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:08:33.934 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:08:33.934 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:08:33.934 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:08:33.934 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:08:33.934 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:08:33.944 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:08:33.946 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:08:33.946 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:08:33.947 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:08:33.947 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:08:33.951 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:08:33.951 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:08:33.952 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:08:33.952 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:08:33.952 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:08:33.953 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:08:33.953 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:08:33.953 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:08:33.956 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:08:33.957 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:08:33.957 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:08:33.957 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:08:33.957 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:08:33.958 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:08:33.958 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:08:33.958 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:08:33.961 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:08:33.961 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:08:33.961 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:08:33.961 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:08:33.962 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:08:33.962 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:08:33.962 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:08:33.962 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:08:33.966 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:08:33.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:08:33.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:08:33.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:08:33.966 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:08:33.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:08:33.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:08:33.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:08:33.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:08:33.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:33.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:33.967 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:08:33.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:33.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:33.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:33.967 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:08:33.967 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:08:33.967 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:08:33.967 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:08:33.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:33.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:33.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:33.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:08:33.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:33.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:33.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:33.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:33.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:33.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:33.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:33.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:33.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:33.972 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:08:34.450 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:08:34.496 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:08:34.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:08:34.500 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:08:34.503 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:08:34.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:08:34.510 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:08:34.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:08:34.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:08:34.511 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:08:34.511 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:08:34.511 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:08:34.511 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:08:34.923 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:08:34.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:08:34.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:08:34.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:08:34.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:08:35.394 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:08:35.865 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:08:35.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:08:35.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:08:35.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:08:35.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:08:36.338 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:08:36.810 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:08:36.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:08:36.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:08:36.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:08:36.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:08:37.283 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:08:37.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:08:37.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:08:37.310 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:08:37.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:08:37.310 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:08:37.310 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:08:37.311 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:08:37.311 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:08:37.311 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:08:37.311 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:08:37.311 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:08:37.312 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:08:37.312 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:08:37.312 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=721 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:37.312 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=722 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:37.312 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=722 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:37.312 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=722 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:37.312 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=722 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:37.312 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=722 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:37.312 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=722 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:37.312 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=722 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:37.312 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=722 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:42.318 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:08:42.318 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:08:42.318 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:08:42.318 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:08:42.318 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:08:42.318 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:08:42.326 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:08:42.328 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:08:42.328 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:08:42.328 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:08:42.328 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:08:42.331 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:08:42.332 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:08:42.332 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:08:42.332 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:08:42.332 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:08:42.332 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:08:42.332 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:08:42.332 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:08:42.336 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:08:42.336 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:08:42.337 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:08:42.337 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:08:42.337 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:08:42.337 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:08:42.337 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:08:42.337 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:08:42.340 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:08:42.341 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:08:42.341 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:08:42.341 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:08:42.341 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:08:42.341 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:08:42.341 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:08:42.341 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:08:42.346 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:08:42.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:08:42.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:08:42.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:08:42.346 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:08:42.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:08:42.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:08:42.347 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:08:42.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:08:42.347 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:08:42.347 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:42.347 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:42.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:42.347 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:08:42.347 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:08:42.347 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:08:42.347 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:08:42.347 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:42.347 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:42.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:42.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:08:42.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:42.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:42.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:42.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:42.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:42.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:42.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:42.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:42.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:42.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:42.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:42.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:42.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:42.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:42.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:42.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:42.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:42.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:42.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:42.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:42.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:42.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:42.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:42.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:42.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:42.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:42.352 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:08:42.828 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:08:42.875 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:08:42.877 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:08:42.880 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:08:42.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:08:42.885 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:08:42.885 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:08:42.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:08:42.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:08:42.887 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:08:42.887 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:08:42.887 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:08:42.887 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:08:43.300 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:08:43.351 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:08:43.351 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:08:43.352 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:08:43.352 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:08:43.771 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:08:44.245 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:08:44.352 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:08:44.352 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:08:44.353 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:08:44.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:08:44.717 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:08:44.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:08:44.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:08:44.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:08:44.975 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:08:44.975 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:08:44.975 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:08:44.976 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:08:44.976 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:08:44.976 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:08:44.976 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:08:44.977 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:08:44.977 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:08:44.977 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:08:44.977 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=568 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:44.977 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=568 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:44.977 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=568 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:44.977 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=568 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:44.977 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=568 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:44.977 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=568 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:08:49.984 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:08:49.984 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:08:49.984 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:08:49.984 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:08:49.984 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:08:49.984 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:08:49.998 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:08:50.000 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:08:50.000 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:08:50.000 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:08:50.001 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:08:50.005 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:08:50.006 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:08:50.006 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:08:50.006 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:08:50.007 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:08:50.007 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:08:50.007 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:08:50.007 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:08:50.010 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:08:50.010 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:08:50.011 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:08:50.011 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:08:50.011 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:08:50.011 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:08:50.011 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:08:50.011 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:08:50.014 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:08:50.015 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:08:50.015 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:08:50.015 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:08:50.015 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:08:50.015 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:08:50.015 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:08:50.015 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:08:50.020 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:08:50.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:08:50.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:08:50.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:08:50.021 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:08:50.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:08:50.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:08:50.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:08:50.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:50.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:08:50.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:50.021 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:08:50.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:50.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:50.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:50.021 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:08:50.021 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:08:50.022 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:08:50.022 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:08:50.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:50.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:50.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:50.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:08:50.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:50.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:50.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:50.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:50.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:50.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:50.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:50.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:50.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:50.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:50.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:50.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:50.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:50.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:50.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:50.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:50.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:50.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:50.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:50.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:50.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:50.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:50.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:50.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:50.026 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:08:50.504 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:08:50.551 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:08:50.553 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:08:50.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:08:50.556 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:08:50.563 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:08:50.563 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:08:50.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:08:50.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:08:50.563 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:08:50.563 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:08:50.563 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:08:50.563 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:08:50.976 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:08:51.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:08:51.025 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:08:51.025 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:08:51.027 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:08:51.448 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:08:51.918 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:08:52.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:08:52.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:08:52.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:08:52.028 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:08:52.392 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:08:52.864 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:08:53.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:08:53.027 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:08:53.027 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:08:53.029 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:08:53.337 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:08:53.807 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:08:54.029 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:08:54.029 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:08:54.029 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:08:54.030 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:08:54.278 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:08:54.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:08:54.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:08:54.306 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:08:54.306 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:08:54.306 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:08:54.306 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:08:54.307 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:08:54.307 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:08:54.307 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:08:54.307 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:08:54.307 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:08:54.307 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:08:54.307 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:08:59.313 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:08:59.313 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:08:59.313 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:08:59.313 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:08:59.313 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:08:59.313 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:08:59.321 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:08:59.321 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:08:59.322 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:08:59.322 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:08:59.322 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:08:59.326 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:08:59.326 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:08:59.326 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:08:59.326 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:08:59.327 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:08:59.327 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:08:59.327 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:08:59.327 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:08:59.330 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:08:59.331 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:08:59.331 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:08:59.331 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:08:59.331 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:08:59.332 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:08:59.332 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:08:59.332 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:08:59.337 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:08:59.337 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:08:59.338 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:08:59.338 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:08:59.338 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:08:59.338 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:08:59.339 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:08:59.339 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:08:59.344 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:08:59.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:08:59.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:08:59.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:08:59.345 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:08:59.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:08:59.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:08:59.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:59.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:08:59.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:08:59.345 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:08:59.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:59.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:59.346 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:08:59.346 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:08:59.346 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:08:59.346 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:08:59.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:59.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:59.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:59.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:08:59.347 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:59.347 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:59.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:59.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:59.347 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:59.347 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:59.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:59.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:59.347 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:59.347 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:59.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:59.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:59.347 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:59.347 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:59.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:59.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:59.347 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:08:59.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:59.347 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:59.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:59.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:59.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:08:59.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:59.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:59.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:08:59.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:08:59.351 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:08:59.828 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:08:59.887 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:08:59.889 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:08:59.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:08:59.892 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:08:59.902 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:08:59.902 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:08:59.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:08:59.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:08:59.904 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:08:59.904 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:08:59.904 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:08:59.904 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:09:00.300 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:09:00.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:09:00.349 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:09:00.349 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:09:00.351 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:09:00.772 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:09:01.245 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:09:01.351 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:09:01.351 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:09:01.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:09:01.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:09:01.718 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:09:02.190 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:09:02.352 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:09:02.352 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:09:02.352 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:09:02.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:09:02.661 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:09:03.134 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:09:03.353 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:09:03.353 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:09:03.353 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:09:03.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:09:03.607 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:09:03.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:09:03.862 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:09:03.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:09:03.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:09:03.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:09:03.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:09:03.872 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:09:03.872 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:09:03.872 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:09:03.872 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:09:03.872 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:09:03.872 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:09:03.872 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:09:03.872 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=977 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:03.872 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=977 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:08.878 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:09:08.878 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:09:08.878 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:09:08.878 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:09:08.878 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:09:08.878 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:09:08.886 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:09:08.886 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:09:08.886 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:09:08.886 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:09:08.887 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:09:08.889 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:09:08.889 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:09:08.889 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:09:08.890 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:09:08.890 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:09:08.890 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:09:08.891 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:09:08.891 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:09:08.893 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:09:08.894 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:09:08.894 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:09:08.894 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:09:08.894 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:09:08.894 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:09:08.895 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:09:08.895 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:09:08.897 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:09:08.898 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:09:08.898 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:09:08.898 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:09:08.898 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:09:08.898 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:09:08.898 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:09:08.898 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:09:08.903 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:09:08.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:09:08.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:09:08.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:09:08.903 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:09:08.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:09:08.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:09:08.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:09:08.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:09:08.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:08.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:08.904 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:09:08.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:08.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:08.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:08.904 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:09:08.904 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:09:08.904 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:09:08.904 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:09:08.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:08.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:08.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:08.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:09:08.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:08.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:08.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:08.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:08.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:08.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:08.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:08.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:08.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:08.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:08.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:08.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:08.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:08.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:08.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:08.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:08.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:08.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:08.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:08.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:08.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:08.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:08.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:08.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:08.909 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:09:09.385 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:09:09.431 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:09:09.433 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:09:09.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:09:09.435 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:09:09.857 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:09:09.907 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:09:09.907 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:09:09.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:09:09.908 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:09:10.327 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:09:10.792 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:09:10.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:09:10.908 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:09:10.909 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:09:10.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:09:11.265 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:09:11.453 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:09:11.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:09:11.453 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:09:11.453 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:09:11.454 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:09:11.454 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:09:11.454 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:09:11.454 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:09:11.454 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:09:11.454 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:09:11.454 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:09:16.461 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:09:16.461 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:09:16.461 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:09:16.461 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:09:16.461 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:09:16.462 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:09:16.471 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:09:16.473 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:09:16.473 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:09:16.474 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:09:16.474 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:09:16.478 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:09:16.479 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:09:16.479 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:09:16.479 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:09:16.479 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:09:16.479 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:09:16.480 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:09:16.480 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:09:16.483 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:09:16.483 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:09:16.484 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:09:16.484 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:09:16.484 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:09:16.484 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:09:16.485 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:09:16.485 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:09:16.488 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:09:16.488 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:09:16.488 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:09:16.488 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:09:16.488 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:09:16.488 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:09:16.489 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:09:16.489 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:09:16.494 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:09:16.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:09:16.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:09:16.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:09:16.494 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:09:16.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:09:16.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:09:16.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:09:16.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:09:16.495 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:09:16.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:16.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:16.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:16.495 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:09:16.495 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:09:16.495 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:09:16.495 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:09:16.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:16.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:16.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:16.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:09:16.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:16.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:16.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:16.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:16.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:16.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:16.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:16.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:16.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:16.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:16.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:16.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:16.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:16.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:16.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:16.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:16.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:16.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:16.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:16.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:16.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:16.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:16.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:16.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:16.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:16.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:16.500 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:09:16.978 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:09:17.020 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:09:17.020 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:09:17.022 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:09:17.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:09:17.047 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:09:17.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:09:17.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:09:17.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:17.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:09:17.450 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:09:17.499 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:09:17.499 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:09:17.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:09:17.500 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:09:17.924 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:09:18.394 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:09:18.501 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:09:18.501 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:09:18.501 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:09:18.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:09:18.867 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:09:19.337 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:09:19.503 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:09:19.503 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:09:19.504 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:09:19.504 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:09:19.808 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:09:20.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:09:20.098 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:09:20.098 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:09:20.098 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:09:20.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:09:20.099 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:09:20.099 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:09:20.099 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:09:20.099 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:09:20.099 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:09:20.099 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:09:20.099 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:09:20.100 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=779 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:20.100 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=779 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:20.100 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=779 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:20.100 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=779 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:25.113 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:09:25.113 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:09:25.113 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:09:25.114 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:09:25.114 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:09:25.114 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:09:25.122 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:09:25.124 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:09:25.124 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:09:25.124 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:09:25.124 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:09:25.128 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:09:25.128 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:09:25.129 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:09:25.129 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:09:25.129 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:09:25.129 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:09:25.130 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:09:25.130 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:09:25.133 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:09:25.133 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:09:25.134 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:09:25.134 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:09:25.134 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:09:25.134 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:09:25.134 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:09:25.134 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:09:25.139 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:09:25.139 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:09:25.139 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:09:25.139 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:09:25.140 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:09:25.140 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:09:25.140 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:09:25.140 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:09:25.145 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:09:25.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:09:25.146 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:09:25.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:09:25.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:09:25.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:09:25.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:09:25.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:25.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:09:25.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:09:25.146 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:09:25.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:25.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:25.146 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:09:25.146 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:09:25.147 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:09:25.147 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:09:25.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:25.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:25.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:25.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:09:25.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:25.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:25.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:25.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:25.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:25.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:25.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:25.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:25.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:25.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:25.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:25.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:25.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:25.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:25.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:25.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:25.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:25.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:25.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:25.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:25.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:25.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:25.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:25.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:25.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:25.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:25.151 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:09:25.629 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:09:25.672 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:09:25.673 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:09:25.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:09:25.677 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:09:25.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:09:25.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:09:25.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:09:25.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:25.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:09:25.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:09:25.729 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:09:25.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:09:25.729 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:09:25.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:09:25.731 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:09:25.731 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:09:25.731 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:09:25.731 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:09:25.731 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:09:25.731 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:09:25.732 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:09:25.732 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:25.732 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:25.732 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:25.732 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:25.732 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:25.732 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:25.732 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:25.732 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:25.732 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:25.732 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:25.732 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:30.737 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:09:30.737 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:09:30.738 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:09:30.738 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:09:30.738 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:09:30.738 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:09:30.748 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:09:30.751 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:09:30.751 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:09:30.751 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:09:30.751 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:09:30.757 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:09:30.758 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:09:30.758 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:09:30.758 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:09:30.758 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:09:30.758 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:09:30.758 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:09:30.758 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:09:30.763 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:09:30.763 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:09:30.763 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:09:30.763 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:09:30.764 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:09:30.764 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:09:30.764 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:09:30.764 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:09:30.768 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:09:30.768 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:09:30.768 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:09:30.768 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:09:30.768 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:09:30.768 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:09:30.768 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:09:30.769 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:09:30.774 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:09:30.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:09:30.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:09:30.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:09:30.774 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:09:30.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:09:30.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:09:30.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:09:30.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:09:30.775 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:09:30.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:30.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:30.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:30.775 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:09:30.775 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:09:30.775 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:09:30.775 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:09:30.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:30.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:30.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:30.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:09:30.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:30.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:30.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:30.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:30.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:30.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:30.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:30.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:30.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:30.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:30.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:30.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:30.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:30.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:30.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:30.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:30.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:30.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:30.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:30.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:30.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:30.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:30.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:30.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:30.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:30.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:30.780 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:09:31.258 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:09:31.297 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:09:31.298 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:09:31.299 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:09:31.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:09:31.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:09:31.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:09:31.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:09:31.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:31.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:09:31.722 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:09:31.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:09:31.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:09:31.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:09:31.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:09:32.194 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:09:32.666 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:09:32.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:09:32.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:09:32.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:09:32.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:09:33.138 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:09:33.612 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:09:33.781 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:09:33.781 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:09:33.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:09:33.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:09:34.084 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:09:34.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:09:34.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:34.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:09:34.368 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:09:34.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:09:34.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:09:34.369 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:09:34.369 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:09:34.369 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:09:34.369 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:09:34.369 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:09:34.370 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:09:34.370 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:09:39.382 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:09:39.382 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:09:39.382 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:09:39.382 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:09:39.382 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:09:39.382 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:09:39.397 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:09:39.399 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:09:39.399 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:09:39.399 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:09:39.399 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:09:39.403 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:09:39.403 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:09:39.403 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:09:39.403 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:09:39.404 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:09:39.404 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:09:39.404 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:09:39.404 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:09:39.407 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:09:39.407 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:09:39.407 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:09:39.407 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:09:39.408 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:09:39.408 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:09:39.408 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:09:39.408 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:09:39.411 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:09:39.411 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:09:39.411 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:09:39.411 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:09:39.411 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:09:39.411 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:09:39.412 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:09:39.412 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:09:39.415 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:09:39.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:09:39.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:09:39.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:09:39.416 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:09:39.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:09:39.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:09:39.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:09:39.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:09:39.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:39.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:39.416 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:09:39.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:39.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:39.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:39.416 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:09:39.416 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:09:39.416 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:09:39.416 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:09:39.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:39.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:39.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:39.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:09:39.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:39.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:39.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:39.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:39.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:39.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:39.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:39.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:39.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:39.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:39.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:39.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:39.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:39.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:39.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:39.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:39.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:39.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:39.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:39.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:39.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:39.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:39.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:39.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:39.421 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:09:39.899 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:09:39.935 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:09:39.935 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:09:39.936 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:09:39.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:09:39.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:09:39.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:09:39.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:09:39.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:39.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:09:40.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:09:40.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:40.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:09:40.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:09:40.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:09:40.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:09:40.019 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:09:40.019 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:09:40.019 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:09:40.019 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:09:40.019 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:09:40.020 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:09:40.020 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:09:40.020 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=130 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:40.020 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=130 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:40.020 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=130 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:40.020 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=130 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:40.020 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=130 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:40.020 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=130 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:45.024 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:09:45.024 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:09:45.024 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:09:45.024 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:09:45.024 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:09:45.024 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:09:45.032 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:09:45.033 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:09:45.034 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:09:45.034 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:09:45.034 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:09:45.037 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:09:45.038 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:09:45.038 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:09:45.038 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:09:45.038 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:09:45.038 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:09:45.039 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:09:45.039 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:09:45.041 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:09:45.041 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:09:45.041 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:09:45.041 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:09:45.041 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:09:45.041 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:09:45.042 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:09:45.042 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:09:45.043 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:09:45.044 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:09:45.044 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:09:45.044 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:09:45.044 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:09:45.044 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:09:45.044 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:09:45.044 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:09:45.047 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:09:45.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:09:45.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:09:45.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:09:45.047 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:09:45.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:09:45.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:09:45.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:09:45.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:09:45.047 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:09:45.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:45.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:45.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:45.047 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:09:45.047 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:09:45.047 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:09:45.047 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:09:45.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:45.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:45.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:45.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:09:45.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:45.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:45.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:45.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:45.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:45.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:45.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:45.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:45.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:45.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:45.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:45.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:45.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:45.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:45.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:45.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:45.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:45.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:45.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:45.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:45.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:45.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:45.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:45.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:45.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:45.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:45.052 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:09:45.530 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:09:45.573 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:09:45.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:09:45.577 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:09:45.580 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:09:45.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:09:45.597 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:09:45.597 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:09:45.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:09:45.603 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:09:45.603 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:09:45.604 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:09:45.604 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:09:45.604 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:09:45.604 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:09:45.604 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:09:45.605 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:45.605 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:45.605 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:45.605 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:45.605 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:45.605 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:45.605 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=120 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:45.605 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:45.605 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:45.605 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:50.604 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:09:50.604 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:09:50.604 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:09:50.604 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:09:50.604 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:09:50.604 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:09:50.612 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:09:50.614 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:09:50.614 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:09:50.614 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:09:50.614 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:09:50.619 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:09:50.619 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:09:50.620 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:09:50.620 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:09:50.620 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:09:50.620 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:09:50.620 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:09:50.620 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:09:50.625 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:09:50.625 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:09:50.625 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:09:50.625 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:09:50.625 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:09:50.626 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:09:50.626 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:09:50.626 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:09:50.630 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:09:50.630 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:09:50.630 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:09:50.630 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:09:50.630 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:09:50.630 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:09:50.630 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:09:50.630 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:09:50.636 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:09:50.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:09:50.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:09:50.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:09:50.636 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:09:50.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:09:50.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:09:50.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:09:50.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:50.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:09:50.637 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:09:50.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:50.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:50.637 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:09:50.637 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:09:50.637 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:09:50.637 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:09:50.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:50.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:50.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:50.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:09:50.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:50.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:50.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:50.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:50.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:50.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:50.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:50.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:50.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:50.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:50.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:50.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:50.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:50.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:50.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:50.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:50.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:50.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:50.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:50.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:50.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:50.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:50.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:50.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:50.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:50.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:50.642 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:09:51.120 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:09:51.168 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:09:51.171 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:09:51.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:09:51.173 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:09:51.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:09:51.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:09:51.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:09:51.180 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:09:51.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:09:51.184 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:09:51.184 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:09:51.184 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:09:51.185 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:09:51.185 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:09:51.185 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:09:51.185 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:51.185 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:51.185 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:51.185 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:51.185 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:51.185 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:56.200 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:09:56.201 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:09:56.201 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:09:56.201 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:09:56.201 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:09:56.201 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:09:56.211 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:09:56.212 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:09:56.212 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:09:56.213 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:09:56.213 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:09:56.217 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:09:56.217 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:09:56.218 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:09:56.218 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:09:56.218 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:09:56.218 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:09:56.219 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:09:56.219 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:09:56.221 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:09:56.222 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:09:56.222 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:09:56.222 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:09:56.222 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:09:56.223 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:09:56.223 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:09:56.223 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:09:56.225 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:09:56.225 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:09:56.225 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:09:56.225 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:09:56.225 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:09:56.225 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:09:56.226 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:09:56.226 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:09:56.229 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:09:56.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:09:56.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:09:56.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:09:56.229 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:09:56.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:09:56.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:09:56.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:56.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:09:56.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:09:56.230 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:09:56.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:56.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:56.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:56.230 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:09:56.230 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:09:56.230 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:09:56.230 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:09:56.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:56.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:56.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:56.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:09:56.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:56.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:56.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:56.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:56.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:56.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:56.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:56.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:56.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:56.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:56.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:56.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:56.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:56.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:56.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:56.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:56.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:09:56.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:56.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:56.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:56.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:56.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:56.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:09:56.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:09:56.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:09:56.235 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:09:56.714 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:09:56.753 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:09:56.754 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:09:56.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:09:56.757 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:09:56.766 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:09:56.766 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:09:56.766 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:09:56.766 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:09:56.768 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:09:56.768 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:09:56.768 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:09:56.768 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:09:56.768 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:09:56.768 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:09:56.768 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:09:56.769 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:56.769 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:56.769 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:09:56.769 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:01.775 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:10:01.775 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:10:01.775 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:10:01.775 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:10:01.775 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:10:01.775 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:10:01.783 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:10:01.785 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:10:01.785 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:10:01.785 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:10:01.785 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:10:01.790 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:10:01.790 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:10:01.790 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:10:01.791 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:10:01.791 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:10:01.791 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:10:01.792 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:10:01.792 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:10:01.795 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:10:01.795 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:10:01.796 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:10:01.796 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:10:01.796 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:10:01.796 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:10:01.797 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:10:01.797 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:10:01.799 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:10:01.799 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:10:01.800 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:10:01.800 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:10:01.800 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:10:01.800 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:10:01.800 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:10:01.800 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:10:01.804 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:10:01.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:10:01.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:10:01.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:10:01.804 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:10:01.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:10:01.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:10:01.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:10:01.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:10:01.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:01.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:01.805 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:10:01.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:01.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:01.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:01.805 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:10:01.805 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:10:01.805 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:10:01.805 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:10:01.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:01.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:01.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:01.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:10:01.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:01.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:01.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:01.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:01.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:01.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:01.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:01.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:01.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:01.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:01.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:01.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:01.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:01.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:01.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:01.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:01.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:01.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:01.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:01.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:01.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:01.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:01.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:01.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:01.810 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:10:02.288 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:10:02.325 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:10:02.326 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:10:02.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:02.328 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:10:02.340 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:10:02.341 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:10:02.341 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:10:02.341 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:10:02.343 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:10:02.344 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:10:02.344 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:10:02.344 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:10:02.344 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:10:02.344 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:10:02.344 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:10:07.356 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:10:07.356 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:10:07.356 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:10:07.356 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:10:07.356 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:10:07.356 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:10:07.364 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:10:07.364 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:10:07.364 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:10:07.364 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:10:07.364 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:10:07.366 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:10:07.366 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:10:07.366 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:10:07.366 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:10:07.366 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:10:07.366 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:10:07.366 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:10:07.366 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:10:07.368 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:10:07.368 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:10:07.368 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:10:07.368 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:10:07.368 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:10:07.368 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:10:07.368 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:10:07.368 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:10:07.370 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:10:07.370 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:10:07.370 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:10:07.370 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:10:07.370 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:10:07.370 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:10:07.370 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:10:07.370 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:10:07.373 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:10:07.373 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:10:07.373 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:07.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:07.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:07.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:07.378 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:10:07.856 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:10:07.891 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:10:07.892 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:10:07.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:07.894 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:10:08.328 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:10:08.377 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:10:08.385 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:10:08.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:10:08.385 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:10:08.802 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:10:09.273 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:10:09.385 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:10:09.386 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:10:09.386 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:10:09.386 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:10:09.741 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:10:10.212 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:10:10.387 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:10:10.388 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:10:10.388 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:10:10.388 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:10:10.686 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:10:10.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:10:10.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:10:10.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:10:10.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:10:10.909 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:10:10.909 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:10:10.910 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:10:10.910 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:10:11.159 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:10:11.389 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:10:11.389 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:10:11.389 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:10:11.390 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:10:11.631 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:10:12.104 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:10:12.391 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:10:12.391 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:10:12.391 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:10:12.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:10:12.577 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:10:13.049 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:10:13.174 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:10:13.174 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:10:13.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:13.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:10:13.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:10:13.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:10:13.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:10:13.187 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:10:13.187 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:10:13.187 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:10:13.188 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:10:13.188 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:10:13.188 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:10:13.188 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:10:13.188 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1255 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:13.188 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1255 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:13.188 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1255 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:13.189 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1255 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:13.189 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1256 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:13.189 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1256 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:13.189 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1256 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:13.189 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1256 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:13.189 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1256 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:13.189 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1256 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:13.189 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1256 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:13.189 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1256 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:18.189 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:10:18.189 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:10:18.189 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:10:18.189 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:10:18.189 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:10:18.189 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:10:18.196 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:10:18.196 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:10:18.196 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:10:18.197 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:10:18.197 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:10:18.199 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:10:18.199 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:10:18.200 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:10:18.200 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:10:18.200 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:10:18.200 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:10:18.200 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:10:18.201 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:10:18.202 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:10:18.203 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:10:18.203 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:10:18.203 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:10:18.203 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:10:18.203 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:10:18.203 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:10:18.203 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:10:18.205 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:10:18.205 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:10:18.205 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:10:18.205 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:10:18.205 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:10:18.205 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:10:18.205 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:10:18.205 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:10:18.208 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:10:18.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:10:18.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:10:18.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:10:18.208 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:10:18.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:10:18.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:10:18.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:10:18.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:10:18.209 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:10:18.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:18.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:18.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:18.209 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:10:18.209 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:10:18.209 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:10:18.209 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:10:18.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:18.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:18.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:18.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:10:18.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:18.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:18.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:18.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:18.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:18.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:18.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:18.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:18.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:18.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:18.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:18.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:18.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:18.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:18.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:18.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:18.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:18.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:18.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:18.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:18.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:18.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:18.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:18.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:18.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:18.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:18.213 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:10:18.692 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:10:18.735 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:10:18.737 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:10:18.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:18.739 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:10:18.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:10:18.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:10:18.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:10:18.795 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:10:18.795 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:10:18.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:10:18.796 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:10:18.797 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:10:18.797 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:10:18.797 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:10:18.797 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:10:18.797 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:10:18.797 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:10:18.797 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:10:23.802 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:10:23.802 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:10:23.802 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:10:23.802 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:10:23.802 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:10:23.802 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:10:23.812 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:10:23.814 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:10:23.814 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:10:23.815 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:10:23.815 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:10:23.819 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:10:23.819 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:10:23.820 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:10:23.820 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:10:23.820 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:10:23.820 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:10:23.821 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:10:23.821 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:10:23.824 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:10:23.825 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:10:23.825 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:10:23.825 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:10:23.825 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:10:23.826 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:10:23.826 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:10:23.826 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:10:23.829 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:10:23.829 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:10:23.830 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:10:23.830 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:10:23.830 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:10:23.830 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:10:23.831 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:10:23.831 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:10:23.836 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:10:23.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:10:23.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:10:23.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:10:23.836 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:10:23.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:10:23.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:10:23.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:23.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:10:23.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:10:23.837 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:10:23.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:23.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:23.837 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:10:23.837 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:10:23.837 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:10:23.837 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:10:23.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:23.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:23.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:23.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:10:23.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:23.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:23.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:23.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:23.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:23.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:23.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:23.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:23.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:23.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:23.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:23.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:23.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:23.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:23.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:23.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:23.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:23.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:23.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:23.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:23.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:23.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:23.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:23.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:23.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:23.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:23.842 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:10:24.321 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:10:24.358 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:10:24.360 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:10:24.361 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:10:24.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:24.372 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:10:24.372 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:10:24.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:10:24.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:24.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:24.421 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:10:24.421 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:10:24.421 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:10:24.421 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:10:24.422 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:10:24.422 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:10:24.422 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:10:24.422 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:10:24.422 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:10:24.422 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:10:24.422 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:10:24.422 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:29.442 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:10:29.442 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:10:29.443 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:10:29.443 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:10:29.443 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:10:29.443 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:10:29.452 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:10:29.453 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:10:29.454 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:10:29.454 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:10:29.454 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:10:29.458 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:10:29.459 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:10:29.459 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:10:29.459 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:10:29.459 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:10:29.460 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:10:29.460 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:10:29.460 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:10:29.463 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:10:29.464 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:10:29.464 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:10:29.464 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:10:29.464 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:10:29.465 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:10:29.465 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:10:29.465 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:10:29.468 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:10:29.468 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:10:29.469 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:10:29.469 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:10:29.469 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:10:29.469 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:10:29.469 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:10:29.469 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:10:29.474 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:10:29.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:10:29.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:10:29.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:10:29.475 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:10:29.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:10:29.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:10:29.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:10:29.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:10:29.475 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:10:29.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:29.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:29.475 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:10:29.475 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:10:29.475 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:10:29.476 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:10:29.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:29.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:29.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:29.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:10:29.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:29.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:29.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:29.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:29.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:29.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:29.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:29.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:29.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:29.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:29.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:29.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:29.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:29.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:29.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:29.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:29.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:29.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:29.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:29.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:29.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:29.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:29.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:29.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:29.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:29.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:29.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:29.480 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:10:29.959 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:10:29.999 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:10:30.000 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:10:30.002 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:10:30.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:30.014 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:10:30.014 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:10:30.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:10:30.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:30.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:30.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:30.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:10:30.037 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:10:30.037 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:10:30.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:10:30.037 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:10:30.038 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:10:30.038 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:10:30.038 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:10:30.038 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:10:30.038 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:10:30.038 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:10:30.038 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:30.038 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:30.038 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:30.038 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:30.038 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:30.038 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:35.047 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:10:35.047 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:10:35.047 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:10:35.047 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:10:35.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:10:35.047 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:10:35.055 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:10:35.055 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:10:35.055 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:10:35.055 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:10:35.055 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:10:35.057 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:10:35.057 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:10:35.057 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:10:35.057 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:10:35.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:10:35.058 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:10:35.058 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:10:35.058 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:10:35.059 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:10:35.059 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:10:35.059 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:10:35.059 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:10:35.059 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:10:35.059 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:10:35.059 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:10:35.059 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:10:35.061 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:10:35.061 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:10:35.061 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:10:35.061 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:10:35.061 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:10:35.061 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:10:35.061 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:10:35.061 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:10:35.064 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:10:35.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:10:35.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:10:35.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:10:35.064 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:10:35.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:10:35.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:10:35.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:10:35.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:10:35.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:35.064 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:10:35.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:35.064 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:10:35.064 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:10:35.064 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:10:35.065 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:10:35.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:35.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:35.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:35.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:10:35.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:35.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:35.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:35.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:35.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:35.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:35.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:35.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:35.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:35.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:35.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:35.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:35.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:35.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:35.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:35.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:35.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:35.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:35.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:35.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:35.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:35.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:35.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:35.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:35.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:35.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:35.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:35.069 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:10:35.548 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:10:35.583 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:10:35.584 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:10:35.585 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:10:35.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:35.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:10:35.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:10:35.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:10:35.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:35.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:35.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:35.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:35.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:35.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:35.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:35.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:35.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:35.682 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:10:35.683 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:10:35.683 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:10:35.683 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:10:35.689 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:10:35.689 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:10:35.689 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:10:35.689 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:10:35.689 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:10:35.689 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:10:35.689 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:10:35.690 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=132 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:35.690 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=132 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:35.690 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=132 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:35.690 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=132 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:35.690 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=132 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:35.690 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=133 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:35.690 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=133 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:35.690 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=133 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:35.690 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=133 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:35.691 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=133 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:35.691 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=133 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:35.691 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=133 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:35.691 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=133 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:35.691 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=134 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:35.691 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=134 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:35.691 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=134 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:35.691 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=134 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:35.691 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=134 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:35.691 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=134 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:35.691 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=134 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:35.691 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=134 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:40.692 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:10:40.692 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:10:40.692 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:10:40.692 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:10:40.692 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:10:40.692 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:10:40.699 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:10:40.699 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:10:40.700 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:10:40.700 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:10:40.700 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:10:40.704 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:10:40.704 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:10:40.705 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:10:40.705 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:10:40.705 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:10:40.706 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:10:40.706 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:10:40.706 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:10:40.709 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:10:40.709 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:10:40.710 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:10:40.710 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:10:40.710 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:10:40.710 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:10:40.711 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:10:40.711 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:10:40.713 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:10:40.713 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:10:40.714 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:10:40.714 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:10:40.714 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:10:40.714 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:10:40.714 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:10:40.714 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:10:40.718 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:10:40.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:10:40.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:10:40.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:10:40.718 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:10:40.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:10:40.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:10:40.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:10:40.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:40.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:10:40.718 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:10:40.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:40.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:40.718 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:10:40.718 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:10:40.718 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:10:40.718 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:10:40.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:40.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:40.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:40.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:10:40.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:40.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:40.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:40.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:40.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:40.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:40.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:40.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:40.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:40.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:40.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:40.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:40.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:40.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:40.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:40.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:40.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:40.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:40.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:40.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:40.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:40.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:40.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:40.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:40.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:40.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:40.723 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:10:41.202 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:10:41.247 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:10:41.249 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:10:41.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:41.251 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:10:41.252 [DEBUG] fake_trx.py:382 (BTS@172.18.152.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-02-08 05:10:41.252 [INFO] fake_trx.py:385 (BTS@172.18.152.20:5700) Artificial TRXC delay set to 200
2026-02-08 05:10:41.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-02-08 05:10:41.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:41.676 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:10:41.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:41.877 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:10:41.878 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:10:41.878 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:10:41.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:42.078 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:10:42.150 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:10:42.622 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:10:42.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:42.883 [DEBUG] fake_trx.py:382 (BTS@172.18.152.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-02-08 05:10:42.883 [INFO] fake_trx.py:385 (BTS@172.18.152.20:5700) Artificial TRXC delay set to 0
2026-02-08 05:10:42.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-02-08 05:10:42.883 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:10:42.883 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:10:42.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:10:42.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:42.892 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:10:42.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:10:42.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:10:42.893 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:10:42.893 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:10:42.893 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:10:42.893 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:10:42.894 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:10:42.894 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:10:42.894 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:10:42.894 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:10:47.902 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:10:47.902 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:10:47.902 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:10:47.902 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:10:47.902 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:10:47.902 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:10:47.911 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:10:47.913 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:10:47.914 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:10:47.914 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:10:47.914 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:10:47.920 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:10:47.920 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:10:47.921 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:10:47.921 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:10:47.921 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:10:47.922 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:10:47.922 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:10:47.922 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:10:47.925 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:10:47.926 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:10:47.926 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:10:47.926 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:10:47.927 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:10:47.927 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:10:47.927 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:10:47.927 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:10:47.930 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:10:47.931 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:10:47.931 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:10:47.931 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:10:47.931 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:10:47.932 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:10:47.932 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:10:47.932 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:10:47.937 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:10:47.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:10:47.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:10:47.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:10:47.937 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:10:47.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:10:47.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:10:47.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:10:47.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:47.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:10:47.938 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:10:47.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:47.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:47.938 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:10:47.938 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:10:47.938 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:10:47.938 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:10:47.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:47.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:47.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:47.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:10:47.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:47.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:47.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:47.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:47.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:47.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:47.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:47.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:47.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:47.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:47.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:47.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:47.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:47.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:47.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:47.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:47.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:47.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:47.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:47.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:47.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:47.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:47.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:47.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:47.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:47.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:47.943 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:10:48.422 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:10:48.465 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:10:48.467 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:10:48.469 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:10:48.471 [DEBUG] fake_trx.py:382 (BTS@172.18.152.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-02-08 05:10:48.471 [INFO] fake_trx.py:385 (BTS@172.18.152.20:5700) Artificial TRXC delay set to 200
2026-02-08 05:10:48.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-02-08 05:10:48.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:48.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:48.894 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:10:49.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:10:49.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:10:49.073 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:10:49.077 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:10:49.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:49.368 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:10:49.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:49.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:49.842 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:10:49.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:50.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:10:50.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:10:50.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:10:50.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:50.281 [DEBUG] fake_trx.py:382 (BTS@172.18.152.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-02-08 05:10:50.281 [INFO] fake_trx.py:385 (BTS@172.18.152.20:5700) Artificial TRXC delay set to 0
2026-02-08 05:10:50.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-02-08 05:10:50.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:50.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:50.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:50.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:50.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:50.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:50.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:50.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:50.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:50.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:50.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:50.289 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:10:50.289 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:10:50.289 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:10:50.289 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:10:50.290 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:10:50.290 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:10:50.290 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:10:50.290 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:10:50.290 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:10:50.290 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:10:50.290 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:10:50.290 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:10:50.290 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=507 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:50.290 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=507 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:50.290 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=507 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:50.290 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=507 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:50.290 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=507 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:50.290 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=507 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:50.290 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=507 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:55.298 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:10:55.298 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:10:55.298 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:10:55.298 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:10:55.298 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:10:55.299 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:10:55.308 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:10:55.311 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:10:55.311 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:10:55.311 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:10:55.312 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:10:55.317 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:10:55.317 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:10:55.317 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:10:55.317 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:10:55.317 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:10:55.317 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:10:55.317 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:10:55.318 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:10:55.322 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:10:55.322 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:10:55.323 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:10:55.323 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:10:55.323 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:10:55.323 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:10:55.323 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:10:55.323 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:10:55.327 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:10:55.327 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:10:55.327 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:10:55.328 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:10:55.328 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:10:55.328 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:10:55.328 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:10:55.328 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:10:55.334 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:10:55.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:10:55.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:10:55.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:10:55.334 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:10:55.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:10:55.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:10:55.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:10:55.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:10:55.335 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:10:55.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:55.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:55.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:55.335 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:10:55.335 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:10:55.335 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:10:55.335 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:10:55.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:55.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:55.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:55.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:10:55.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:55.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:55.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:55.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:55.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:55.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:55.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:55.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:55.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:55.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:55.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:55.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:55.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:55.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:55.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:55.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:55.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:55.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:55.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:55.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:10:55.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:55.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:55.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:55.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:10:55.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:10:55.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:10:55.340 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:10:55.817 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:10:55.868 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:10:55.870 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:10:55.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:55.872 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:10:55.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:10:55.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:10:55.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:10:55.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:55.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:10:55.930 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:10:55.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:10:55.930 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:10:55.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:10:55.931 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:10:55.931 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:10:55.931 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:10:55.931 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:10:55.931 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:10:55.931 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:10:55.931 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:10:55.931 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=128 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:55.932 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:55.932 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:10:55.932 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:11:00.937 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:11:00.937 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:11:00.937 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:11:00.937 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:11:00.937 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:11:00.937 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:11:00.946 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:11:00.948 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:11:00.948 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:11:00.949 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:11:00.949 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:11:00.955 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:11:00.956 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:11:00.956 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:11:00.956 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:11:00.957 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:11:00.957 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:11:00.957 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:11:00.958 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:11:00.960 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:11:00.960 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:11:00.961 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:11:00.961 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:11:00.961 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:11:00.961 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:11:00.962 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:11:00.962 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:11:00.964 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:11:00.964 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:11:00.964 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:11:00.964 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:11:00.964 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:11:00.965 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:11:00.965 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:11:00.965 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:11:00.969 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:11:00.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:11:00.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:11:00.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:11:00.969 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:11:00.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:11:00.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:11:00.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:11:00.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:11:00.969 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:11:00.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:11:00.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:11:00.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:11:00.969 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:11:00.969 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:11:00.969 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:11:00.969 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:11:00.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:11:00.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:11:00.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:11:00.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:11:00.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:11:00.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:11:00.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:11:00.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:11:00.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:11:00.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:11:00.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:11:00.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:11:00.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:11:00.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:11:00.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:11:00.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:11:00.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:11:00.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:11:00.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:11:00.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:11:00.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:11:00.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:11:00.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:11:00.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:11:00.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:11:00.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:11:00.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:11:00.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:11:00.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:11:00.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:11:00.974 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:11:01.453 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:11:01.500 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:11:01.502 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:11:01.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:01.503 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:11:01.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:01.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:01.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:11:01.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:01.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:01.562 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:11:01.562 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:11:01.562 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:11:01.562 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:11:01.563 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:11:01.563 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:11:01.563 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:11:01.563 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:11:01.563 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:11:01.563 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:11:01.563 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:11:06.568 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:11:06.568 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:11:06.568 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:11:06.568 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:11:06.568 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:11:06.568 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:11:06.575 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:11:06.576 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:11:06.576 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:11:06.576 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:11:06.576 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:11:06.580 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:11:06.580 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:11:06.580 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:11:06.580 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:11:06.580 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:11:06.580 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:11:06.580 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:11:06.580 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:11:06.584 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:11:06.584 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:11:06.584 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:11:06.584 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:11:06.584 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:11:06.584 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:11:06.584 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:11:06.584 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:11:06.587 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:11:06.588 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:11:06.588 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:11:06.588 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:11:06.588 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:11:06.588 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:11:06.588 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:11:06.588 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:11:06.593 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:11:06.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:11:06.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:11:06.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:11:06.593 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:11:06.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:11:06.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:11:06.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:11:06.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:11:06.593 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:11:06.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:11:06.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:11:06.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:11:06.593 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:11:06.593 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:11:06.593 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:11:06.593 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:11:06.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:11:06.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:11:06.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:11:06.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:11:06.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:11:06.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:11:06.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:11:06.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:11:06.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:11:06.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:11:06.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:11:06.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:11:06.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:11:06.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:11:06.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:11:06.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:11:06.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:11:06.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:11:06.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:11:06.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:11:06.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:11:06.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:11:06.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:11:06.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:11:06.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:11:06.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:11:06.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:11:06.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:11:06.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:11:06.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:11:06.598 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:11:07.078 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:11:07.117 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:11:07.119 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:11:07.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:07.123 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:11:07.148 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:07.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:07.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:11:07.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:07.151 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:07.151 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:07.151 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:11:07.151 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:11:07.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:07.177 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:07.177 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:07.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:07.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:07.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:07.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:07.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:07.242 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:07.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:07.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:07.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:11:07.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:07.259 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:07.259 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:07.259 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:11:07.259 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:11:07.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:07.325 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:07.326 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:07.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:07.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:07.550 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:11:07.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:11:07.597 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:11:07.598 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:11:07.598 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:11:08.043 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:11:08.516 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:11:08.598 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:11:08.598 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:11:08.599 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:11:08.599 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:11:08.987 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:11:09.459 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:11:09.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:11:09.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:11:09.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:11:09.600 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:11:09.932 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:11:10.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:10.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:10.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:10.333 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:10.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:10.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:10.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:11:10.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:10.352 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:10.352 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:10.352 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:11:10.352 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:11:10.403 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:11:10.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:10.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:10.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:10.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:10.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:10.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:10.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:10.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:10.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:10.487 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:10.487 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:10.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:11:10.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:10.489 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:10.489 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:10.489 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:11:10.489 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:11:10.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:10.493 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:10.493 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:10.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:10.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:10.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:11:10.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:11:10.601 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:11:10.601 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:11:10.875 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:11:11.346 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:11:11.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:11:11.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:11:11.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:11:11.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:11:11.817 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:11:12.290 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:11:12.763 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:11:13.235 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:11:13.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:13.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:13.500 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:13.500 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:13.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:13.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:13.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:11:13.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:13.521 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:13.521 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:13.521 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:11:13.521 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:11:13.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:13.572 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:13.573 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:13.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:13.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:13.706 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:11:14.179 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:11:14.652 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:11:15.125 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:11:15.598 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:11:16.071 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:11:16.543 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:11:16.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:16.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:16.579 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:16.579 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:16.599 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:16.599 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:16.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:11:16.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:16.600 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:16.600 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:16.600 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:11:16.600 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:11:16.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:16.643 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:16.643 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:16.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:16.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:16.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:16.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:16.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:16.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:16.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:16.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:16.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:11:16.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:16.706 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:16.707 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:16.707 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:11:16.707 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:11:16.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:16.729 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:16.729 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:16.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:16.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:17.014 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:11:17.485 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:11:17.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:17.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:17.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:17.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:17.709 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:17.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:17.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:11:17.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:17.710 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:17.711 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:17.711 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:11:17.711 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:11:17.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:17.717 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:11:17.717 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:11:17.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:17.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:17.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:17.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:17.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:17.792 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:17.792 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:11:17.806 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:17.806 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:17.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:11:17.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:17.807 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:17.807 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:17.807 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:11:17.807 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:11:17.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:17.864 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:11:17.864 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:11:17.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:17.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:17.958 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:11:18.430 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 05:11:18.903 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 05:11:19.376 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 05:11:19.848 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 05:11:20.321 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 05:11:20.794 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 05:11:20.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:20.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:20.872 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:20.872 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:20.872 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:11:20.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:20.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:20.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:11:20.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:20.893 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:20.893 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:20.893 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:11:20.893 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:11:20.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:20.938 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:11:20.938 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:11:20.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:20.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:20.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:20.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:20.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:20.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:20.999 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:11:21.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:21.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:21.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:11:21.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:21.019 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:21.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:21.019 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:11:21.019 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:11:21.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:21.024 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:11:21.024 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:11:21.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:21.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:21.267 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 05:11:21.740 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 05:11:22.214 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 05:11:22.686 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 05:11:23.157 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 05:11:23.630 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 05:11:24.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:24.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:24.033 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:24.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:24.033 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:11:24.043 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:24.043 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:24.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:11:24.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:24.044 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:24.044 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:24.044 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:11:24.044 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:11:24.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:24.099 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 05:11:24.100 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:11:24.100 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:11:24.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:24.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:24.571 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 05:11:25.044 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 05:11:25.518 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 05:11:25.991 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 05:11:26.464 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 05:11:26.937 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 05:11:27.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:27.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:27.107 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:27.107 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:27.108 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:11:27.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:27.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:27.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:11:27.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:27.129 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:27.129 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:27.129 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:11:27.129 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:11:27.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:27.180 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:11:27.180 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:11:27.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:27.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:27.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:27.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:27.263 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:27.263 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:27.264 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:11:27.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:27.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:27.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:11:27.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:27.283 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:27.284 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:27.284 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:11:27.284 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:11:27.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:27.315 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:11:27.316 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:11:27.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:27.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:27.410 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 05:11:27.882 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 05:11:28.355 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 05:11:28.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:28.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:28.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:28.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:28.536 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:11:28.555 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:28.555 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:28.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:11:28.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:28.556 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:28.556 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:28.556 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:11:28.556 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:11:28.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:28.597 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:28.597 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:28.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:28.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:28.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:28.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:28.820 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:28.820 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:28.828 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 05:11:28.835 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:28.835 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:28.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:11:28.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:28.836 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:28.836 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:28.836 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:11:28.836 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:11:28.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:28.877 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:28.877 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:28.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:28.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:29.299 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 05:11:29.771 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 05:11:30.244 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 05:11:30.717 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 05:11:31.189 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 05:11:31.660 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 05:11:31.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:31.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:31.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:31.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:31.903 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:31.903 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:31.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:11:31.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:31.904 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:31.904 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:31.904 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:11:31.904 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:11:31.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:31.948 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:31.949 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:31.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:31.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:32.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:32.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:32.124 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:32.124 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:32.132 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 05:11:32.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:32.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:32.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:11:32.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:32.140 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:32.140 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:32.140 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:11:32.140 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:11:32.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:32.184 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:32.184 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:32.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:32.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:32.605 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 05:11:33.099 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 05:11:33.571 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 05:11:34.042 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 05:11:34.515 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 05:11:34.988 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 05:11:35.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:35.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:35.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:35.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:35.203 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:35.203 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:35.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:11:35.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:35.204 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:35.204 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:35.204 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:11:35.204 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:11:35.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:35.228 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:35.228 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:35.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:35.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:35.460 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 05:11:35.931 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-08 05:11:36.402 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-08 05:11:36.875 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-08 05:11:37.347 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-08 05:11:37.820 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-08 05:11:38.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:38.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:38.235 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:38.235 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:38.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:38.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:38.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:11:38.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:38.251 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:38.251 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:38.251 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:11:38.251 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:11:38.290 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-08 05:11:38.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:38.299 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:38.299 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:38.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:38.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:38.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:38.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:38.520 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:38.520 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:38.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:38.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:38.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:11:38.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:38.529 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:38.529 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:38.529 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:11:38.529 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:11:38.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:38.580 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:38.580 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:38.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:38.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:38.761 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-08 05:11:39.232 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-08 05:11:39.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:39.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:39.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:39.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:39.293 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:39.293 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:39.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:11:39.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:39.295 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:39.295 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:39.295 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:11:39.295 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:11:39.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:39.333 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:11:39.333 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:11:39.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:39.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:39.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:39.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:39.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:39.391 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:39.391 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:11:39.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:39.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:39.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:11:39.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:39.402 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:39.402 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:39.402 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:11:39.402 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:11:39.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:39.417 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:11:39.417 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:11:39.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:39.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:39.703 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-08 05:11:40.176 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-08 05:11:40.649 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-08 05:11:41.121 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-08 05:11:41.594 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-08 05:11:42.067 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-08 05:11:42.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:42.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:42.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:42.425 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:42.425 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:11:42.434 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:42.434 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:42.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:11:42.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:42.437 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:42.437 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:42.437 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:11:42.437 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:11:42.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:42.498 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:11:42.498 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:11:42.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:42.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:42.539 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-08 05:11:42.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:42.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:42.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:42.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:42.932 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:11:42.951 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:42.951 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:42.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:11:42.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:42.953 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:42.953 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:42.953 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:11:42.953 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:11:42.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:42.957 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:11:42.957 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:11:42.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:42.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:43.011 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-08 05:11:43.484 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-08 05:11:43.956 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-08 05:11:44.429 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-08 05:11:44.901 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-08 05:11:45.368 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-08 05:11:45.837 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-08 05:11:45.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:45.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:45.965 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:45.965 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:45.966 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:11:45.985 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:45.985 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:45.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:11:45.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:45.986 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:45.987 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:45.987 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:11:45.987 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:11:46.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:46.029 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:11:46.029 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:11:46.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:46.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:46.310 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-08 05:11:46.782 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-08 05:11:47.254 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-08 05:11:47.728 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-08 05:11:48.201 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-08 05:11:48.673 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-08 05:11:49.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:49.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:49.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:49.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:49.036 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:11:49.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:49.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:49.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:11:49.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:49.056 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:49.056 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:49.056 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:11:49.056 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:11:49.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:49.101 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:11:49.101 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:11:49.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:49.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:49.146 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-08 05:11:49.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:49.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:49.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:49.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:49.528 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:11:49.546 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:49.546 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:49.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:11:49.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:49.548 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:49.548 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:49.548 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:11:49.548 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:11:49.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:49.564 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:11:49.564 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:11:49.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:49.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:49.619 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-08 05:11:50.091 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-02-08 05:11:50.562 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-02-08 05:11:51.035 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-02-08 05:11:51.508 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-02-08 05:11:51.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:51.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:51.967 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:51.967 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:51.967 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:11:51.979 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-02-08 05:11:51.980 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:11:51.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:11:51.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:11:51.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:11:51.985 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:11:51.986 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:11:51.986 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:11:51.986 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:11:51.986 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:11:51.987 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:11:51.987 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:11:51.987 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=9794 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:11:51.987 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=9794 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:11:51.987 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=9794 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:11:51.987 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=9794 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:11:51.987 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=9794 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:11:51.987 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=9795 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:11:51.987 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=9795 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:11:51.988 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=9795 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:11:51.988 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=9795 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:11:51.988 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=9795 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:11:51.988 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=9795 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:11:51.988 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=9795 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:11:51.988 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=9795 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:11:56.987 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:11:56.987 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:11:56.987 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:11:56.987 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:11:56.987 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:11:56.987 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:11:56.995 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:11:56.997 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:11:56.997 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:11:56.997 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:11:56.998 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:11:57.001 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:11:57.001 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:11:57.001 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:11:57.001 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:11:57.002 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:11:57.002 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:11:57.002 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:11:57.002 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:11:57.004 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:11:57.005 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:11:57.005 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:11:57.005 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:11:57.005 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:11:57.005 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:11:57.005 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:11:57.005 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:11:57.007 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:11:57.007 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:11:57.007 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:11:57.008 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:11:57.008 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:11:57.008 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:11:57.008 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:11:57.008 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:11:57.011 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:11:57.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:11:57.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:11:57.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:11:57.011 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:11:57.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:11:57.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:11:57.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:11:57.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:11:57.011 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:11:57.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:11:57.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:11:57.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:11:57.011 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:11:57.011 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:11:57.011 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:11:57.011 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:11:57.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:11:57.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:11:57.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:11:57.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:11:57.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:11:57.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:11:57.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:11:57.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:11:57.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:11:57.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:11:57.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:11:57.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:11:57.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:11:57.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:11:57.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:11:57.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:11:57.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:11:57.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:11:57.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:11:57.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:11:57.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:11:57.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:11:57.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:11:57.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:11:57.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:11:57.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:11:57.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:11:57.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:11:57.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:11:57.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:11:57.016 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:11:57.495 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:11:57.536 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:11:57.538 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:11:57.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:57.540 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:11:57.557 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:57.557 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:57.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:11:57.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:57.562 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:57.562 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:57.562 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:11:57.562 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:11:57.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:57.600 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:57.600 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:57.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:57.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:57.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:57.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:57.656 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:57.656 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:57.671 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:57.671 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:57.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:11:57.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:57.672 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:57.673 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:57.673 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:11:57.673 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:11:57.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:57.679 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:11:57.679 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:11:57.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:57.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:57.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:57.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:57.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:57.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:57.776 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:11:57.794 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:57.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:57.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:11:57.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:57.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:57.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:57.795 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:11:57.796 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:11:57.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:57.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:57.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:57.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:57.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:57.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:57.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:57.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:57.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:57.904 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:57.904 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:57.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:11:57.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:57.905 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:11:57.905 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:11:57.905 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:11:57.905 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:11:57.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:57.914 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:11:57.914 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:11:57.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:57.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:57.964 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:11:58.014 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:11:58.014 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:11:58.015 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:11:58.015 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:11:58.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:11:58.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:11:58.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:11:58.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:11:58.050 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:11:58.057 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:11:58.057 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:11:58.057 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:11:58.057 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:11:58.058 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:11:58.058 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:11:58.058 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:11:58.058 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:11:58.058 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:11:58.058 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:11:58.058 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:11:58.058 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=226 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:12:03.066 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:12:03.066 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:12:03.066 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:12:03.066 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:12:03.066 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:12:03.066 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:12:03.075 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:12:03.077 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:12:03.077 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:12:03.078 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:12:03.078 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:12:03.085 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:12:03.086 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:12:03.086 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:12:03.086 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:12:03.087 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:12:03.087 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:12:03.088 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:12:03.088 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:12:03.092 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:12:03.092 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:12:03.093 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:12:03.093 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:12:03.093 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:12:03.094 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:12:03.094 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:12:03.094 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:12:03.098 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:12:03.098 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:12:03.099 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:12:03.099 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:12:03.099 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:12:03.099 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:12:03.099 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:12:03.099 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:12:03.105 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:12:03.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:12:03.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:12:03.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:12:03.106 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:12:03.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:12:03.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:12:03.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:12:03.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:12:03.106 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:12:03.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:03.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:03.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:03.106 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:12:03.106 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:12:03.106 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:12:03.106 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:12:03.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:03.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:03.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:03.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:12:03.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:03.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:03.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:03.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:03.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:03.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:03.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:03.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:03.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:03.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:03.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:03.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:03.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:03.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:03.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:03.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:03.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:03.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:03.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:03.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:03.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:03.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:03.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:03.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:03.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:03.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:03.111 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:12:03.589 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:12:03.632 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:12:03.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:03.635 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:12:03.639 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:12:03.660 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:12:03.660 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:12:03.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:12:03.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:03.665 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:12:03.666 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:12:03.666 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:12:03.666 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:12:03.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:03.695 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:12:03.695 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:12:03.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:03.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:04.061 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:12:04.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:12:04.111 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:12:04.111 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:12:04.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:12:04.533 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:12:04.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:04.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:04.553 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:12:04.554 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:12:04.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:12:04.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:12:04.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:12:04.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:04.575 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:12:04.575 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:12:04.575 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:12:04.575 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:12:04.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:04.634 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:12:04.635 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:12:04.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:04.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:05.006 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:12:05.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:12:05.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:12:05.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:12:05.114 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:12:05.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:05.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:05.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:12:05.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:12:05.275 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:12:05.292 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:12:05.292 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:12:05.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:12:05.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:05.293 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:12:05.294 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:12:05.294 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:12:05.294 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:12:05.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:05.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:12:05.340 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:12:05.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:05.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:05.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:05.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:05.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:12:05.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:12:05.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:12:05.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:12:05.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:12:05.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:05.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:12:05.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:12:05.461 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:12:05.461 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:12:05.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:05.472 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:12:05.472 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:12:05.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:05.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:05.478 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:12:05.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:05.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:05.875 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:12:05.875 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:12:05.875 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:12:05.886 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:12:05.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:12:05.886 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:12:05.886 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:12:05.887 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:12:05.887 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:12:05.887 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:12:05.887 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:12:05.887 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:12:05.887 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:12:05.887 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:12:05.887 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=599 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:12:05.887 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=600 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:12:05.887 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=600 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:12:05.887 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=600 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:12:05.887 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=600 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:12:05.887 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=600 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:12:05.887 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=600 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:12:05.887 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=600 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:12:05.887 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=600 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:12:10.894 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:12:10.894 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:12:10.894 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:12:10.894 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:12:10.894 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:12:10.894 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:12:10.913 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:12:10.914 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:12:10.915 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:12:10.915 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:12:10.915 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:12:10.918 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:12:10.918 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:12:10.918 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:12:10.918 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:12:10.919 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:12:10.919 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:12:10.919 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:12:10.919 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:12:10.922 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:12:10.922 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:12:10.922 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:12:10.922 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:12:10.922 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:12:10.922 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:12:10.923 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:12:10.923 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:12:10.926 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:12:10.926 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:12:10.926 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:12:10.926 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:12:10.926 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:12:10.926 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:12:10.926 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:12:10.926 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:12:10.931 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:12:10.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:12:10.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:12:10.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:12:10.931 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:12:10.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:12:10.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:12:10.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:10.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:12:10.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:12:10.931 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:12:10.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:10.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:10.932 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:12:10.932 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:12:10.932 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:12:10.932 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:12:10.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:10.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:10.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:10.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:12:10.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:10.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:10.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:10.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:10.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:10.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:10.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:10.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:10.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:10.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:10.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:10.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:10.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:10.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:10.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:10.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:10.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:10.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:10.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:10.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:10.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:10.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:10.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:10.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:10.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:10.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:10.936 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:12:11.415 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:12:11.459 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:12:11.459 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:12:11.460 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:12:11.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:11.477 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:12:11.478 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:12:11.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:12:11.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:11.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:12:11.483 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:12:11.483 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:12:11.483 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:12:11.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:11.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:12:11.519 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:12:11.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:11.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:11.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:11.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:11.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:12:11.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:12:11.707 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:12:11.707 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:12:11.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:12:11.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:11.708 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:12:11.708 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:12:11.709 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:12:11.709 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:12:11.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:11.755 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:12:11.755 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:12:11.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:11.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:11.886 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:12:11.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:12:11.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:12:11.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:12:11.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:12:12.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:12.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:12.029 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:12:12.029 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:12:12.029 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:12:12.047 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:12:12.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:12:12.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:12:12.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:12.049 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:12:12.049 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:12:12.049 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:12:12.049 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:12:12.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:12.069 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:12:12.069 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:12:12.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:12.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:12.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:12.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:12.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:12:12.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:12:12.358 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:12:12.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:12:12.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:12:12.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:12:12.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:12.368 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:12:12.368 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:12:12.368 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:12:12.368 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:12:12.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:12.414 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:12:12.414 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:12:12.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:12.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:12.830 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:12:12.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:12:12.938 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:12:12.938 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:12:12.938 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:12:13.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:13.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:13.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:12:13.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:12:13.221 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:12:13.228 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:12:13.228 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:12:13.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:12:13.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:12:13.229 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:12:13.229 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:12:13.229 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:12:13.229 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:12:13.229 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:12:13.229 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:12:13.229 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:12:18.238 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:12:18.238 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:12:18.239 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:12:18.239 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:12:18.239 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:12:18.239 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:12:18.246 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:12:18.247 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:12:18.248 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:12:18.248 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:12:18.248 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:12:18.251 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:12:18.251 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:12:18.251 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:12:18.251 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:12:18.252 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:12:18.252 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:12:18.252 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:12:18.252 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:12:18.254 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:12:18.254 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:12:18.255 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:12:18.255 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:12:18.255 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:12:18.255 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:12:18.255 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:12:18.255 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:12:18.257 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:12:18.257 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:12:18.257 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:12:18.257 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:12:18.257 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:12:18.258 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:12:18.258 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:12:18.258 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:12:18.261 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:12:18.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:12:18.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:12:18.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:12:18.261 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:12:18.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:12:18.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:12:18.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:12:18.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:12:18.261 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:12:18.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:18.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:18.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:18.261 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:12:18.261 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:12:18.261 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:12:18.261 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:12:18.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:18.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:18.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:18.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:12:18.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:18.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:18.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:18.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:18.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:18.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:18.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:18.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:18.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:18.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:18.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:18.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:18.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:18.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:18.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:18.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:18.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:18.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:18.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:18.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:18.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:18.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:18.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:18.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:18.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:18.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:18.266 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:12:18.745 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:12:18.780 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:12:18.780 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:12:18.781 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:12:18.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:18.797 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:12:18.798 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:12:18.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:12:18.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:18.803 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:12:18.803 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:12:18.803 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:12:18.803 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:12:18.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:18.850 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:12:18.850 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:12:18.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:18.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:19.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:19.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:19.019 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:12:19.019 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:12:19.037 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:12:19.038 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:12:19.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:12:19.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:19.039 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:12:19.039 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:12:19.039 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:12:19.039 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:12:19.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:19.081 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:12:19.081 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:12:19.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:19.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:19.216 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:12:19.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:12:19.265 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:12:19.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:12:19.265 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:12:19.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:19.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:19.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:12:19.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:12:19.359 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:12:19.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:12:19.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:12:19.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:12:19.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:19.379 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:12:19.379 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:12:19.379 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:12:19.379 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:12:19.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:19.402 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:12:19.402 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:12:19.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:19.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:19.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:19.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:19.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:12:19.677 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:12:19.688 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:12:19.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:12:19.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:12:19.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:12:19.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:19.695 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:12:19.695 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:12:19.695 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:12:19.695 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:12:19.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:19.743 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:12:19.743 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:12:19.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:19.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:20.159 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:12:20.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:12:20.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:12:20.266 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:12:20.266 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:12:20.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:20.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:20.551 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:12:20.551 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:12:20.551 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:12:20.556 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:12:20.556 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:12:20.556 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:12:20.556 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:12:20.557 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:12:20.557 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:12:20.557 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:12:20.557 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:12:20.557 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:12:20.557 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:12:20.557 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:12:25.567 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:12:25.567 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:12:25.567 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:12:25.567 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:12:25.567 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:12:25.567 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:12:25.575 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:12:25.576 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:12:25.576 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:12:25.576 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:12:25.577 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:12:25.580 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:12:25.580 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:12:25.580 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:12:25.580 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:12:25.580 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:12:25.580 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:12:25.581 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:12:25.581 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:12:25.583 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:12:25.583 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:12:25.583 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:12:25.583 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:12:25.584 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:12:25.584 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:12:25.584 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:12:25.584 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:12:25.587 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:12:25.587 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:12:25.587 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:12:25.587 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:12:25.587 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:12:25.587 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:12:25.587 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:12:25.587 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:12:25.591 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:12:25.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:12:25.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:12:25.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:12:25.592 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:12:25.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:12:25.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:12:25.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:12:25.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:12:25.592 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:12:25.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:25.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:25.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:25.592 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:12:25.592 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:12:25.592 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:12:25.592 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:12:25.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:25.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:25.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:25.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:12:25.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:25.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:25.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:25.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:25.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:25.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:25.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:25.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:25.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:25.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:25.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:25.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:25.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:25.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:25.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:25.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:25.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:25.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:25.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:25.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:25.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:25.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:25.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:25.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:25.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:25.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:25.597 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:12:26.075 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:12:26.124 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:12:26.126 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:12:26.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:26.128 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:12:26.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:12:26.154 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:12:26.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:12:26.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:26.158 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:12:26.158 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:12:26.159 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:12:26.159 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:12:26.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:26.179 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:12:26.179 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:12:26.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:26.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:26.547 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:12:26.595 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:12:26.596 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:12:26.596 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:12:26.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:12:27.018 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:12:27.489 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:12:27.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:12:27.597 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:12:27.597 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:12:27.599 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:12:27.962 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:12:28.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:28.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:28.008 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:12:28.008 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:12:28.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:12:28.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:12:28.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:12:28.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:28.018 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:12:28.018 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:12:28.018 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:12:28.018 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:12:28.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:28.060 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:12:28.061 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:12:28.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:28.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:28.435 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:12:28.598 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:12:28.598 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:12:28.599 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:12:28.601 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:12:28.908 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:12:29.381 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:12:29.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:12:29.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:12:29.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:12:29.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:12:29.854 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:12:30.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:30.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:30.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:12:30.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:12:30.185 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:12:30.203 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:12:30.204 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:12:30.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:12:30.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:30.205 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:12:30.205 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:12:30.205 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:12:30.205 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:12:30.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:30.233 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:12:30.233 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:12:30.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:30.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:30.325 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:12:30.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:12:30.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:12:30.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:12:30.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:12:30.797 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:12:31.268 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:12:31.742 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:12:31.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:31.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:31.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:12:31.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:12:31.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:12:31.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:12:31.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:12:31.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:31.800 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:12:31.800 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:12:31.800 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:12:31.800 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:12:31.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:31.839 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:12:31.839 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:12:31.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:31.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:32.213 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:12:32.685 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:12:33.158 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:12:33.631 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:12:34.103 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:12:34.575 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:12:35.048 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:12:35.521 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:12:35.994 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:12:36.467 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:12:36.939 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:12:37.412 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 05:12:37.885 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 05:12:38.358 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 05:12:38.831 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 05:12:39.304 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 05:12:39.776 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 05:12:40.249 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 05:12:40.722 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 05:12:41.194 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 05:12:41.667 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 05:12:42.140 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 05:12:42.613 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 05:12:43.085 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 05:12:43.558 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 05:12:44.033 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 05:12:44.506 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 05:12:44.980 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 05:12:45.452 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 05:12:45.923 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 05:12:46.395 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 05:12:46.868 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 05:12:47.340 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 05:12:47.812 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 05:12:48.285 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 05:12:48.758 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 05:12:49.230 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 05:12:49.703 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 05:12:50.176 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 05:12:50.648 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 05:12:51.121 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 05:12:51.594 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 05:12:51.802 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:12:51.803 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:12:51.803 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:12:51.805 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:12:51.805 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:12:51.805 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:12:51.805 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:12:51.806 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:12:51.806 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:12:51.806 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:12:51.806 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:12:51.806 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:12:51.806 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:12:51.807 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:12:56.813 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:12:56.813 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:12:56.813 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:12:56.813 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:12:56.813 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:12:56.813 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:12:56.822 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:12:56.824 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:12:56.824 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:12:56.824 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:12:56.824 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:12:56.829 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:12:56.829 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:12:56.829 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:12:56.829 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:12:56.829 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:12:56.830 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:12:56.830 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:12:56.830 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:12:56.833 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:12:56.833 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:12:56.833 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:12:56.833 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:12:56.833 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:12:56.833 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:12:56.833 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:12:56.833 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:12:56.836 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:12:56.836 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:12:56.836 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:12:56.836 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:12:56.836 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:12:56.836 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:12:56.836 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:12:56.836 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:12:56.840 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:12:56.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:12:56.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:12:56.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:12:56.840 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:12:56.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:12:56.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:12:56.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:12:56.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:12:56.840 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:12:56.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:56.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:56.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:56.840 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:12:56.840 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:12:56.840 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:12:56.840 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:12:56.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:56.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:56.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:56.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:12:56.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:56.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:56.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:56.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:56.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:56.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:56.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:56.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:56.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:56.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:56.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:56.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:56.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:56.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:56.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:56.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:56.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:56.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:56.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:56.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:12:56.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:56.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:56.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:56.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:12:56.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:12:56.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:12:56.845 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:12:57.323 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:12:57.362 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:12:57.364 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:12:57.367 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:12:57.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:57.383 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:12:57.383 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:12:57.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:12:57.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:57.386 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:12:57.386 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:12:57.387 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:12:57.387 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:12:57.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:57.424 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:12:57.425 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:12:57.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:57.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:57.794 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:12:57.842 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:12:57.843 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:12:57.843 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:12:57.844 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:12:58.267 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:12:58.739 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:12:58.843 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:12:58.844 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:12:58.844 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:12:58.844 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:12:59.210 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:12:59.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:59.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:59.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:12:59.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:12:59.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:12:59.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:12:59.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:12:59.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:59.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:12:59.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:12:59.278 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:12:59.278 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:12:59.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:12:59.309 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:12:59.309 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:12:59.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:59.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:12:59.683 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:12:59.844 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:12:59.845 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:12:59.845 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:12:59.845 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:13:00.156 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:13:00.628 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:13:00.845 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:13:00.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:13:00.846 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:13:00.846 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:13:01.100 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:13:01.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:13:01.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:01.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:13:01.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:13:01.429 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:13:01.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:13:01.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:13:01.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:13:01.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:01.450 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:13:01.450 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:13:01.450 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:13:01.450 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:13:01.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:13:01.481 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:13:01.481 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:13:01.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:01.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:01.573 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:13:01.846 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:13:01.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:13:01.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:13:01.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:13:02.045 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:13:02.518 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:13:02.988 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:13:03.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:13:03.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:03.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:13:03.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:13:03.046 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:13:03.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:13:03.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:13:03.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:03.048 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:13:03.048 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:13:03.049 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:13:03.049 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:13:03.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:13:03.090 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:13:03.090 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:13:03.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:03.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:03.461 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:13:03.934 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:13:04.406 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:13:04.878 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:13:05.352 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:13:05.824 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:13:06.297 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:13:06.769 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:13:07.242 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:13:07.714 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:13:08.187 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:13:08.660 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 05:13:09.133 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 05:13:09.605 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 05:13:10.078 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 05:13:10.550 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 05:13:11.024 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 05:13:11.496 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 05:13:11.969 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 05:13:12.442 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 05:13:12.915 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 05:13:13.388 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 05:13:13.861 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 05:13:14.333 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 05:13:14.804 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 05:13:15.277 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 05:13:15.750 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 05:13:16.222 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 05:13:16.694 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 05:13:17.167 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 05:13:17.640 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 05:13:18.113 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 05:13:18.585 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 05:13:19.057 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 05:13:19.529 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 05:13:20.003 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 05:13:20.475 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 05:13:20.947 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 05:13:21.420 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 05:13:21.892 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 05:13:22.364 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 05:13:22.836 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 05:13:23.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:13:23.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:13:23.051 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:13:23.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:13:23.054 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:13:23.054 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:13:23.054 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:13:23.055 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:13:23.055 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:13:23.055 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:13:23.055 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:13:23.055 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:13:23.055 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:13:23.055 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:13:23.055 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5659 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:13:23.055 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5659 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:13:23.055 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5659 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:13:23.055 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5659 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:13:23.055 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5659 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:13:28.062 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:13:28.062 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:13:28.062 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:13:28.062 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:13:28.062 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:13:28.062 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:13:28.071 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:13:28.073 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:13:28.073 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:13:28.073 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:13:28.073 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:13:28.078 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:13:28.078 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:13:28.078 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:13:28.078 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:13:28.079 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:13:28.079 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:13:28.079 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:13:28.079 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:13:28.082 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:13:28.082 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:13:28.082 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:13:28.082 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:13:28.082 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:13:28.083 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:13:28.083 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:13:28.083 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:13:28.085 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:13:28.085 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:13:28.085 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:13:28.085 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:13:28.085 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:13:28.085 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:13:28.085 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:13:28.085 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:13:28.089 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:13:28.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:13:28.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:13:28.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:13:28.089 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:13:28.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:13:28.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:13:28.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:13:28.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:13:28.090 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:13:28.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:13:28.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:13:28.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:13:28.090 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:13:28.090 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:13:28.090 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:13:28.090 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:13:28.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:13:28.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:13:28.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:13:28.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:13:28.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:13:28.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:13:28.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:13:28.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:13:28.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:13:28.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:13:28.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:13:28.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:13:28.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:13:28.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:13:28.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:13:28.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:13:28.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:13:28.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:13:28.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:13:28.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:13:28.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:13:28.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:13:28.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:13:28.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:13:28.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:13:28.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:13:28.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:13:28.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:13:28.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:13:28.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:13:28.094 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:13:28.573 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:13:28.607 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:13:28.608 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:13:28.609 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:13:28.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:13:28.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:13:28.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:13:28.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:13:28.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:28.626 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:13:28.626 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:13:28.626 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:13:28.626 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:13:28.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:13:28.677 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:13:28.677 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:13:28.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:28.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:28.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:13:28.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:28.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:13:28.853 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:13:28.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:13:28.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:13:28.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:13:28.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:28.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:13:28.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:13:28.872 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:13:28.872 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:13:28.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:13:28.911 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:13:28.912 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:13:28.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:28.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:29.044 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:13:29.092 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:13:29.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:13:29.093 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:13:29.093 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:13:29.516 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:13:29.989 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:13:30.093 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:13:30.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:13:30.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:13:30.094 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:13:30.460 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:13:30.933 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:13:30.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:13:30.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:30.978 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:13:30.978 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:13:30.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:13:30.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:13:30.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:13:30.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:30.996 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:13:30.997 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:13:30.997 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:13:30.997 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:13:31.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:13:31.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:13:31.029 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:13:31.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:31.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:31.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:13:31.095 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:13:31.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:13:31.095 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:13:31.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:13:31.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:31.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:13:31.195 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:13:31.213 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:13:31.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:13:31.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:13:31.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:31.215 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:13:31.215 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:13:31.215 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:13:31.215 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:13:31.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:13:31.265 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:13:31.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:13:31.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:31.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:31.405 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:13:31.878 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:13:32.096 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:13:32.096 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:13:32.097 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:13:32.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:13:32.349 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:13:32.819 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:13:33.097 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:13:33.097 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:13:33.097 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:13:33.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:13:33.293 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:13:33.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:13:33.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:33.383 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:13:33.383 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:13:33.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:13:33.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:13:33.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:13:33.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:33.403 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:13:33.404 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:13:33.404 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:13:33.404 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:13:33.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:13:33.434 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:13:33.434 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:13:33.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:33.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:33.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:13:33.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:33.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:13:33.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:13:33.704 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:13:33.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:13:33.723 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:13:33.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:13:33.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:33.725 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:13:33.725 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:13:33.725 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:13:33.725 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:13:33.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:13:33.764 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:13:33.769 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:13:33.769 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:13:33.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:33.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:34.236 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:13:34.708 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:13:35.180 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:13:35.653 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:13:36.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:13:36.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:36.037 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:13:36.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:13:36.037 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:13:36.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:13:36.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:13:36.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:13:36.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:36.066 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:13:36.066 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:13:36.066 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:13:36.066 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:13:36.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:13:36.072 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:13:36.072 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:13:36.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:36.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:36.124 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:13:36.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:13:36.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:36.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:13:36.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:13:36.309 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:13:36.327 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:13:36.327 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:13:36.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:13:36.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:36.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:13:36.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:13:36.329 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:13:36.329 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:13:36.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:13:36.363 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:13:36.364 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:13:36.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:36.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:36.596 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:13:37.068 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:13:37.540 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:13:38.010 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:13:38.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:13:38.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:38.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:13:38.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:13:38.438 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:13:38.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:13:38.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:13:38.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:13:38.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:38.458 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:13:38.458 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:13:38.458 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:13:38.458 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:13:38.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:13:38.481 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:13:38.486 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:13:38.486 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:13:38.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:38.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:38.952 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:13:39.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:13:39.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:39.110 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:13:39.110 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:13:39.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:13:39.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:13:39.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:13:39.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:39.129 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:13:39.129 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:13:39.129 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:13:39.129 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:13:39.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:13:39.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:13:39.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:13:39.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:39.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:39.423 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:13:39.893 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 05:13:40.364 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 05:13:40.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:13:40.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:40.805 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:13:40.805 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:13:40.824 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:13:40.824 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:13:40.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:13:40.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:40.825 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:13:40.825 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:13:40.825 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:13:40.825 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:13:40.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:13:40.832 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:13:40.832 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:13:40.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:40.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:40.834 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 05:13:41.306 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 05:13:41.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:13:41.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:41.465 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:13:41.465 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:13:41.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:13:41.482 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:13:41.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:13:41.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:41.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:13:41.483 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:13:41.483 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:13:41.483 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:13:41.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:13:41.487 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:13:41.487 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:13:41.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:41.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:41.776 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 05:13:42.247 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 05:13:42.718 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 05:13:43.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:13:43.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:43.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:13:43.158 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:13:43.173 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:13:43.173 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:13:43.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:13:43.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:43.175 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:13:43.175 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:13:43.175 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:13:43.175 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:13:43.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:13:43.186 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:13:43.186 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:13:43.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:43.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:43.189 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 05:13:43.660 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 05:13:44.133 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 05:13:44.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:13:44.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:44.450 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:13:44.451 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:13:44.451 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:13:44.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:13:44.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:13:44.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:13:44.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:44.473 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:13:44.473 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:13:44.473 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:13:44.473 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:13:44.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:13:44.514 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:13:44.514 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:13:44.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:44.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:13:44.604 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 05:13:45.077 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 05:13:45.548 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 05:13:46.022 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 05:13:46.494 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 05:13:46.966 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 05:13:47.439 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 05:13:47.912 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 05:13:48.384 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 05:13:48.857 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 05:13:49.329 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 05:13:49.801 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 05:13:50.273 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 05:13:50.746 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 05:13:51.218 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 05:13:51.689 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 05:13:52.163 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 05:13:52.635 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 05:13:53.108 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 05:13:53.581 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 05:13:54.053 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 05:13:54.525 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 05:13:54.997 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 05:13:55.471 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 05:13:55.943 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 05:13:56.416 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 05:13:56.889 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 05:13:57.361 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-08 05:13:57.834 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-08 05:13:58.307 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-08 05:13:58.779 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-08 05:13:59.251 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-08 05:13:59.724 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-08 05:14:00.197 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-08 05:14:00.670 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-08 05:14:01.143 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-08 05:14:01.615 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-08 05:14:02.089 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-08 05:14:02.561 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-08 05:14:03.033 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-08 05:14:03.504 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-08 05:14:03.977 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-08 05:14:04.450 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-08 05:14:04.474 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:04.475 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:04.475 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:14:04.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:14:04.480 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:14:04.480 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:14:04.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:14:04.481 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:14:04.481 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:14:04.481 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:14:04.481 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:14:04.481 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:14:04.481 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:14:04.481 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:14:04.481 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:04.481 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7862 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:04.481 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7862 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:04.481 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:04.481 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=7862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:09.496 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:14:09.496 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:14:09.496 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:14:09.496 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:14:09.497 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:14:09.497 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:14:09.507 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:14:09.509 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:14:09.509 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:14:09.509 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:14:09.509 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:14:09.513 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:14:09.513 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:14:09.513 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:14:09.513 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:14:09.514 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:14:09.514 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:14:09.514 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:14:09.514 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:14:09.517 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:14:09.517 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:14:09.517 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:14:09.517 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:14:09.517 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:14:09.517 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:14:09.517 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:14:09.518 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:14:09.521 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:14:09.521 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:14:09.521 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:14:09.521 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:14:09.521 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:14:09.521 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:14:09.521 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:14:09.521 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:14:09.525 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:14:09.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:14:09.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:14:09.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:14:09.525 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:14:09.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:14:09.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:14:09.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:14:09.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:14:09.526 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:14:09.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:09.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:09.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:09.526 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:14:09.526 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:14:09.526 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:14:09.526 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:14:09.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:09.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:09.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:09.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:14:09.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:09.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:09.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:09.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:09.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:09.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:09.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:09.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:09.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:09.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:09.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:09.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:09.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:09.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:09.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:09.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:09.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:09.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:09.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:09.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:09.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:09.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:09.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:09.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:09.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:09.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:09.531 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:14:10.008 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:14:10.049 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:14:10.049 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:14:10.051 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:14:10.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:10.073 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:10.073 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:10.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:10.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:10.076 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:10.077 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:10.077 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:10.077 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:10.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:10.109 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:10.109 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:10.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:10.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:10.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:10.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:10.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:10.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:10.177 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:10.177 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:10.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:10.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:10.179 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:10.179 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:10.179 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:10.179 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:10.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:10.193 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:10.193 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:10.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:10.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:10.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:10.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:10.248 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:10.248 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:10.266 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:10.266 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:10.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:10.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:10.267 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:10.267 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:10.267 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:10.267 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:10.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:10.294 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:14:10.294 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:14:10.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:10.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:10.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:10.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:10.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:10.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:10.370 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:14:10.388 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:10.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:10.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:10.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:10.390 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:10.390 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:10.390 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:10.390 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:10.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:10.440 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:14:10.440 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:14:10.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:10.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:10.476 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:14:10.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:10.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:10.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:10.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:10.528 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:14:10.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:14:10.529 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:14:10.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:14:10.530 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:14:10.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:10.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:10.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:10.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:10.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:10.542 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:10.542 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:10.542 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:10.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:10.570 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:10.570 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:10.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:10.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:10.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:10.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:10.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:10.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:10.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:10.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:10.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:10.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:10.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:10.655 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:10.655 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:10.655 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:10.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:10.658 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:10.658 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:10.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:10.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:10.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:10.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:10.874 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:10.874 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:10.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:10.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:10.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:10.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:10.889 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:10.889 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:10.889 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:10.889 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:10.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:10.893 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:14:10.893 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:14:10.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:10.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:10.946 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:14:11.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:11.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:11.034 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:11.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:11.035 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:14:11.052 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:11.052 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:11.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:11.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:11.053 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:11.053 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:11.053 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:11.053 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:11.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:11.092 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:14:11.092 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:14:11.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:11.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:11.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:11.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:11.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:11.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:11.270 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:14:11.280 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:14:11.280 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:14:11.281 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:14:11.281 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:14:11.286 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:14:11.286 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:14:11.286 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:14:11.287 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:14:11.287 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:14:11.287 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:14:11.287 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:14:11.287 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=381 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:11.287 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=381 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:11.288 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=381 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:11.288 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=381 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:11.288 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=381 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:11.288 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=381 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:11.288 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=381 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:16.301 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:14:16.301 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:14:16.301 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:14:16.301 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:14:16.301 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:14:16.301 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:14:16.311 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:14:16.312 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:14:16.312 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:14:16.313 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:14:16.313 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:14:16.318 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:14:16.318 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:14:16.318 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:14:16.318 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:14:16.318 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:14:16.319 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:14:16.319 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:14:16.319 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:14:16.322 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:14:16.323 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:14:16.323 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:14:16.323 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:14:16.323 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:14:16.323 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:14:16.323 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:14:16.323 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:14:16.326 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:14:16.327 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:14:16.327 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:14:16.327 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:14:16.327 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:14:16.327 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:14:16.327 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:14:16.327 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:14:16.332 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:14:16.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:14:16.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:14:16.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:14:16.332 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:14:16.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:14:16.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:14:16.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:16.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:14:16.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:14:16.333 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:14:16.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:16.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:16.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:16.333 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:14:16.333 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:14:16.333 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:14:16.333 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:14:16.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:16.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:16.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:16.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:14:16.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:16.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:16.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:16.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:16.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:16.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:16.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:16.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:16.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:16.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:16.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:16.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:16.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:16.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:16.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:16.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:16.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:16.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:16.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:16.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:16.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:16.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:16.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:16.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:16.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:16.338 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:14:16.816 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:14:16.857 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:14:16.858 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:14:16.859 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:14:16.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:16.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:16.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:16.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:16.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:16.888 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:16.889 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:16.889 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:16.889 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:16.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:16.921 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:16.921 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:16.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:16.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:17.287 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:14:17.337 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:14:17.337 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:14:17.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:14:17.338 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:14:17.760 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:14:17.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:17.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:17.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:17.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:17.798 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:17.798 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:17.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:17.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:17.799 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:17.799 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:17.799 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:17.799 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:17.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:17.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:17.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:17.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:17.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:18.232 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:14:18.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:18.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:18.262 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:18.262 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:18.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:18.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:18.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:18.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:18.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:18.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:18.278 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:18.278 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:18.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:18.333 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:14:18.333 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:14:18.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:18.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:18.337 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:14:18.338 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:14:18.338 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:14:18.338 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:14:18.703 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:14:18.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:18.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:18.984 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:18.984 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:18.984 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:14:19.002 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:19.002 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:19.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:19.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:19.003 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:19.003 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:19.004 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:19.004 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:19.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:19.039 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:14:19.039 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:14:19.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:19.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:19.176 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:14:19.340 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:14:19.340 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:14:19.340 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:14:19.340 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:14:19.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:19.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:19.465 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:19.465 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:19.465 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:14:19.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:19.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:19.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:19.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:19.484 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:19.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:19.484 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:19.484 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:19.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:19.502 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:19.502 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:19.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:19.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:19.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:19.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:19.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:19.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:19.633 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:19.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:19.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:19.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:19.635 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:19.635 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:19.635 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:19.635 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:19.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:19.642 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:19.642 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:19.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:19.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:19.648 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:14:20.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:20.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:20.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:20.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:20.108 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:20.108 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:20.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:20.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:20.110 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:20.110 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:20.110 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:20.110 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:20.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:20.118 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:14:20.118 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:14:20.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:20.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:20.120 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:14:20.342 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:14:20.342 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:14:20.342 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:14:20.342 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:14:20.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:20.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:20.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:20.517 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:20.517 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:14:20.532 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:20.532 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:20.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:20.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:20.534 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:20.534 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:20.534 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:20.534 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:20.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:20.538 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:14:20.538 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:14:20.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:20.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:20.591 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:14:20.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:20.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:20.988 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:20.988 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:20.988 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:14:20.995 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:14:20.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:14:20.995 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:14:20.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:14:20.999 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:14:21.000 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:14:21.000 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:14:21.000 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:14:21.000 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:14:21.000 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:14:21.000 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:14:21.000 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1008 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:21.001 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1008 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:21.001 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1008 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:21.001 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1008 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:21.001 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1008 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:21.001 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1008 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:26.005 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:14:26.005 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:14:26.005 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:14:26.005 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:14:26.005 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:14:26.005 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:14:26.016 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:14:26.017 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:14:26.017 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:14:26.018 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:14:26.018 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:14:26.023 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:14:26.023 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:14:26.023 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:14:26.023 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:14:26.023 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:14:26.024 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:14:26.024 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:14:26.024 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:14:26.028 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:14:26.028 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:14:26.029 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:14:26.029 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:14:26.029 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:14:26.029 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:14:26.029 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:14:26.029 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:14:26.032 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:14:26.032 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:14:26.032 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:14:26.032 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:14:26.032 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:14:26.032 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:14:26.032 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:14:26.032 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:14:26.036 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:14:26.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:14:26.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:14:26.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:14:26.036 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:14:26.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:14:26.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:14:26.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:14:26.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:14:26.036 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:14:26.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:26.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:26.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:26.036 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:14:26.036 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:14:26.036 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:14:26.037 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:14:26.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:26.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:26.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:26.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:14:26.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:26.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:26.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:26.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:26.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:26.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:26.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:26.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:26.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:26.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:26.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:26.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:26.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:26.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:26.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:26.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:26.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:26.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:26.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:26.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:26.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:26.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:26.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:26.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:26.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:26.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:26.041 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:14:26.519 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:14:26.570 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:14:26.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:26.573 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:14:26.575 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:14:26.601 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:26.601 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:26.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:26.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:26.604 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:26.604 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:26.604 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:26.604 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:26.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:26.623 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:26.624 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:26.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:26.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:26.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:26.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:26.685 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:26.685 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:26.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:26.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:26.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:26.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:26.706 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:26.706 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:26.706 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:26.706 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:26.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:26.765 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:26.765 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:26.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:26.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:26.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:26.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:26.820 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:26.820 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:26.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:26.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:26.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:26.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:26.840 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:26.841 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:26.841 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:26.841 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:26.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:26.846 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:14:26.846 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:14:26.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:26.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:26.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:26.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:26.941 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:26.941 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:26.941 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:14:26.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:26.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:26.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:26.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:26.962 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:26.962 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:26.962 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:26.962 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:26.988 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:14:26.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:27.001 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:14:27.001 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:14:27.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:27.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:27.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:14:27.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:14:27.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:14:27.041 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:14:27.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:27.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:27.100 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:27.100 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:27.100 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:14:27.117 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:27.117 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:27.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:27.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:27.118 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:27.119 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:27.119 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:27.119 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:27.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:27.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:27.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:27.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:27.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:27.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:27.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:27.219 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:27.219 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:27.228 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:27.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:27.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:27.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:27.229 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:27.229 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:27.229 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:27.229 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:27.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:27.273 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:27.273 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:27.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:27.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:27.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:27.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:27.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:27.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:27.458 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:14:27.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:27.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:27.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:27.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:27.471 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:27.471 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:27.472 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:27.472 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:27.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:27.509 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:14:27.509 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:14:27.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:27.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:27.929 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:14:28.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:14:28.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:14:28.042 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:14:28.042 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:14:28.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:28.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:28.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:28.087 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:28.087 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:14:28.104 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:28.104 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:28.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:28.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:28.106 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:28.106 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:28.106 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:28.106 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:28.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:28.111 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:14:28.111 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:14:28.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:28.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:28.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:28.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:28.321 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:28.321 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:28.321 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:14:28.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:14:28.330 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:14:28.330 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:14:28.330 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:14:28.331 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:14:28.331 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:14:28.331 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:14:28.331 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:14:28.331 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:14:28.331 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:14:28.331 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:14:33.339 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:14:33.339 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:14:33.339 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:14:33.339 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:14:33.339 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:14:33.339 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:14:33.347 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:14:33.348 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:14:33.348 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:14:33.348 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:14:33.348 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:14:33.351 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:14:33.352 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:14:33.352 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:14:33.352 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:14:33.352 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:14:33.352 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:14:33.352 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:14:33.352 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:14:33.359 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:14:33.359 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:14:33.359 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:14:33.359 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:14:33.359 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:14:33.359 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:14:33.359 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:14:33.359 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:14:33.363 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:14:33.363 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:14:33.363 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:14:33.363 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:14:33.363 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:14:33.363 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:14:33.363 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:14:33.363 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:14:33.368 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:14:33.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:14:33.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:14:33.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:14:33.368 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:14:33.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:14:33.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:14:33.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:14:33.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:14:33.369 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:14:33.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:33.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:33.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:33.369 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:14:33.369 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:14:33.369 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:14:33.369 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:14:33.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:33.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:33.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:33.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:14:33.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:33.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:33.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:33.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:33.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:33.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:33.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:33.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:33.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:33.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:33.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:33.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:33.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:33.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:33.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:33.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:33.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:33.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:33.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:33.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:33.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:33.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:33.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:33.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:33.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:33.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:33.374 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:14:33.852 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:14:33.891 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:14:33.892 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:14:33.894 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:14:33.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:33.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:33.916 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:33.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:33.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:33.920 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:33.920 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:33.920 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:33.920 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:33.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:33.959 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:33.959 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:33.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:33.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:34.325 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:14:34.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:14:34.372 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:14:34.372 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:14:34.372 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:14:34.796 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:14:34.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:34.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:34.820 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:34.820 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:34.842 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:34.842 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:34.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:34.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:34.843 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:34.843 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:34.843 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:34.843 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:34.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:34.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:34.897 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:34.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:34.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:35.269 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:14:35.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:14:35.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:14:35.373 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:14:35.373 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:14:35.742 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:14:35.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:35.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:35.787 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:35.787 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:35.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:35.807 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:35.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:35.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:35.808 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:35.808 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:35.808 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:35.808 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:35.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:35.842 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:14:35.842 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:14:35.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:35.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:36.212 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:14:36.374 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:14:36.375 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:14:36.375 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:14:36.375 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:14:36.685 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:14:36.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:36.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:36.988 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:36.988 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:36.989 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:14:37.005 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:37.005 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:37.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:37.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:37.006 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:37.006 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:37.006 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:37.006 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:37.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:37.012 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:14:37.012 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:14:37.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:37.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:37.157 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:14:37.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:14:37.376 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:14:37.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:14:37.376 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:14:37.630 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:14:37.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:37.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:37.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:37.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:37.949 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:14:37.966 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:37.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:37.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:37.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:37.967 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:37.967 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:37.968 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:37.968 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:38.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:38.009 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:38.009 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:38.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:38.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:38.103 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:14:38.377 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:14:38.377 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:14:38.377 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:14:38.377 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:14:38.575 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:14:38.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:38.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:38.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:38.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:38.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:38.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:38.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:38.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:38.637 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:38.637 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:38.637 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:38.637 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:38.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:38.675 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:38.675 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:38.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:38.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:39.046 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:14:39.517 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:14:39.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:39.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:39.559 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:39.559 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:39.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:39.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:39.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:39.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:39.575 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:39.575 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:39.575 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:39.575 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:39.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:39.617 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:14:39.617 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:14:39.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:39.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:39.987 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:14:40.458 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:14:40.931 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:14:41.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:41.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:41.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:41.387 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:41.387 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:14:41.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:41.395 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:41.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:41.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:41.396 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:41.396 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:41.396 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:41.396 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:41.404 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:14:41.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:41.462 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:14:41.462 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:14:41.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:41.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:41.876 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:14:42.349 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:14:42.821 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:14:43.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:43.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:43.284 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:43.284 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:43.284 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:14:43.293 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:14:43.295 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:14:43.296 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:14:43.296 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:14:43.296 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:14:43.297 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:14:43.297 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:14:43.297 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:14:43.297 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:14:43.297 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:14:43.297 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:14:43.297 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:14:43.297 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2144 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:43.297 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2144 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:43.297 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2144 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:43.297 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2144 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:43.297 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2145 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:43.297 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2145 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:43.298 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2145 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:43.298 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2145 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:43.298 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2145 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:43.298 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2145 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:43.298 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2145 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:43.298 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2145 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:43.298 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2146 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:43.298 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2146 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:43.298 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2146 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:43.298 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2146 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:43.298 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2146 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:43.298 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2146 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:43.298 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2146 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:43.298 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2146 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:48.303 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:14:48.303 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:14:48.303 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:14:48.303 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:14:48.303 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:14:48.303 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:14:48.315 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:14:48.316 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:14:48.316 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:14:48.316 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:14:48.316 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:14:48.318 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:14:48.318 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:14:48.318 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:14:48.318 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:14:48.318 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:14:48.318 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:14:48.318 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:14:48.318 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:14:48.320 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:14:48.320 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:14:48.320 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:14:48.320 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:14:48.320 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:14:48.320 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:14:48.320 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:14:48.320 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:14:48.322 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:14:48.322 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:14:48.322 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:14:48.322 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:14:48.322 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:14:48.322 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:14:48.322 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:14:48.322 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:14:48.325 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:14:48.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:14:48.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:14:48.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:14:48.325 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:14:48.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:14:48.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:14:48.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:48.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:14:48.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:14:48.325 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:14:48.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:48.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:48.325 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:14:48.325 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:14:48.325 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:14:48.325 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:14:48.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:48.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:48.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:48.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:14:48.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:48.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:48.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:48.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:48.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:48.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:48.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:48.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:48.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:48.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:48.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:48.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:48.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:48.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:48.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:48.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:48.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:48.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:48.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:48.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:48.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:48.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:48.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:48.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:48.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:48.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:48.330 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:14:48.808 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:14:48.853 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:14:48.855 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:14:48.857 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:14:48.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:48.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:48.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:48.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:48.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:48.884 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:48.885 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:48.885 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:48.886 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:48.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:48.913 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:48.913 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:48.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:48.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:49.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:49.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:49.033 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:49.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:49.051 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:49.051 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:49.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:49.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:49.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:49.053 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:49.053 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:49.053 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:49.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:49.102 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:14:49.102 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:14:49.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:49.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:49.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:49.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:49.272 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:49.272 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:49.272 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:14:49.278 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:14:49.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:49.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:49.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:49.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:49.292 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:49.292 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:49.292 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:49.292 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:49.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:49.328 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:14:49.329 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:14:49.329 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:14:49.329 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:14:49.330 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:49.331 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:49.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:49.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:49.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:49.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:49.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:49.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:49.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:49.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:49.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:49.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:49.527 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:49.527 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:49.527 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:49.527 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:49.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:49.566 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:14:49.566 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:14:49.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:49.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:49.751 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:14:50.222 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:14:50.329 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:14:50.330 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:14:50.330 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:14:50.330 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:14:50.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:50.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:50.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:50.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:50.380 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:14:50.391 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:14:50.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:14:50.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:14:50.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:14:50.397 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:14:50.398 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:14:50.398 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:14:50.398 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:14:50.398 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:14:50.398 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:14:50.398 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:14:50.399 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=446 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:50.399 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=447 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:50.399 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=447 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:50.399 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=447 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:50.399 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=447 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:50.399 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=447 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:50.399 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=447 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:50.399 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=447 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:50.400 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=447 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:50.400 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=448 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:50.400 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=448 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:50.400 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=448 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:50.400 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=448 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:50.400 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=448 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:50.400 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=448 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:50.400 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=448 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:50.400 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=448 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:14:55.400 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:14:55.400 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:14:55.400 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:14:55.400 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:14:55.400 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:14:55.400 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:14:55.407 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:14:55.408 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:14:55.408 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:14:55.408 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:14:55.408 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:14:55.411 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:14:55.411 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:14:55.411 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:14:55.411 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:14:55.412 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:14:55.412 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:14:55.412 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:14:55.412 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:14:55.416 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:14:55.416 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:14:55.416 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:14:55.416 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:14:55.417 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:14:55.417 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:14:55.417 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:14:55.417 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:14:55.421 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:14:55.421 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:14:55.421 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:14:55.421 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:14:55.421 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:14:55.421 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:14:55.421 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:14:55.421 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:14:55.427 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:14:55.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:14:55.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:14:55.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:14:55.427 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:14:55.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:14:55.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:14:55.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:14:55.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:14:55.428 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:14:55.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:55.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:55.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:55.428 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:14:55.428 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:14:55.428 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:14:55.428 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:14:55.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:55.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:55.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:55.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:14:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:55.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:55.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:55.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:55.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:55.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:55.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:55.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:55.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:55.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:55.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:55.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:55.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:14:55.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:55.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:55.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:14:55.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:14:55.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:14:55.433 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:14:55.910 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:14:55.958 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:14:55.961 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:14:55.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:55.963 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:14:55.978 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:55.978 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:55.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:55.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:55.983 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:55.984 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:55.984 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:55.984 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:56.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:56.018 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:56.018 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:56.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:56.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:56.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:56.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:56.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:56.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:56.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:56.153 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:56.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:56.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:56.155 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:56.155 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:56.155 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:56.155 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:56.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:56.203 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:14:56.203 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:14:56.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:56.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:56.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:56.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:56.375 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:56.375 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:56.375 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:14:56.383 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:14:56.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:56.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:56.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:56.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:56.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:56.394 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:56.394 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:56.394 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:56.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:56.432 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:14:56.432 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:14:56.432 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:14:56.433 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:14:56.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:56.439 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:56.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:56.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:56.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:56.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:56.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:56.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:56.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:56.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:56.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:14:56.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:56.623 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:14:56.623 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:14:56.623 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:14:56.623 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:14:56.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:56.675 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:14:56.675 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:14:56.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:56.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:56.853 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:14:57.326 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:14:57.433 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:14:57.434 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:14:57.434 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:14:57.434 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:14:57.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:14:57.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:14:57.484 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:14:57.484 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:14:57.484 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:14:57.495 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:14:57.495 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:14:57.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:14:57.495 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:14:57.496 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:14:57.496 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:14:57.496 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:14:57.496 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:14:57.496 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:14:57.496 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:14:57.496 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:15:02.503 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:15:02.503 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:15:02.503 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:15:02.503 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:15:02.503 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:15:02.503 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:15:02.511 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:15:02.512 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:15:02.512 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:15:02.513 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:15:02.513 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:15:02.516 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:15:02.516 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:15:02.516 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:15:02.516 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:15:02.516 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:15:02.517 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:15:02.517 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:15:02.517 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:15:02.519 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:15:02.519 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:15:02.519 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:15:02.519 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:15:02.520 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:15:02.520 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:15:02.520 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:15:02.520 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:15:02.522 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:15:02.522 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:15:02.522 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:15:02.522 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:15:02.522 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:15:02.522 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:15:02.522 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:15:02.522 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:15:02.525 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:15:02.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:15:02.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:15:02.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:15:02.525 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:15:02.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:15:02.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:15:02.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:15:02.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:15:02.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:02.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:02.526 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:15:02.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:02.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:02.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:02.526 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:15:02.526 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:15:02.526 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:15:02.526 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:15:02.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:02.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:02.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:02.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:15:02.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:02.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:02.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:02.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:02.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:02.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:02.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:02.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:02.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:02.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:02.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:02.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:02.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:02.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:02.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:02.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:02.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:02.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:02.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:02.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:02.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:02.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:02.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:02.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:02.531 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:15:03.009 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:15:03.050 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:15:03.053 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:15:03.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:03.055 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:15:03.080 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:03.081 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:03.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:15:03.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:03.086 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:15:03.086 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:15:03.086 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:15:03.086 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:15:03.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:03.109 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:15:03.109 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:15:03.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:03.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:03.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:03.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:03.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:03.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:03.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:03.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:03.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:15:03.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:03.235 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:15:03.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:15:03.235 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:15:03.235 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:15:03.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:03.245 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:15:03.246 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:15:03.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:03.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:03.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:03.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:03.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:03.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:03.396 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:15:03.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:03.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:03.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:15:03.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:03.414 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:15:03.414 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:15:03.414 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:15:03.414 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:15:03.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:03.430 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:15:03.430 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:15:03.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:03.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:03.478 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:15:03.528 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:15:03.528 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:15:03.529 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:15:03.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:15:03.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:03.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:03.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:03.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:03.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:03.723 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:03.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:15:03.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:03.724 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:15:03.724 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:15:03.724 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:15:03.724 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:15:03.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:03.767 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:15:03.767 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:15:03.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:03.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:03.950 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:15:04.423 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:15:04.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:15:04.530 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:15:04.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:15:04.530 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:15:04.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:04.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:04.583 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:04.583 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:04.583 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:15:04.591 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:15:04.591 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:15:04.591 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:15:04.591 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:15:04.592 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:15:04.592 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:15:04.592 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:15:04.592 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:15:04.592 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:15:04.592 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:15:04.593 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:15:09.600 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:15:09.600 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:15:09.600 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:15:09.600 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:15:09.601 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:15:09.601 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:15:09.609 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:15:09.610 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:15:09.610 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:15:09.610 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:15:09.611 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:15:09.614 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:15:09.614 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:15:09.614 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:15:09.614 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:15:09.615 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:15:09.615 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:15:09.615 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:15:09.615 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:15:09.617 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:15:09.617 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:15:09.617 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:15:09.618 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:15:09.618 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:15:09.618 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:15:09.618 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:15:09.618 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:15:09.620 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:15:09.620 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:15:09.620 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:15:09.620 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:15:09.620 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:15:09.620 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:15:09.620 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:15:09.620 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:15:09.624 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:15:09.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:15:09.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:15:09.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:15:09.624 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:15:09.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:15:09.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:15:09.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:15:09.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:15:09.624 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:15:09.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:09.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:09.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:09.624 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:15:09.624 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:15:09.624 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:15:09.624 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:15:09.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:09.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:09.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:09.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:15:09.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:09.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:09.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:09.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:09.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:09.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:09.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:09.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:09.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:09.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:09.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:09.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:09.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:09.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:09.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:09.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:09.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:09.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:09.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:09.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:09.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:09.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:09.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:09.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:09.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:09.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:09.629 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:15:10.108 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:15:10.146 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:15:10.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:10.149 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:15:10.151 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:15:10.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:10.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:10.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:15:10.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:10.177 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:15:10.177 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:15:10.177 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:15:10.177 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:15:10.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:10.210 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:15:10.211 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:15:10.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:10.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:10.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:10.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:10.313 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:10.313 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:10.330 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:10.330 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:10.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:15:10.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:10.332 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:15:10.332 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:15:10.332 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:15:10.332 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:15:10.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:10.343 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:15:10.343 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:15:10.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:10.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:10.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:10.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:10.494 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:10.494 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:10.494 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:15:10.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:10.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:10.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:15:10.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:10.512 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:15:10.512 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:15:10.512 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:15:10.512 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:15:10.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:10.527 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:15:10.527 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:15:10.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:10.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:10.578 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:15:10.626 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:15:10.627 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:15:10.627 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:15:10.627 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:15:10.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:10.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:10.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:10.807 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:10.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:10.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:10.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:15:10.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:10.824 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:15:10.824 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:15:10.824 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:15:10.824 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:15:10.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:10.865 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:15:10.865 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:15:10.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:10.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:11.050 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:15:11.523 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:15:11.628 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:15:11.628 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:15:11.628 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:15:11.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:15:11.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:11.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:11.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:11.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:11.680 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:15:11.691 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:15:11.691 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:15:11.691 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:15:11.691 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:15:11.693 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:15:11.693 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:15:11.693 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:15:11.693 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:15:11.693 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:15:11.693 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:15:11.693 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:15:11.693 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=447 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:11.693 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=447 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:11.693 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=447 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:11.693 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=447 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:11.693 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=447 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:11.693 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=447 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:16.698 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:15:16.698 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:15:16.698 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:15:16.698 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:15:16.698 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:15:16.698 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:15:16.706 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:15:16.707 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:15:16.707 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:15:16.707 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:15:16.707 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:15:16.710 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:15:16.710 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:15:16.710 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:15:16.710 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:15:16.711 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:15:16.711 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:15:16.711 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:15:16.711 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:15:16.713 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:15:16.713 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:15:16.714 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:15:16.714 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:15:16.714 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:15:16.714 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:15:16.714 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:15:16.714 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:15:16.716 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:15:16.716 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:15:16.717 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:15:16.717 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:15:16.717 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:15:16.717 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:15:16.717 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:15:16.717 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:15:16.720 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:15:16.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:15:16.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:15:16.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:15:16.720 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:15:16.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:15:16.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:15:16.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:15:16.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:15:16.721 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:15:16.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:16.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:16.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:16.721 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:15:16.721 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:15:16.721 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:15:16.721 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:15:16.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:16.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:16.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:16.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:15:16.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:16.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:16.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:16.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:16.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:16.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:16.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:16.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:16.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:16.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:16.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:16.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:16.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:16.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:16.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:16.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:16.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:16.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:16.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:16.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:16.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:16.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:16.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:16.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:16.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:16.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:16.725 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:15:17.204 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:15:17.246 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:15:17.247 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:15:17.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:17.250 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:15:17.272 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:17.273 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:17.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:15:17.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:17.279 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:15:17.279 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:15:17.279 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:15:17.279 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:15:17.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:17.307 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:15:17.307 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:15:17.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:17.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:17.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:17.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:17.624 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:17.624 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:17.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:17.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:17.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:15:17.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:17.644 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:15:17.644 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:15:17.644 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:15:17.644 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:15:17.674 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:15:17.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:17.683 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:15:17.683 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:15:17.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:17.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:17.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:15:17.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:15:17.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:15:17.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:15:18.148 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:15:18.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:18.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:18.166 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:18.166 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:18.166 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:15:18.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:18.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:18.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:15:18.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:18.187 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:15:18.187 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:15:18.187 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:15:18.187 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:15:18.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:18.193 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:15:18.193 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:15:18.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:18.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:18.620 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:15:18.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:15:18.745 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:15:18.745 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:15:18.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:15:19.091 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:15:19.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:19.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:19.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:19.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:19.266 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:19.266 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:19.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:15:19.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:19.268 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:15:19.268 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:15:19.268 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:15:19.268 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:15:19.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:19.272 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:15:19.272 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:15:19.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:19.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:19.562 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:15:19.746 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:15:19.746 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:15:19.746 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:15:19.746 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:15:20.035 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:15:20.508 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:15:20.746 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:15:20.747 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:15:20.747 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:15:20.747 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:15:20.980 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:15:21.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:21.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:21.302 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:21.302 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:21.302 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:15:21.312 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:15:21.313 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:15:21.313 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:15:21.313 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:15:21.315 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:15:21.315 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:15:21.315 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:15:21.315 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:15:21.315 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:15:21.315 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:15:21.315 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:15:21.315 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=992 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:26.320 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:15:26.320 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:15:26.320 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:15:26.320 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:15:26.320 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:15:26.320 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:15:26.327 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:15:26.328 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:15:26.328 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:15:26.329 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:15:26.329 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:15:26.333 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:15:26.333 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:15:26.333 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:15:26.333 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:15:26.333 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:15:26.334 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:15:26.334 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:15:26.334 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:15:26.338 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:15:26.338 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:15:26.339 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:15:26.339 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:15:26.339 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:15:26.339 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:15:26.339 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:15:26.339 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:15:26.343 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:15:26.343 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:15:26.343 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:15:26.343 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:15:26.343 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:15:26.343 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:15:26.343 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:15:26.343 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:15:26.348 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:15:26.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:15:26.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:15:26.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:15:26.348 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:15:26.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:15:26.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:15:26.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:15:26.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:26.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:15:26.349 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:15:26.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:26.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:26.349 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:15:26.349 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:15:26.349 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:15:26.349 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:15:26.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:26.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:26.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:26.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:15:26.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:26.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:26.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:26.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:26.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:26.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:26.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:26.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:26.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:26.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:26.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:26.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:26.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:26.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:26.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:26.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:26.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:26.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:26.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:26.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:26.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:26.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:26.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:26.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:26.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:26.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:26.354 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:15:26.832 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:15:26.876 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:15:26.878 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:15:26.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:26.880 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:15:26.905 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:26.905 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:26.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:15:26.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:26.909 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:15:26.909 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:15:26.909 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:15:26.909 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:15:26.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:26.929 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:15:26.929 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:15:26.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:26.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:27.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:27.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:27.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:27.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:27.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:27.253 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:27.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:15:27.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:27.255 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:15:27.255 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:15:27.255 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:15:27.255 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:15:27.304 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:15:27.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:27.314 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:15:27.314 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:15:27.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:27.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:27.353 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:15:27.353 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:15:27.353 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:15:27.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:15:27.776 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:15:27.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:27.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:27.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:27.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:27.793 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:15:27.811 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:27.811 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:27.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:15:27.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:27.813 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:15:27.813 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:15:27.813 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:15:27.813 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:15:27.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:27.819 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:15:27.819 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:15:27.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:27.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:28.247 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:15:28.354 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:15:28.355 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:15:28.355 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:15:28.355 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:15:28.717 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:15:28.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:28.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:28.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:28.877 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:28.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:28.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:28.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:15:28.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:28.887 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:15:28.887 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:15:28.887 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:15:28.887 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:15:28.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:28.901 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:15:28.901 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:15:28.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:28.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:29.188 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:15:29.356 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:15:29.356 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:15:29.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:15:29.356 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:15:29.661 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:15:30.134 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:15:30.357 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:15:30.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:15:30.358 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:15:30.358 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:15:30.607 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:15:30.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:30.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:30.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:30.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:30.929 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:15:30.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:15:30.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:15:30.941 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:15:30.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:15:30.946 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:15:30.946 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:15:30.946 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:15:30.946 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:15:30.947 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:15:30.947 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:15:30.947 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:15:30.947 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=993 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:30.947 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=993 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:30.948 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=993 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:30.948 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=993 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:30.948 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=993 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:30.948 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=993 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:30.948 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=994 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:30.948 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=994 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:30.948 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=994 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:30.948 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=994 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:30.948 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=994 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:30.948 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=994 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:30.948 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=994 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:30.948 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=994 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:35.948 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:15:35.948 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:15:35.948 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:15:35.948 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:15:35.948 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:15:35.948 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:15:35.959 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:15:35.960 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:15:35.960 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:15:35.961 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:15:35.961 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:15:35.963 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:15:35.964 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:15:35.964 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:15:35.964 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:15:35.964 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:15:35.965 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:15:35.965 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:15:35.965 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:15:35.967 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:15:35.967 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:15:35.967 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:15:35.967 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:15:35.968 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:15:35.968 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:15:35.968 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:15:35.968 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:15:35.970 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:15:35.970 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:15:35.970 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:15:35.970 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:15:35.970 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:15:35.970 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:15:35.971 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:15:35.971 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:15:35.974 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:15:35.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:15:35.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:15:35.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:15:35.974 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:15:35.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:15:35.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:15:35.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:15:35.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:15:35.975 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:15:35.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:35.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:35.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:35.975 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:15:35.975 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:15:35.975 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:15:35.975 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:15:35.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:35.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:35.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:35.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:15:35.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:35.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:35.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:35.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:35.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:35.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:35.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:35.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:35.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:35.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:35.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:35.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:35.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:35.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:35.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:35.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:35.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:35.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:35.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:35.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:35.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:35.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:35.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:35.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:35.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:35.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:35.980 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:15:36.458 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:15:36.502 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:15:36.504 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:15:36.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:36.507 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:15:36.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:36.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:36.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:15:36.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:36.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:15:36.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:15:36.533 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:15:36.533 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:15:36.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:36.563 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:15:36.563 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:15:36.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:36.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:36.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:36.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:36.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:36.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:36.896 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:36.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:36.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:15:36.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:36.899 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:15:36.899 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:15:36.899 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:15:36.899 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:15:36.931 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:15:36.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:36.940 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:15:36.940 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:15:36.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:36.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:36.977 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:15:36.978 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:15:36.979 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:15:36.979 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:15:37.404 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:15:37.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:37.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:37.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:37.418 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:37.418 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:15:37.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:37.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:37.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:15:37.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:37.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:15:37.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:15:37.439 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:15:37.439 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:15:37.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:37.445 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:15:37.445 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:15:37.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:37.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:37.876 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:15:37.978 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:15:37.979 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:15:37.979 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:15:37.979 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:15:38.348 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:15:38.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:38.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:38.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:38.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:38.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:38.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:38.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:15:38.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:38.525 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:15:38.525 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:15:38.525 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:15:38.525 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:15:38.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:38.531 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:15:38.531 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:15:38.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:38.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:38.819 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:15:38.979 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:15:38.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:15:38.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:15:38.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:15:39.291 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:15:39.765 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:15:39.981 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:15:39.981 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:15:39.981 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:15:39.981 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:15:40.238 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:15:40.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:40.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:40.559 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:40.559 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:40.559 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:15:40.563 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:15:40.563 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:15:40.563 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:15:40.563 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:15:40.564 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:15:40.564 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:15:40.565 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:15:40.565 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:15:40.565 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:15:40.565 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:15:40.565 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:15:40.565 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=991 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:40.565 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=991 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:40.565 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=991 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:40.565 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=991 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:40.565 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=991 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:40.565 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=991 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:45.571 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:15:45.572 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:15:45.572 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:15:45.572 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:15:45.572 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:15:45.572 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:15:45.579 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:15:45.580 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:15:45.580 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:15:45.580 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:15:45.580 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:15:45.585 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:15:45.585 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:15:45.585 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:15:45.585 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:15:45.585 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:15:45.586 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:15:45.586 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:15:45.586 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:15:45.588 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:15:45.588 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:15:45.588 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:15:45.588 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:15:45.589 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:15:45.589 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:15:45.589 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:15:45.589 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:15:45.591 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:15:45.591 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:15:45.591 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:15:45.591 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:15:45.591 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:15:45.591 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:15:45.592 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:15:45.592 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:15:45.595 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:15:45.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:15:45.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:15:45.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:15:45.595 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:15:45.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:15:45.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:15:45.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:15:45.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:15:45.595 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:15:45.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:45.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:45.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:45.595 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:15:45.595 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:15:45.595 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:15:45.595 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:15:45.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:45.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:45.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:45.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:15:45.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:45.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:45.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:45.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:45.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:45.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:45.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:45.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:45.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:45.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:45.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:45.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:45.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:45.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:45.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:45.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:45.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:45.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:45.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:45.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:45.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:45.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:45.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:45.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:45.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:45.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:45.600 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:15:46.078 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:15:46.118 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:15:46.120 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:15:46.122 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:15:46.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:46.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:46.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:46.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:15:46.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:46.153 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:15:46.153 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:15:46.153 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:15:46.153 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:15:46.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:46.185 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:15:46.186 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:15:46.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:46.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:46.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:46.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:46.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:46.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:46.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:46.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:46.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:15:46.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:46.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:15:46.516 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:15:46.516 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:15:46.516 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:15:46.551 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:15:46.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:46.561 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:15:46.561 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:15:46.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:46.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:46.599 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:15:46.599 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:15:46.599 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:15:46.599 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:15:47.024 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:15:47.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:47.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:47.038 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:47.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:47.039 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:15:47.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:47.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:47.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:15:47.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:47.059 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:15:47.059 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:15:47.059 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:15:47.059 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:15:47.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:47.065 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:15:47.065 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:15:47.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:47.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:47.496 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:15:47.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:15:47.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:15:47.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:15:47.600 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:15:47.968 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:15:48.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:48.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:48.129 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:48.129 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:48.143 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:48.144 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:48.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:15:48.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:48.145 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:15:48.145 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:15:48.145 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:15:48.145 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:15:48.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:48.150 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:15:48.150 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:15:48.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:48.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:48.440 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:15:48.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:15:48.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:15:48.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:15:48.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:15:48.913 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:15:49.385 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:15:49.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:15:49.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:15:49.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:15:49.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:15:49.857 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:15:50.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:50.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:15:50.179 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:50.179 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:50.179 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:15:50.191 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:15:50.191 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:15:50.191 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:15:50.191 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:15:50.193 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:15:50.194 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:15:50.194 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:15:50.194 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:15:50.194 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:15:50.194 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:15:50.194 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:15:50.194 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=992 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:50.194 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=992 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:50.194 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=993 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:50.194 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=993 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:50.194 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=993 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:50.194 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=993 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:50.194 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=993 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:50.194 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=993 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:50.194 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=993 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:50.194 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=993 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:15:55.199 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:15:55.199 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:15:55.199 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:15:55.199 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:15:55.199 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:15:55.199 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:15:55.207 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:15:55.208 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:15:55.208 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:15:55.208 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:15:55.208 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:15:55.212 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:15:55.212 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:15:55.212 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:15:55.212 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:15:55.213 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:15:55.213 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:15:55.213 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:15:55.213 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:15:55.215 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:15:55.215 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:15:55.216 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:15:55.216 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:15:55.216 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:15:55.216 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:15:55.216 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:15:55.216 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:15:55.218 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:15:55.218 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:15:55.219 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:15:55.219 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:15:55.219 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:15:55.219 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:15:55.219 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:15:55.219 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:15:55.223 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:15:55.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:15:55.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:15:55.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:15:55.223 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:15:55.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:15:55.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:15:55.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:15:55.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:15:55.223 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:15:55.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:55.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:55.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:55.223 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:15:55.223 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:15:55.223 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:15:55.223 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:15:55.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:55.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:55.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:55.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:15:55.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:55.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:55.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:55.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:55.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:55.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:55.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:55.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:55.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:55.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:55.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:55.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:55.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:55.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:55.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:55.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:55.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:55.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:55.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:15:55.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:55.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:55.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:55.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:15:55.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:55.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:15:55.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:15:55.228 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:15:55.706 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:15:55.748 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:15:55.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:15:55.752 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:15:55.753 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:15:55.771 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:15:55.771 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:15:55.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:15:55.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:15:55.794 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:15:55.794 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:15:55.794 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:15:55.795 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:15:55.795 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:15:55.795 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:15:55.795 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:15:55.795 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:15:55.795 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:15:55.795 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:16:00.803 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:16:00.803 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:16:00.803 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:16:00.803 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:16:00.803 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:16:00.803 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:16:00.812 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:16:00.813 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:16:00.814 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:16:00.814 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:16:00.814 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:16:00.819 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:16:00.819 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:16:00.819 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:16:00.820 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:16:00.820 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:16:00.820 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:16:00.821 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:16:00.821 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:16:00.824 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:16:00.824 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:16:00.824 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:16:00.824 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:16:00.825 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:16:00.825 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:16:00.825 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:16:00.825 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:16:00.828 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:16:00.828 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:16:00.828 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:16:00.828 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:16:00.828 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:16:00.829 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:16:00.829 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:16:00.829 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:16:00.832 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:16:00.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:16:00.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:16:00.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:16:00.833 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:16:00.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:16:00.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:16:00.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:16:00.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:00.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:16:00.833 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:16:00.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:00.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:00.833 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:16:00.833 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:16:00.833 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:16:00.833 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:16:00.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:00.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:00.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:00.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:16:00.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:00.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:00.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:00.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:00.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:00.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:00.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:00.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:00.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:00.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:00.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:00.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:00.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:00.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:00.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:00.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:00.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:00.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:00.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:00.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:00.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:00.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:00.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:00.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:00.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:00.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:00.838 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:16:01.317 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:16:01.360 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:16:01.362 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:16:01.365 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:16:01.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:01.443 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:01.443 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:01.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:16:01.459 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:01.459 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:01.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:16:01.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:01.465 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:16:01.465 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:16:01.465 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:16:01.465 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:16:01.467 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:16:01.468 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:16:01.468 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:16:01.468 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:16:01.468 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:16:01.468 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:16:01.468 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:16:06.474 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:16:06.474 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:16:06.474 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:16:06.474 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:16:06.474 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:16:06.474 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:16:06.483 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:16:06.484 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:16:06.484 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:16:06.484 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:16:06.484 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:16:06.488 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:16:06.488 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:16:06.488 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:16:06.488 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:16:06.488 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:16:06.488 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:16:06.488 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:16:06.488 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:16:06.492 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:16:06.492 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:16:06.492 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:16:06.492 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:16:06.492 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:16:06.493 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:16:06.493 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:16:06.493 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:16:06.495 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:16:06.495 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:16:06.495 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:16:06.495 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:16:06.495 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:16:06.495 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:16:06.495 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:16:06.495 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:16:06.499 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:16:06.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:16:06.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:16:06.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:16:06.499 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:16:06.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:16:06.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:16:06.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:16:06.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:16:06.499 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:16:06.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:06.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:06.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:06.499 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:16:06.499 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:16:06.499 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:16:06.499 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:16:06.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:06.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:06.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:06.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:16:06.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:06.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:06.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:06.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:06.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:06.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:06.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:06.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:06.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:06.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:06.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:06.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:06.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:06.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:06.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:06.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:06.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:06.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:06.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:06.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:06.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:06.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:06.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:06.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:06.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:06.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:06.504 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:16:06.983 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:16:07.025 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:16:07.027 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:16:07.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:07.030 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:16:07.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:07.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:07.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:16:07.074 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:16:07.075 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:16:07.075 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:16:07.075 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:16:07.077 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:16:07.077 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:16:07.077 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:16:07.077 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:16:07.077 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:16:07.077 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:16:07.077 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:16:07.077 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:16:07.077 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:16:07.077 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:16:07.077 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:16:07.077 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:16:12.083 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:16:12.083 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:16:12.083 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:16:12.083 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:16:12.083 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:16:12.083 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:16:12.091 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:16:12.092 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:16:12.092 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:16:12.093 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:16:12.093 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:16:12.097 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:16:12.097 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:16:12.097 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:16:12.098 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:16:12.098 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:16:12.098 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:16:12.098 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:16:12.098 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:16:12.102 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:16:12.103 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:16:12.103 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:16:12.103 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:16:12.103 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:16:12.103 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:16:12.103 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:16:12.103 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:16:12.107 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:16:12.107 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:16:12.108 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:16:12.108 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:16:12.108 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:16:12.108 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:16:12.108 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:16:12.108 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:16:12.114 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:16:12.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:16:12.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:16:12.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:16:12.114 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:16:12.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:16:12.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:16:12.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:16:12.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:16:12.115 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:16:12.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:12.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:12.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:12.115 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:16:12.115 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:16:12.115 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:16:12.115 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:16:12.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:12.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:12.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:12.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:16:12.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:12.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:12.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:12.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:12.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:12.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:12.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:12.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:12.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:12.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:12.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:12.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:12.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:12.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:12.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:12.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:12.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:12.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:12.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:12.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:12.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:12.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:12.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:12.118 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:16:12.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:12.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:12.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:12.118 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:16:12.118 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:16:12.118 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:16:12.118 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:16:12.118 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:16:12.118 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:16:17.127 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:16:17.127 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:16:17.127 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:16:17.127 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:16:17.127 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:16:17.127 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:16:17.137 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:16:17.139 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:16:17.139 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:16:17.140 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:16:17.140 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:16:17.146 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:16:17.146 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:16:17.147 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:16:17.147 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:16:17.147 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:16:17.148 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:16:17.148 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:16:17.148 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:16:17.151 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:16:17.152 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:16:17.152 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:16:17.152 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:16:17.153 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:16:17.153 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:16:17.153 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:16:17.153 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:16:17.156 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:16:17.156 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:16:17.156 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:16:17.156 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:16:17.157 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:16:17.157 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:16:17.157 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:16:17.157 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:16:17.161 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:16:17.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:16:17.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:16:17.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:16:17.161 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:16:17.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:16:17.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:16:17.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:16:17.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:16:17.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:17.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:17.162 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:16:17.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:17.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:17.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:17.162 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:16:17.162 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:16:17.162 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:16:17.162 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:16:17.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:17.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:17.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:17.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:16:17.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:17.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:17.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:17.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:17.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:17.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:17.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:17.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:17.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:17.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:17.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:17.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:17.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:17.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:17.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:17.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:17.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:17.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:17.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:17.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:17.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:17.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:17.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:17.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:17.167 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:16:17.646 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:16:17.691 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:16:17.693 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:16:17.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:17.695 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:16:17.720 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:17.720 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:17.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:16:17.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:17.724 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:16:17.724 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:16:17.724 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:16:17.725 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:16:17.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:17.749 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:16:17.749 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:16:17.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:17.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:18.118 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:16:18.165 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:16:18.165 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:16:18.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:16:18.166 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:16:18.589 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:16:18.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:18.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:18.701 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:18.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:18.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:18.719 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:18.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:16:18.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:18.721 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:16:18.721 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:16:18.721 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:16:18.721 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:16:18.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:18.725 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:16:18.725 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:16:18.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:18.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:19.060 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:16:19.166 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:16:19.166 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:16:19.166 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:16:19.167 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:16:19.531 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:16:19.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:19.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:19.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:19.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:19.679 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:19.679 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:19.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:16:19.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:19.681 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:16:19.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:16:19.681 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:16:19.681 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:16:19.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:19.724 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:16:19.724 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:16:19.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:19.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:20.004 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:16:20.167 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:16:20.167 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:16:20.167 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:16:20.168 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:16:20.477 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:16:20.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:20.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:20.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:20.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:20.654 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:20.654 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:20.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:16:20.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:20.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:16:20.656 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:16:20.656 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:16:20.656 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:16:20.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:20.660 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:16:20.660 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:16:20.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:20.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:20.948 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:16:21.168 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:16:21.169 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:16:21.169 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:16:21.169 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:16:21.420 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:16:21.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:21.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:21.595 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:21.595 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:21.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:21.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:21.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:16:21.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:21.605 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:16:21.605 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:16:21.605 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:16:21.605 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:16:21.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:21.664 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:16:21.665 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:16:21.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:21.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:21.891 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:16:22.169 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:16:22.170 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:16:22.170 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:16:22.170 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:16:22.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:22.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:22.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:22.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:22.229 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:22.229 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:22.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:16:22.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:22.231 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:16:22.231 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:16:22.231 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:16:22.231 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:16:22.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:22.273 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:16:22.273 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-02-08 05:16:22.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:22.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:22.363 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:16:22.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:22.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:22.811 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:22.811 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:22.812 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:16:22.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:22.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:22.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:16:22.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:22.829 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:16:22.830 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:16:22.830 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:16:22.830 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:16:22.837 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:16:22.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:22.889 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:16:22.890 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-02-08 05:16:22.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:22.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:23.309 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:16:23.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:23.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:23.441 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:23.441 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:23.441 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:16:23.462 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:23.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:23.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:16:23.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:23.464 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:16:23.464 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:16:23.464 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:16:23.464 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:16:23.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:23.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:23.497 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:16:23.498 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:16:23.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:23.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:23.780 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:16:24.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:24.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:24.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:24.090 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:24.100 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:24.100 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:24.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:16:24.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:24.103 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:16:24.103 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:16:24.103 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:16:24.103 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:16:24.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:24.163 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:16:24.164 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:16:24.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:24.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:24.252 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:16:24.726 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:16:24.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:24.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:24.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:24.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:24.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:24.802 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:24.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:16:24.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:24.803 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:16:24.803 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:16:24.803 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:16:24.803 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:16:24.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:24.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:24.820 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:16:24.820 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:16:24.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:24.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:25.198 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:16:25.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:25.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:25.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:25.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:25.385 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:25.385 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:25.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:16:25.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:25.387 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:16:25.387 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:16:25.387 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:16:25.387 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:16:25.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:25.443 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:16:25.443 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:16:25.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:25.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:25.669 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:16:26.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:26.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:26.058 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:26.058 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:26.058 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:16:26.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:26.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:26.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:16:26.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:26.077 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:16:26.077 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:16:26.077 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:16:26.077 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:16:26.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:26.087 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:16:26.087 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:16:26.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:26.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:26.141 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:16:26.614 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:16:26.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:26.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:26.669 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:26.669 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:26.669 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:16:26.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:26.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:26.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:16:26.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:26.688 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:16:26.688 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:16:26.688 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:16:26.688 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:16:26.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:26.711 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:16:26.711 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:16:26.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:26.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:27.086 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:16:27.559 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:16:27.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:27.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:27.568 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:27.568 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:27.568 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:16:27.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:27.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:27.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:16:27.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:27.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:16:27.588 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:16:27.588 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:16:27.588 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:16:27.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:27.603 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:16:27.603 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:16:27.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:27.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:28.031 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:16:28.503 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:16:28.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:28.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:28.534 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:28.534 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:28.534 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:16:28.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:28.543 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:28.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:16:28.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:28.544 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:16:28.544 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:16:28.544 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:16:28.544 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:16:28.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:28.548 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:16:28.548 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:16:28.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:28.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:28.976 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 05:16:29.449 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 05:16:29.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:29.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:29.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:29.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:29.497 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:16:29.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:29.516 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:29.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:16:29.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:29.517 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:16:29.517 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:16:29.517 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:16:29.517 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:16:29.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:29.540 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:16:29.540 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:16:29.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:29.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:29.921 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 05:16:30.394 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 05:16:30.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:30.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:30.459 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:30.459 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:30.459 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:16:30.468 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:30.469 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:30.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:16:30.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:30.470 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:16:30.470 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:16:30.470 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:16:30.470 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:16:30.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:30.486 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:16:30.487 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:16:30.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:30.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:30.867 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 05:16:31.339 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 05:16:31.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:31.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:31.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:31.425 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:31.425 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:16:31.447 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:31.447 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:31.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:16:31.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:31.449 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:16:31.449 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:16:31.449 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:16:31.449 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:16:31.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:31.485 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:16:31.486 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:16:31.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:31.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:31.811 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 05:16:32.283 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 05:16:32.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:32.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:32.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:32.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:32.386 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:16:32.405 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:32.405 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:32.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:16:32.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:32.406 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:16:32.406 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:16:32.406 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:16:32.406 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:16:32.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:32.420 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:16:32.420 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:16:32.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:32.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:32.756 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 05:16:33.228 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 05:16:33.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:33.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:33.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:33.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:33.352 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:16:33.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:33.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:33.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:16:33.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:33.372 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:16:33.372 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:16:33.372 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:16:33.372 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:16:33.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:33.416 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:16:33.416 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:16:33.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:33.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:33.700 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 05:16:34.172 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 05:16:34.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:34.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:34.311 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:34.311 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:34.311 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:16:34.320 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:16:34.321 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:16:34.321 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:16:34.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:16:34.322 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:16:34.322 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:16:34.322 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:16:34.323 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:16:34.323 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:16:34.323 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:16:34.323 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:16:34.323 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3706 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:16:34.323 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3706 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:16:34.323 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3706 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:16:34.323 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3707 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:16:34.323 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3707 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:16:34.323 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3707 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:16:34.323 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3707 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:16:34.323 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3707 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:16:34.323 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3707 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:16:34.323 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3707 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:16:34.323 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3707 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:16:39.328 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:16:39.328 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:16:39.329 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:16:39.329 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:16:39.329 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:16:39.329 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:16:39.334 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:16:39.335 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:16:39.335 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:16:39.335 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:16:39.335 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:16:39.338 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:16:39.338 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:16:39.338 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:16:39.338 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:16:39.338 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:16:39.338 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:16:39.338 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:16:39.338 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:16:39.341 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:16:39.342 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:16:39.342 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:16:39.342 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:16:39.342 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:16:39.342 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:16:39.342 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:16:39.342 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:16:39.344 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:16:39.345 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:16:39.345 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:16:39.345 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:16:39.345 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:16:39.345 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:16:39.345 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:16:39.345 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:16:39.349 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:16:39.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:16:39.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:16:39.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:16:39.349 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:16:39.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:16:39.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:16:39.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:16:39.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:39.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:16:39.349 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:16:39.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:39.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:39.350 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:16:39.350 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:16:39.350 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:16:39.350 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:16:39.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:39.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:39.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:39.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:16:39.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:39.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:39.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:39.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:39.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:39.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:39.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:39.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:39.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:39.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:39.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:39.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:39.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:39.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:39.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:39.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:39.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:39.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:39.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:39.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:39.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:39.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:39.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:39.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:39.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:39.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:39.354 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:16:39.832 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:16:39.872 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:16:39.872 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:16:39.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:39.874 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:16:39.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:39.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:39.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:16:39.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:39.898 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:16:39.898 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:16:39.898 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:16:39.898 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:16:39.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:39.938 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:16:39.938 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:16:39.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:39.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:40.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:40.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:40.181 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:40.181 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:40.190 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:40.190 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:40.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:16:40.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:40.191 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:16:40.191 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:16:40.191 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:16:40.191 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:16:40.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:40.207 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:16:40.207 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:16:40.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:40.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:40.304 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:16:40.353 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:16:40.353 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:16:40.353 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:16:40.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:16:40.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:40.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:40.434 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:40.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:40.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:40.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:40.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:16:40.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:40.454 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:16:40.454 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:16:40.454 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:16:40.454 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:16:40.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:40.499 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:16:40.499 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:16:40.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:40.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:40.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:40.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:40.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:40.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:40.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:40.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:40.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:16:40.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:40.713 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:16:40.713 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:16:40.713 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:16:40.713 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:16:40.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:40.724 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:16:40.724 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:16:40.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:40.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:40.775 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:16:40.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:16:40.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:16:40.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:16:40.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:16:40.961 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:16:40.961 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:16:40.961 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:16:40.961 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:16:40.962 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:16:40.962 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:16:40.962 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:16:40.962 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:16:40.962 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:16:40.962 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:16:40.962 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:16:40.962 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=348 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:16:45.968 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:16:45.968 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:16:45.968 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:16:45.968 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:16:45.968 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:16:45.968 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:16:45.978 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:16:45.980 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:16:45.980 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:16:45.980 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:16:45.980 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:16:45.983 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:16:45.984 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:16:45.984 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:16:45.984 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:16:45.984 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:16:45.984 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:16:45.985 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:16:45.985 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:16:45.987 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:16:45.987 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:16:45.987 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:16:45.987 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:16:45.987 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:16:45.987 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:16:45.987 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:16:45.987 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:16:45.989 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:16:45.990 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:16:45.990 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:16:45.990 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:16:45.990 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:16:45.990 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:16:45.990 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:16:45.990 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:16:45.994 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:16:45.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:16:45.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:16:45.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:16:45.994 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:16:45.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:16:45.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:16:45.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:16:45.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:16:45.994 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:16:45.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:45.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:45.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:45.994 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:16:45.994 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:16:45.994 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:16:45.995 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:16:45.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:45.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:45.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:45.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:16:45.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:45.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:45.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:45.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:45.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:45.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:45.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:45.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:45.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:45.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:45.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:45.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:45.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:45.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:45.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:45.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:45.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:45.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:45.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:45.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:45.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:16:45.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:45.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:45.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:16:45.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:16:45.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:16:45.999 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:16:46.479 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:16:46.947 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:16:47.411 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:16:47.874 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:16:48.339 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:16:48.812 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:16:49.284 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:16:49.758 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:16:50.227 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:16:50.691 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:16:51.154 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:16:51.617 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:16:52.090 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:16:52.557 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:16:53.020 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:16:53.484 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:16:53.955 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:16:54.420 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:16:54.884 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:16:55.355 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:16:55.829 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:16:56.299 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:16:56.762 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:16:57.225 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:16:57.689 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 05:16:58.157 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 05:16:58.621 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 05:16:59.093 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 05:16:59.559 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 05:17:00.031 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 05:17:00.503 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 05:17:00.977 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 05:17:01.449 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 05:17:01.917 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 05:17:02.381 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 05:17:02.853 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 05:17:03.325 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 05:17:03.799 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 05:17:04.271 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 05:17:04.742 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 05:17:05.214 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 05:17:05.687 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 05:17:06.160 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 05:17:06.625 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 05:17:07.098 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 05:17:07.567 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 05:17:08.031 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 05:17:08.494 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 05:17:08.957 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 05:17:09.430 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 05:17:09.901 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 05:17:10.022 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:17:10.022 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:17:10.022 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:17:10.022 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:17:10.022 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:17:10.022 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:17:10.022 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:17:10.023 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5229 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:17:10.023 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5229 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:17:10.023 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5229 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:17:10.023 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5229 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:17:10.023 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5229 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:17:10.023 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5229 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:17:10.023 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5230 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:17:10.024 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5230 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:17:10.024 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5230 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:17:10.024 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5230 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:17:10.024 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5230 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:17:10.024 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5230 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:17:10.024 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5230 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:17:10.024 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5230 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:17:15.029 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:17:15.029 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:17:15.029 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:17:15.029 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:17:15.029 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:17:15.029 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:17:15.041 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:17:15.042 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:17:15.043 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:17:15.043 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:17:15.043 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:17:15.048 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:17:15.048 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:17:15.048 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:17:15.048 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:17:15.049 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:17:15.049 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:17:15.049 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:17:15.049 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:17:15.052 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:17:15.052 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:17:15.052 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:17:15.053 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:17:15.053 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:17:15.053 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:17:15.053 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:17:15.054 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:17:15.055 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:17:15.056 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:17:15.056 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:17:15.056 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:17:15.056 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:17:15.056 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:17:15.056 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:17:15.056 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:17:15.060 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:17:15.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:17:15.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:17:15.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:17:15.060 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:17:15.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:17:15.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:17:15.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:17:15.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:17:15.060 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:17:15.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:17:15.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:17:15.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:17:15.060 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:17:15.060 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:17:15.060 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:17:15.060 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:17:15.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:17:15.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:17:15.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:17:15.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:17:15.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:17:15.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:17:15.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:17:15.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:17:15.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:17:15.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:17:15.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:17:15.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:17:15.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:17:15.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:17:15.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:17:15.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:17:15.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:17:15.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:17:15.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:17:15.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:17:15.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:17:15.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:17:15.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:17:15.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:17:15.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:17:15.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:17:15.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:17:15.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:17:15.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:17:15.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:17:15.065 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:17:15.543 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:17:16.015 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:17:16.486 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:17:16.960 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:17:17.432 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:17:17.904 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:17:18.378 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:17:18.850 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:17:19.322 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:17:19.796 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:17:20.268 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:17:20.740 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:17:21.214 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:17:21.687 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:17:22.158 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:17:22.632 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:17:23.105 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:17:23.577 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:17:24.051 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:17:24.523 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:17:24.995 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:17:25.469 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:17:25.933 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:17:26.397 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:17:26.860 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 05:17:27.326 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 05:17:27.790 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 05:17:28.262 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 05:17:28.734 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 05:17:29.198 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 05:17:29.661 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 05:17:30.124 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 05:17:30.589 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 05:17:31.057 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 05:17:31.531 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 05:17:32.003 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 05:17:32.477 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 05:17:32.944 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 05:17:33.408 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 05:17:33.871 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 05:17:34.334 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 05:17:34.798 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 05:17:35.270 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 05:17:35.734 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 05:17:36.197 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 05:17:36.670 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 05:17:37.142 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 05:17:37.616 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 05:17:38.083 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 05:17:38.546 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 05:17:39.016 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 05:17:39.487 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 05:17:39.961 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 05:17:40.433 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 05:17:40.905 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 05:17:41.378 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 05:17:41.848 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 05:17:42.315 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 05:17:42.778 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 05:17:43.242 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 05:17:43.705 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 05:17:44.177 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-08 05:17:44.649 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-08 05:17:45.115 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-08 05:17:45.583 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-08 05:17:46.056 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-08 05:17:46.528 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-08 05:17:47.002 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-08 05:17:47.474 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-08 05:17:47.946 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-08 05:17:48.420 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-08 05:17:48.892 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-08 05:17:49.359 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-08 05:17:49.823 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-08 05:17:50.286 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-08 05:17:50.752 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-08 05:17:51.215 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-08 05:17:51.678 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-08 05:17:52.085 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:17:52.142 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-08 05:17:52.605 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-08 05:17:53.068 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-08 05:17:53.086 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:17:53.532 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-08 05:17:54.003 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-08 05:17:54.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:17:54.466 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-08 05:17:54.930 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-08 05:17:55.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:17:55.395 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-08 05:17:55.859 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-08 05:17:56.090 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:17:56.326 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-08 05:17:56.800 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-08 05:17:57.093 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:17:57.094 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:17:57.094 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:17:57.094 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:17:57.094 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:17:57.094 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:17:57.094 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:17:57.094 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:18:02.100 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:18:02.101 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:18:02.101 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:18:02.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:18:02.101 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:18:02.101 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:18:02.110 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:18:02.111 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:18:02.112 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:18:02.112 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:18:02.112 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:18:02.117 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:18:02.117 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:18:02.117 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:18:02.117 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:18:02.118 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:18:02.118 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:18:02.119 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:18:02.119 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:18:02.122 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:18:02.122 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:18:02.122 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:18:02.122 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:18:02.123 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:18:02.123 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:18:02.123 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:18:02.123 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:18:02.126 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:18:02.126 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:18:02.126 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:18:02.126 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:18:02.126 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:18:02.126 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:18:02.126 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:18:02.126 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:18:02.130 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:18:02.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:18:02.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:18:02.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:18:02.130 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:18:02.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:18:02.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:18:02.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:18:02.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:18:02.131 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:18:02.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:18:02.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:18:02.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:18:02.131 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:18:02.131 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:18:02.131 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:18:02.131 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:18:02.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:18:02.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:18:02.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:18:02.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:18:02.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:18:02.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:18:02.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:18:02.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:18:02.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:18:02.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:18:02.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:18:02.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:18:02.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:18:02.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:18:02.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:18:02.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:18:02.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:18:02.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:18:02.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:18:02.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:18:02.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:18:02.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:18:02.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:18:02.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:18:02.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:18:02.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:18:02.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:18:02.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:18:02.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:18:02.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:18:02.136 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:18:02.614 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:18:02.655 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:18:02.657 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:02.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:18:02.659 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:18:02.688 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:18:02.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:18:02.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:18:02.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:18:02.692 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:18:02.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:18:02.692 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:18:02.692 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:18:02.706 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:02.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:18:02.727 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:18:02.727 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:18:02.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:18:02.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:18:03.086 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:18:03.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:18:03.134 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:18:03.134 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:18:03.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:18:03.558 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:18:03.573 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 05:18:04.029 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:18:04.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:18:04.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:18:04.135 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:18:04.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:18:04.502 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:18:04.975 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:18:05.135 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:18:05.136 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:18:05.136 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:18:05.136 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:18:05.448 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:18:05.918 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:18:06.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:18:06.137 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:18:06.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:18:06.137 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:18:06.389 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:18:06.862 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:18:06.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:18:06.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:18:06.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:18:06.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:18:06.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:18:06.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:18:06.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:18:06.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:18:06.962 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:18:06.962 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:18:06.962 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:18:06.962 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:18:06.998 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:07.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:18:07.009 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:18:07.009 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:18:07.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:18:07.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:18:07.138 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:18:07.138 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:18:07.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:18:07.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:18:07.331 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:18:07.805 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:18:08.277 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:18:08.750 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:18:09.223 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:18:09.696 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:18:10.168 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:18:10.641 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:18:11.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:18:11.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:18:11.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:18:11.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:18:11.042 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:18:11.056 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:18:11.056 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:18:11.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:18:11.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:18:11.058 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:18:11.058 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:18:11.058 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:18:11.058 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:18:11.113 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:11.113 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:18:11.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:18:11.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:18:11.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:18:11.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:18:11.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:18:11.548 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 05:18:11.584 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:18:12.055 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:18:12.528 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:18:13.001 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:18:13.473 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:18:13.944 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 05:18:14.417 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 05:18:14.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:18:14.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:18:14.855 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:18:14.855 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:18:14.873 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:18:14.873 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:18:14.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:18:14.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:18:14.875 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:18:14.875 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:18:14.875 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:18:14.875 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:18:14.880 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:14.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:18:14.884 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:18:14.884 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:18:14.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:18:14.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:18:14.889 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 05:18:15.361 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 05:18:15.833 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 05:18:16.221 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 05:18:16.306 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 05:18:16.778 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 05:18:17.169 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 05:18:17.251 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 05:18:17.639 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 05:18:17.724 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 05:18:18.197 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 05:18:18.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:18:18.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:18:18.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:18:18.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:18:18.592 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:18:18.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:18:18.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:18:18.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:18:18.600 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:18:18.601 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:18:18.601 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:18:18.601 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:18:18.601 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:18:18.602 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:18:18.602 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:18:18.602 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:18:23.610 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:18:23.610 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:18:23.610 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:18:23.610 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:18:23.611 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:18:23.611 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:18:23.619 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:18:23.621 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:18:23.621 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:18:23.621 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:18:23.621 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:18:23.624 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:18:23.624 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:18:23.624 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:18:23.624 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:18:23.624 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:18:23.624 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:18:23.625 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:18:23.625 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:18:23.629 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:18:23.629 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:18:23.629 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:18:23.629 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:18:23.629 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:18:23.629 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:18:23.629 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:18:23.629 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:18:23.633 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:18:23.633 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:18:23.633 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:18:23.633 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:18:23.634 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:18:23.634 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:18:23.634 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:18:23.634 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:18:23.639 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:18:23.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:18:23.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:18:23.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:18:23.640 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:18:23.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:18:23.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:18:23.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:18:23.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:18:23.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:18:23.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:18:23.640 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:18:23.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:18:23.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:18:23.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:18:23.640 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:18:23.640 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:18:23.640 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:18:23.641 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:18:23.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:18:23.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:18:23.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:18:23.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:18:23.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:18:23.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:18:23.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:18:23.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:18:23.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:18:23.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:18:23.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:18:23.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:18:23.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:18:23.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:18:23.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:18:23.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:18:23.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:18:23.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:18:23.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:18:23.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:18:23.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:18:23.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:18:23.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:18:23.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:18:23.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:18:23.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:18:23.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:18:23.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:18:23.645 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:18:24.124 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:18:24.168 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:18:24.170 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:24.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:18:24.172 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:18:24.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:18:24.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:18:24.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:18:24.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:18:24.204 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:18:24.204 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:18:24.204 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:18:24.204 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:18:24.216 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:24.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:18:24.235 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:18:24.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:18:24.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:18:24.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:18:24.596 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:18:24.644 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:18:24.644 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:18:24.645 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:18:24.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:18:25.067 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:18:25.082 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:25.084 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 05:18:25.538 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:18:25.561 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:25.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:18:25.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:18:25.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:18:25.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:18:26.009 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:18:26.041 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:26.480 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:18:26.521 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:26.647 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:18:26.647 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:18:26.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:18:26.649 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:18:26.953 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:18:27.001 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:27.425 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:18:27.487 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:27.648 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:18:27.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:18:27.649 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:18:27.651 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:18:27.898 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:18:27.967 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:28.369 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:18:28.447 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:28.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:18:28.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:18:28.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:18:28.651 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:18:28.842 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:18:28.928 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:29.315 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:18:29.414 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:29.787 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:18:29.894 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:30.261 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:18:30.374 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:30.733 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:18:30.860 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:31.206 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:18:31.340 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:31.676 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:18:31.820 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:32.148 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:18:32.300 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:32.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:18:32.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:18:32.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:18:32.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:18:32.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:18:32.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:18:32.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:18:32.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:18:32.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:18:32.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:18:32.329 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:18:32.329 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:18:32.382 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:32.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:18:32.398 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:18:32.398 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:18:32.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:18:32.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:18:32.619 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:18:33.021 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:33.092 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:18:33.506 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:33.565 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:18:33.986 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:34.036 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:18:34.467 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:34.509 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:18:34.946 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:34.977 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:18:35.426 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:35.451 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 05:18:35.906 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:35.923 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 05:18:36.392 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:36.395 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 05:18:36.869 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 05:18:36.872 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:37.341 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 05:18:37.358 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:37.814 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 05:18:37.838 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:38.287 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 05:18:38.318 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:38.756 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 05:18:38.798 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:39.229 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 05:18:39.278 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:39.701 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 05:18:39.763 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:40.173 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 05:18:40.243 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:40.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:18:40.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:18:40.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:18:40.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:18:40.251 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:18:40.266 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:18:40.266 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:18:40.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:18:40.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:18:40.268 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:18:40.268 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:18:40.268 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:18:40.268 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:18:40.311 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:40.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:18:40.326 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:18:40.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:18:40.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:18:40.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:18:40.608 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:40.644 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 05:18:41.078 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:41.081 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 05:18:41.117 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 05:18:41.549 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:41.590 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 05:18:42.026 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:42.062 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 05:18:42.496 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:42.533 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 05:18:42.967 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:43.007 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 05:18:43.438 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:43.479 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 05:18:43.914 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:43.951 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 05:18:44.385 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:44.424 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 05:18:44.856 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:44.897 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 05:18:45.332 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:45.369 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 05:18:45.803 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:45.840 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 05:18:46.274 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:46.313 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 05:18:46.745 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:46.785 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 05:18:47.221 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:47.258 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 05:18:47.692 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:47.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:18:47.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:18:47.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:18:47.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:18:47.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:18:47.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:18:47.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:18:47.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:18:47.714 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:18:47.714 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:18:47.714 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:18:47.714 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:18:47.724 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:47.728 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 05:18:47.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:18:47.734 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:18:47.735 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:18:47.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:18:47.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:18:48.118 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:48.200 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 05:18:48.587 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:48.590 [DEBUG] fake_trx.py:269 (MS@172.18.152.22:6700) Recv SETTA cmd
2026-02-08 05:18:48.673 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 05:18:49.064 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:49.146 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 05:18:49.534 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:49.619 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 05:18:50.006 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:50.092 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 05:18:50.482 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:50.565 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 05:18:50.953 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:51.038 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 05:18:51.425 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:51.511 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 05:18:51.901 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:51.984 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 05:18:52.372 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:52.457 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 05:18:52.842 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:52.929 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-08 05:18:53.320 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:53.402 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-08 05:18:53.790 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:53.874 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-08 05:18:54.261 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:54.347 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-08 05:18:54.737 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:54.819 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-08 05:18:55.208 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:18:55.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:18:55.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:18:55.217 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:18:55.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:18:55.218 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:18:55.232 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:18:55.232 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:18:55.232 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:18:55.232 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:18:55.233 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:18:55.233 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:18:55.233 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:18:55.233 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:18:55.234 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:18:55.234 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:18:55.234 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:18:55.234 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6823 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:18:55.234 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6823 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:18:55.234 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6824 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:18:55.234 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6824 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:18:55.234 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6824 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:18:55.234 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6824 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:18:55.234 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6824 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:18:55.234 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6824 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:18:55.234 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6824 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:18:55.234 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6824 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:19:00.240 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:19:00.240 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:19:00.240 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:19:00.240 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:19:00.240 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:19:00.240 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:19:00.247 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:19:00.248 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:19:00.248 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:19:00.249 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:19:00.249 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:19:00.253 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:19:00.253 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:19:00.253 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:19:00.253 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:19:00.254 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:19:00.254 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:19:00.254 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:19:00.254 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:19:00.258 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:19:00.258 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:19:00.258 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:19:00.258 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:19:00.258 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:19:00.259 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:19:00.259 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:19:00.259 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:19:00.262 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:19:00.262 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:19:00.262 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:19:00.262 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:19:00.262 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:19:00.262 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:19:00.262 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:19:00.262 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:19:00.267 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:19:00.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:19:00.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:19:00.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:19:00.267 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:19:00.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:19:00.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:19:00.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:19:00.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:19:00.267 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:19:00.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:00.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:00.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:00.268 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:19:00.268 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:19:00.268 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:19:00.268 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:19:00.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:00.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:00.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:00.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:19:00.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:00.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:00.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:00.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:00.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:00.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:00.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:00.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:00.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:00.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:00.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:00.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:00.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:00.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:00.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:00.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:00.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:00.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:00.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:00.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:00.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:00.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:00.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:00.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:00.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:00.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:00.273 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:19:00.751 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:19:00.800 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:19:00.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:19:00.804 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:19:00.806 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:19:00.829 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:19:00.829 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:19:00.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:19:00.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:00.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:19:00.835 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:19:00.835 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:19:00.835 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:19:00.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:19:00.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:19:00.854 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:19:00.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:00.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:01.223 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:19:01.273 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:19:01.273 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:19:01.273 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:19:01.274 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:19:01.691 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:19:02.161 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:19:02.274 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:19:02.275 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:19:02.275 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:19:02.275 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:19:02.632 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:19:02.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:19:02.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:02.951 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:19:02.951 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:19:02.965 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:19:02.965 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:19:02.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:19:02.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:02.966 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:19:02.966 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:19:02.966 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:19:02.966 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:19:03.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:19:03.015 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:19:03.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:19:03.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:03.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:03.101 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:19:03.276 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:19:03.276 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:19:03.276 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:19:03.276 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:19:03.570 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:19:04.039 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:19:04.277 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:19:04.278 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:19:04.278 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:19:04.278 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:19:04.508 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:19:04.979 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:19:05.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:19:05.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:05.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:19:05.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:19:05.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:19:05.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:19:05.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:19:05.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:05.140 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:19:05.140 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:19:05.140 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:19:05.140 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:19:05.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:19:05.168 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:19:05.169 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:19:05.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:05.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:05.279 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:19:05.279 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:19:05.280 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:19:05.280 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:19:05.447 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:19:05.917 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:19:06.387 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:19:06.857 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:19:07.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:19:07.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:07.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:19:07.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:19:07.282 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:19:07.282 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:19:07.282 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:19:07.282 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:19:07.283 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:19:07.283 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:19:07.283 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:19:07.283 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:19:07.283 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:19:07.283 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:19:07.283 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:19:12.291 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:19:12.291 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:19:12.291 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:19:12.291 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:19:12.291 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:19:12.291 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:19:12.299 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:19:12.299 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:19:12.299 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:19:12.300 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:19:12.300 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:19:12.302 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:19:12.302 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:19:12.302 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:19:12.302 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:19:12.303 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:19:12.303 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:19:12.303 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:19:12.303 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:19:12.305 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:19:12.305 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:19:12.305 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:19:12.306 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:19:12.306 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:19:12.306 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:19:12.306 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:19:12.306 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:19:12.308 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:19:12.308 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:19:12.308 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:19:12.308 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:19:12.308 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:19:12.308 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:19:12.308 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:19:12.308 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:19:12.311 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:19:12.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:19:12.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:19:12.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:19:12.311 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:19:12.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:19:12.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:19:12.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:19:12.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:19:12.312 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:19:12.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:12.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:12.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:12.312 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:19:12.312 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:19:12.312 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:19:12.312 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:19:12.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:12.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:12.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:12.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:19:12.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:12.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:12.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:12.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:12.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:12.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:12.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:12.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:12.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:12.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:12.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:12.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:12.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:12.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:12.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:12.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:12.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:12.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:12.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:12.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:12.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:12.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:12.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:12.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:12.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:12.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:12.317 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:19:12.788 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:19:12.826 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:19:12.827 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:19:12.827 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:19:12.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:19:12.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:19:12.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:19:12.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:19:12.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:12.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:19:12.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:19:12.834 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:19:12.834 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:19:12.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:19:12.888 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:19:12.889 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:19:12.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:12.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:13.255 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:19:13.315 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:19:13.315 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:19:13.316 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:19:13.316 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:19:13.720 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:19:14.191 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:19:14.316 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:19:14.316 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:19:14.316 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:19:14.316 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:19:14.660 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:19:14.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:19:14.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:14.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:19:14.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:19:14.992 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:19:15.000 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:19:15.000 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:19:15.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:19:15.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:15.001 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:19:15.001 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:19:15.001 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:19:15.001 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:19:15.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:19:15.031 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:19:15.031 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:19:15.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:15.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:15.128 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:19:15.318 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:19:15.318 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:19:15.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:19:15.319 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:19:15.596 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:19:16.066 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:19:16.320 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:19:16.320 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:19:16.320 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:19:16.320 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:19:16.536 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:19:17.005 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:19:17.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:19:17.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:17.117 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:19:17.117 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:19:17.117 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:19:17.119 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:19:17.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:19:17.119 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:19:17.119 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:19:17.120 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:19:17.120 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:19:17.120 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:19:17.120 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:19:17.120 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:19:17.120 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:19:17.120 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:19:17.120 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1047 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:19:22.128 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:19:22.128 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:19:22.128 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:19:22.128 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:19:22.128 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:19:22.128 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:19:22.135 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:19:22.136 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:19:22.136 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:19:22.136 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:19:22.136 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:19:22.138 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:19:22.138 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:19:22.139 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:19:22.139 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:19:22.139 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:19:22.139 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:19:22.139 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:19:22.139 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:19:22.141 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:19:22.141 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:19:22.141 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:19:22.141 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:19:22.142 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:19:22.142 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:19:22.142 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:19:22.142 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:19:22.143 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:19:22.144 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:19:22.144 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:19:22.144 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:19:22.144 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:19:22.144 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:19:22.144 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:19:22.144 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:19:22.147 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:19:22.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:19:22.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:19:22.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:19:22.147 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:19:22.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:19:22.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:19:22.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:19:22.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:19:22.147 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:19:22.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:22.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:22.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:22.147 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:19:22.147 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:19:22.147 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:19:22.147 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:19:22.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:22.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:22.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:22.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:19:22.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:22.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:22.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:22.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:22.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:22.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:22.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:22.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:22.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:22.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:22.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:22.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:22.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:22.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:22.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:22.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:22.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:22.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:22.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:22.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:22.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:22.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:22.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:22.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:22.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:22.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:22.152 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:19:22.630 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:19:22.666 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:19:22.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:19:22.668 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:19:22.669 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:19:22.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:19:22.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:19:22.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:19:22.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:22.686 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:19:22.686 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:19:22.686 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:19:22.686 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:19:22.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:19:22.736 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:19:22.737 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:19:22.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:22.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:23.103 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:19:23.149 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:19:23.150 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:19:23.150 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:19:23.150 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:19:23.576 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:19:24.049 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:19:24.150 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:19:24.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:19:24.151 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:19:24.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:19:24.522 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:19:24.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:24.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:19:24.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:19:24.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:19:24.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:19:24.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:19:24.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:19:24.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:24.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:19:24.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:19:24.846 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:19:24.846 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:19:24.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:19:24.905 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:19:24.906 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:19:24.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:24.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:24.995 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:19:25.152 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:19:25.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:19:25.153 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:19:25.153 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:19:25.468 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:19:25.940 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:19:26.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:19:26.154 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:19:26.154 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:19:26.155 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:19:26.411 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:19:26.882 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:19:26.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:26.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:19:26.989 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:19:26.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:19:27.006 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:19:27.006 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:19:27.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:19:27.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:27.007 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:19:27.007 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:19:27.007 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:19:27.007 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:19:27.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:19:27.019 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:19:27.020 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:19:27.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:27.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:27.155 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:19:27.156 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:19:27.156 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:19:27.156 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:19:27.354 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:19:27.828 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:19:28.301 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:19:28.774 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:19:29.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:29.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:19:29.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:19:29.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:19:29.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:19:29.105 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:19:29.105 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:19:29.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:19:29.106 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:19:29.106 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:19:29.106 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:19:29.106 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:19:29.106 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:19:29.106 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:19:29.106 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:19:34.114 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:19:34.114 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:19:34.114 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:19:34.114 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:19:34.114 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:19:34.114 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:19:34.123 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:19:34.124 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:19:34.124 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:19:34.124 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:19:34.125 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:19:34.127 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:19:34.127 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:19:34.128 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:19:34.128 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:19:34.128 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:19:34.128 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:19:34.129 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:19:34.129 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:19:34.131 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:19:34.131 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:19:34.131 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:19:34.131 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:19:34.132 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:19:34.132 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:19:34.132 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:19:34.132 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:19:34.134 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:19:34.134 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:19:34.134 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:19:34.134 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:19:34.135 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:19:34.135 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:19:34.135 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:19:34.135 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:19:34.138 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:19:34.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:19:34.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:19:34.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:19:34.138 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:19:34.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:19:34.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:19:34.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:19:34.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:19:34.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:34.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:34.138 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:19:34.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:34.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:34.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:34.138 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:19:34.138 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:19:34.138 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:19:34.138 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:19:34.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:34.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:34.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:34.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:19:34.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:34.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:34.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:34.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:34.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:34.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:34.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:34.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:34.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:34.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:34.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:34.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:34.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:34.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:34.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:34.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:34.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:34.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:34.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:34.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:34.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:34.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:34.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:34.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:34.143 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:19:34.622 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:19:34.662 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:19:34.664 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:19:34.665 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:19:34.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:19:34.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:19:34.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:19:34.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:19:34.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:34.691 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:19:34.691 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:19:34.692 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:19:34.692 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:19:34.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:19:34.728 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:19:34.728 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:19:34.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:34.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:35.094 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:19:35.141 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:19:35.141 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:19:35.142 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:19:35.142 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:19:35.568 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:19:36.040 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:19:36.142 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:19:36.143 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:19:36.143 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:19:36.143 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:19:36.513 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:19:36.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:36.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:19:36.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:19:36.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:19:36.850 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:19:36.864 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:19:36.864 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:19:36.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:19:36.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:36.866 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:19:36.866 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:19:36.866 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:19:36.866 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:19:36.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:19:36.893 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:19:36.912 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:19:36.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:36.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:36.986 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:19:37.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:19:37.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:19:37.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:19:37.144 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:19:37.459 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:19:37.931 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:19:38.145 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:19:38.145 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:19:38.145 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:19:38.146 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:19:38.405 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:19:38.877 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:19:39.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:39.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:19:39.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:19:39.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:19:39.021 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:19:39.028 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:19:39.028 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:19:39.028 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:19:39.028 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:19:39.029 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:19:39.029 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:19:39.029 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:19:39.029 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:19:39.029 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:19:39.030 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:19:39.030 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:19:39.030 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1055 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:19:44.048 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:19:44.048 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:19:44.049 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:19:44.049 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:19:44.049 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:19:44.049 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:19:44.059 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:19:44.061 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:19:44.061 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:19:44.062 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:19:44.062 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:19:44.067 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:19:44.067 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:19:44.067 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:19:44.067 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:19:44.068 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:19:44.068 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:19:44.069 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:19:44.069 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:19:44.072 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:19:44.072 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:19:44.073 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:19:44.073 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:19:44.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:19:44.074 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:19:44.074 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:19:44.074 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:19:44.077 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:19:44.077 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:19:44.077 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:19:44.078 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:19:44.078 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:19:44.078 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:19:44.078 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:19:44.078 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:19:44.083 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:19:44.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:19:44.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:19:44.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:19:44.083 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:19:44.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:19:44.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:19:44.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:19:44.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:44.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:44.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:19:44.083 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:19:44.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:44.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:44.084 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:19:44.084 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:19:44.084 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:19:44.084 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:19:44.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:44.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:44.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:44.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:19:44.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:44.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:44.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:44.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:44.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:44.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:44.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:44.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:44.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:44.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:44.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:44.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:44.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:44.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:44.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:44.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:44.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:44.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:44.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:44.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:44.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:44.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:44.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:44.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:44.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:44.088 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:19:44.566 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:19:44.611 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:19:44.613 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:19:44.615 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:19:44.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:19:44.629 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:19:44.629 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:19:44.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:19:44.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:44.632 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:19:44.632 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:19:44.632 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:19:44.632 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:19:44.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:19:44.674 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:19:44.674 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:19:44.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:44.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:45.039 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:19:45.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:19:45.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:19:45.089 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:19:45.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:19:45.510 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:19:45.983 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:19:46.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:19:46.089 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:19:46.090 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:19:46.090 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:19:46.456 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:19:46.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:46.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:19:46.837 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:19:46.837 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:19:46.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:19:46.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:19:46.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:19:46.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:19:46.849 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:19:46.849 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:19:46.849 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:19:46.849 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:19:46.849 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:19:46.849 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:19:46.849 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:19:46.849 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=597 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:19:46.849 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=597 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:19:46.850 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=597 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:19:46.850 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=597 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:19:46.850 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=597 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:19:46.850 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=597 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:19:46.850 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=597 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:19:46.850 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=597 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:19:51.857 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:19:51.857 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:19:51.857 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:19:51.857 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:19:51.857 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:19:51.857 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:19:51.863 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:19:51.864 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:19:51.864 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:19:51.864 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:19:51.864 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:19:51.866 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:19:51.867 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:19:51.867 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:19:51.867 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:19:51.867 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:19:51.867 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:19:51.868 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:19:51.868 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:19:51.869 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:19:51.869 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:19:51.869 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:19:51.870 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:19:51.870 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:19:51.870 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:19:51.870 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:19:51.870 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:19:51.872 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:19:51.872 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:19:51.872 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:19:51.872 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:19:51.872 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:19:51.872 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:19:51.872 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:19:51.872 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:19:51.875 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:19:51.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:19:51.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:19:51.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:19:51.875 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:19:51.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:19:51.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:19:51.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:19:51.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:19:51.876 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:19:51.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:51.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:51.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:51.876 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:19:51.876 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:19:51.876 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:19:51.876 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:19:51.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:51.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:51.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:51.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:19:51.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:51.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:51.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:51.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:51.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:51.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:51.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:51.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:51.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:51.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:51.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:51.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:51.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:51.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:51.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:51.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:51.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:51.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:51.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:51.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:51.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:51.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:51.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:51.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:51.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:51.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:51.880 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:19:52.358 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:19:52.392 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:19:52.393 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:19:52.394 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:19:52.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:19:52.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:19:52.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:19:52.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:19:52.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:52.418 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:19:52.418 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:19:52.419 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:19:52.419 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:19:52.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:19:52.468 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:19:52.469 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:19:52.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:52.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:52.831 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:19:52.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:19:52.879 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:19:52.900 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:19:52.901 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:19:53.302 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:19:53.774 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:19:53.880 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:19:53.900 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:19:53.901 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:19:53.901 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:19:54.247 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:19:54.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:19:54.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:19:54.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:19:54.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:19:54.664 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:19:54.672 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:19:54.672 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:19:54.672 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:19:54.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:19:54.673 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:19:54.673 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:19:54.673 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:19:54.673 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:19:54.673 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:19:54.673 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:19:54.673 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:19:59.681 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:19:59.681 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:19:59.681 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:19:59.681 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:19:59.681 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:19:59.681 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:19:59.689 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:19:59.690 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:19:59.690 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:19:59.690 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:19:59.690 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:19:59.693 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:19:59.693 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:19:59.694 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:19:59.694 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:19:59.694 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:19:59.695 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:19:59.695 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:19:59.695 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:19:59.698 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:19:59.698 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:19:59.698 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:19:59.698 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:19:59.699 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:19:59.699 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:19:59.699 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:19:59.699 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:19:59.702 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:19:59.702 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:19:59.702 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:19:59.703 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:19:59.703 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:19:59.703 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:19:59.703 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:19:59.703 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:19:59.708 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:19:59.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:19:59.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:19:59.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:19:59.708 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:19:59.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:19:59.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:19:59.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:59.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:19:59.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:19:59.708 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:19:59.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:59.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:59.709 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:19:59.709 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:19:59.709 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:19:59.709 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:19:59.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:59.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:59.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:59.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:19:59.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:59.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:59.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:59.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:59.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:59.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:59.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:59.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:59.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:59.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:59.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:59.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:59.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:59.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:59.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:59.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:59.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:19:59.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:59.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:59.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:59.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:59.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:59.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:19:59.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:19:59.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:59.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:19:59.713 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:20:00.192 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:20:00.240 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:20:00.242 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:20:00.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:20:00.243 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:20:00.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:20:00.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:20:00.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:20:00.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:00.313 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:20:00.313 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:20:00.313 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:20:00.314 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:20:00.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:20:00.338 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:20:00.338 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:20:00.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:00.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:00.662 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:20:00.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:00.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:20:00.712 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:20:00.712 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:20:00.712 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:20:00.713 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:20:00.713 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:20:00.714 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:20:00.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:20:00.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:20:00.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:20:00.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:00.732 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:20:00.732 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:20:00.732 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:20:00.732 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:20:00.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:20:00.756 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:20:00.756 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:20:00.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:00.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:01.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:01.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:20:01.132 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:20:01.132 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:20:01.134 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:20:01.141 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:20:01.142 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:20:01.142 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:20:01.142 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:20:01.144 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:20:01.144 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:20:01.145 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:20:01.145 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:20:01.145 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:20:01.145 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:20:01.145 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:20:01.145 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=310 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:01.145 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=310 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:01.145 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=310 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:01.145 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=310 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:01.145 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=310 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:01.145 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=310 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:06.149 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:20:06.149 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:20:06.149 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:20:06.149 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:20:06.149 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:20:06.149 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:20:06.159 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:20:06.160 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:20:06.160 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:20:06.161 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:20:06.161 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:20:06.165 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:20:06.165 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:20:06.165 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:20:06.166 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:20:06.166 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:20:06.166 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:20:06.167 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:20:06.167 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:20:06.169 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:20:06.169 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:20:06.169 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:20:06.170 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:20:06.170 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:20:06.170 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:20:06.170 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:20:06.170 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:20:06.172 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:20:06.172 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:20:06.172 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:20:06.172 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:20:06.173 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:20:06.173 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:20:06.173 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:20:06.173 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:20:06.176 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:20:06.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:20:06.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:20:06.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:20:06.176 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:20:06.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:20:06.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:20:06.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:20:06.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:20:06.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:06.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:06.177 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:20:06.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:06.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:06.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:06.177 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:20:06.177 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:20:06.177 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:20:06.177 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:20:06.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:06.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:06.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:06.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:20:06.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:06.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:06.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:06.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:06.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:06.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:06.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:06.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:06.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:06.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:06.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:06.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:06.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:06.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:06.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:06.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:06.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:06.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:06.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:06.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:06.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:06.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:06.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:06.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:06.181 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:20:06.660 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:20:06.694 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:20:06.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:20:06.696 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:20:06.697 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:20:06.706 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:20:06.706 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:20:06.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:20:06.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:06.755 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:20:06.756 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:20:06.756 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:20:06.756 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:20:06.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:20:06.807 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:20:06.807 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:20:06.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:06.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:07.132 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:20:07.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:07.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:20:07.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:20:07.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:20:07.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:20:07.180 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:20:07.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:20:07.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:20:07.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:20:07.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:20:07.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:20:07.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:07.216 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:20:07.216 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:20:07.216 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:20:07.216 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:20:07.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:20:07.223 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:20:07.223 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:20:07.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:07.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:07.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:07.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:20:07.603 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:20:07.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:20:07.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:20:07.615 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:20:07.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:20:07.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:20:07.616 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:20:07.617 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:20:07.617 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:20:07.617 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:20:07.617 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:20:07.617 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:20:07.617 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:20:07.617 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:20:12.634 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:20:12.634 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:20:12.634 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:20:12.634 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:20:12.634 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:20:12.634 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:20:12.644 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:20:12.646 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:20:12.646 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:20:12.647 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:20:12.647 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:20:12.651 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:20:12.652 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:20:12.652 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:20:12.652 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:20:12.653 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:20:12.653 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:20:12.653 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:20:12.654 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:20:12.656 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:20:12.656 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:20:12.657 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:20:12.657 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:20:12.657 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:20:12.657 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:20:12.658 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:20:12.658 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:20:12.660 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:20:12.660 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:20:12.660 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:20:12.661 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:20:12.661 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:20:12.661 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:20:12.661 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:20:12.661 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:20:12.665 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:20:12.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:20:12.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:20:12.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:20:12.665 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:20:12.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:20:12.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:20:12.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:20:12.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:20:12.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:12.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:12.665 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:20:12.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:12.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:12.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:12.665 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:20:12.665 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:20:12.665 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:20:12.666 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:20:12.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:12.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:12.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:12.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:20:12.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:12.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:12.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:12.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:12.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:12.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:12.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:12.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:12.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:12.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:12.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:12.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:12.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:12.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:12.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:12.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:12.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:12.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:12.670 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:20:13.148 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:20:13.193 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:20:13.195 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:20:13.197 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:20:13.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:20:13.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:20:13.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:20:13.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:20:13.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:13.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:20:13.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:20:13.261 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:20:13.262 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:20:13.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:20:13.297 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:20:13.298 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:20:13.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:13.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:13.621 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:20:13.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:13.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:20:13.668 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:20:13.668 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:20:13.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:20:13.669 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:20:13.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:20:13.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:20:13.685 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:20:13.685 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:20:13.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:20:13.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:13.695 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:20:13.695 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:20:13.695 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:20:13.695 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:20:13.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:20:13.715 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:20:13.716 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:20:13.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:13.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:14.092 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:20:14.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:14.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:20:14.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:20:14.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:20:14.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:20:14.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:20:14.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:20:14.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:20:14.148 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:20:14.148 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:20:14.148 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:20:14.149 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:20:14.149 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:20:14.149 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:20:14.149 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:20:19.153 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:20:19.153 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:20:19.153 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:20:19.153 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:20:19.153 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:20:19.154 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:20:19.168 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:20:19.170 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:20:19.170 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:20:19.171 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:20:19.171 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:20:19.177 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:20:19.178 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:20:19.178 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:20:19.178 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:20:19.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:20:19.179 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:20:19.180 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:20:19.180 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:20:19.183 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:20:19.183 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:20:19.184 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:20:19.184 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:20:19.184 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:20:19.185 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:20:19.185 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:20:19.185 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:20:19.188 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:20:19.188 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:20:19.189 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:20:19.189 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:20:19.189 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:20:19.189 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:20:19.190 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:20:19.190 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:20:19.195 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:20:19.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:20:19.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:20:19.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:20:19.195 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:20:19.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:20:19.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:20:19.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:20:19.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:20:19.196 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:20:19.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:19.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:19.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:19.196 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:20:19.196 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:20:19.196 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:20:19.196 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:20:19.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:19.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:19.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:19.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:20:19.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:19.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:19.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:19.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:19.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:19.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:19.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:19.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:19.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:19.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:19.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:19.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:19.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:19.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:19.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:19.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:19.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:19.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:19.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:19.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:19.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:19.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:19.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:19.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:19.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:19.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:19.201 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:20:19.680 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:20:19.718 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:20:19.719 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:20:19.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:20:19.721 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:20:19.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:20:19.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:20:19.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:20:19.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:19.776 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:20:19.776 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:20:19.776 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:20:19.776 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:20:19.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:20:19.829 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:20:19.829 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:20:19.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:19.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:20.150 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:20:20.199 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:20:20.200 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:20:20.200 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:20:20.201 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:20:20.623 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:20:21.096 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:20:21.201 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:20:21.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:20:21.202 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:20:21.202 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:20:21.570 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:20:22.043 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:20:22.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:20:22.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:20:22.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:20:22.203 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:20:22.516 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:20:22.989 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:20:23.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:20:23.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:20:23.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:20:23.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:20:23.461 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:20:23.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:20:23.834 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:20:23.834 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:20:23.839 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:20:23.839 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:20:23.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:20:23.839 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:20:23.840 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:20:23.840 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:20:23.840 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:20:23.840 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:20:23.840 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:20:23.840 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:20:23.840 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:20:23.840 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1002 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:23.840 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1002 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:23.840 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1002 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:23.841 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1002 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:23.841 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1002 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:28.849 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:20:28.849 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:20:28.849 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:20:28.849 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:20:28.849 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:20:28.849 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:20:28.856 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:20:28.856 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:20:28.856 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:20:28.856 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:20:28.856 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:20:28.861 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:20:28.861 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:20:28.861 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:20:28.861 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:20:28.861 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:20:28.861 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:20:28.861 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:20:28.861 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:20:28.865 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:20:28.865 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:20:28.865 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:20:28.865 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:20:28.865 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:20:28.865 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:20:28.865 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:20:28.865 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:20:28.869 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:20:28.869 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:20:28.869 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:20:28.869 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:20:28.869 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:20:28.869 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:20:28.869 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:20:28.869 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:20:28.874 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:20:28.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:20:28.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:20:28.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:20:28.874 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:20:28.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:20:28.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:20:28.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:20:28.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:20:28.874 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:20:28.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:28.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:28.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:28.875 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:20:28.875 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:20:28.875 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:20:28.875 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:20:28.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:28.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:28.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:28.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:20:28.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:28.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:28.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:28.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:28.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:28.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:28.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:28.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:28.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:28.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:28.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:28.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:28.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:28.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:28.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:28.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:28.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:28.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:28.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:28.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:28.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:28.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:28.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:28.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:28.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:28.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:28.879 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:20:29.359 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:20:29.395 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:20:29.397 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:20:29.398 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:20:29.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:20:29.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:20:29.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:20:29.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:20:29.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:29.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:20:29.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:20:29.459 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:20:29.459 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:20:29.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:20:29.505 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:20:29.506 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:20:29.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:29.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:29.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:29.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:20:29.745 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:20:29.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:20:29.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:20:29.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:20:29.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:20:29.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:29.779 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:20:29.779 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:20:29.779 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:20:29.779 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:20:29.828 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:20:29.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:20:29.837 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:20:29.838 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:20:29.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:29.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:29.877 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:20:29.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:20:29.878 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:20:29.880 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:20:30.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:30.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:20:30.058 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:20:30.058 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:20:30.069 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:20:30.069 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:20:30.069 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:20:30.070 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:20:30.070 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:20:30.071 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:20:30.071 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:20:30.071 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:20:30.071 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:20:30.071 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:20:30.071 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:20:30.071 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=258 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:30.071 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=258 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:30.071 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=258 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:30.071 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=258 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:30.071 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=259 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:30.071 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=259 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:30.071 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=259 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:30.071 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=259 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:30.071 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=259 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:30.071 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=259 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:30.071 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=259 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:30.071 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=259 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:35.077 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:20:35.077 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:20:35.077 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:20:35.077 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:20:35.077 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:20:35.077 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:20:35.086 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:20:35.087 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:20:35.087 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:20:35.087 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:20:35.087 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:20:35.090 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:20:35.090 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:20:35.090 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:20:35.091 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:20:35.091 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:20:35.091 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:20:35.091 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:20:35.091 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:20:35.094 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:20:35.094 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:20:35.094 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:20:35.094 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:20:35.094 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:20:35.094 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:20:35.095 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:20:35.095 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:20:35.096 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:20:35.097 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:20:35.097 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:20:35.097 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:20:35.097 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:20:35.097 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:20:35.097 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:20:35.097 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:20:35.100 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:20:35.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:20:35.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:20:35.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:20:35.100 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:20:35.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:20:35.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:20:35.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:20:35.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:35.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:20:35.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:35.101 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:20:35.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:35.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:35.101 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:20:35.101 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:20:35.101 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:20:35.101 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:20:35.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:35.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:35.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:35.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:20:35.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:35.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:35.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:35.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:35.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:35.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:35.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:35.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:35.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:35.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:35.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:35.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:35.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:35.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:35.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:35.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:35.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:35.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:35.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:35.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:35.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:35.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:35.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:35.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:35.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:35.105 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:20:35.583 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:20:35.622 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:20:35.622 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:20:35.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:20:35.623 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:20:35.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:20:35.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:20:35.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:20:35.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:35.684 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:20:35.684 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:20:35.684 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:20:35.684 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:20:35.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:20:35.732 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:20:35.732 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:20:35.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:35.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:36.054 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:20:36.104 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:20:36.104 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:20:36.105 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:20:36.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:20:36.527 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:20:36.999 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:20:37.106 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:20:37.106 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:20:37.106 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:20:37.106 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:20:37.473 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:20:37.946 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:20:38.107 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:20:38.107 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:20:38.107 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:20:38.107 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:20:38.418 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:20:38.890 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:20:39.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:20:39.109 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:20:39.109 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:20:39.109 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:20:39.364 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:20:39.738 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:20:39.738 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:20:39.738 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:20:39.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:20:39.742 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:20:39.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:20:39.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:20:39.743 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:20:39.743 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:20:39.743 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:20:39.743 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:20:39.743 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:20:39.743 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:20:39.743 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:20:39.743 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1001 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:39.743 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1001 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:39.743 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1001 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:39.743 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1002 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:39.743 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1002 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:39.743 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1002 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:39.743 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1002 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:39.743 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1002 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:39.743 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1002 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:39.743 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1002 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:39.744 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1002 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:44.751 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:20:44.751 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:20:44.751 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:20:44.751 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:20:44.751 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:20:44.751 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:20:44.759 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:20:44.760 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:20:44.760 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:20:44.761 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:20:44.761 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:20:44.764 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:20:44.764 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:20:44.764 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:20:44.764 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:20:44.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:20:44.765 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:20:44.766 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:20:44.766 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:20:44.769 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:20:44.769 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:20:44.770 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:20:44.770 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:20:44.770 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:20:44.770 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:20:44.771 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:20:44.771 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:20:44.774 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:20:44.774 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:20:44.774 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:20:44.775 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:20:44.775 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:20:44.775 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:20:44.775 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:20:44.776 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:20:44.780 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:20:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:20:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:20:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:20:44.780 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:20:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:20:44.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:20:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:20:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:20:44.780 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:20:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:44.780 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:20:44.780 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:20:44.780 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:20:44.781 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:20:44.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:44.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:44.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:44.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:20:44.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:44.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:44.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:44.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:44.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:44.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:44.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:44.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:44.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:44.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:44.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:44.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:44.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:44.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:44.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:44.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:44.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:44.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:44.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:44.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:44.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:44.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:44.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:44.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:44.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:44.785 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:20:45.263 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:20:45.303 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:20:45.304 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:20:45.304 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:20:45.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:20:45.319 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:20:45.319 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:20:45.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:20:45.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:45.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:20:45.364 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:20:45.364 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:20:45.364 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:20:45.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:20:45.412 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:20:45.413 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:20:45.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:45.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:45.736 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:20:45.784 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:20:45.784 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:20:45.784 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:20:45.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:20:46.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:46.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:20:46.130 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:20:46.130 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:20:46.141 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:20:46.141 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:20:46.142 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:20:46.142 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:20:46.143 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:20:46.143 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:20:46.143 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:20:46.143 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:20:46.143 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:20:46.143 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:20:46.143 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:20:46.143 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=293 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:46.143 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=293 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:46.143 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=293 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:46.143 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=293 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:46.143 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:46.144 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:46.144 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:46.144 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:46.144 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:46.144 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:46.144 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:46.144 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:51.151 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:20:51.151 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:20:51.151 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:20:51.151 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:20:51.151 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:20:51.151 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:20:51.158 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:20:51.160 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:20:51.160 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:20:51.160 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:20:51.160 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:20:51.164 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:20:51.164 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:20:51.164 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:20:51.164 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:20:51.164 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:20:51.164 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:20:51.164 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:20:51.164 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:20:51.167 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:20:51.168 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:20:51.168 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:20:51.168 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:20:51.168 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:20:51.168 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:20:51.168 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:20:51.168 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:20:51.171 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:20:51.171 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:20:51.171 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:20:51.171 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:20:51.171 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:20:51.171 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:20:51.171 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:20:51.171 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:20:51.175 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:20:51.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:20:51.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:20:51.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:20:51.175 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:20:51.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:20:51.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:20:51.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:20:51.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:20:51.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:51.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:51.176 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:20:51.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:51.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:51.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:51.176 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:20:51.176 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:20:51.176 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:20:51.176 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:20:51.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:51.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:51.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:51.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:20:51.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:51.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:51.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:51.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:51.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:51.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:51.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:51.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:51.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:51.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:51.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:51.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:51.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:51.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:51.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:51.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:51.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:51.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:51.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:51.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:51.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:51.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:51.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:51.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:51.181 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:20:51.659 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:20:51.703 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:20:51.705 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:20:51.707 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:20:51.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:20:51.731 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:20:51.731 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:20:51.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:20:51.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:51.771 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:20:51.771 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:20:51.771 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:20:51.771 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:20:51.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:20:51.805 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:20:51.805 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:20:51.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:51.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:52.129 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:20:52.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:20:52.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:20:52.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:20:52.180 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:20:52.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:52.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:20:52.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:20:52.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:20:52.533 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:20:52.533 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:20:52.533 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:20:52.533 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:20:52.534 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:20:52.534 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:20:52.534 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:20:52.534 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:20:52.534 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:20:52.534 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:20:52.534 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:20:57.541 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:20:57.541 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:20:57.541 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:20:57.541 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:20:57.541 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:20:57.541 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:20:57.550 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:20:57.551 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:20:57.551 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:20:57.551 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:20:57.551 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:20:57.555 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:20:57.555 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:20:57.556 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:20:57.556 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:20:57.556 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:20:57.556 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:20:57.556 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:20:57.556 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:20:57.560 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:20:57.560 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:20:57.560 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:20:57.560 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:20:57.561 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:20:57.561 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:20:57.561 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:20:57.561 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:20:57.564 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:20:57.564 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:20:57.565 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:20:57.565 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:20:57.565 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:20:57.565 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:20:57.565 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:20:57.565 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:20:57.569 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:20:57.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:20:57.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:20:57.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:20:57.569 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:20:57.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:20:57.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:20:57.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:20:57.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:20:57.570 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:20:57.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:57.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:57.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:57.570 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:20:57.570 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:20:57.570 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:20:57.570 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:20:57.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:57.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:57.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:57.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:20:57.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:57.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:57.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:57.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:57.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:57.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:57.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:57.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:57.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:57.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:57.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:57.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:57.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:57.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:57.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:57.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:57.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:57.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:57.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:57.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:57.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:20:57.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:57.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:57.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:20:57.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:20:57.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:20:57.575 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:20:58.052 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:20:58.098 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:20:58.100 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:20:58.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:20:58.102 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:20:58.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:20:58.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:20:58.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:20:58.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:58.155 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:20:58.155 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:20:58.155 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:20:58.155 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:20:58.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:20:58.202 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:20:58.202 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:20:58.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:58.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:58.525 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:20:58.574 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:20:58.574 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:20:58.574 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:20:58.575 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:20:58.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:20:58.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:20:58.918 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:20:58.918 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:20:58.931 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:20:58.931 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:20:58.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:20:58.931 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:20:58.932 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:20:58.932 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:20:58.932 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:20:58.932 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:20:58.932 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:20:58.932 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:20:58.932 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:20:58.932 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:58.932 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:20:58.932 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:03.939 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:21:03.939 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:21:03.939 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:21:03.939 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:21:03.939 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:21:03.939 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:21:03.947 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:21:03.947 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:21:03.947 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:21:03.948 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:21:03.948 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:21:03.951 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:21:03.951 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:21:03.951 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:21:03.951 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:21:03.951 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:21:03.951 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:21:03.952 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:21:03.952 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:21:03.955 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:21:03.955 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:21:03.956 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:21:03.956 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:21:03.956 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:21:03.956 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:21:03.957 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:21:03.957 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:21:03.959 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:21:03.960 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:21:03.960 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:21:03.960 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:21:03.960 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:21:03.960 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:21:03.960 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:21:03.960 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:21:03.965 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:21:03.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:21:03.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:21:03.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:21:03.965 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:21:03.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:21:03.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:21:03.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:21:03.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:21:03.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:03.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:03.966 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:21:03.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:03.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:03.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:03.966 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:21:03.966 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:21:03.966 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:21:03.966 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:21:03.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:03.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:03.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:03.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:21:03.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:03.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:03.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:03.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:03.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:03.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:03.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:03.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:03.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:03.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:03.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:03.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:03.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:03.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:03.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:03.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:03.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:03.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:03.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:03.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:03.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:03.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:03.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:03.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:03.971 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:21:04.449 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:21:04.489 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:21:04.491 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:21:04.493 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:21:04.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:21:04.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:21:04.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:21:04.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:21:04.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:21:04.550 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:21:04.550 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:21:04.550 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:21:04.550 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:21:04.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:21:04.596 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:21:04.596 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:21:04.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:21:04.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:21:04.919 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:21:04.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:21:04.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:21:04.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:21:04.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:21:05.393 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:21:05.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:21:05.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:21:05.451 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:21:05.451 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:21:05.451 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:21:05.462 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:21:05.462 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:21:05.463 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:21:05.463 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:21:05.468 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:21:05.469 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:21:05.469 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:21:05.469 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:21:05.469 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:21:05.469 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:21:05.469 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:21:05.470 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=324 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:05.470 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=324 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:05.470 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=324 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:05.470 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=324 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:05.470 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=324 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:05.470 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=324 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:10.470 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:21:10.470 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:21:10.470 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:21:10.470 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:21:10.470 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:21:10.470 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:21:10.480 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:21:10.480 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:21:10.481 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:21:10.481 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:21:10.481 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:21:10.482 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:21:10.483 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:21:10.483 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:21:10.483 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:21:10.483 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:21:10.483 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:21:10.483 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:21:10.483 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:21:10.485 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:21:10.485 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:21:10.485 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:21:10.485 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:21:10.485 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:21:10.485 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:21:10.485 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:21:10.485 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:21:10.486 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:21:10.487 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:21:10.487 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:21:10.487 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:21:10.487 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:21:10.487 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:21:10.487 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:21:10.487 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:21:10.489 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:21:10.490 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:21:10.490 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:21:10.490 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:10.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:10.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:10.495 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:21:10.972 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:21:11.011 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:21:11.012 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:21:11.014 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:21:11.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:21:11.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:21:11.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:21:11.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:21:11.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:21:11.069 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:21:11.070 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:21:11.070 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:21:11.070 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:21:11.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:21:11.118 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:21:11.118 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:21:11.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:21:11.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:21:11.441 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:21:11.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:21:11.494 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:21:11.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:21:11.494 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:21:11.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:21:11.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:21:11.834 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:21:11.834 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:21:11.845 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:21:11.845 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:21:11.846 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:21:11.846 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:21:11.851 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:21:11.852 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:21:11.852 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:21:11.852 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:21:11.852 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:21:11.852 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:21:11.852 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:21:11.852 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=293 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:11.853 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=293 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:11.853 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=293 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:11.853 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=293 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:11.853 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=293 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:11.853 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:11.853 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:11.853 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:11.853 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:11.853 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:11.853 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:11.853 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:11.854 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:11.854 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=295 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:11.854 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=295 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:11.854 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=295 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:11.854 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=295 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:11.854 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=295 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:11.854 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=295 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:11.854 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=295 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:11.854 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=295 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:16.853 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:21:16.853 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:21:16.853 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:21:16.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:21:16.853 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:21:16.853 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:21:16.861 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:21:16.862 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:21:16.862 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:21:16.862 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:21:16.862 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:21:16.866 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:21:16.866 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:21:16.866 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:21:16.866 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:21:16.866 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:21:16.867 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:21:16.867 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:21:16.867 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:21:16.871 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:21:16.871 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:21:16.871 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:21:16.871 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:21:16.871 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:21:16.872 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:21:16.872 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:21:16.872 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:21:16.875 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:21:16.875 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:21:16.875 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:21:16.876 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:21:16.876 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:21:16.876 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:21:16.876 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:21:16.876 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:21:16.881 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:21:16.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:21:16.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:21:16.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:21:16.881 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:21:16.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:21:16.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:21:16.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:16.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:21:16.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:21:16.882 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:21:16.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:16.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:16.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:16.882 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:21:16.882 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:21:16.882 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:21:16.882 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:21:16.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:16.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:16.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:16.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:21:16.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:16.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:16.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:16.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:16.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:16.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:16.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:16.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:16.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:16.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:16.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:16.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:16.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:16.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:16.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:16.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:16.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:16.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:16.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:16.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:16.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:16.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:16.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:16.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:16.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:16.887 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:21:17.366 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:21:17.404 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:21:17.405 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:21:17.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:21:17.406 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:21:17.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:21:17.418 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:21:17.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:21:17.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:21:17.464 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:21:17.464 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:21:17.464 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:21:17.465 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:21:17.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:21:17.515 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:21:17.515 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:21:17.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:21:17.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:21:17.838 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:21:17.886 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:21:17.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:21:17.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:21:17.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:21:18.312 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:21:18.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:21:18.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:21:18.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:21:18.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:21:18.361 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:21:18.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:21:18.372 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:21:18.372 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:21:18.372 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:21:18.374 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:21:18.374 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:21:18.374 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:21:18.374 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:21:18.374 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:21:18.374 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:21:18.374 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:21:18.374 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=322 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:18.374 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=322 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:18.374 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=322 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:18.374 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=322 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:18.374 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=322 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:18.374 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=322 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:23.379 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:21:23.379 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:21:23.379 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:21:23.379 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:21:23.379 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:21:23.379 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:21:23.385 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:21:23.386 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:21:23.386 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:21:23.387 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:21:23.387 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:21:23.389 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:21:23.389 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:21:23.390 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:21:23.390 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:21:23.390 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:21:23.391 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:21:23.391 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:21:23.391 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:21:23.394 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:21:23.394 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:21:23.395 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:21:23.395 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:21:23.395 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:21:23.396 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:21:23.396 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:21:23.396 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:21:23.399 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:21:23.399 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:21:23.399 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:21:23.400 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:21:23.400 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:21:23.400 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:21:23.400 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:21:23.400 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:21:23.405 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:21:23.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:21:23.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:21:23.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:21:23.405 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:21:23.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:21:23.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:21:23.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:21:23.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:21:23.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:23.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:23.406 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:21:23.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:23.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:23.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:23.406 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:21:23.406 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:21:23.406 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:21:23.406 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:21:23.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:23.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:23.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:23.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:21:23.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:23.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:23.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:23.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:23.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:23.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:23.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:23.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:23.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:23.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:23.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:23.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:23.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:23.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:23.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:23.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:23.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:23.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:23.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:23.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:23.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:23.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:23.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:23.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:23.411 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:21:23.890 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:21:23.932 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:21:23.934 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:21:23.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:21:23.935 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:21:23.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:21:23.948 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:21:23.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:21:23.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:21:23.952 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:21:23.952 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:21:23.952 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:21:23.952 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:21:24.361 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:21:24.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:21:24.411 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:21:24.411 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:21:24.411 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:21:24.833 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:21:24.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:21:25.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:21:25.108 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:21:25.108 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:21:25.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:21:25.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:21:25.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:21:25.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:21:25.127 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:21:25.127 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:21:25.127 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:21:25.127 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:21:25.306 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:21:25.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:21:25.411 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:21:25.411 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:21:25.411 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:21:25.779 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:21:26.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD NOHANDOVER
2026-02-08 05:21:26.251 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:21:26.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD NOHANDOVER
2026-02-08 05:21:26.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:21:26.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:21:26.303 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:21:26.303 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:21:26.303 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:21:26.303 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:21:26.307 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:21:26.307 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:21:26.307 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:21:26.307 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:21:26.307 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:21:26.307 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:21:26.307 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:21:26.307 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=626 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:26.307 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=626 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:26.307 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=626 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:26.307 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=626 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:26.307 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=626 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:26.307 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=626 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:31.310 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:21:31.310 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:21:31.310 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:21:31.310 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:21:31.310 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:21:31.310 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:21:31.319 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:21:31.320 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:21:31.321 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:21:31.321 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:21:31.321 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:21:31.324 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:21:31.324 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:21:31.324 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:21:31.324 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:21:31.325 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:21:31.325 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:21:31.325 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:21:31.325 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:21:31.327 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:21:31.327 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:21:31.327 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:21:31.327 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:21:31.327 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:21:31.327 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:21:31.327 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:21:31.327 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:21:31.329 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:21:31.329 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:21:31.329 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:21:31.329 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:21:31.329 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:21:31.329 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:21:31.329 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:21:31.329 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:21:31.332 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:21:31.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:21:31.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:21:31.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:21:31.332 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:21:31.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:21:31.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:21:31.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:21:31.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:21:31.332 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:21:31.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:31.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:31.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:31.332 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:21:31.332 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:21:31.333 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:21:31.333 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:21:31.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:31.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:31.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:31.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:21:31.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:31.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:31.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:31.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:31.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:31.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:31.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:31.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:31.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:31.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:31.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:31.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:31.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:31.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:31.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:31.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:31.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:31.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:31.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:31.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:31.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:31.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:31.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:31.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:31.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:31.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:31.337 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:21:31.815 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:21:31.856 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:21:31.858 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:21:31.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:21:31.859 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:21:31.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:21:31.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:21:31.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:21:31.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:21:31.893 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:21:31.893 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:21:31.894 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:21:31.894 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:21:32.286 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:21:32.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:21:32.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:21:32.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:21:32.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:21:32.758 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:21:33.232 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:21:33.338 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:21:33.338 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:21:33.338 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:21:33.338 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:21:33.704 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:21:34.176 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:21:34.340 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:21:34.340 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:21:34.340 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:21:34.340 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:21:34.647 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:21:35.119 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:21:35.341 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:21:35.341 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:21:35.341 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:21:35.341 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:21:35.590 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:21:36.061 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:21:36.341 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:21:36.342 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:21:36.342 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:21:36.342 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:21:36.535 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:21:36.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD NOHANDOVER
2026-02-08 05:21:36.794 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:21:36.794 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:21:36.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:21:36.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:21:37.007 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:21:37.480 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:21:37.954 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:21:38.426 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:21:38.894 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:21:39.358 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:21:39.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:21:39.763 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:21:39.763 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:21:39.763 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:21:39.764 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:21:39.764 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=1824 tn=0 bl=148 rssi=-128 toa256=0') due to error: RSSI -128 is out of range
2026-02-08 05:21:39.764 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:21:39.764 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:21:39.764 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:21:39.764 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:21:39.764 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:21:39.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:21:39.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:21:39.764 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:21:39.764 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1824 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:39.764 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1824 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:39.764 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1824 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:39.764 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1824 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:39.764 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1824 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:39.764 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1824 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:39.764 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1824 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:39.764 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1824 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:44.771 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:21:44.771 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:21:44.771 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:21:44.771 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:21:44.771 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:21:44.771 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:21:44.781 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:21:44.783 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:21:44.783 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:21:44.783 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:21:44.784 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:21:44.789 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:21:44.790 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:21:44.790 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:21:44.790 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:21:44.790 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:21:44.791 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:21:44.791 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:21:44.791 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:21:44.795 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:21:44.795 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:21:44.795 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:21:44.795 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:21:44.795 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:21:44.796 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:21:44.796 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:21:44.796 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:21:44.800 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:21:44.800 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:21:44.800 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:21:44.800 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:21:44.801 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:21:44.801 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:21:44.801 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:21:44.801 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:21:44.805 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:21:44.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:21:44.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:21:44.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:21:44.806 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:21:44.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:21:44.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:21:44.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:21:44.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:44.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:21:44.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:44.806 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:21:44.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:44.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:44.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:44.806 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:21:44.806 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:21:44.806 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:21:44.806 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:21:44.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:44.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:44.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:44.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:21:44.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:44.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:44.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:44.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:44.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:44.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:44.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:44.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:44.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:44.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:44.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:44.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:44.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:44.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:44.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:44.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:44.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:44.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:44.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:44.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:44.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:44.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:44.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:44.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:44.811 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:21:45.288 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:21:45.338 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:21:45.339 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:21:45.340 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:21:45.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:21:45.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:21:45.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:21:45.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:21:45.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:21:45.366 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:21:45.366 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:21:45.366 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:21:45.366 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:21:45.760 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:21:45.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:21:45.811 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:21:45.812 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:21:45.813 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:21:46.231 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:21:46.705 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:21:46.812 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:21:46.812 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:21:46.812 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:21:46.815 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:21:47.177 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:21:47.649 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:21:47.812 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:21:47.813 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:21:47.813 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:21:47.815 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:21:48.120 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:21:48.591 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:21:48.814 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:21:48.814 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:21:48.814 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:21:48.816 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:21:49.065 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:21:49.537 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:21:49.815 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:21:49.816 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:21:49.816 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:21:49.817 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:21:50.009 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:21:50.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD NOHANDOVER
2026-02-08 05:21:50.270 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:21:50.271 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:21:50.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:21:50.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:21:50.481 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:21:50.955 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:21:51.427 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:21:51.900 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:21:52.373 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:21:52.838 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:21:53.235 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:21:53.235 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:21:53.239 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:21:53.239 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:21:53.239 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:21:53.239 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:21:53.240 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:21:53.241 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:21:53.241 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:21:53.241 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:21:53.241 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:21:53.241 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:21:53.241 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:21:53.241 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1823 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:53.241 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1823 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:53.241 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1823 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:53.241 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1823 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:21:58.247 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:21:58.247 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:21:58.247 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:21:58.247 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:21:58.247 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:21:58.247 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:21:58.254 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:21:58.255 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:21:58.255 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:21:58.255 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:21:58.255 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:21:58.258 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:21:58.258 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:21:58.258 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:21:58.258 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:21:58.258 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:21:58.258 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:21:58.258 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:21:58.258 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:21:58.260 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:21:58.260 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:21:58.260 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:21:58.260 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:21:58.260 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:21:58.260 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:21:58.260 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:21:58.260 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:21:58.261 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:21:58.262 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:21:58.262 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:21:58.262 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:21:58.262 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:21:58.262 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:21:58.262 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:21:58.262 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:21:58.264 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:21:58.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:21:58.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:21:58.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:21:58.264 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:21:58.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:21:58.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:21:58.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:21:58.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:21:58.264 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:21:58.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:58.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:58.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:58.264 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:21:58.264 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:21:58.264 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:21:58.265 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:21:58.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:58.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:58.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:58.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:21:58.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:58.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:58.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:58.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:58.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:58.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:58.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:58.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:58.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:58.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:58.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:58.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:58.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:58.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:58.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:58.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:58.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:58.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:58.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:58.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:21:58.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:58.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:58.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:58.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:21:58.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:21:58.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:21:58.269 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:21:58.747 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:21:58.789 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:21:58.792 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:21:58.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:21:58.794 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:21:58.821 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:21:58.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:21:58.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:21:58.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:21:58.826 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:21:58.826 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:21:58.827 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:21:58.827 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:21:59.220 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:21:59.267 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:21:59.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:21:59.268 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:21:59.268 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:21:59.691 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:22:00.164 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:22:00.267 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:22:00.268 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:22:00.268 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:22:00.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:22:00.637 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:22:01.108 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:22:01.268 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:22:01.269 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:22:01.270 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:22:01.270 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:22:01.580 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:22:02.053 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:22:02.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:22:02.270 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:22:02.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:22:02.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:22:02.526 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:22:02.998 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:22:03.272 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:22:03.272 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:22:03.272 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:22:03.272 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:22:03.469 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:22:03.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD NOHANDOVER
2026-02-08 05:22:03.730 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:22:03.730 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:22:03.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:22:03.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:22:03.941 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:22:04.414 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:22:04.888 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:22:05.359 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:22:05.830 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:22:06.304 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:22:06.695 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:22:06.695 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:22:06.699 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:22:06.699 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:22:06.699 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:22:06.699 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:22:06.700 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:22:06.700 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:22:06.700 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:22:06.700 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:22:06.700 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:22:06.700 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:22:06.700 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:22:06.700 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1821 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:22:06.700 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1821 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:22:06.700 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1821 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:22:06.700 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1821 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:22:06.700 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1821 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:22:11.707 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:22:11.707 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:22:11.707 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:22:11.707 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:22:11.707 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:22:11.707 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:22:11.715 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:22:11.716 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:22:11.716 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:22:11.716 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:22:11.717 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:22:11.719 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:22:11.719 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:22:11.719 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:22:11.719 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:22:11.720 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:22:11.720 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:22:11.720 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:22:11.720 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:22:11.722 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:22:11.722 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:22:11.722 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:22:11.723 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:22:11.723 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:22:11.723 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:22:11.723 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:22:11.723 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:22:11.725 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:22:11.725 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:22:11.725 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:22:11.725 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:22:11.725 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:22:11.725 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:22:11.725 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:22:11.725 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:22:11.728 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:22:11.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:22:11.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:22:11.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:22:11.728 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:22:11.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:22:11.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:22:11.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:22:11.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:22:11.728 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:22:11.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:11.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:11.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:11.729 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:22:11.729 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:22:11.729 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:22:11.729 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:22:11.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:11.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:11.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:11.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:22:11.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:11.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:11.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:11.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:11.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:11.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:11.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:11.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:11.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:11.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:11.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:11.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:11.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:11.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:11.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:11.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:11.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:11.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:11.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:11.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:11.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:11.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:11.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:11.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:11.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:11.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:11.733 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:22:12.211 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:22:12.256 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:22:12.258 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:22:12.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:22:12.260 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:22:12.283 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:22:12.283 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:22:12.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:22:12.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:22:12.286 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:22:12.286 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:22:12.286 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:22:12.286 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:22:12.684 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:22:12.732 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:22:12.732 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:22:12.732 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:22:12.732 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:22:13.155 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:22:13.626 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:22:13.733 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:22:13.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:22:13.734 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:22:13.734 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:22:14.099 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:22:14.572 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:22:14.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:22:14.735 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:22:14.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:22:14.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:22:15.044 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:22:15.517 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:22:15.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:22:15.736 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:22:15.736 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:22:15.736 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:22:15.990 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:22:16.462 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:22:16.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:22:16.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:22:16.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:22:16.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:22:16.933 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:22:17.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD NOHANDOVER
2026-02-08 05:22:17.194 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:22:17.194 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:22:17.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:22:17.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:22:17.406 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:22:17.879 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:22:18.351 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:22:18.824 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:22:19.297 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:22:19.771 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:22:20.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:22:20.158 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:22:20.163 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:22:20.163 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:22:20.163 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:22:20.163 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:22:20.164 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:22:20.164 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:22:20.164 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:22:20.164 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:22:20.164 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:22:20.164 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:22:20.164 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:22:20.164 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1821 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:22:20.164 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1821 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:22:20.164 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1821 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:22:20.164 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1821 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:22:20.164 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1821 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:22:25.171 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:22:25.171 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:22:25.171 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:22:25.171 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:22:25.171 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:22:25.171 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:22:25.180 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:22:25.182 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:22:25.183 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:22:25.183 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:22:25.183 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:22:25.188 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:22:25.189 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:22:25.189 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:22:25.189 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:22:25.189 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:22:25.189 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:22:25.189 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:22:25.189 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:22:25.193 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:22:25.194 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:22:25.194 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:22:25.194 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:22:25.194 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:22:25.194 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:22:25.194 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:22:25.194 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:22:25.198 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:22:25.198 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:22:25.198 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:22:25.198 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:22:25.199 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:22:25.199 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:22:25.199 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:22:25.199 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:22:25.204 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:22:25.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:22:25.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:22:25.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:22:25.204 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:22:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:22:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:22:25.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:22:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:22:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:25.205 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:22:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:25.205 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:22:25.205 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:22:25.205 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:22:25.205 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:22:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:25.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:22:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:25.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:25.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:25.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:25.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:25.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:25.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:25.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:25.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:25.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:25.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:25.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:25.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:25.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:25.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:25.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:25.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:25.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:25.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:25.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:25.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:25.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:25.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:25.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:25.210 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:22:25.686 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:22:25.721 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:22:25.722 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:22:25.723 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:22:25.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:22:25.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:22:25.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:22:25.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:22:25.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:22:25.742 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:22:25.743 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:22:25.743 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:22:25.743 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:22:26.159 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:22:26.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:22:26.210 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:22:26.210 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:22:26.210 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:22:26.630 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:22:27.103 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:22:27.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:22:27.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:22:27.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:22:27.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:22:27.576 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:22:28.047 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:22:28.212 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:22:28.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:22:28.212 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:22:28.212 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:22:28.519 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:22:28.989 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:22:29.214 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:22:29.214 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:22:29.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:22:29.214 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:22:29.463 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:22:29.935 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:22:30.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:22:30.216 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:22:30.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:22:30.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:22:30.407 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:22:30.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD NOHANDOVER
2026-02-08 05:22:30.670 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:22:30.670 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:22:30.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:22:30.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:22:30.879 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:22:31.353 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:22:31.827 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:22:32.300 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:22:32.772 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:22:33.246 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:22:33.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:22:33.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:22:33.640 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:22:33.640 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:22:33.640 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:22:33.640 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:22:33.641 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:22:33.641 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:22:33.641 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:22:33.641 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:22:33.641 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:22:33.641 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:22:33.641 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:22:33.641 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1822 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:22:38.649 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:22:38.649 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:22:38.649 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:22:38.649 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:22:38.649 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:22:38.649 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:22:38.658 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:22:38.659 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:22:38.660 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:22:38.660 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:22:38.660 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:22:38.664 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:22:38.664 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:22:38.665 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:22:38.665 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:22:38.665 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:22:38.665 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:22:38.666 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:22:38.666 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:22:38.668 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:22:38.668 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:22:38.669 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:22:38.669 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:22:38.669 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:22:38.669 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:22:38.669 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:22:38.669 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:22:38.672 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:22:38.672 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:22:38.672 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:22:38.672 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:22:38.672 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:22:38.672 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:22:38.672 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:22:38.672 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:22:38.677 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:22:38.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:22:38.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:22:38.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:22:38.677 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:22:38.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:22:38.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:22:38.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:22:38.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:22:38.678 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:22:38.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:38.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:38.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:38.678 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:22:38.678 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:22:38.678 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:22:38.678 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:22:38.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:38.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:38.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:38.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:22:38.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:38.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:38.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:38.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:38.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:38.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:38.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:38.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:38.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:38.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:38.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:38.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:38.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:38.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:38.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:38.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:38.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:38.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:38.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:38.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:38.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:38.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:38.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:38.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:38.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:38.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:38.682 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:22:39.160 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:22:39.209 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:22:39.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:22:39.212 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:22:39.216 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:22:39.627 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:22:39.682 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:22:39.682 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:22:39.683 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:22:39.683 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:22:40.099 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:22:40.572 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:22:40.684 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:22:40.684 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:22:40.684 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:22:40.684 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:22:41.045 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:22:41.517 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:22:41.685 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:22:41.686 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:22:41.686 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:22:41.686 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:22:41.986 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:22:42.458 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:22:42.687 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:22:42.687 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:22:42.687 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:22:42.688 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:22:42.930 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:22:43.404 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:22:43.689 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:22:43.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:22:43.689 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:22:43.689 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:22:43.876 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:22:44.348 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:22:44.819 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:22:45.293 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:22:45.765 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:22:46.232 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:22:46.695 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:22:47.158 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:22:47.622 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:22:48.093 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:22:48.567 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:22:49.038 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:22:49.228 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:22:49.228 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:22:49.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:22:49.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:22:49.229 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:22:49.229 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:22:49.229 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:22:49.229 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:22:49.229 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:22:49.229 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:22:49.229 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:22:54.236 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:22:54.236 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:22:54.236 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:22:54.236 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:22:54.236 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:22:54.236 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:22:54.246 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:22:54.248 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:22:54.248 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:22:54.248 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:22:54.248 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:22:54.252 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:22:54.252 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:22:54.252 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:22:54.252 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:22:54.253 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:22:54.253 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:22:54.253 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:22:54.254 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:22:54.256 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:22:54.256 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:22:54.256 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:22:54.256 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:22:54.257 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:22:54.257 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:22:54.257 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:22:54.257 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:22:54.259 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:22:54.259 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:22:54.259 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:22:54.259 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:22:54.259 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:22:54.259 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:22:54.259 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:22:54.259 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:22:54.263 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:22:54.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:22:54.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:22:54.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:22:54.263 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:22:54.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:22:54.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:22:54.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:22:54.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:22:54.263 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:22:54.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:54.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:54.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:54.263 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:22:54.263 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:22:54.263 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:22:54.263 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:22:54.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:54.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:54.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:54.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:22:54.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:54.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:54.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:54.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:54.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:54.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:54.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:54.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:54.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:54.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:54.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:54.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:54.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:54.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:54.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:54.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:54.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:54.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:54.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:54.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:54.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:54.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:54.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:54.265 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:22:54.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:54.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:54.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:54.265 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:22:54.265 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:22:54.265 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:22:54.265 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:22:54.265 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:22:54.265 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:22:59.274 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:22:59.274 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:22:59.274 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:22:59.274 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:22:59.274 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:22:59.274 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:22:59.285 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:22:59.287 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:22:59.287 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:22:59.288 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:22:59.288 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:22:59.294 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:22:59.294 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:22:59.295 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:22:59.295 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:22:59.295 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:22:59.296 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:22:59.296 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:22:59.296 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:22:59.299 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:22:59.300 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:22:59.300 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:22:59.300 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:22:59.301 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:22:59.301 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:22:59.301 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:22:59.301 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:22:59.304 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:22:59.305 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:22:59.305 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:22:59.305 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:22:59.305 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:22:59.306 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:22:59.306 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:22:59.306 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:22:59.310 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:22:59.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:22:59.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:22:59.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:22:59.310 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:22:59.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:22:59.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:22:59.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:22:59.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:59.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:22:59.311 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:22:59.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:59.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:59.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:59.311 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:22:59.311 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:22:59.311 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:22:59.311 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:22:59.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:59.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:59.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:59.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:22:59.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:59.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:59.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:59.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:59.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:59.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:59.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:59.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:59.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:59.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:59.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:59.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:59.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:59.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:59.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:59.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:22:59.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:59.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:59.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:59.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:59.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:59.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:22:59.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:59.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:22:59.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:22:59.316 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:22:59.794 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:22:59.839 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:22:59.842 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:22:59.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:22:59.844 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:22:59.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:22:59.847 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:22:59.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:22:59.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:22:59.847 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:22:59.848 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:22:59.848 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:22:59.848 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:23:00.266 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:23:00.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:23:00.314 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:23:00.315 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:23:00.317 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:23:00.737 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:23:01.211 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:23:01.316 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:23:01.316 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:23:01.316 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:23:01.318 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:23:01.683 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:23:02.155 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:23:02.317 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:23:02.317 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:23:02.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:23:02.319 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:23:02.627 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:23:03.100 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:23:03.318 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:23:03.318 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:23:03.319 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:23:03.320 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:23:03.572 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:23:04.045 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:23:04.319 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:23:04.319 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:23:04.319 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:23:04.320 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:23:04.516 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:23:04.989 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:23:05.461 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:23:05.933 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:23:06.404 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:23:06.878 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:23:07.351 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:23:07.823 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:23:07.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:23:07.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:23:07.897 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:23:07.897 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:23:07.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:23:07.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:23:07.898 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:23:07.898 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:23:07.898 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:23:07.898 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:23:07.898 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:23:07.898 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:23:07.898 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:23:07.899 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:23:07.899 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:23:12.906 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:23:12.906 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:23:12.907 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:23:12.907 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:23:12.907 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:23:12.907 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:23:12.915 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:23:12.916 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:23:12.917 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:23:12.917 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:23:12.917 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:23:12.921 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:23:12.921 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:23:12.921 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:23:12.921 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:23:12.922 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:23:12.922 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:23:12.923 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:23:12.923 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:23:12.926 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:23:12.926 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:23:12.926 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:23:12.926 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:23:12.926 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:23:12.926 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:23:12.927 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:23:12.927 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:23:12.930 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:23:12.930 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:23:12.931 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:23:12.931 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:23:12.931 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:23:12.931 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:23:12.932 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:23:12.932 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:23:12.936 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:23:12.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:23:12.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:23:12.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:23:12.937 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:23:12.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:23:12.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:23:12.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:12.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:23:12.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:23:12.937 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:23:12.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:12.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:12.938 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:23:12.938 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:23:12.938 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:23:12.938 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:23:12.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:12.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:12.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:12.940 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:23:12.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:12.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:12.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:12.940 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:23:12.940 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:23:12.940 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:23:12.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:12.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:12.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:17.961 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:23:17.961 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:23:17.961 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:23:17.962 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:23:17.962 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:23:17.962 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:23:17.972 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:23:17.973 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:23:17.973 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:23:17.973 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:23:17.973 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:23:17.977 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:23:17.977 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:23:17.977 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:23:17.978 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:23:17.978 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:23:17.978 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:23:17.979 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:23:17.979 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:23:17.982 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:23:17.982 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:23:17.982 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:23:17.983 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:23:17.983 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:23:17.983 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:23:17.983 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:23:17.984 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:23:17.986 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:23:17.987 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:23:17.987 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:23:17.987 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:23:17.987 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:23:17.988 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:23:17.988 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:23:17.988 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:23:17.993 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:23:17.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:23:17.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:23:17.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:23:17.993 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:23:17.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:23:17.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:23:17.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:17.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:23:17.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:23:17.994 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:23:17.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:17.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:17.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:17.994 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:23:17.994 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:23:17.994 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:23:17.994 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:23:17.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:17.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:17.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:17.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:23:17.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:17.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:17.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:17.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:17.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:17.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:17.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:17.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:17.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:17.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:17.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:17.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:17.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:17.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:17.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:17.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:17.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:17.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:17.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:17.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:17.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:17.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:17.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:17.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:17.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:17.999 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:23:18.477 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:23:18.523 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:23:18.525 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:23:18.527 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:23:18.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:23:18.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:23:18.529 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:23:18.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:23:18.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:23:18.529 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:23:18.529 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:23:18.529 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:23:18.529 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:23:18.950 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:23:18.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:23:18.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:23:18.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:23:19.000 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:23:19.421 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:23:19.894 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:23:19.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:23:19.999 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:23:19.999 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:23:20.001 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:23:20.367 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:23:20.839 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:23:21.000 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:23:21.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:23:21.000 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:23:21.002 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:23:21.310 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:23:21.783 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:23:22.001 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:23:22.002 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:23:22.002 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:23:22.003 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:23:22.256 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:23:22.728 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:23:23.003 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:23:23.003 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:23:23.003 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:23:23.003 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:23:23.201 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:23:23.674 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:23:24.146 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:23:24.619 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:23:25.092 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:23:25.564 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:23:26.038 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:23:26.510 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:23:26.571 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:23:26.571 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:23:26.576 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:23:26.576 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:23:26.576 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:23:26.576 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:23:26.577 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:23:26.577 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:23:26.577 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:23:26.577 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:23:26.577 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:23:26.577 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:23:26.577 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:23:26.577 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1852 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:23:26.577 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1852 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:23:26.577 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1852 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:23:26.577 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1852 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:23:31.584 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:23:31.584 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:23:31.584 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:23:31.584 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:23:31.584 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:23:31.584 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:23:31.593 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:23:31.595 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:23:31.595 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:23:31.595 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:23:31.596 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:23:31.599 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:23:31.599 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:23:31.600 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:23:31.600 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:23:31.600 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:23:31.600 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:23:31.601 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:23:31.601 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:23:31.603 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:23:31.603 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:23:31.603 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:23:31.604 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:23:31.604 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:23:31.604 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:23:31.604 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:23:31.604 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:23:31.606 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:23:31.606 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:23:31.607 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:23:31.607 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:23:31.607 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:23:31.607 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:23:31.607 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:23:31.607 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:23:31.610 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:23:31.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:23:31.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:23:31.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:23:31.611 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:23:31.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:23:31.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:23:31.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:23:31.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:31.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:23:31.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:31.611 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:23:31.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:31.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:31.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:31.611 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:23:31.611 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:23:31.611 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:23:31.611 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:23:31.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:31.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:31.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:31.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:23:31.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:31.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:31.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:31.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:31.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:31.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:31.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:31.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:31.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:31.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:31.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:31.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:31.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:31.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:31.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:31.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:31.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:31.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:31.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:31.613 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:23:31.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:31.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:31.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:31.613 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:23:31.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:31.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:31.613 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:23:31.613 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:23:31.613 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:23:31.613 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:23:31.613 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:23:36.621 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:23:36.621 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:23:36.621 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:23:36.621 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:23:36.621 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:23:36.621 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:23:36.629 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:23:36.631 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:23:36.631 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:23:36.631 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:23:36.632 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:23:36.636 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:23:36.636 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:23:36.637 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:23:36.637 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:23:36.637 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:23:36.637 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:23:36.638 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:23:36.638 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:23:36.640 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:23:36.641 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:23:36.641 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:23:36.641 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:23:36.641 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:23:36.641 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:23:36.642 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:23:36.642 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:23:36.644 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:23:36.644 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:23:36.644 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:23:36.645 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:23:36.645 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:23:36.645 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:23:36.645 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:23:36.645 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:23:36.649 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:23:36.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:23:36.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:23:36.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:23:36.649 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:23:36.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:23:36.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:23:36.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:23:36.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:23:36.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:36.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:36.649 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:23:36.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:36.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:36.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:36.649 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:23:36.649 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:23:36.649 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:23:36.649 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:23:36.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:36.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:36.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:36.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:23:36.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:36.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:36.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:36.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:36.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:36.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:36.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:36.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:36.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:36.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:36.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:36.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:36.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:36.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:36.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:36.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:36.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:36.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:36.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:36.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:36.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:36.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:36.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:36.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:36.654 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:23:37.133 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:23:37.174 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:23:37.177 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:23:37.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:23:37.179 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:23:37.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:23:37.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:23:37.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:23:37.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:23:37.183 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:23:37.183 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:23:37.183 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:23:37.183 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:23:37.605 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:23:37.653 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:23:37.654 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:23:37.654 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:23:37.654 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:23:38.076 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:23:38.550 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:23:38.655 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:23:38.662 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:23:38.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:23:38.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:23:39.022 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:23:39.494 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:23:39.662 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:23:39.663 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:23:39.663 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:23:39.663 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:23:39.965 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:23:40.439 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:23:40.664 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:23:40.664 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:23:40.664 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:23:40.664 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:23:40.911 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:23:41.383 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:23:41.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:23:41.665 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:23:41.665 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:23:41.665 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:23:41.854 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:23:42.328 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:23:42.800 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:23:43.272 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:23:43.745 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:23:44.218 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:23:44.690 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:23:45.161 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:23:45.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:23:45.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:23:45.230 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:23:45.230 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:23:45.230 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:23:45.230 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:23:45.231 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:23:45.231 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:23:45.231 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:23:45.231 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:23:45.231 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:23:45.231 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:23:45.231 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:23:50.238 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:23:50.238 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:23:50.238 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:23:50.238 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:23:50.238 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:23:50.238 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:23:50.247 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:23:50.249 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:23:50.249 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:23:50.249 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:23:50.250 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:23:50.254 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:23:50.254 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:23:50.255 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:23:50.255 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:23:50.255 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:23:50.255 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:23:50.255 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:23:50.255 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:23:50.259 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:23:50.260 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:23:50.260 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:23:50.260 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:23:50.260 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:23:50.260 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:23:50.260 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:23:50.260 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:23:50.264 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:23:50.264 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:23:50.265 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:23:50.265 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:23:50.265 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:23:50.265 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:23:50.265 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:23:50.265 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:23:50.271 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:23:50.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:23:50.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:23:50.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:23:50.271 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:23:50.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:23:50.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:23:50.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:23:50.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:23:50.272 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:23:50.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:50.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:50.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:50.272 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:23:50.272 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:23:50.272 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:23:50.272 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:23:50.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:50.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:50.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:50.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:23:50.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:50.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:50.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:50.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:50.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:50.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:50.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:50.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:50.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:50.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:50.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:50.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:50.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:50.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:50.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:50.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:50.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:50.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:50.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:50.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:50.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:50.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:50.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:50.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:50.275 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:23:50.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:50.275 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:23:50.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:50.275 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:23:50.275 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:23:50.275 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:23:50.275 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:23:50.275 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:23:55.290 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:23:55.290 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:23:55.291 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:23:55.291 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:23:55.291 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:23:55.291 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:23:55.300 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:23:55.302 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:23:55.302 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:23:55.302 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:23:55.302 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:23:55.306 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:23:55.307 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:23:55.307 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:23:55.307 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:23:55.307 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:23:55.307 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:23:55.307 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:23:55.307 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:23:55.311 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:23:55.312 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:23:55.312 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:23:55.312 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:23:55.312 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:23:55.312 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:23:55.312 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:23:55.312 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:23:55.316 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:23:55.316 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:23:55.316 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:23:55.316 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:23:55.316 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:23:55.316 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:23:55.317 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:23:55.317 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:23:55.322 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:23:55.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:23:55.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:23:55.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:23:55.322 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:23:55.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:23:55.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:23:55.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:23:55.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:23:55.323 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:23:55.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:55.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:55.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:55.323 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:23:55.323 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:23:55.323 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:23:55.323 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:23:55.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:55.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:55.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:55.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:23:55.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:55.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:55.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:55.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:55.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:55.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:55.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:55.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:55.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:55.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:55.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:55.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:55.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:55.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:55.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:55.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:55.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:55.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:55.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:55.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:55.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:23:55.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:55.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:55.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:23:55.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:23:55.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:23:55.328 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:23:55.805 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:23:55.839 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:23:55.839 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:23:55.840 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:23:55.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:23:55.841 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:23:55.841 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:23:55.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:23:55.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:23:55.842 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:23:55.842 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:23:55.842 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:23:55.842 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:23:56.277 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:23:56.327 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:23:56.327 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:23:56.327 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:23:56.328 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:23:56.749 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:23:57.220 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:23:57.328 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:23:57.329 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:23:57.329 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:23:57.329 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:23:57.693 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:23:58.166 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:23:58.329 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:23:58.329 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:23:58.329 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:23:58.330 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:23:58.638 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:23:59.109 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:23:59.329 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:23:59.330 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:23:59.330 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:23:59.331 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:23:59.582 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:24:00.055 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:24:00.331 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:24:00.332 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:24:00.332 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:24:00.332 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:24:00.527 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:24:01.001 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:24:01.473 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:24:01.945 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:24:02.416 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:24:02.889 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:24:03.362 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:24:03.834 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:24:03.852 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:24:03.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:24:03.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:24:03.856 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:24:03.856 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:24:03.856 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:24:03.857 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:24:03.857 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:24:03.857 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:24:03.857 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:24:03.857 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:24:03.857 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:24:03.857 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:24:03.857 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1843 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:24:03.857 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1843 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:24:03.857 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1843 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:24:03.857 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1843 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:24:03.857 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1843 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:24:03.857 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1843 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:24:08.866 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:24:08.866 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:24:08.866 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:24:08.866 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:24:08.866 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:24:08.866 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:24:08.875 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:24:08.877 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:24:08.877 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:24:08.878 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:24:08.878 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:24:08.883 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:24:08.883 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:24:08.884 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:24:08.884 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:24:08.884 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:24:08.885 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:24:08.885 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:24:08.885 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:24:08.888 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:24:08.889 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:24:08.889 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:24:08.889 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:24:08.890 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:24:08.890 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:24:08.890 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:24:08.890 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:24:08.893 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:24:08.893 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:24:08.894 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:24:08.894 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:24:08.894 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:24:08.894 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:24:08.894 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:24:08.894 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:24:08.899 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:24:08.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:24:08.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:24:08.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:24:08.899 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:24:08.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:24:08.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:24:08.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:24:08.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:24:08.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:08.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:08.899 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:24:08.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:08.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:08.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:08.900 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:24:08.900 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:24:08.900 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:24:08.900 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:24:08.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:08.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:08.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:08.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:24:08.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:08.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:08.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:08.902 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:08.902 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:08.902 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:24:08.902 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:24:08.902 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:24:08.902 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:24:08.902 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:24:13.912 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:24:13.912 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:24:13.912 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:24:13.912 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:24:13.912 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:24:13.912 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:24:13.920 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:24:13.921 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:24:13.921 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:24:13.921 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:24:13.921 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:24:13.926 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:24:13.926 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:24:13.926 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:24:13.927 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:24:13.927 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:24:13.927 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:24:13.928 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:24:13.928 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:24:13.931 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:24:13.931 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:24:13.931 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:24:13.931 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:24:13.931 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:24:13.932 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:24:13.932 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:24:13.932 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:24:13.935 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:24:13.935 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:24:13.935 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:24:13.935 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:24:13.935 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:24:13.935 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:24:13.935 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:24:13.935 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:24:13.940 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:24:13.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:24:13.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:24:13.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:24:13.940 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:24:13.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:24:13.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:24:13.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:24:13.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:24:13.940 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:24:13.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:13.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:13.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:13.941 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:24:13.941 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:24:13.941 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:24:13.941 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:24:13.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:13.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:13.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:13.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:24:13.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:13.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:13.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:13.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:13.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:13.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:13.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:13.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:13.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:13.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:13.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:13.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:13.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:13.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:13.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:13.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:13.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:13.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:13.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:13.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:13.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:13.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:13.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:13.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:13.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:13.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:13.945 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:24:14.424 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:24:14.467 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:24:14.470 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:24:14.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:24:14.472 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:24:14.475 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:24:14.475 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:24:14.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:24:14.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:24:14.476 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:24:14.477 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:24:14.477 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:24:14.478 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:24:14.896 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:24:14.944 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:24:14.945 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:24:14.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:24:14.945 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:24:15.367 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:24:15.841 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:24:15.946 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:24:15.946 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:24:15.946 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:24:15.946 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:24:16.313 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:24:16.785 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:24:16.946 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:24:16.947 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:24:16.947 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:24:16.947 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:24:17.256 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:24:17.729 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:24:17.948 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:24:17.948 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:24:17.948 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:24:17.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:24:18.202 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:24:18.674 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:24:18.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:24:18.949 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:24:18.949 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:24:18.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:24:19.145 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:24:19.618 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:24:20.091 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:24:20.563 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:24:21.034 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:24:21.507 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:24:21.980 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:24:22.452 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:24:22.923 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:24:23.397 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:24:23.869 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:24:24.341 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:24:24.812 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:24:25.283 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:24:25.756 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 05:24:26.229 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 05:24:26.701 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 05:24:27.172 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 05:24:27.645 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 05:24:28.118 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 05:24:28.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:24:28.520 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:24:28.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:24:28.524 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:24:28.524 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:24:28.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:24:28.525 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:24:28.525 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:24:28.525 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:24:28.525 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:24:28.525 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:24:28.525 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:24:28.525 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:24:28.525 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3150 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:24:28.525 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3150 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:24:28.525 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3150 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:24:28.525 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3150 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:24:28.525 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3150 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:24:33.532 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:24:33.532 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:24:33.532 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:24:33.532 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:24:33.532 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:24:33.532 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:24:33.539 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:24:33.540 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:24:33.540 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:24:33.541 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:24:33.541 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:24:33.544 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:24:33.544 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:24:33.545 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:24:33.545 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:24:33.545 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:24:33.545 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:24:33.545 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:24:33.545 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:24:33.548 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:24:33.548 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:24:33.548 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:24:33.548 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:24:33.549 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:24:33.549 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:24:33.549 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:24:33.549 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:24:33.552 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:24:33.552 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:24:33.552 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:24:33.552 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:24:33.552 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:24:33.552 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:24:33.552 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:24:33.552 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:24:33.556 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:24:33.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:24:33.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:24:33.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:24:33.556 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:24:33.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:24:33.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:24:33.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:24:33.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:24:33.557 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:24:33.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:33.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:33.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:33.557 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:24:33.557 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:24:33.557 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:24:33.557 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:24:33.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:33.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:33.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:33.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:24:33.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:33.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:33.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:33.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:33.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:33.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:33.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:33.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:33.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:33.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:33.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:33.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:33.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:33.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:33.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:33.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:33.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:33.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:33.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:33.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:33.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:33.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:33.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:33.559 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:24:33.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:33.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:33.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:33.559 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:24:33.559 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:24:33.559 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:24:33.559 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:24:33.559 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:24:33.559 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:24:38.567 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:24:38.567 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:24:38.567 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:24:38.567 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:24:38.567 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:24:38.567 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:24:38.575 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:24:38.576 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:24:38.576 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:24:38.576 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:24:38.576 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:24:38.579 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:24:38.579 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:24:38.579 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:24:38.580 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:24:38.580 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:24:38.580 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:24:38.580 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:24:38.580 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:24:38.582 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:24:38.582 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:24:38.583 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:24:38.583 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:24:38.583 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:24:38.583 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:24:38.583 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:24:38.583 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:24:38.585 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:24:38.585 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:24:38.585 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:24:38.585 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:24:38.586 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:24:38.586 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:24:38.586 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:24:38.586 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:24:38.588 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:24:38.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:24:38.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:24:38.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:24:38.589 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:24:38.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:24:38.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:24:38.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:24:38.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:24:38.589 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:24:38.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:38.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:38.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:38.589 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:24:38.589 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:24:38.589 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:24:38.589 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:24:38.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:38.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:38.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:38.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:24:38.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:38.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:38.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:38.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:38.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:38.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:38.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:38.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:38.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:38.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:38.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:38.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:38.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:38.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:38.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:38.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:38.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:38.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:38.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:38.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:38.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:38.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:38.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:38.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:38.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:38.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:38.594 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:24:39.072 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:24:39.114 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:24:39.116 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:24:39.117 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:24:39.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:24:39.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:24:39.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:24:39.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:24:39.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:24:39.120 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:24:39.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:24:39.121 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:24:39.121 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:24:39.544 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:24:39.591 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:24:39.591 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:24:39.592 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:24:39.592 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:24:40.016 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:24:40.489 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:24:40.592 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:24:40.592 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:24:40.593 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:24:40.593 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:24:40.961 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:24:41.434 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:24:41.592 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:24:41.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:24:41.593 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:24:41.594 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:24:41.907 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:24:42.380 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:24:42.593 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:24:42.594 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:24:42.595 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:24:42.596 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:24:42.852 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:24:43.323 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:24:43.594 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:24:43.595 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:24:43.597 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:24:43.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:24:43.796 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:24:44.268 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:24:44.740 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:24:45.211 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:24:45.682 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:24:46.156 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:24:46.628 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:24:47.100 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:24:47.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:24:47.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:24:47.174 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:24:47.174 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:24:47.174 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:24:47.175 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:24:47.179 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:24:47.180 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:24:47.180 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:24:47.180 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:24:47.180 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:24:47.180 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:24:47.180 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:24:47.181 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:24:47.181 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:24:47.181 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:24:47.181 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:24:47.181 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:24:47.181 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:24:47.181 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:24:47.181 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:24:47.181 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:24:47.181 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:24:52.183 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:24:52.183 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:24:52.183 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:24:52.183 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:24:52.183 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:24:52.183 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:24:52.191 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:24:52.193 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:24:52.193 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:24:52.193 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:24:52.193 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:24:52.197 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:24:52.198 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:24:52.198 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:24:52.198 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:24:52.198 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:24:52.198 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:24:52.199 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:24:52.199 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:24:52.201 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:24:52.201 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:24:52.202 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:24:52.202 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:24:52.202 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:24:52.202 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:24:52.202 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:24:52.202 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:24:52.205 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:24:52.205 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:24:52.205 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:24:52.205 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:24:52.205 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:24:52.205 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:24:52.205 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:24:52.205 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:24:52.209 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:24:52.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:24:52.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:24:52.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:24:52.209 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:24:52.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:24:52.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:24:52.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:24:52.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:24:52.210 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:24:52.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:52.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:52.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:52.210 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:24:52.210 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:24:52.210 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:24:52.210 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:24:52.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:52.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:52.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:52.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:24:52.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:52.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:52.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:52.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:52.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:52.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:52.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:52.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:52.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:52.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:52.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:52.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:52.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:52.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:52.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:52.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:52.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:52.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:52.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:52.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:52.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:52.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:52.212 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:24:52.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:52.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:52.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:52.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:52.212 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:24:52.212 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:24:52.212 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:24:52.212 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:24:52.212 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:24:52.212 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:24:57.221 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:24:57.221 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:24:57.221 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:24:57.222 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:24:57.222 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:24:57.222 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:24:57.230 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:24:57.232 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:24:57.232 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:24:57.232 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:24:57.232 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:24:57.236 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:24:57.236 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:24:57.236 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:24:57.236 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:24:57.237 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:24:57.237 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:24:57.237 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:24:57.237 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:24:57.240 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:24:57.240 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:24:57.240 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:24:57.240 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:24:57.240 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:24:57.241 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:24:57.241 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:24:57.241 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:24:57.243 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:24:57.243 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:24:57.243 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:24:57.243 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:24:57.243 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:24:57.243 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:24:57.243 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:24:57.243 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:24:57.247 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:24:57.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:24:57.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:24:57.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:24:57.247 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:24:57.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:24:57.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:24:57.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:24:57.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:24:57.247 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:24:57.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:57.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:57.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:57.247 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:24:57.247 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:24:57.247 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:24:57.247 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:24:57.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:57.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:57.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:57.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:24:57.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:57.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:57.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:57.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:57.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:57.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:57.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:57.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:57.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:57.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:57.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:57.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:57.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:57.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:57.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:57.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:57.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:57.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:57.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:57.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:24:57.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:57.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:57.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:57.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:24:57.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:24:57.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:24:57.252 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:24:57.730 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:24:57.772 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:24:57.774 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:24:57.775 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:24:57.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:24:57.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:24:57.778 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:24:57.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:24:57.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:24:57.779 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:24:57.779 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:24:57.779 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:24:57.779 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:24:58.202 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:24:58.250 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:24:58.251 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:24:58.251 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:24:58.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:24:58.673 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:24:59.147 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:24:59.252 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:24:59.252 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:24:59.252 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:24:59.252 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:24:59.619 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:25:00.091 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:25:00.252 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:25:00.253 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:25:00.253 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:25:00.253 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:25:00.562 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:25:01.033 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:25:01.254 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:25:01.254 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:25:01.254 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:25:01.255 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:25:01.507 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:25:01.979 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:25:02.255 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:25:02.255 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:25:02.255 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:25:02.255 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:25:02.450 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:25:02.922 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:25:03.391 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:25:03.860 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:25:04.329 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:25:04.792 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:25:05.255 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:25:05.718 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:25:06.187 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:25:06.654 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:25:07.116 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:25:07.579 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:25:07.823 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:25:07.823 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:25:07.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:25:07.824 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:25:07.824 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:25:07.824 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:25:07.825 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:25:07.825 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:25:07.825 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:25:07.825 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:25:07.825 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:25:07.826 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:25:07.826 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:25:12.828 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:25:12.828 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:25:12.828 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:25:12.828 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:25:12.828 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:25:12.829 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:25:12.832 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:25:12.833 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:25:12.833 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:25:12.833 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:25:12.833 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:25:12.834 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:25:12.834 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:25:12.834 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:25:12.834 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:25:12.834 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:25:12.834 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:25:12.835 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:25:12.835 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:25:12.836 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:25:12.836 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:25:12.836 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:25:12.836 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:25:12.836 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:25:12.836 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:25:12.836 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:25:12.836 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:25:12.838 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:25:12.838 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:25:12.838 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:25:12.838 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:25:12.838 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:25:12.838 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:25:12.838 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:25:12.838 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:25:12.840 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:25:12.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:25:12.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:25:12.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:25:12.840 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:25:12.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:25:12.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:25:12.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:25:12.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:25:12.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:25:12.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:25:12.841 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:25:12.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:25:12.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:25:12.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:25:12.841 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:25:12.841 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:25:12.841 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:25:12.841 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:25:12.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:25:12.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:25:12.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:25:12.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:25:12.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:25:12.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:25:12.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:25:12.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:25:12.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:25:12.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:25:12.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:25:12.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:25:12.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:25:12.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:25:12.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:25:12.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:25:12.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:25:12.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:25:12.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:25:12.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:25:12.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:25:12.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:25:12.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:25:12.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:25:12.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:25:12.842 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:25:12.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:25:12.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:25:12.842 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:25:12.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:25:12.842 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:25:12.842 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:25:12.842 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:25:12.842 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:25:12.842 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:25:17.845 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:25:17.845 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:25:17.845 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:25:17.845 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:25:17.846 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:25:17.846 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:25:17.850 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:25:17.850 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:25:17.850 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:25:17.850 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:25:17.850 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:25:17.851 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:25:17.851 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:25:17.851 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:25:17.851 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:25:17.851 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:25:17.851 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:25:17.851 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:25:17.851 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:25:17.853 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:25:17.853 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:25:17.853 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:25:17.853 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:25:17.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:25:17.853 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:25:17.853 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:25:17.853 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:25:17.855 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:25:17.855 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:25:17.855 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:25:17.855 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:25:17.855 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:25:17.855 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:25:17.855 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:25:17.855 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:25:17.857 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:25:17.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:25:17.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:25:17.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:25:17.857 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:25:17.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:25:17.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:25:17.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:25:17.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:25:17.858 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:25:17.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:25:17.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:25:17.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:25:17.858 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:25:17.858 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:25:17.858 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:25:17.858 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:25:17.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:25:17.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:25:17.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:25:17.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:25:17.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:25:17.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:25:17.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:25:17.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:25:17.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:25:17.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:25:17.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:25:17.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:25:17.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:25:17.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:25:17.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:25:17.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:25:17.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:25:17.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:25:17.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:25:17.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:25:17.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:25:17.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:25:17.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:25:17.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:25:17.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:25:17.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:25:17.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:25:17.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:25:17.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:25:17.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:25:17.862 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:25:18.325 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:25:18.377 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:25:18.377 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:25:18.378 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:25:18.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:25:18.379 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:25:18.379 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:25:18.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:25:18.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:25:18.379 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:25:18.379 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:25:18.379 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:25:18.380 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:25:18.788 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:25:18.860 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:25:18.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:25:18.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:25:18.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:25:19.252 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:25:19.716 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:25:19.861 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:25:19.861 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:25:19.861 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:25:19.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:25:20.179 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:25:20.643 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:25:20.861 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:25:20.861 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:25:20.861 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:25:20.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:25:21.105 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:25:21.569 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:25:21.862 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:25:21.862 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:25:21.862 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:25:21.862 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:25:22.032 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:25:22.497 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:25:22.862 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:25:22.862 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:25:22.862 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:25:22.862 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:25:22.962 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:25:23.426 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:25:23.891 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:25:24.355 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:25:24.821 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:25:25.287 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:25:25.751 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:25:26.215 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:25:26.679 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:25:27.143 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:25:27.606 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:25:28.069 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:25:28.531 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:25:28.996 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:25:29.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:25:29.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:25:29.426 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:25:29.426 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:25:29.426 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:25:29.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:25:29.432 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:25:29.432 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:25:29.432 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:25:29.432 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:25:29.433 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:25:29.433 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:25:29.433 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:25:29.433 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2543 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:25:29.433 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2544 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:25:29.433 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2544 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:25:29.433 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2544 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:25:29.434 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2544 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:25:29.434 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2544 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:25:29.434 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2544 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:25:29.434 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2544 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:25:29.434 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2544 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:25:29.434 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2545 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:25:29.434 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2545 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:25:29.434 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2545 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:25:29.434 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2545 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:25:29.434 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2545 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:25:29.435 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2545 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:25:29.435 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2545 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:25:29.435 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2545 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:25:34.429 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:25:34.429 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:25:34.430 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:25:34.430 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:25:34.430 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:25:34.430 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:25:34.439 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:25:34.440 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:25:34.440 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:25:34.440 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:25:34.440 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:25:34.442 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:25:34.442 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:25:34.442 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:25:34.442 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:25:34.442 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:25:34.442 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:25:34.443 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:25:34.443 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:25:34.444 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:25:34.444 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:25:34.444 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:25:34.444 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:25:34.444 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:25:34.444 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:25:34.444 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:25:34.444 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:25:34.446 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:25:34.446 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:25:34.446 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:25:34.446 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:25:34.446 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:25:34.446 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:25:34.446 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:25:34.446 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:25:34.448 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:25:34.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:25:34.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:25:34.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:25:34.448 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:25:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:25:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:25:34.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:25:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:25:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:25:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:25:34.449 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:25:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:25:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:25:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:25:34.449 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:25:34.449 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:25:34.449 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:25:34.449 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:25:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:25:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:25:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:25:34.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:25:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:25:34.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:25:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:25:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:25:34.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:25:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:25:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:25:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:25:34.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:25:34.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:25:34.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:25:34.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:25:34.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:25:34.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:25:34.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:25:34.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:25:34.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:25:34.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:25:34.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:25:34.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:25:34.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:25:34.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:25:34.450 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:25:34.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:25:34.450 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:25:34.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:25:34.450 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:25:34.451 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:25:34.451 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:25:34.451 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:25:34.451 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:25:39.458 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:25:39.458 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:25:39.458 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:25:39.458 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:25:39.458 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:25:39.458 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:25:39.475 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:25:39.476 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:25:39.476 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:25:39.476 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:25:39.476 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:25:39.478 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:25:39.478 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:25:39.478 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:25:39.478 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:25:39.478 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:25:39.478 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:25:39.479 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:25:39.479 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:25:39.481 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:25:39.481 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:25:39.481 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:25:39.481 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:25:39.481 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:25:39.481 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:25:39.481 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:25:39.481 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:25:39.483 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:25:39.483 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:25:39.483 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:25:39.483 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:25:39.483 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:25:39.483 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:25:39.483 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:25:39.483 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:25:39.486 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:25:39.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:25:39.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:25:39.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:25:39.486 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:25:39.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:25:39.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:25:39.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:25:39.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:25:39.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:25:39.486 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:25:39.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:25:39.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:25:39.486 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:25:39.487 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:25:39.487 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:25:39.487 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:25:39.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:25:39.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:25:39.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:25:39.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:25:39.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:25:39.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:25:39.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:25:39.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:25:39.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:25:39.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:25:39.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:25:39.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:25:39.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:25:39.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:25:39.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:25:39.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:25:39.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:25:39.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:25:39.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:25:39.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:25:39.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:25:39.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:25:39.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:25:39.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:25:39.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:25:39.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:25:39.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:25:39.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:25:39.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:25:39.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:25:39.491 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:25:39.954 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:25:39.999 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:25:39.999 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:25:40.000 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:25:40.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:25:40.001 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:25:40.001 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:25:40.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:25:40.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:25:40.001 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:25:40.001 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:25:40.001 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:25:40.001 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:25:40.416 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:25:40.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:25:40.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:25:40.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:25:40.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:25:40.879 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:25:41.342 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:25:41.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:25:41.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:25:41.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:25:41.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:25:41.806 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:25:42.269 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:25:42.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:25:42.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:25:42.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:25:42.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:25:42.735 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:25:43.197 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:25:43.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:25:43.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:25:43.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:25:43.494 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:25:43.661 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:25:44.124 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:25:44.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:25:44.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:25:44.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:25:44.495 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:25:44.587 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:25:45.051 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:25:45.515 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:25:45.977 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:25:46.444 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:25:46.908 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:25:47.373 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:25:47.863 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:25:48.327 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:25:48.789 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:25:49.254 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:25:49.717 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:25:50.180 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:25:50.646 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:25:51.118 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 05:25:51.589 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 05:25:52.062 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 05:25:52.583 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 05:25:53.055 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 05:25:53.527 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 05:25:53.997 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 05:25:54.470 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 05:25:54.943 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 05:25:55.414 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 05:25:55.886 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 05:25:56.357 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 05:25:56.828 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 05:25:57.301 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 05:25:57.774 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 05:25:58.246 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 05:25:58.717 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 05:25:59.188 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 05:25:59.659 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 05:26:00.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:26:00.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:26:00.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:26:00.059 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:26:00.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:26:00.059 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:26:00.062 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:26:00.062 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:26:00.062 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:26:00.062 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:26:00.062 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:26:00.062 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:26:00.062 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:26:05.067 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:26:05.067 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:26:05.067 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:26:05.067 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:26:05.067 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:26:05.067 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:26:05.075 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:26:05.076 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:26:05.076 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:26:05.077 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:26:05.077 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:26:05.080 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:26:05.080 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:26:05.080 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:26:05.080 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:26:05.080 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:26:05.080 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:26:05.081 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:26:05.081 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:26:05.083 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:26:05.083 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:26:05.083 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:26:05.083 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:26:05.083 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:26:05.083 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:26:05.083 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:26:05.083 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:26:05.085 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:26:05.085 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:26:05.085 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:26:05.085 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:26:05.085 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:26:05.085 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:26:05.085 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:26:05.085 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:26:05.088 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:26:05.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:26:05.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:26:05.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:26:05.088 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:26:05.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:26:05.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:26:05.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:26:05.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:26:05.088 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:26:05.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:05.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:05.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:05.088 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:26:05.089 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:26:05.089 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:26:05.089 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:26:05.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:05.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:05.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:05.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:26:05.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:05.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:05.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:05.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:05.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:05.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:05.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:05.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:05.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:05.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:05.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:05.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:05.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:05.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:05.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:05.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:05.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:05.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:05.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:05.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:05.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:05.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:05.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:05.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:05.090 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:26:05.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:05.090 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:26:05.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:05.090 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:26:05.090 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:26:05.090 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:26:05.090 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:26:05.090 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:26:10.093 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:26:10.094 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:26:10.094 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:26:10.094 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:26:10.094 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:26:10.094 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:26:10.098 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:26:10.098 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:26:10.098 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:26:10.098 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:26:10.098 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:26:10.099 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:26:10.099 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:26:10.099 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:26:10.100 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:26:10.100 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:26:10.100 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:26:10.100 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:26:10.100 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:26:10.101 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:26:10.101 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:26:10.101 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:26:10.101 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:26:10.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:26:10.101 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:26:10.101 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:26:10.101 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:26:10.103 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:26:10.103 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:26:10.103 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:26:10.103 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:26:10.103 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:26:10.103 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:26:10.103 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:26:10.103 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:26:10.106 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:26:10.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:26:10.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:26:10.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:26:10.106 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:26:10.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:26:10.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:26:10.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:26:10.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:26:10.106 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:26:10.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:10.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:10.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:10.106 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:26:10.106 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:26:10.106 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:26:10.106 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:26:10.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:10.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:10.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:10.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:26:10.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:10.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:10.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:10.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:10.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:10.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:10.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:10.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:10.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:10.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:10.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:10.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:10.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:10.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:10.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:10.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:10.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:10.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:10.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:10.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:10.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:10.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:10.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:10.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:10.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:10.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:10.111 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:26:10.573 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:26:10.623 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:26:10.624 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:26:10.625 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:26:10.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:26:11.036 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:26:11.109 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:26:11.109 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:26:11.109 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:26:11.110 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:26:11.498 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:26:11.960 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:26:12.109 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:26:12.109 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:26:12.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:26:12.110 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:26:12.423 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:26:12.886 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:26:13.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:26:13.110 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:26:13.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:26:13.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:26:13.348 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:26:13.810 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:26:14.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:26:14.111 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:26:14.111 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:26:14.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:26:14.273 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:26:14.735 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:26:15.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:26:15.111 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:26:15.111 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:26:15.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:26:15.197 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:26:15.659 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:26:16.122 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:26:16.593 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:26:17.067 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:26:17.538 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:26:18.006 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:26:18.475 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:26:18.939 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:26:19.402 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:26:19.865 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:26:20.330 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:26:20.636 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:26:20.636 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:26:20.636 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:26:20.636 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:26:20.637 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:26:20.637 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:26:20.637 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:26:20.637 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:26:20.637 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:26:20.637 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:26:20.637 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:26:20.637 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2312 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:26:20.637 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2312 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:26:20.637 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2312 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:26:20.637 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2312 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:26:20.638 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2313 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:26:20.638 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2313 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:26:20.638 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2313 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:26:20.638 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2313 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:26:20.638 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2313 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:26:20.638 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2313 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:26:20.638 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2313 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:26:20.638 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2313 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:26:25.645 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:26:25.645 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:26:25.645 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:26:25.645 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:26:25.645 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:26:25.645 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:26:25.653 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:26:25.654 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:26:25.654 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:26:25.654 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:26:25.654 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:26:25.658 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:26:25.659 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:26:25.659 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:26:25.659 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:26:25.659 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:26:25.660 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:26:25.660 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:26:25.660 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:26:25.662 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:26:25.662 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:26:25.662 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:26:25.663 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:26:25.663 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:26:25.663 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:26:25.663 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:26:25.663 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:26:25.665 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:26:25.665 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:26:25.665 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:26:25.666 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:26:25.666 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:26:25.666 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:26:25.666 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:26:25.666 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:26:25.669 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:26:25.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:26:25.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:26:25.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:26:25.669 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:26:25.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:26:25.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:26:25.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:26:25.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:26:25.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:25.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:25.670 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:26:25.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:25.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:25.670 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:26:25.670 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:26:25.670 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:26:25.670 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:26:25.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:25.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:25.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:25.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:26:25.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:25.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:25.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:25.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:25.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:25.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:25.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:25.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:25.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:25.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:25.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:25.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:25.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:25.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:25.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:25.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:25.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:25.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:25.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:25.672 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:26:25.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:25.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:25.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:25.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:25.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:25.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:25.672 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:26:25.672 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:26:25.672 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:26:25.672 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:26:25.672 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:26:25.672 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:26:30.682 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:26:30.682 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:26:30.682 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:26:30.682 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:26:30.682 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:26:30.682 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:26:30.689 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:26:30.690 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:26:30.690 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:26:30.691 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:26:30.691 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:26:30.694 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:26:30.694 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:26:30.695 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:26:30.695 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:26:30.695 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:26:30.695 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:26:30.696 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:26:30.696 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:26:30.697 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:26:30.698 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:26:30.698 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:26:30.698 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:26:30.698 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:26:30.698 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:26:30.698 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:26:30.698 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:26:30.701 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:26:30.702 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:26:30.702 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:26:30.702 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:26:30.702 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:26:30.702 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:26:30.702 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:26:30.702 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:26:30.705 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:26:30.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:26:30.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:26:30.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:26:30.705 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:26:30.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:26:30.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:26:30.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:26:30.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:26:30.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:30.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:30.705 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:26:30.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:30.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:30.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:30.706 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:26:30.706 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:26:30.706 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:26:30.706 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:26:30.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:30.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:30.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:30.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:26:30.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:30.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:30.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:30.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:30.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:30.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:30.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:30.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:30.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:30.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:30.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:30.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:30.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:30.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:30.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:30.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:30.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:30.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:30.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:30.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:30.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:30.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:30.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:30.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:30.710 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:26:31.189 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:26:31.227 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:26:31.228 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:26:31.230 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:26:31.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:26:31.656 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:26:31.709 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:26:31.709 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:26:31.709 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:26:31.710 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:26:32.125 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:26:32.589 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:26:32.710 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:26:32.711 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:26:32.711 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:26:32.711 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:26:33.052 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:26:33.631 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:26:33.712 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:26:33.712 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:26:33.712 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:26:33.712 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:26:34.106 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:26:34.578 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:26:34.713 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:26:34.713 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:26:34.713 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:26:34.713 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:26:35.045 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:26:35.510 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:26:35.714 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:26:35.714 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:26:35.714 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:26:35.714 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:26:35.977 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:26:36.440 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:26:36.904 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:26:37.376 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:26:37.848 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:26:38.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:26:38.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:26:38.586 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:26:38.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:26:38.588 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:26:38.588 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:26:38.588 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:26:38.588 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:26:38.588 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:26:38.588 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:26:38.588 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:26:39.724 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:26:39.724 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:26:39.724 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:26:39.724 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:26:39.724 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:26:39.724 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:26:44.729 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:26:44.730 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:26:44.730 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:26:44.730 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:26:44.730 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:26:44.731 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:26:44.731 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:26:44.731 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:26:44.731 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:26:44.731 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:26:44.732 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:26:44.732 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:26:44.732 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:26:44.733 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:26:44.733 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:26:44.733 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:26:44.733 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:26:44.733 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:26:44.733 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:26:44.733 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:26:44.733 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:26:44.734 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:26:44.734 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:26:44.734 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:26:44.734 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:26:44.734 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:26:44.735 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:26:44.735 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:26:44.735 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:26:44.736 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:26:44.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:26:44.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:26:44.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:26:44.736 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:26:44.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:26:44.736 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:26:44.736 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:26:44.736 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:26:44.736 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:26:44.737 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:26:44.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:26:44.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:26:44.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:44.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:44.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:44.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:44.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:26:44.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:44.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:44.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:44.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:44.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:44.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:44.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:44.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:44.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:44.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:44.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:44.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:26:44.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:44.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:44.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:44.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:44.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:44.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:44.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:44.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:44.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:44.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:44.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:44.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:44.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:44.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:44.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:44.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:44.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:44.739 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:26:44.739 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:26:44.739 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:26:44.739 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:26:44.739 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:26:44.739 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:26:44.739 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:26:49.748 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:26:49.748 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:26:49.748 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:26:49.749 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:26:49.749 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:26:49.749 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:26:49.757 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:26:49.758 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:26:49.758 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:26:49.759 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:26:49.759 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:26:49.763 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:26:49.763 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:26:49.764 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:26:49.764 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:26:49.764 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:26:49.764 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:26:49.764 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:26:49.764 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:26:49.767 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:26:49.767 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:26:49.767 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:26:49.767 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:26:49.767 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:26:49.767 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:26:49.767 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:26:49.767 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:26:49.770 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:26:49.770 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:26:49.770 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:26:49.770 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:26:49.771 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:26:49.771 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:26:49.771 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:26:49.771 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:26:49.775 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:26:49.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:26:49.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:26:49.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:26:49.775 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:26:49.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:26:49.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:26:49.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:26:49.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:26:49.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:49.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:49.775 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:26:49.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:49.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:49.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:49.775 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:26:49.775 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:26:49.775 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:26:49.775 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:26:49.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:49.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:49.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:49.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:26:49.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:49.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:49.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:49.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:49.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:49.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:49.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:49.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:49.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:49.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:49.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:49.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:49.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:49.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:49.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:49.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:49.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:49.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:49.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:49.777 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:26:49.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:49.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:49.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:49.777 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:26:49.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:49.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:49.777 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:26:49.777 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:26:49.777 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:26:49.777 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:26:49.777 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:26:54.787 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:26:54.787 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:26:54.787 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:26:54.787 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:26:54.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:26:54.787 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:26:54.794 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:26:54.795 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:26:54.795 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:26:54.795 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:26:54.795 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:26:54.797 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:26:54.797 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:26:54.797 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:26:54.797 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:26:54.798 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:26:54.798 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:26:54.798 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:26:54.798 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:26:54.800 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:26:54.800 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:26:54.800 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:26:54.800 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:26:54.800 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:26:54.800 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:26:54.800 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:26:54.800 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:26:54.803 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:26:54.803 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:26:54.804 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:26:54.804 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:26:54.804 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:26:54.804 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:26:54.804 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:26:54.805 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:26:54.808 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:26:54.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:26:54.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:26:54.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:26:54.808 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:26:54.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:26:54.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:26:54.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:54.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:26:54.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:26:54.809 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:26:54.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:54.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:54.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:54.809 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:26:54.809 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:26:54.809 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:26:54.809 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:26:54.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:54.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:54.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:54.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:26:54.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:54.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:54.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:54.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:54.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:54.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:54.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:54.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:54.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:54.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:54.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:54.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:54.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:54.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:54.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:54.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:54.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:26:54.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:54.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:54.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:54.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:54.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:26:54.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:26:54.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:54.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:26:54.814 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:26:55.292 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:26:55.340 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:26:55.342 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:26:55.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:26:55.344 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:26:55.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:26:55.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:26:55.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:26:55.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:26:55.346 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:26:55.346 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:26:55.347 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:26:55.347 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:26:55.382 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:26:55.382 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-02-08 05:26:55.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:26:55.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:26:55.763 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:26:55.812 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:26:55.813 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:26:55.814 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:26:55.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:26:56.230 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:26:56.702 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:26:56.814 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:26:56.814 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:26:56.815 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:26:56.815 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:26:57.172 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:26:57.641 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:26:57.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:26:57.816 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:26:57.816 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:26:57.816 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:26:58.114 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:26:58.586 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:26:58.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:26:58.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:26:58.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:26:58.817 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:26:59.059 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:26:59.532 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:27:00.004 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:27:00.476 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:27:00.949 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:27:01.421 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:27:01.893 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:27:02.366 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:27:02.839 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:27:03.311 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:27:03.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:27:03.387 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:27:03.387 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:27:03.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:27:03.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:27:03.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:27:03.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:27:03.394 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:27:03.394 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:27:03.394 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:27:03.394 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:27:03.394 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:27:03.394 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:27:03.394 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:27:08.402 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:27:08.402 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:27:08.402 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:27:08.402 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:27:08.402 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:27:08.402 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:27:08.411 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:27:08.412 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:27:08.412 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:27:08.413 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:27:08.413 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:27:08.415 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:27:08.415 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:27:08.416 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:27:08.416 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:27:08.416 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:27:08.416 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:27:08.417 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:27:08.417 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:27:08.418 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:27:08.419 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:27:08.419 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:27:08.419 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:27:08.419 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:27:08.419 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:27:08.420 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:27:08.420 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:27:08.421 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:27:08.421 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:27:08.421 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:27:08.421 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:27:08.422 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:27:08.422 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:27:08.422 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:27:08.422 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:27:08.425 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:27:08.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:27:08.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:27:08.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:27:08.425 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:27:08.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:27:08.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:27:08.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:27:08.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:27:08.426 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:27:08.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:08.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:08.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:08.426 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:27:08.426 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:27:08.426 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:27:08.426 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:27:08.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:08.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:08.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:08.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:27:08.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:08.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:08.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:08.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:08.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:08.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:08.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:08.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:08.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:08.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:08.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:08.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:08.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:08.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:08.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:08.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:08.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:08.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:08.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:08.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:08.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:08.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:08.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:08.428 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:27:08.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:08.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:08.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:08.428 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:27:08.428 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:27:08.428 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:27:08.428 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:27:08.428 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:27:08.428 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:27:13.437 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:27:13.437 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:27:13.437 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:27:13.437 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:27:13.437 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:27:13.437 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:27:13.446 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:27:13.446 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:27:13.446 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:27:13.447 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:27:13.447 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:27:13.449 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:27:13.449 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:27:13.450 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:27:13.450 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:27:13.450 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:27:13.450 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:27:13.451 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:27:13.451 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:27:13.452 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:27:13.453 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:27:13.453 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:27:13.453 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:27:13.453 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:27:13.453 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:27:13.454 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:27:13.454 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:27:13.455 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:27:13.455 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:27:13.455 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:27:13.455 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:27:13.455 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:27:13.455 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:27:13.455 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:27:13.455 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:27:13.458 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:27:13.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:27:13.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:27:13.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:27:13.459 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:27:13.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:27:13.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:27:13.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:27:13.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:27:13.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:13.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:13.459 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:27:13.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:13.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:13.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:13.459 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:27:13.459 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:27:13.459 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:27:13.459 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:27:13.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:13.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:13.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:13.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:27:13.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:13.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:13.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:13.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:13.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:13.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:13.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:13.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:13.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:13.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:13.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:13.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:13.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:13.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:13.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:13.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:13.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:13.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:13.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:13.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:13.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:13.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:13.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:13.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:13.464 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:27:13.942 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:27:13.983 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:27:13.985 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:27:13.987 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:27:13.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:27:13.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:27:13.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:27:13.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:27:13.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:27:13.988 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:27:13.988 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:27:13.988 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:27:13.988 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:27:14.032 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:27:14.032 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-02-08 05:27:14.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:27:14.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:27:14.414 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:27:14.463 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:27:14.463 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:27:14.463 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:27:14.463 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:27:14.886 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:27:15.359 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:27:15.464 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:27:15.464 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:27:15.464 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:27:15.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:27:15.832 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:27:16.304 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:27:16.465 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:27:16.465 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:27:16.465 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:27:16.465 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:27:16.777 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:27:17.249 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:27:17.466 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:27:17.466 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:27:17.466 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:27:17.466 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:27:17.720 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:27:18.192 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:27:18.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:27:18.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:27:18.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:27:18.467 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:27:18.664 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:27:19.136 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:27:19.610 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:27:20.082 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:27:20.556 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:27:21.028 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:27:21.500 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:27:21.972 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:27:22.038 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:27:22.038 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:27:22.038 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:27:22.045 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:27:22.045 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:27:22.045 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:27:22.045 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:27:22.050 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:27:22.051 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:27:22.051 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:27:22.051 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:27:22.051 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:27:22.051 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:27:22.052 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:27:22.052 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1853 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:27:22.052 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:27:22.052 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:27:22.052 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:27:22.052 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:27:22.052 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:27:22.052 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:27:22.052 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:27:22.053 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:27:22.053 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:27:22.053 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:27:22.053 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:27:22.053 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:27:22.053 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:27:22.053 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:27:22.053 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:27:22.053 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:27:27.054 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:27:27.054 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:27:27.054 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:27:27.054 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:27:27.054 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:27:27.054 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:27:27.063 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:27:27.064 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:27:27.064 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:27:27.065 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:27:27.065 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:27:27.069 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:27:27.070 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:27:27.070 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:27:27.070 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:27:27.071 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:27:27.071 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:27:27.071 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:27:27.071 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:27:27.074 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:27:27.074 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:27:27.075 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:27:27.075 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:27:27.075 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:27:27.075 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:27:27.076 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:27:27.076 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:27:27.078 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:27:27.078 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:27:27.079 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:27:27.079 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:27:27.079 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:27:27.079 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:27:27.079 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:27:27.079 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:27:27.083 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:27:27.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:27:27.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:27:27.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:27:27.083 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:27:27.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:27:27.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:27:27.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:27.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:27:27.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:27:27.084 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:27:27.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:27.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:27.084 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:27:27.084 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:27:27.084 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:27:27.084 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:27:27.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:27.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:27.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:27.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:27:27.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:27.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:27.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:27.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:27.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:27.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:27.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:27.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:27.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:27.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:27.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:27.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:27.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:27.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:27.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:27.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:27.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:27.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:27.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:27.086 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:27:27.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:27.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:27.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:27.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:27.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:27.086 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:27:27.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:27.086 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:27:27.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:27.086 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:27:27.086 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:27:27.086 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:27:27.087 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:27:32.096 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:27:32.096 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:27:32.096 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:27:32.096 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:27:32.096 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:27:32.096 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:27:32.104 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:27:32.106 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:27:32.106 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:27:32.107 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:27:32.107 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:27:32.112 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:27:32.112 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:27:32.112 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:27:32.113 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:27:32.113 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:27:32.113 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:27:32.114 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:27:32.114 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:27:32.117 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:27:32.117 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:27:32.117 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:27:32.117 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:27:32.117 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:27:32.118 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:27:32.118 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:27:32.118 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:27:32.121 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:27:32.121 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:27:32.122 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:27:32.122 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:27:32.122 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:27:32.122 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:27:32.122 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:27:32.122 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:27:32.128 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:27:32.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:27:32.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:27:32.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:27:32.128 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:27:32.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:27:32.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:27:32.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:27:32.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:27:32.128 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:27:32.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:32.129 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:27:32.129 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:27:32.129 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:27:32.129 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:27:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:32.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:27:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:32.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:32.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:32.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:32.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:32.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:32.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:32.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:32.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:32.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:32.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:32.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:32.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:32.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:32.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:32.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:32.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:32.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:32.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:32.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:32.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:32.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:32.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:32.134 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:27:32.611 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:27:32.660 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:27:32.662 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:27:32.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:27:32.664 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:27:32.667 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:27:32.667 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:27:32.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:27:32.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:27:32.668 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:27:32.668 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:27:32.668 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:27:32.668 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:27:32.701 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:27:32.701 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-02-08 05:27:32.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:27:32.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:27:33.083 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:27:33.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:27:33.134 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:27:33.135 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:27:33.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:27:33.555 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:27:34.028 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:27:34.135 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:27:34.136 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:27:34.136 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:27:34.136 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:27:34.501 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:27:34.973 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:27:35.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:27:35.137 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:27:35.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:27:35.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:27:35.445 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:27:35.918 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:27:36.138 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:27:36.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:27:36.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:27:36.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:27:36.391 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:27:36.864 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:27:37.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:27:37.140 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:27:37.140 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:27:37.140 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:27:37.336 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:27:37.808 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:27:38.280 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:27:38.753 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:27:39.226 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:27:39.698 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:27:40.169 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:27:40.643 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:27:40.706 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:27:40.706 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:27:40.706 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:27:40.709 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:27:40.709 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:27:40.709 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:27:40.709 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:27:40.710 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:27:40.710 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:27:40.710 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:27:40.710 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:27:40.710 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:27:40.710 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:27:40.710 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:27:40.710 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1853 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:27:40.710 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1853 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:27:45.717 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:27:45.717 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:27:45.717 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:27:45.717 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:27:45.717 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:27:45.717 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:27:45.726 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:27:45.727 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:27:45.727 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:27:45.727 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:27:45.727 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:27:45.732 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:27:45.732 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:27:45.732 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:27:45.732 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:27:45.732 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:27:45.733 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:27:45.733 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:27:45.733 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:27:45.737 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:27:45.737 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:27:45.738 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:27:45.738 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:27:45.738 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:27:45.738 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:27:45.738 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:27:45.738 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:27:45.742 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:27:45.743 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:27:45.743 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:27:45.743 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:27:45.743 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:27:45.743 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:27:45.743 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:27:45.743 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:27:45.749 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:27:45.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:27:45.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:27:45.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:27:45.749 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:27:45.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:27:45.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:27:45.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:27:45.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:27:45.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:45.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:45.750 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:27:45.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:45.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:45.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:45.750 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:27:45.750 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:27:45.750 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:27:45.750 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:27:45.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:45.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:45.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:45.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:27:45.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:45.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:45.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:45.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:45.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:45.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:45.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:45.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:45.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:45.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:45.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:45.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:45.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:45.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:45.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:45.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:45.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:45.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:45.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:45.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:45.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:45.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:45.753 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:27:45.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:27:45.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:45.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:45.753 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:27:45.753 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:27:45.753 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:27:45.753 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:27:45.753 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:27:50.761 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:27:50.761 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:27:50.761 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:27:50.761 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:27:50.761 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:27:50.761 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:27:50.770 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:27:50.771 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:27:50.771 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:27:50.771 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:27:50.771 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:27:50.774 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:27:50.775 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:27:50.775 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:27:50.775 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:27:50.775 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:27:50.775 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:27:50.776 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:27:50.776 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:27:50.778 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:27:50.778 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:27:50.778 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:27:50.778 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:27:50.778 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:27:50.778 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:27:50.778 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:27:50.778 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:27:50.781 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:27:50.782 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:27:50.782 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:27:50.782 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:27:50.782 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:27:50.782 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:27:50.782 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:27:50.782 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:27:50.785 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:27:50.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:27:50.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:27:50.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:27:50.785 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:27:50.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:27:50.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:27:50.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:27:50.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:27:50.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:50.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:50.785 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:27:50.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:50.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:50.786 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:27:50.786 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:27:50.786 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:27:50.786 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:27:50.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:50.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:50.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:50.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:27:50.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:50.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:50.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:50.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:50.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:50.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:50.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:50.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:50.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:50.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:50.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:50.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:50.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:50.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:50.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:27:50.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:50.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:50.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:50.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:50.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:50.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:50.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:27:50.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:50.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:27:50.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:27:50.790 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:27:51.269 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:27:51.311 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:27:51.313 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:27:51.315 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:27:51.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:27:51.319 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:27:51.319 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:27:51.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:27:51.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:27:51.320 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:27:51.321 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:27:51.321 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:27:51.321 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:27:51.360 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:27:51.360 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-02-08 05:27:51.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:27:51.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:27:51.741 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:27:51.789 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:27:51.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:27:51.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:27:51.789 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:27:52.213 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:27:52.687 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:27:52.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:27:52.790 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:27:52.790 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:27:52.790 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:27:53.159 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:27:53.631 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:27:53.791 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:27:53.792 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:27:53.792 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:27:53.792 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:27:54.104 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:27:54.576 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:27:54.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:27:54.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:27:54.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:27:54.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:27:55.048 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:27:55.521 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:27:55.795 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:27:55.795 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:27:55.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:27:55.795 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:27:55.994 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:27:56.467 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:27:56.940 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:27:57.413 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:27:57.885 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:27:58.358 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:27:58.831 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:27:59.304 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:27:59.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:27:59.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:27:59.365 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:27:59.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:27:59.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:27:59.373 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:27:59.373 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:27:59.378 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:27:59.379 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:27:59.379 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:27:59.379 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:27:59.379 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:27:59.379 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:27:59.379 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:27:59.379 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:27:59.380 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:27:59.380 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:27:59.380 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:27:59.380 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:27:59.380 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:28:04.379 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:28:04.379 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:28:04.379 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:28:04.379 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:28:04.379 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:28:04.379 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:28:04.387 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:28:04.388 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:28:04.388 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:28:04.389 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:28:04.389 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:28:04.391 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:28:04.392 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:28:04.392 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:28:04.392 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:28:04.392 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:28:04.392 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:28:04.393 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:28:04.393 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:28:04.395 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:28:04.395 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:28:04.395 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:28:04.395 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:28:04.395 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:28:04.395 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:28:04.395 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:28:04.395 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:28:04.397 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:28:04.398 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:28:04.398 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:28:04.398 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:28:04.398 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:28:04.398 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:28:04.398 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:28:04.398 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:28:04.401 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:28:04.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:28:04.401 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:28:04.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:28:04.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:28:04.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:28:04.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:28:04.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:04.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:28:04.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:28:04.401 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:28:04.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:04.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:04.401 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:28:04.401 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:28:04.401 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:28:04.401 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:28:04.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:04.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:04.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:04.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:28:04.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:04.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:04.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:04.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:04.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:04.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:04.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:04.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:04.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:04.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:04.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:04.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:04.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:04.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:04.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:04.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:04.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:04.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:04.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:04.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:04.403 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:28:04.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:04.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:04.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:04.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:04.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:04.403 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:28:04.403 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:28:04.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:04.403 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:28:04.403 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:28:04.403 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:28:04.403 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:28:09.411 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:28:09.411 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:28:09.411 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:28:09.411 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:28:09.411 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:28:09.411 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:28:09.419 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:28:09.421 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:28:09.421 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:28:09.421 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:28:09.421 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:28:09.425 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:28:09.425 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:28:09.425 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:28:09.425 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:28:09.426 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:28:09.426 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:28:09.426 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:28:09.426 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:28:09.428 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:28:09.428 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:28:09.429 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:28:09.429 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:28:09.429 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:28:09.429 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:28:09.429 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:28:09.429 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:28:09.431 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:28:09.431 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:28:09.431 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:28:09.431 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:28:09.431 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:28:09.431 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:28:09.432 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:28:09.432 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:28:09.435 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:28:09.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:28:09.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:28:09.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:28:09.435 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:28:09.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:28:09.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:28:09.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:28:09.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:28:09.435 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:28:09.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:09.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:09.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:09.435 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:28:09.435 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:28:09.435 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:28:09.435 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:28:09.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:09.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:09.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:09.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:28:09.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:09.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:09.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:09.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:09.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:09.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:09.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:09.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:09.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:09.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:09.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:09.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:09.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:09.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:09.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:09.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:09.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:09.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:09.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:09.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:09.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:09.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:09.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:09.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:09.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:09.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:09.440 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:28:09.918 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:28:09.965 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:28:09.967 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:28:09.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:28:09.969 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:28:09.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:28:09.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:28:09.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:28:09.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:28:09.974 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:28:09.974 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:28:09.975 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:28:09.975 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:28:10.009 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:28:10.009 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-02-08 05:28:10.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:28:10.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:28:10.391 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:28:10.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:28:10.439 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:28:10.439 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:28:10.439 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:28:10.862 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:28:11.336 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:28:11.439 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:28:11.440 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:28:11.440 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:28:11.440 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:28:11.808 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:28:12.280 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:28:12.439 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:28:12.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:28:12.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:28:12.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:28:12.752 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:28:13.225 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:28:13.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:28:13.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:28:13.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:28:13.443 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:28:13.698 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:28:14.171 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:28:14.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:28:14.444 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:28:14.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:28:14.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:28:14.644 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:28:15.117 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:28:15.590 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:28:16.063 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:28:16.535 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:28:17.008 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:28:17.481 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:28:17.953 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:28:18.426 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:28:18.899 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:28:19.372 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:28:19.845 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:28:20.318 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:28:20.790 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:28:21.263 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 05:28:21.736 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 05:28:22.208 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 05:28:22.682 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 05:28:23.154 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 05:28:23.626 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 05:28:24.014 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:28:24.014 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:28:24.014 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:28:24.020 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:28:24.020 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:28:24.020 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:28:24.020 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:28:24.021 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:28:24.021 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:28:24.021 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:28:24.021 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:28:24.021 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:28:24.021 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:28:24.021 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:28:29.029 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:28:29.029 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:28:29.029 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:28:29.029 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:28:29.029 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:28:29.029 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:28:29.037 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:28:29.039 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:28:29.039 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:28:29.039 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:28:29.039 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:28:29.045 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:28:29.045 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:28:29.045 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:28:29.045 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:28:29.045 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:28:29.045 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:28:29.046 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:28:29.046 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:28:29.050 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:28:29.051 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:28:29.051 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:28:29.051 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:28:29.051 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:28:29.051 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:28:29.051 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:28:29.051 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:28:29.055 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:28:29.055 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:28:29.055 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:28:29.055 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:28:29.055 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:28:29.055 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:28:29.056 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:28:29.056 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:28:29.060 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:28:29.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:28:29.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:28:29.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:28:29.061 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:28:29.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:28:29.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:28:29.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:28:29.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:28:29.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:29.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:29.061 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:28:29.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:29.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:29.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:29.061 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:28:29.061 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:28:29.061 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:28:29.061 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:28:29.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:29.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:29.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:29.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:28:29.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:29.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:29.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:29.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:29.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:29.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:29.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:29.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:29.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:29.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:29.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:29.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:29.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:29.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:29.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:29.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:29.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:29.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:29.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:29.064 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:28:29.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:29.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:29.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:29.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:29.064 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:28:29.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:29.064 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:28:29.064 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:28:29.064 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:28:29.064 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:28:29.064 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:28:34.071 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:28:34.071 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:28:34.071 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:28:34.071 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:28:34.071 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:28:34.071 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:28:34.079 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:28:34.080 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:28:34.080 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:28:34.080 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:28:34.080 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:28:34.083 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:28:34.083 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:28:34.083 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:28:34.083 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:28:34.084 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:28:34.084 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:28:34.085 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:28:34.085 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:28:34.087 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:28:34.087 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:28:34.087 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:28:34.088 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:28:34.088 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:28:34.088 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:28:34.088 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:28:34.088 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:28:34.090 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:28:34.090 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:28:34.090 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:28:34.090 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:28:34.090 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:28:34.090 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:28:34.091 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:28:34.091 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:28:34.095 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:28:34.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:28:34.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:28:34.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:28:34.095 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:28:34.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:28:34.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:28:34.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:28:34.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:28:34.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:34.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:34.095 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:28:34.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:34.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:34.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:34.095 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:28:34.095 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:28:34.095 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:28:34.095 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:28:34.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:34.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:34.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:34.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:28:34.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:34.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:34.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:34.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:34.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:34.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:34.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:34.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:34.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:34.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:34.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:34.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:34.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:34.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:34.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:34.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:34.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:34.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:34.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:34.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:34.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:34.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:34.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:34.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:34.100 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:28:34.578 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:28:34.624 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:28:34.627 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:28:34.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:28:34.629 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:28:34.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:28:34.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:28:34.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:28:34.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:28:34.633 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:28:34.633 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:28:34.633 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:28:34.633 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:28:34.669 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:28:34.669 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-02-08 05:28:34.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:28:34.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:28:35.051 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:28:35.099 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:28:35.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:28:35.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:28:35.101 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:28:35.522 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:28:35.996 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:28:36.100 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:28:36.100 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:28:36.100 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:28:36.102 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:28:36.469 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:28:36.942 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:28:37.101 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:28:37.101 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:28:37.101 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:28:37.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:28:37.415 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:28:37.887 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:28:38.102 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:28:38.102 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:28:38.102 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:28:38.104 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:28:38.358 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:28:38.831 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:28:39.103 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:28:39.104 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:28:39.104 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:28:39.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:28:39.304 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:28:39.780 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:28:40.253 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:28:40.726 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:28:41.199 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:28:41.671 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:28:42.143 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:28:42.617 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:28:42.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:28:42.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:28:42.674 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:28:42.681 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:28:42.681 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:28:42.681 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:28:42.681 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:28:42.682 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:28:42.682 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:28:42.682 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:28:42.682 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:28:42.682 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:28:42.682 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:28:42.682 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:28:42.682 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1852 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:28:42.682 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1852 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:28:42.682 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1852 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:28:42.682 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1852 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:28:42.682 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1852 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:28:42.682 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1852 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:28:42.682 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1852 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:28:47.688 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:28:47.688 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:28:47.688 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:28:47.688 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:28:47.688 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:28:47.688 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:28:47.696 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:28:47.696 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:28:47.696 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:28:47.696 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:28:47.697 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:28:47.699 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:28:47.700 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:28:47.700 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:28:47.700 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:28:47.701 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:28:47.701 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:28:47.701 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:28:47.702 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:28:47.704 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:28:47.705 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:28:47.705 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:28:47.705 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:28:47.706 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:28:47.706 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:28:47.706 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:28:47.706 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:28:47.709 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:28:47.709 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:28:47.709 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:28:47.710 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:28:47.710 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:28:47.710 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:28:47.710 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:28:47.710 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:28:47.715 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:28:47.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:28:47.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:28:47.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:28:47.715 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:28:47.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:28:47.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:28:47.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:28:47.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:47.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:28:47.716 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:28:47.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:47.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:47.716 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:28:47.716 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:28:47.716 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:28:47.716 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:28:47.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:47.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:47.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:47.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:28:47.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:47.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:47.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:47.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:47.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:47.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:47.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:47.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:47.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:47.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:47.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:47.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:47.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:47.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:47.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:47.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:47.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:47.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:47.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:47.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:47.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:47.718 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:28:47.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:47.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:47.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:47.718 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:28:47.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:47.719 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:28:47.719 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:28:47.719 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:28:47.719 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:28:47.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:52.726 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:28:52.726 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:28:52.726 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:28:52.726 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:28:52.726 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:28:52.726 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:28:52.735 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:28:52.736 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:28:52.736 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:28:52.737 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:28:52.737 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:28:52.740 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:28:52.741 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:28:52.741 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:28:52.741 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:28:52.742 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:28:52.742 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:28:52.742 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:28:52.742 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:28:52.745 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:28:52.745 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:28:52.745 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:28:52.745 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:28:52.746 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:28:52.746 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:28:52.746 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:28:52.746 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:28:52.748 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:28:52.748 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:28:52.749 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:28:52.749 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:28:52.749 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:28:52.749 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:28:52.749 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:28:52.749 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:28:52.753 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:28:52.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:28:52.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:28:52.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:28:52.753 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:28:52.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:28:52.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:28:52.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:28:52.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:28:52.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:52.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:52.753 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:28:52.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:52.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:52.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:52.753 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:28:52.753 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:28:52.753 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:28:52.753 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:28:52.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:52.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:52.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:52.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:28:52.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:52.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:52.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:52.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:52.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:52.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:52.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:52.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:52.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:52.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:52.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:52.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:52.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:52.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:52.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:28:52.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:52.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:52.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:52.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:28:52.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:52.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:52.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:52.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:28:52.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:28:52.758 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:28:53.236 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:28:53.281 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:28:53.282 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:28:53.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:28:53.284 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:28:53.287 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:28:53.287 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:28:53.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:28:53.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:28:53.288 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:28:53.289 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:28:53.289 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:28:53.289 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:28:53.708 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:28:53.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:28:53.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:28:53.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:28:53.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:28:54.180 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:28:54.653 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:28:54.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:28:54.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:28:54.758 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:28:54.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:28:55.125 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:28:55.597 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:28:55.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:28:55.759 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:28:55.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:28:55.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:28:56.068 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:28:56.539 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:28:56.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:28:56.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:28:56.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:28:56.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:28:57.010 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:28:57.484 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:28:57.762 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:28:57.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:28:57.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:28:57.763 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:28:57.956 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:28:58.428 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:28:58.899 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:28:59.373 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:28:59.845 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:29:00.317 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:29:00.788 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:29:01.259 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:29:01.730 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:29:02.203 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:29:02.676 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:29:03.148 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:29:03.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:29:03.333 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:29:03.339 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:29:03.340 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:29:03.340 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:29:03.340 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:29:03.341 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:29:03.342 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:29:03.342 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:29:03.342 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:29:03.342 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:29:03.342 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:29:03.342 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:29:03.342 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2287 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:29:03.342 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2287 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:29:03.342 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2287 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:29:03.342 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2287 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:29:03.342 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2288 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:29:03.342 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2288 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:29:03.342 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2288 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:29:03.342 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2288 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:29:03.342 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2288 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:29:03.342 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2288 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:29:03.342 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2288 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:29:03.342 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2288 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:29:08.347 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:29:08.347 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:29:08.347 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:29:08.347 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:29:08.347 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:29:08.347 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:29:08.356 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:29:08.357 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:29:08.358 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:29:08.358 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:29:08.358 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:29:08.363 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:29:08.363 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:29:08.363 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:29:08.363 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:29:08.364 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:29:08.364 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:29:08.364 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:29:08.364 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:29:08.368 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:29:08.369 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:29:08.369 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:29:08.369 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:29:08.369 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:29:08.369 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:29:08.369 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:29:08.369 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:29:08.373 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:29:08.373 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:29:08.373 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:29:08.373 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:29:08.374 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:29:08.374 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:29:08.374 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:29:08.374 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:29:08.380 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:29:08.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:29:08.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:29:08.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:29:08.380 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:29:08.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:29:08.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:29:08.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:29:08.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:29:08.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:08.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:08.380 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:29:08.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:08.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:08.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:08.381 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:29:08.381 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:29:08.381 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:29:08.381 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:29:08.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:08.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:08.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:08.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:29:08.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:08.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:08.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:08.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:08.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:08.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:08.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:08.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:08.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:08.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:08.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:08.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:08.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:08.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:08.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:08.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:08.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:08.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:08.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:08.384 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:29:08.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:08.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:08.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:08.384 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:29:08.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:08.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:08.384 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:29:08.384 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:29:08.384 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:29:08.384 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:29:08.384 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:29:13.391 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:29:13.391 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:29:13.391 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:29:13.391 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:29:13.391 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:29:13.391 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:29:13.399 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:29:13.401 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:29:13.401 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:29:13.401 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:29:13.401 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:29:13.404 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:29:13.404 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:29:13.405 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:29:13.405 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:29:13.405 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:29:13.405 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:29:13.406 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:29:13.406 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:29:13.408 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:29:13.408 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:29:13.408 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:29:13.408 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:29:13.408 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:29:13.409 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:29:13.409 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:29:13.409 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:29:13.411 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:29:13.411 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:29:13.411 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:29:13.411 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:29:13.411 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:29:13.411 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:29:13.411 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:29:13.411 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:29:13.414 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:29:13.414 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:29:13.414 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:29:13.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:29:13.414 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:29:13.414 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:29:13.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:29:13.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:29:13.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:29:13.415 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:29:13.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:13.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:13.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:13.415 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:29:13.415 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:29:13.415 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:29:13.415 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:29:13.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:13.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:13.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:13.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:29:13.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:13.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:13.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:13.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:13.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:13.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:13.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:13.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:13.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:13.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:13.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:13.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:13.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:13.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:13.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:13.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:13.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:13.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:13.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:13.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:13.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:13.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:13.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:13.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:13.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:13.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:13.420 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:29:13.899 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:29:13.937 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:29:13.939 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:29:13.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:29:13.940 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:29:13.942 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:29:13.942 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:29:13.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:29:13.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:29:13.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:29:13.943 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:29:13.943 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:29:13.943 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:29:13.989 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:29:13.990 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-02-08 05:29:13.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:29:13.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:29:14.371 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:29:14.418 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:29:14.418 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:29:14.418 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:29:14.418 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:29:14.842 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:29:15.315 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:29:15.418 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:29:15.419 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:29:15.419 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:29:15.419 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:29:15.788 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:29:16.260 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:29:16.419 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:29:16.419 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:29:16.420 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:29:16.420 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:29:16.732 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:29:17.205 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:29:17.421 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:29:17.421 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:29:17.421 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:29:17.421 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:29:17.677 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:29:18.149 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:29:18.421 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:29:18.422 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:29:18.422 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:29:18.422 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:29:18.623 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:29:19.095 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:29:19.567 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:29:20.039 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:29:20.512 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:29:20.985 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:29:21.458 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:29:21.931 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:29:22.404 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:29:22.877 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:29:23.350 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:29:23.823 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:29:24.295 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:29:24.769 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:29:24.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:29:24.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:29:24.992 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:29:24.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:29:24.997 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:29:24.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:29:24.997 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:29:24.998 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:29:24.998 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:29:24.998 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:29:24.998 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:29:24.998 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:29:24.998 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:29:24.998 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:29:30.005 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:29:30.005 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:29:30.005 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:29:30.005 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:29:30.005 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:29:30.005 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:29:30.014 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:29:30.015 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:29:30.015 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:29:30.016 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:29:30.016 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:29:30.021 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:29:30.021 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:29:30.021 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:29:30.021 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:29:30.021 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:29:30.021 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:29:30.022 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:29:30.022 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:29:30.026 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:29:30.026 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:29:30.027 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:29:30.027 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:29:30.027 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:29:30.027 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:29:30.027 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:29:30.027 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:29:30.031 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:29:30.031 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:29:30.032 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:29:30.032 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:29:30.032 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:29:30.032 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:29:30.032 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:29:30.032 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:29:30.038 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:29:30.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:29:30.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:29:30.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:29:30.038 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:29:30.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:29:30.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:29:30.039 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:29:30.039 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:29:30.039 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:29:30.039 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:30.039 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:30.039 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:30.039 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:29:30.039 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:29:30.039 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:29:30.039 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:29:30.039 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:30.039 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:30.039 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:30.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:29:30.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:30.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:30.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:30.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:30.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:30.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:30.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:30.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:30.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:30.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:30.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:30.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:30.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:30.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:30.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:30.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:30.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:30.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:30.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:30.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:30.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:30.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:30.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:30.042 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:29:30.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:30.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:30.042 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:29:30.042 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:29:30.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:30.042 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:29:30.042 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:29:30.042 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:29:30.042 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:29:35.051 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:29:35.051 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:29:35.051 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:29:35.051 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:29:35.051 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:29:35.051 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:29:35.060 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:29:35.061 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:29:35.061 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:29:35.062 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:29:35.062 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:29:35.066 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:29:35.066 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:29:35.066 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:29:35.066 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:29:35.067 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:29:35.067 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:29:35.067 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:29:35.067 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:29:35.070 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:29:35.070 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:29:35.070 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:29:35.070 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:29:35.070 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:29:35.070 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:29:35.071 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:29:35.071 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:29:35.073 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:29:35.073 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:29:35.073 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:29:35.073 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:29:35.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:29:35.073 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:29:35.073 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:29:35.073 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:29:35.077 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:29:35.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:29:35.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:29:35.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:29:35.077 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:29:35.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:29:35.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:29:35.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:29:35.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:29:35.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:35.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:35.077 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:29:35.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:35.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:35.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:35.077 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:29:35.077 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:29:35.077 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:29:35.077 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:29:35.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:35.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:35.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:35.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:29:35.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:35.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:35.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:35.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:35.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:35.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:35.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:35.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:35.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:35.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:35.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:35.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:35.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:35.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:35.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:35.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:35.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:35.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:35.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:35.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:35.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:35.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:35.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:35.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:35.082 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:29:35.559 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:29:35.597 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:29:35.598 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:29:35.599 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:29:35.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:29:36.027 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:29:36.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:29:36.081 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:29:36.081 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:29:36.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:29:36.501 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:29:36.973 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:29:37.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:29:37.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:29:37.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:29:37.082 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:29:37.445 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:29:37.919 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:29:38.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:29:38.084 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:29:38.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:29:38.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:29:38.391 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:29:38.863 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:29:39.085 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:29:39.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:29:39.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:29:39.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:29:39.337 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:29:39.809 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:29:40.086 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:29:40.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:29:40.087 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:29:40.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:29:40.281 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:29:40.755 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:29:41.228 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:29:41.700 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:29:42.174 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:29:42.646 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:29:43.118 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:29:43.591 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:29:44.064 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:29:44.536 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:29:45.010 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:29:45.482 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:29:45.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:29:45.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:29:45.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:29:45.613 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:29:45.615 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:29:45.615 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:29:45.615 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:29:45.615 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:29:45.615 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:29:45.615 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:29:45.615 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:29:50.619 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:29:50.619 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:29:50.619 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:29:50.619 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:29:50.619 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:29:50.619 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:29:50.628 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:29:50.629 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:29:50.629 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:29:50.630 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:29:50.630 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:29:50.634 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:29:50.634 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:29:50.634 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:29:50.634 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:29:50.634 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:29:50.635 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:29:50.635 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:29:50.635 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:29:50.637 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:29:50.637 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:29:50.637 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:29:50.637 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:29:50.638 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:29:50.638 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:29:50.638 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:29:50.638 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:29:50.640 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:29:50.640 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:29:50.641 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:29:50.641 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:29:50.641 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:29:50.641 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:29:50.641 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:29:50.641 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:29:50.644 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:29:50.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:29:50.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:29:50.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:29:50.644 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:29:50.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:29:50.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:29:50.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:50.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:29:50.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:29:50.644 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:29:50.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:50.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:50.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:50.645 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:29:50.645 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:29:50.645 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:29:50.645 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:29:50.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:50.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:50.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:50.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:29:50.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:50.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:50.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:50.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:50.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:50.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:50.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:50.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:50.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:50.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:50.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:50.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:50.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:50.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:50.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:50.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:50.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:50.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:50.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:50.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:50.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:50.646 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:29:50.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:50.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:50.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:50.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:50.646 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:29:50.646 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:29:50.646 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:29:50.646 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:29:50.646 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:29:50.646 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:29:55.655 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:29:55.655 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:29:55.655 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:29:55.655 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:29:55.655 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:29:55.655 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:29:55.663 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:29:55.664 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:29:55.664 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:29:55.664 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:29:55.664 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:29:55.667 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:29:55.667 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:29:55.667 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:29:55.667 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:29:55.667 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:29:55.668 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:29:55.668 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:29:55.668 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:29:55.670 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:29:55.670 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:29:55.670 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:29:55.670 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:29:55.670 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:29:55.670 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:29:55.670 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:29:55.670 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:29:55.672 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:29:55.672 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:29:55.673 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:29:55.673 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:29:55.673 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:29:55.673 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:29:55.673 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:29:55.673 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:29:55.676 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:29:55.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:29:55.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:29:55.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:29:55.676 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:29:55.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:29:55.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:29:55.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:55.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:29:55.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:29:55.676 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:29:55.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:55.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:55.676 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:29:55.676 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:29:55.676 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:29:55.676 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:29:55.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:55.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:55.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:55.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:29:55.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:55.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:55.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:55.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:55.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:55.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:55.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:55.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:55.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:55.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:55.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:55.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:55.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:55.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:55.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:29:55.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:55.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:55.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:55.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:55.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:55.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:55.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:55.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:29:55.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:29:55.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:55.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:29:55.681 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:29:56.160 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:29:56.201 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:29:56.203 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:29:56.206 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:29:56.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:29:56.632 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:29:56.680 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:29:56.680 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:29:56.680 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:29:56.681 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:29:57.103 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:29:57.577 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:29:57.682 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:29:57.682 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:29:57.682 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:29:57.682 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:29:58.049 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:29:58.521 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:29:58.683 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:29:58.683 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:29:58.683 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:29:58.683 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:29:58.995 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:29:59.467 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:29:59.685 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:29:59.685 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:29:59.685 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:29:59.685 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:29:59.940 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:30:00.413 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:30:00.686 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:30:00.686 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:30:00.686 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:30:00.686 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:30:00.886 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:30:01.358 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:30:01.831 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:30:02.304 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:30:02.776 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:30:03.250 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:30:03.722 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:30:04.194 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:30:04.668 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:30:05.140 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:30:05.612 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:30:06.086 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:30:06.558 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:30:07.031 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:30:07.504 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 05:30:07.977 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 05:30:08.222 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:30:08.222 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:30:08.222 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:30:08.222 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:30:08.223 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:30:08.223 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:30:08.223 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:30:08.223 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:30:08.223 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:30:08.223 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:30:08.223 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:30:13.229 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:30:13.229 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:30:13.229 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:30:13.229 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:30:13.229 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:30:13.229 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:30:13.239 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:30:13.240 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:30:13.240 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:30:13.240 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:30:13.240 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:30:13.244 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:30:13.244 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:30:13.244 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:30:13.244 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:30:13.245 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:30:13.245 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:30:13.245 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:30:13.245 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:30:13.248 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:30:13.248 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:30:13.248 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:30:13.248 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:30:13.248 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:30:13.249 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:30:13.249 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:30:13.249 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:30:13.251 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:30:13.251 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:30:13.251 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:30:13.251 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:30:13.251 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:30:13.251 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:30:13.251 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:30:13.251 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:30:13.255 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:30:13.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:30:13.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:30:13.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:30:13.255 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:30:13.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:30:13.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:30:13.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:30:13.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:30:13.255 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:30:13.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:30:13.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:30:13.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:30:13.255 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:30:13.255 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:30:13.255 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:30:13.255 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:30:13.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:30:13.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:30:13.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:30:13.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:30:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:30:13.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:30:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:30:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:30:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:30:13.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:30:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:30:13.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:30:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:30:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:30:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:30:13.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:30:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:30:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:30:13.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:30:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:30:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:30:13.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:30:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:30:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:30:13.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:30:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:30:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:30:13.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:30:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:30:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:30:13.260 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:30:13.737 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:30:13.780 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:30:13.782 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:30:13.783 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:30:13.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:30:13.785 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:30:13.786 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:30:13.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:30:13.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:30:13.786 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:30:13.786 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:30:13.786 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:30:13.786 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:30:14.210 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:30:14.258 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:30:14.258 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:30:14.258 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:30:14.259 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:30:14.681 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:30:15.155 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:30:15.259 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:30:15.260 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:30:15.260 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:30:15.260 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:30:15.627 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:30:16.099 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:30:16.261 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:30:16.261 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:30:16.261 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:30:16.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:30:16.570 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:30:17.043 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:30:17.262 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:30:17.262 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:30:17.262 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:30:17.262 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:30:17.516 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:30:17.988 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:30:18.263 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:30:18.263 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:30:18.263 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:30:18.263 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:30:18.461 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:30:18.934 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:30:19.406 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:30:19.877 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:30:20.350 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:30:20.823 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:30:21.295 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:30:21.766 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:30:22.237 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:30:22.710 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:30:23.183 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:30:23.655 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:30:24.126 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:30:24.599 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:30:24.834 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:30:24.834 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:30:24.840 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:30:24.841 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:30:24.841 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:30:24.841 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:30:24.841 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:30:24.842 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:30:24.842 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:30:24.842 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:30:24.842 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:30:24.842 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:30:24.842 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:30:24.842 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2502 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:30:24.842 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2502 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:30:24.842 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2503 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:30:24.842 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2503 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:30:24.842 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2503 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:30:24.842 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2503 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:30:24.842 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2503 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:30:24.842 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2503 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:30:24.842 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2503 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:30:24.842 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2503 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:30:29.848 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:30:29.848 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:30:29.848 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:30:29.848 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:30:29.848 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:30:29.848 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:30:29.859 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:30:29.860 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:30:29.860 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:30:29.860 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:30:29.860 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:30:29.863 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:30:29.863 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:30:29.863 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:30:29.863 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:30:29.863 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:30:29.864 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:30:29.864 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:30:29.864 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:30:29.866 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:30:29.866 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:30:29.866 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:30:29.866 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:30:29.866 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:30:29.867 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:30:29.867 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:30:29.867 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:30:29.869 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:30:29.869 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:30:29.869 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:30:29.869 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:30:29.869 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:30:29.869 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:30:29.869 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:30:29.869 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:30:29.873 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:30:29.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:30:29.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:30:29.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:30:29.873 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:30:29.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:30:29.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:30:29.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:30:29.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:30:29.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:30:29.874 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:30:29.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:30:29.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:30:29.874 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:30:29.874 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:30:29.874 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:30:29.874 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:30:29.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:30:29.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:30:29.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:30:29.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:30:29.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:30:29.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:30:29.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:30:29.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:30:29.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:30:29.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:30:29.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:30:29.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:30:29.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:30:29.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:30:29.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:30:29.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:30:29.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:30:29.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:30:29.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:30:29.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:30:29.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:30:29.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:30:29.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:30:29.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:30:29.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:30:29.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:30:29.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:30:29.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:30:29.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:30:29.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:30:29.879 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:30:30.356 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:30:30.397 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:30:30.400 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:30:30.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:30:30.402 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:30:30.405 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:30:30.405 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:30:30.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:30:30.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:30:30.406 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:30:30.406 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:30:30.406 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:30:30.406 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:30:30.829 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:30:30.877 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:30:30.877 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:30:30.877 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:30:30.877 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:30:31.300 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:30:31.773 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:30:31.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:30:31.879 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:30:31.879 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:30:31.879 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:30:32.246 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:30:32.718 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:30:32.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:30:32.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:30:32.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:30:32.880 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:30:33.189 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:30:33.662 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:30:33.881 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:30:33.881 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:30:33.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:30:33.881 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:30:34.135 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:30:34.607 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:30:34.882 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:30:34.882 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:30:34.883 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:30:34.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:30:35.078 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:30:35.549 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:30:36.022 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:30:36.494 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:30:36.967 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:30:37.438 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:30:37.911 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:30:38.383 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:30:38.856 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:30:39.327 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:30:39.797 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:30:40.271 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:30:40.743 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:30:41.216 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:30:41.689 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 05:30:42.161 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 05:30:42.634 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 05:30:43.104 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 05:30:43.575 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 05:30:44.049 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 05:30:44.521 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 05:30:44.993 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 05:30:45.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:30:45.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:30:45.459 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:30:45.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:30:45.459 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:30:45.459 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:30:45.460 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:30:45.460 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:30:45.460 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:30:45.460 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:30:45.461 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:30:45.461 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:30:45.461 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:30:45.461 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3367 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:30:45.461 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3367 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:30:50.467 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:30:50.467 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:30:50.467 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:30:50.467 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:30:50.467 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:30:50.467 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:30:50.475 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:30:50.477 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:30:50.477 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:30:50.477 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:30:50.477 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:30:50.480 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:30:50.481 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:30:50.481 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:30:50.481 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:30:50.481 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:30:50.482 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:30:50.482 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:30:50.482 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:30:50.484 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:30:50.484 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:30:50.484 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:30:50.484 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:30:50.484 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:30:50.484 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:30:50.485 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:30:50.485 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:30:50.487 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:30:50.487 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:30:50.487 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:30:50.487 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:30:50.487 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:30:50.487 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:30:50.487 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:30:50.487 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:30:50.490 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:30:50.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:30:50.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:30:50.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:30:50.491 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:30:50.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:30:50.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:30:50.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:30:50.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:30:50.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:30:50.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:30:50.491 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:30:50.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:30:50.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:30:50.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:30:50.491 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:30:50.491 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:30:50.491 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:30:50.491 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:30:50.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:30:50.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:30:50.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:30:50.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:30:50.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:30:50.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:30:50.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:30:50.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:30:50.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:30:50.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:30:50.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:30:50.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:30:50.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:30:50.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:30:50.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:30:50.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:30:50.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:30:50.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:30:50.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:30:50.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:30:50.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:30:50.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:30:50.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:30:50.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:30:50.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:30:50.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:30:50.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:30:50.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:30:50.496 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:30:50.974 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:30:51.019 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:30:51.021 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:30:51.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:30:51.023 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:30:51.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:30:51.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:30:51.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:30:51.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:30:51.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:30:51.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:30:51.032 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:30:51.032 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:30:51.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:30:51.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:30:51.085 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:30:51.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:30:51.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:30:51.086 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:30:51.086 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:30:51.086 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:30:51.086 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:30:51.086 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:30:51.086 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:30:51.086 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:30:51.086 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:30:56.092 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:30:56.092 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:30:56.092 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:30:56.092 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:30:56.092 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:30:56.092 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:30:56.100 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:30:56.101 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:30:56.101 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:30:56.101 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:30:56.101 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:30:56.105 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:30:56.105 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:30:56.105 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:30:56.105 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:30:56.106 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:30:56.106 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:30:56.106 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:30:56.106 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:30:56.108 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:30:56.108 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:30:56.109 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:30:56.109 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:30:56.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:30:56.109 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:30:56.109 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:30:56.109 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:30:56.110 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:30:56.111 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:30:56.111 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:30:56.111 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:30:56.111 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:30:56.111 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:30:56.111 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:30:56.111 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:30:56.114 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:30:56.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:30:56.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:30:56.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:30:56.114 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:30:56.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:30:56.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:30:56.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:30:56.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:30:56.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:30:56.114 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:30:56.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:30:56.114 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:30:56.114 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:30:56.114 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:30:56.114 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:30:56.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:30:56.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:30:56.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:30:56.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:30:56.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:30:56.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:30:56.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:30:56.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:30:56.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:30:56.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:30:56.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:30:56.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:30:56.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:30:56.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:30:56.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:30:56.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:30:56.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:30:56.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:30:56.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:30:56.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:30:56.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:30:56.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:30:56.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:30:56.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:30:56.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:30:56.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:30:56.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:30:56.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:30:56.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:30:56.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:30:56.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:30:56.119 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:30:56.596 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:30:56.638 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:30:56.642 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:30:56.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:30:56.645 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:30:56.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:30:56.672 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:30:56.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:30:56.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:30:56.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:30:56.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:30:56.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:30:56.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:30:56.705 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:30:56.705 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:30:56.705 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:30:56.705 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:30:56.735 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:30:56.735 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:30:56.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:30:56.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:30:56.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:30:56.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:30:56.859 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:30:56.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:30:56.877 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:30:56.877 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:30:56.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:30:56.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:30:56.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:30:56.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:30:56.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:30:56.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:30:56.885 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:30:56.885 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:30:56.885 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:30:56.885 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:30:56.924 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:30:56.924 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:30:56.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:30:56.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:30:57.069 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:30:57.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:30:57.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:30:57.116 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:30:57.117 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:30:57.117 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:30:57.118 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:30:57.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:30:57.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:30:57.119 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:30:57.138 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:30:57.138 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:30:57.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:30:57.143 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:30:57.143 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:30:57.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:30:57.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:30:57.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:30:57.145 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:30:57.145 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:30:57.145 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:30:57.145 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:30:57.157 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:30:57.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:30:57.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:30:57.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:30:57.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:30:57.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:30:57.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:30:57.465 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:30:57.484 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:30:57.484 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:30:57.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:30:57.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:30:57.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:30:57.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:30:57.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:30:57.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:30:57.492 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:30:57.492 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:30:57.492 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:30:57.492 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:30:57.538 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:30:57.538 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:30:57.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:30:57.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:30:57.539 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:30:58.011 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:30:58.118 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:30:58.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:30:58.118 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:30:58.119 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:30:58.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:30:58.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:30:58.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:30:58.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:30:58.332 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:30:58.345 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:30:58.345 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:30:58.345 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:30:58.345 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:30:58.350 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:30:58.352 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:30:58.352 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:30:58.352 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:30:58.352 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:30:58.352 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:30:58.352 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:30:58.352 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=483 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:30:58.353 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=483 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:30:58.353 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=483 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:30:58.353 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=483 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:30:58.353 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=483 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:30:58.353 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=483 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:30:58.353 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=483 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:30:58.353 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=484 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:30:58.353 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=484 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:30:58.353 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=484 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:30:58.353 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=484 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:30:58.353 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=484 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:30:58.354 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=484 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:30:58.354 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=484 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:30:58.354 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=484 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:31:03.354 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:31:03.354 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:31:03.355 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:31:03.355 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:31:03.355 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:31:03.355 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:31:03.364 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:31:03.365 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:31:03.365 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:31:03.366 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:31:03.366 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:31:03.369 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:31:03.370 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:31:03.370 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:31:03.370 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:31:03.371 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:31:03.371 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:31:03.371 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:31:03.372 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:31:03.374 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:31:03.375 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:31:03.375 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:31:03.375 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:31:03.375 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:31:03.376 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:31:03.376 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:31:03.376 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:31:03.379 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:31:03.379 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:31:03.379 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:31:03.380 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:31:03.380 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:31:03.380 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:31:03.380 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:31:03.380 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:31:03.385 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:31:03.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:31:03.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:31:03.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:31:03.385 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:31:03.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:31:03.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:31:03.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:31:03.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:31:03.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:31:03.386 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:31:03.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:31:03.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:31:03.386 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:31:03.386 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:31:03.386 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:31:03.386 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:31:03.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:31:03.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:31:03.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:31:03.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:31:03.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:31:03.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:31:03.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:31:03.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:31:03.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:31:03.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:31:03.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:31:03.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:31:03.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:31:03.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:31:03.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:31:03.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:31:03.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:31:03.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:31:03.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:31:03.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:31:03.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:31:03.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:31:03.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:31:03.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:31:03.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:31:03.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:31:03.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:31:03.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:31:03.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:31:03.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:31:03.391 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:31:03.868 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:31:03.909 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:31:03.910 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:31:03.911 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:31:03.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:31:03.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:31:03.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:31:03.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:31:03.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:31:03.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:31:03.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:31:03.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:31:03.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:31:03.964 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:31:03.965 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:31:03.965 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:31:03.965 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:31:04.006 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:31:04.006 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:31:04.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:31:04.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:31:04.341 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:31:04.390 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:31:04.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:31:04.391 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:31:04.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:31:04.812 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:31:05.285 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:31:05.391 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:31:05.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:31:05.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:31:05.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:31:05.758 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:31:06.231 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:31:06.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:31:06.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:31:06.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:31:06.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:31:06.704 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:31:07.177 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:31:07.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:31:07.394 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:31:07.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:31:07.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:31:07.650 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:31:08.123 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:31:08.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:31:08.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:31:08.396 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:31:08.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:31:08.596 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:31:09.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:31:09.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:31:09.016 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:31:09.016 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:31:09.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:31:09.027 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:31:09.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:31:09.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:31:09.032 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:31:09.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:31:09.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:31:09.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:31:09.034 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:31:09.034 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:31:09.034 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:31:09.034 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:31:09.066 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:31:09.066 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:31:09.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:31:09.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:31:09.067 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:31:09.539 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:31:10.013 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:31:10.486 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:31:10.960 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:31:11.432 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:31:11.902 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:31:12.376 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:31:12.849 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:31:13.319 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:31:13.793 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:31:14.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:31:14.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:31:14.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:31:14.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:31:14.076 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:31:14.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:31:14.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:31:14.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:31:14.100 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:31:14.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:31:14.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:31:14.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:31:14.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:31:14.102 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:31:14.102 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:31:14.102 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:31:14.102 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:31:14.119 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:31:14.119 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:31:14.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:31:14.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:31:14.265 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:31:14.737 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:31:15.210 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 05:31:15.683 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 05:31:16.155 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 05:31:16.626 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 05:31:17.097 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 05:31:17.570 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 05:31:18.043 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 05:31:18.515 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 05:31:18.986 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 05:31:19.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:31:19.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:31:19.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:31:19.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:31:19.142 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:31:19.142 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:31:19.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:31:19.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:31:19.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:31:19.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:31:19.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:31:19.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:31:19.149 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:31:19.149 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:31:19.149 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:31:19.149 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:31:19.168 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:31:19.168 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:31:19.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:31:19.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:31:19.456 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 05:31:19.930 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 05:31:20.402 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 05:31:20.874 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 05:31:21.347 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 05:31:21.820 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 05:31:22.293 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 05:31:22.766 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 05:31:23.238 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 05:31:23.711 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 05:31:24.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:31:24.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:31:24.179 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:31:24.179 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:31:24.180 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:31:24.182 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 05:31:24.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:31:24.192 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:31:24.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:31:24.192 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:31:24.193 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:31:24.193 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:31:24.193 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:31:24.193 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:31:24.193 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:31:24.193 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:31:24.193 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:31:29.200 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:31:29.200 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:31:29.200 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:31:29.200 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:31:29.200 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:31:29.200 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:31:29.209 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:31:29.210 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:31:29.210 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:31:29.211 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:31:29.211 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:31:29.214 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:31:29.215 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:31:29.215 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:31:29.215 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:31:29.215 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:31:29.216 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:31:29.216 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:31:29.216 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:31:29.218 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:31:29.218 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:31:29.218 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:31:29.218 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:31:29.219 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:31:29.219 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:31:29.219 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:31:29.219 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:31:29.221 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:31:29.221 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:31:29.221 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:31:29.221 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:31:29.222 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:31:29.222 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:31:29.222 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:31:29.222 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:31:29.225 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:31:29.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:31:29.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:31:29.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:31:29.225 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:31:29.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:31:29.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:31:29.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:31:29.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:31:29.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:31:29.225 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:31:29.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:31:29.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:31:29.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:31:29.225 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:31:29.225 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:31:29.225 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:31:29.225 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:31:29.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:31:29.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:31:29.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:31:29.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:31:29.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:31:29.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:31:29.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:31:29.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:31:29.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:31:29.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:31:29.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:31:29.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:31:29.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:31:29.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:31:29.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:31:29.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:31:29.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:31:29.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:31:29.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:31:29.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:31:29.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:31:29.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:31:29.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:31:29.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:31:29.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:31:29.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:31:29.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:31:29.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:31:29.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:31:29.230 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:31:29.708 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:31:29.743 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:31:29.744 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:31:29.745 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:31:29.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:31:29.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:31:29.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:31:29.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:31:29.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:31:29.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:31:29.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:31:29.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:31:29.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:31:29.796 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:31:29.796 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:31:29.797 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:31:29.797 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:31:29.846 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:31:29.846 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:31:29.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:31:29.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:31:30.181 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:31:30.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:31:30.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:31:30.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:31:30.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:31:30.652 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:31:31.125 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:31:31.230 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:31:31.230 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:31:31.230 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:31:31.231 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:31:31.598 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:31:32.070 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:31:32.231 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:31:32.231 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:31:32.231 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:31:32.232 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:31:32.541 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:31:33.015 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:31:33.233 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:31:33.233 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:31:33.233 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:31:33.233 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:31:33.487 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:31:33.960 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:31:34.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:31:34.234 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:31:34.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:31:34.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:31:34.433 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:31:34.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:31:34.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:31:34.855 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:31:34.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:31:34.875 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:31:34.875 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:31:34.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:31:34.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:31:34.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:31:34.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:31:34.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:31:34.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:31:34.882 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:31:34.882 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:31:34.882 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:31:34.882 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:31:34.897 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:31:34.897 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:31:34.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:31:34.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:31:34.905 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:31:35.378 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:31:35.851 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:31:36.323 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:31:36.796 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:31:37.270 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:31:37.742 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:31:38.216 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:31:38.689 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:31:39.162 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:31:39.636 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:31:39.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:31:39.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:31:39.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:31:39.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:31:39.908 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:31:39.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:31:39.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:31:39.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:31:39.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:31:39.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:31:39.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:31:39.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:31:39.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:31:39.933 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:31:39.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:31:39.933 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:31:39.933 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:31:39.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:31:39.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:31:39.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:31:39.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:31:40.108 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:31:40.579 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:31:41.050 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 05:31:41.521 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 05:31:41.992 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 05:31:42.465 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 05:31:42.938 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 05:31:43.410 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 05:31:43.881 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 05:31:44.354 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 05:31:44.827 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 05:31:44.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:31:44.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:31:44.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:31:44.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:31:44.988 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:31:44.988 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:31:44.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:31:44.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:31:44.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:31:44.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:31:44.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:31:44.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:31:44.996 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:31:44.996 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:31:44.996 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:31:44.996 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:31:45.009 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:31:45.009 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:31:45.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:31:45.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:31:45.299 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 05:31:45.772 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 05:31:46.245 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 05:31:46.718 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 05:31:47.191 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 05:31:47.664 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 05:31:48.135 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 05:31:48.608 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 05:31:49.081 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 05:31:49.554 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 05:31:50.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:31:50.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:31:50.018 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:31:50.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:31:50.018 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:31:50.027 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 05:31:50.034 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:31:50.034 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:31:50.034 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:31:50.035 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:31:50.036 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:31:50.036 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:31:50.036 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:31:50.036 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:31:50.036 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:31:50.036 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:31:50.036 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:31:55.041 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:31:55.041 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:31:55.041 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:31:55.041 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:31:55.041 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:31:55.041 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:31:55.050 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:31:55.051 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:31:55.051 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:31:55.051 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:31:55.051 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:31:55.054 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:31:55.054 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:31:55.055 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:31:55.055 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:31:55.055 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:31:55.055 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:31:55.056 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:31:55.056 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:31:55.058 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:31:55.058 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:31:55.058 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:31:55.058 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:31:55.058 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:31:55.058 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:31:55.059 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:31:55.059 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:31:55.060 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:31:55.061 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:31:55.061 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:31:55.061 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:31:55.061 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:31:55.061 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:31:55.061 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:31:55.061 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:31:55.064 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:31:55.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:31:55.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:31:55.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:31:55.064 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:31:55.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:31:55.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:31:55.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:31:55.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:31:55.065 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:31:55.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:31:55.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:31:55.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:31:55.065 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:31:55.065 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:31:55.065 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:31:55.065 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:31:55.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:31:55.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:31:55.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:31:55.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:31:55.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:31:55.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:31:55.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:31:55.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:31:55.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:31:55.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:31:55.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:31:55.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:31:55.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:31:55.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:31:55.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:31:55.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:31:55.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:31:55.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:31:55.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:31:55.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:31:55.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:31:55.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:31:55.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:31:55.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:31:55.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:31:55.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:31:55.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:31:55.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:31:55.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:31:55.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:31:55.069 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:31:55.547 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:31:55.584 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:31:55.585 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:31:55.586 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:31:55.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:31:55.601 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:31:55.601 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:31:55.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:31:55.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:31:55.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:31:55.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:31:55.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:31:55.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:31:55.635 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:31:55.635 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:31:55.636 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:31:55.636 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:31:55.640 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:31:55.640 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:31:55.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:31:55.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:31:56.019 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:31:56.068 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:31:56.068 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:31:56.069 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:31:56.069 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:31:56.491 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:31:56.962 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:31:57.070 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:31:57.070 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:31:57.070 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:31:57.070 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:31:57.433 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:31:57.906 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:31:58.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:31:58.071 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:31:58.072 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:31:58.072 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:31:58.379 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:31:58.851 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:31:59.072 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:31:59.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:31:59.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:31:59.073 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:31:59.322 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:31:59.796 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:32:00.074 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:32:00.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:32:00.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:32:00.075 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:32:00.268 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:32:00.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:00.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:32:00.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:32:00.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:32:00.668 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:32:00.668 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:32:00.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:32:00.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:32:00.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:32:00.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:32:00.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:32:00.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:00.676 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:32:00.676 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:32:00.676 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:32:00.676 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:32:00.685 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:32:00.686 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:32:00.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:00.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:00.740 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:32:01.212 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:32:01.686 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:32:02.158 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:32:02.631 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:32:03.102 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:32:03.575 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:32:04.047 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:32:04.519 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:32:04.990 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:32:05.463 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:32:05.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:05.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:32:05.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:32:05.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:32:05.697 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:32:05.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:32:05.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:32:05.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:32:05.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:32:05.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:32:05.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:32:05.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:32:05.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:05.720 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:32:05.720 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:32:05.720 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:32:05.720 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:32:05.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:32:05.739 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:32:05.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:05.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:05.935 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:32:06.407 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:32:06.878 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 05:32:07.349 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 05:32:07.822 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 05:32:08.295 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 05:32:08.767 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 05:32:09.238 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 05:32:09.709 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 05:32:10.182 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 05:32:10.655 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 05:32:10.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:10.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:32:10.749 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:32:10.749 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:32:10.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:32:10.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:32:10.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:32:10.774 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:32:10.774 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:32:10.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:32:10.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:32:10.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:10.777 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:32:10.777 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:32:10.777 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:32:10.777 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:32:10.794 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:32:10.794 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:32:10.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:10.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:11.126 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 05:32:11.599 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 05:32:12.072 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 05:32:12.545 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 05:32:13.018 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 05:32:13.491 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 05:32:13.963 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 05:32:14.436 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 05:32:14.909 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 05:32:15.382 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 05:32:15.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:15.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:32:15.803 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:32:15.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:32:15.804 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:32:15.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:32:15.819 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:32:15.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:32:15.819 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:32:15.825 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:32:15.825 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:32:15.825 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:32:15.825 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:32:15.825 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:32:15.825 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:32:15.825 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:32:15.826 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4484 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:32:15.826 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4484 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:32:15.826 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4484 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:32:15.826 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4484 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:32:15.826 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4484 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:32:15.826 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4484 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:32:20.826 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:32:20.826 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:32:20.826 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:32:20.826 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:32:20.826 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:32:20.826 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:32:20.835 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:32:20.836 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:32:20.836 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:32:20.837 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:32:20.837 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:32:20.842 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:32:20.842 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:32:20.843 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:32:20.843 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:32:20.843 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:32:20.844 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:32:20.844 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:32:20.844 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:32:20.847 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:32:20.848 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:32:20.848 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:32:20.848 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:32:20.848 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:32:20.849 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:32:20.849 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:32:20.849 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:32:20.851 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:32:20.852 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:32:20.852 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:32:20.852 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:32:20.852 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:32:20.852 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:32:20.853 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:32:20.853 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:32:20.856 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:32:20.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:32:20.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:32:20.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:32:20.856 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:32:20.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:32:20.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:32:20.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:32:20.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:32:20.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:32:20.856 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:32:20.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:32:20.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:32:20.856 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:32:20.856 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:32:20.856 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:32:20.857 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:32:20.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:32:20.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:32:20.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:32:20.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:32:20.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:32:20.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:32:20.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:32:20.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:32:20.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:32:20.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:32:20.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:32:20.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:32:20.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:32:20.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:32:20.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:32:20.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:32:20.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:32:20.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:32:20.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:32:20.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:32:20.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:32:20.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:32:20.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:32:20.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:32:20.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:32:20.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:32:20.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:32:20.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:32:20.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:32:20.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:32:20.861 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:32:21.340 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:32:21.384 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:32:21.386 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:32:21.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:32:21.386 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:32:21.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:32:21.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:32:21.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:32:21.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:32:21.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:32:21.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:32:21.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:32:21.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:21.434 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:32:21.435 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:32:21.435 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:32:21.435 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:32:21.478 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:32:21.478 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:32:21.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:21.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:21.812 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:32:21.859 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:32:21.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:32:21.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:32:21.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:32:22.284 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:32:22.754 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:32:22.860 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:32:22.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:32:22.861 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:32:22.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:32:23.228 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:32:23.700 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:32:23.861 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:32:23.861 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:32:23.862 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:32:23.862 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:32:24.173 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:32:24.647 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:32:24.862 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:32:24.863 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:32:24.863 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:32:24.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:32:25.119 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:32:25.592 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:32:25.863 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:32:25.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:32:25.864 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:32:25.864 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:32:26.063 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:32:26.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:26.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:32:26.487 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:32:26.487 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:32:26.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:32:26.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:32:26.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:32:26.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:32:26.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:32:26.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:32:26.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:32:26.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:26.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:32:26.516 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:32:26.516 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:32:26.516 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:32:26.530 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:32:26.530 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:32:26.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:26.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:26.533 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:32:27.005 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:32:27.479 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:32:27.952 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:32:28.426 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:32:28.899 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:32:29.373 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:32:29.847 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:32:30.320 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:32:30.794 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:32:31.268 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:32:31.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:31.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:32:31.540 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:32:31.540 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:32:31.540 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:32:31.559 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:32:31.559 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:32:31.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:32:31.566 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:32:31.566 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:32:31.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:32:31.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:32:31.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:31.569 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:32:31.569 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:32:31.569 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:32:31.569 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:32:31.595 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:32:31.595 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:32:31.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:31.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:31.740 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:32:32.211 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:32:32.681 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 05:32:33.152 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 05:32:33.626 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 05:32:34.098 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 05:32:34.570 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 05:32:35.041 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 05:32:35.514 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 05:32:35.987 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 05:32:36.459 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 05:32:36.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:36.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:32:36.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:32:36.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:32:36.614 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:32:36.614 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:32:36.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:32:36.620 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:32:36.620 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:32:36.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:32:36.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:32:36.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:36.622 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:32:36.622 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:32:36.622 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:32:36.622 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:32:36.642 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:32:36.642 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:32:36.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:36.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:36.929 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 05:32:37.403 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 05:32:37.876 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 05:32:38.348 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 05:32:38.821 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 05:32:39.294 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 05:32:39.766 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 05:32:40.238 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 05:32:40.712 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 05:32:41.184 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 05:32:41.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:41.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:32:41.651 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:32:41.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:32:41.652 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:32:41.655 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 05:32:41.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:32:41.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:32:41.667 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:32:41.667 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:32:41.669 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:32:41.669 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:32:41.669 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:32:41.669 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:32:41.669 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:32:41.669 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:32:41.669 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:32:41.669 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4492 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:32:41.669 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4492 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:32:41.669 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4492 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:32:41.669 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4493 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:32:41.669 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4493 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:32:41.669 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4493 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:32:41.669 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4493 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:32:41.669 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4493 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:32:41.669 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4493 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:32:41.669 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4493 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:32:41.669 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4493 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:32:46.674 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:32:46.674 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:32:46.674 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:32:46.674 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:32:46.674 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:32:46.674 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:32:46.683 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:32:46.684 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:32:46.684 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:32:46.685 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:32:46.685 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:32:46.689 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:32:46.690 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:32:46.690 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:32:46.690 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:32:46.691 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:32:46.691 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:32:46.692 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:32:46.692 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:32:46.695 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:32:46.695 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:32:46.696 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:32:46.696 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:32:46.696 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:32:46.697 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:32:46.697 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:32:46.697 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:32:46.700 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:32:46.700 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:32:46.701 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:32:46.701 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:32:46.701 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:32:46.701 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:32:46.702 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:32:46.702 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:32:46.706 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:32:46.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:32:46.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:32:46.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:32:46.706 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:32:46.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:32:46.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:32:46.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:32:46.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:32:46.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:32:46.707 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:32:46.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:32:46.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:32:46.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:32:46.707 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:32:46.707 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:32:46.707 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:32:46.707 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:32:46.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:32:46.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:32:46.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:32:46.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:32:46.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:32:46.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:32:46.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:32:46.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:32:46.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:32:46.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:32:46.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:32:46.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:32:46.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:32:46.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:32:46.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:32:46.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:32:46.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:32:46.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:32:46.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:32:46.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:32:46.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:32:46.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:32:46.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:32:46.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:32:46.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:32:46.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:32:46.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:32:46.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:32:46.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:32:46.712 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:32:47.189 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:32:47.226 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:32:47.227 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:32:47.228 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:32:47.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:32:47.236 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:32:47.236 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:32:47.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:32:47.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:32:47.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:32:47.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:32:47.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:32:47.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:47.280 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:32:47.280 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:32:47.280 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:32:47.280 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:32:47.327 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:32:47.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:32:47.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:47.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:47.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:47.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:32:47.571 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:32:47.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:32:47.590 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:32:47.590 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:32:47.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:32:47.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:32:47.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:32:47.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:32:47.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:32:47.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:47.598 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:32:47.598 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:32:47.598 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:32:47.598 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:32:47.606 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:32:47.606 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:32:47.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:47.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:47.657 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:32:47.710 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:32:47.711 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:32:47.711 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:32:47.712 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:32:47.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:47.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:32:47.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:32:47.988 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:32:47.988 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:32:48.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:32:48.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:32:48.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:32:48.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:32:48.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:32:48.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:32:48.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:32:48.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:48.012 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:32:48.012 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:32:48.012 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:32:48.012 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:32:48.026 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:32:48.026 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:32:48.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:48.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:48.127 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:32:48.598 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:32:48.712 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:32:48.712 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:32:48.712 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:32:48.712 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:32:48.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:48.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:32:48.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:32:48.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:32:48.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:32:48.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:32:48.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:32:48.782 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:32:48.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:32:48.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:32:48.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:32:48.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:48.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:32:48.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:32:48.783 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:32:48.783 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:32:48.832 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:32:48.832 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:32:48.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:48.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:49.069 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:32:49.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:49.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:32:49.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:32:49.391 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:32:49.391 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:32:49.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:32:49.404 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:32:49.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:32:49.404 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:32:49.405 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:32:49.405 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:32:49.405 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:32:49.405 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:32:49.405 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:32:49.405 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:32:49.405 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:32:49.405 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=585 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:32:49.405 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=585 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:32:49.405 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=585 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:32:49.405 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=585 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:32:49.405 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=585 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:32:49.405 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=585 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:32:49.405 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=585 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:32:54.413 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:32:54.413 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:32:54.413 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:32:54.413 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:32:54.413 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:32:54.413 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:32:54.422 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:32:54.422 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:32:54.423 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:32:54.423 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:32:54.423 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:32:54.426 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:32:54.426 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:32:54.426 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:32:54.426 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:32:54.426 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:32:54.426 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:32:54.426 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:32:54.426 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:32:54.429 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:32:54.429 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:32:54.429 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:32:54.429 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:32:54.429 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:32:54.429 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:32:54.429 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:32:54.429 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:32:54.432 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:32:54.432 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:32:54.432 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:32:54.432 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:32:54.432 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:32:54.432 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:32:54.433 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:32:54.433 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:32:54.437 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:32:54.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:32:54.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:32:54.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:32:54.437 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:32:54.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:32:54.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:32:54.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:32:54.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:32:54.437 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:32:54.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:32:54.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:32:54.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:32:54.437 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:32:54.437 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:32:54.437 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:32:54.437 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:32:54.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:32:54.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:32:54.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:32:54.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:32:54.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:32:54.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:32:54.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:32:54.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:32:54.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:32:54.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:32:54.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:32:54.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:32:54.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:32:54.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:32:54.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:32:54.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:32:54.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:32:54.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:32:54.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:32:54.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:32:54.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:32:54.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:32:54.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:32:54.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:32:54.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:32:54.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:32:54.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:32:54.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:32:54.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:32:54.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:32:54.442 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:32:54.920 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:32:54.958 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:32:54.960 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:32:54.961 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:32:54.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:32:54.979 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:32:54.980 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:32:54.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:32:55.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:32:55.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:32:55.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:32:55.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:32:55.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:55.012 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:32:55.012 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:32:55.012 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:32:55.012 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:32:55.058 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:32:55.059 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:32:55.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:55.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:32:55.393 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:32:55.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:32:55.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:32:55.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:32:55.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:32:55.864 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:32:56.335 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:32:56.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:32:56.443 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:32:56.443 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:32:56.443 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:32:56.805 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:32:57.279 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:32:57.444 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:32:57.444 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:32:57.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:32:57.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:32:57.751 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:32:58.224 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:32:58.445 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:32:58.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:32:58.446 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:32:58.446 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:32:58.695 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:32:59.165 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:32:59.446 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:32:59.447 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:32:59.447 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:32:59.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:32:59.639 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:33:00.111 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:33:00.584 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:33:01.055 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:33:01.528 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:33:02.001 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:33:02.473 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:33:02.944 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:33:03.418 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:33:03.890 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:33:04.363 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:33:04.834 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:33:05.307 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:33:05.780 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:33:06.252 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 05:33:06.723 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 05:33:07.194 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 05:33:07.665 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 05:33:08.138 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 05:33:08.611 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 05:33:09.083 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 05:33:09.556 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 05:33:10.029 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 05:33:10.502 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 05:33:10.973 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 05:33:11.446 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 05:33:11.919 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 05:33:12.392 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 05:33:12.862 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 05:33:13.335 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 05:33:13.808 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 05:33:14.281 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 05:33:14.755 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 05:33:15.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:33:15.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:33:15.066 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:33:15.066 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:33:15.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:33:15.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:33:15.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:33:15.087 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:33:15.087 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:33:15.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:33:15.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:33:15.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:33:15.090 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:33:15.090 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:33:15.090 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:33:15.090 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:33:15.129 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:33:15.129 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:33:15.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:33:15.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:33:15.227 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 05:33:15.699 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 05:33:16.172 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 05:33:16.645 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 05:33:17.118 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 05:33:17.590 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 05:33:18.063 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 05:33:18.532 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 05:33:19.005 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 05:33:19.478 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 05:33:19.952 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 05:33:20.425 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 05:33:20.899 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 05:33:21.372 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 05:33:21.845 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 05:33:22.318 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 05:33:22.791 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 05:33:23.263 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 05:33:23.735 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-08 05:33:24.208 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-08 05:33:24.681 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-08 05:33:25.155 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-08 05:33:25.627 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-08 05:33:26.100 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-08 05:33:26.573 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-08 05:33:27.046 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-08 05:33:27.520 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-08 05:33:27.993 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-08 05:33:28.466 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-08 05:33:28.939 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-08 05:33:29.413 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-08 05:33:29.885 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-08 05:33:30.356 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-08 05:33:30.829 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-08 05:33:31.302 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-08 05:33:31.774 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-08 05:33:32.248 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-08 05:33:32.720 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-08 05:33:33.192 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-08 05:33:33.664 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-08 05:33:34.138 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-08 05:33:34.611 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-08 05:33:35.085 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-08 05:33:35.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:33:35.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:33:35.137 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:33:35.137 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:33:35.137 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:33:35.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:33:35.153 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:33:35.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:33:35.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:33:35.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:33:35.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:33:35.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:33:35.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:33:35.161 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:33:35.161 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:33:35.161 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:33:35.161 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:33:35.169 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:33:35.169 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:33:35.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:33:35.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:33:35.556 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-08 05:33:36.028 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-08 05:33:36.500 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-08 05:33:36.973 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-08 05:33:37.445 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-08 05:33:37.918 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-02-08 05:33:38.389 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-02-08 05:33:38.859 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-02-08 05:33:39.330 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-02-08 05:33:39.801 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-02-08 05:33:40.274 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-02-08 05:33:40.747 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-02-08 05:33:41.219 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-02-08 05:33:41.690 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-02-08 05:33:42.161 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-02-08 05:33:42.634 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-02-08 05:33:43.106 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-02-08 05:33:43.578 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-02-08 05:33:44.049 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-02-08 05:33:44.523 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-02-08 05:33:44.995 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-02-08 05:33:45.468 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-02-08 05:33:45.939 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-02-08 05:33:46.409 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-02-08 05:33:46.880 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-02-08 05:33:47.353 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-02-08 05:33:47.826 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-02-08 05:33:48.298 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-02-08 05:33:48.769 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-02-08 05:33:49.242 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-02-08 05:33:49.715 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-02-08 05:33:50.187 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-02-08 05:33:50.658 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-02-08 05:33:51.129 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-02-08 05:33:51.603 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-02-08 05:33:52.075 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-02-08 05:33:52.547 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-02-08 05:33:53.018 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-02-08 05:33:53.489 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-02-08 05:33:53.962 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-02-08 05:33:54.435 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-02-08 05:33:54.907 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-02-08 05:33:55.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:33:55.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:33:55.181 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:33:55.181 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:33:55.196 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:33:55.196 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:33:55.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:33:55.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:33:55.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:33:55.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:33:55.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:33:55.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:33:55.203 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:33:55.203 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:33:55.203 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:33:55.203 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:33:55.232 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:33:55.233 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:33:55.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:33:55.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:33:55.377 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-02-08 05:33:55.850 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-02-08 05:33:56.321 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-02-08 05:33:56.790 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-02-08 05:33:57.263 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-02-08 05:33:57.736 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-02-08 05:33:58.209 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-02-08 05:33:58.682 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-02-08 05:33:59.155 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-02-08 05:33:59.627 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-02-08 05:34:00.101 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-02-08 05:34:00.573 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-02-08 05:34:01.045 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-02-08 05:34:01.519 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-02-08 05:34:01.991 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-02-08 05:34:02.463 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-02-08 05:34:02.936 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-02-08 05:34:03.409 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-02-08 05:34:03.881 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-02-08 05:34:04.355 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-02-08 05:34:04.827 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-02-08 05:34:05.300 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-02-08 05:34:05.773 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-02-08 05:34:06.246 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-02-08 05:34:06.718 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-02-08 05:34:07.189 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-02-08 05:34:07.663 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-02-08 05:34:08.136 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-02-08 05:34:08.609 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-02-08 05:34:09.082 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-02-08 05:34:09.554 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-02-08 05:34:10.026 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-02-08 05:34:10.499 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-02-08 05:34:10.972 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-02-08 05:34:11.445 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-02-08 05:34:11.918 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-02-08 05:34:12.390 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-02-08 05:34:12.863 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-02-08 05:34:13.336 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-02-08 05:34:13.808 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-02-08 05:34:14.279 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-02-08 05:34:14.753 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-02-08 05:34:15.225 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-02-08 05:34:15.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:15.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:34:15.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:15.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:15.241 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:34:15.255 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:34:15.255 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:34:15.255 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:34:15.255 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:34:15.257 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:34:15.257 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:34:15.257 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:34:15.257 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:34:15.257 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:34:15.257 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:34:15.257 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:34:20.262 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:34:20.262 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:34:20.262 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:34:20.262 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:34:20.262 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:34:20.262 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:34:20.271 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:34:20.272 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:34:20.272 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:34:20.272 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:34:20.272 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:34:20.276 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:34:20.276 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:34:20.277 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:34:20.277 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:34:20.279 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:34:20.280 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:34:20.280 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:34:20.280 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:34:20.282 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:34:20.283 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:34:20.283 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:34:20.283 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:34:20.283 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:34:20.283 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:34:20.283 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:34:20.283 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:34:20.286 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:34:20.286 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:34:20.286 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:34:20.286 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:34:20.286 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:34:20.286 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:34:20.286 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:34:20.286 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:34:20.290 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:34:20.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:34:20.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:34:20.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:34:20.290 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:34:20.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:34:20.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:34:20.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:34:20.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:34:20.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:34:20.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:34:20.291 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:34:20.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:34:20.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:34:20.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:34:20.291 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:34:20.291 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:34:20.291 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:34:20.291 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:34:20.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:34:20.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:34:20.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:34:20.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:34:20.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:34:20.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:34:20.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:34:20.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:34:20.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:34:20.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:34:20.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:34:20.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:34:20.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:34:20.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:34:20.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:34:20.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:34:20.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:34:20.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:34:20.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:34:20.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:34:20.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:34:20.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:34:20.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:34:20.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:34:20.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:34:20.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:34:20.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:34:20.293 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:34:20.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:34:20.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:34:20.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:34:20.293 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:34:20.293 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:34:20.293 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:34:20.293 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:34:25.302 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:34:25.302 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:34:25.302 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:34:25.302 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:34:25.302 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:34:25.302 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:34:25.310 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:34:25.311 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:34:25.312 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:34:25.312 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:34:25.312 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:34:25.316 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:34:25.316 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:34:25.316 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:34:25.316 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:34:25.316 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:34:25.316 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:34:25.316 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:34:25.316 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:34:25.320 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:34:25.320 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:34:25.321 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:34:25.321 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:34:25.321 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:34:25.321 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:34:25.321 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:34:25.321 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:34:25.323 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:34:25.324 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:34:25.324 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:34:25.324 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:34:25.324 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:34:25.324 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:34:25.324 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:34:25.324 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:34:25.327 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:34:25.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:34:25.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:34:25.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:34:25.328 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:34:25.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:34:25.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:34:25.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:34:25.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:34:25.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:34:25.328 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:34:25.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:34:25.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:34:25.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:34:25.328 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:34:25.328 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:34:25.328 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:34:25.328 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:34:25.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:34:25.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:34:25.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:34:25.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:34:25.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:34:25.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:34:25.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:34:25.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:34:25.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:34:25.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:34:25.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:34:25.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:34:25.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:34:25.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:34:25.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:34:25.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:34:25.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:34:25.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:34:25.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:34:25.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:34:25.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:34:25.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:34:25.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:34:25.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:34:25.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:34:25.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:34:25.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:34:25.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:34:25.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:34:25.333 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:34:25.810 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:34:25.849 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:34:25.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:34:25.852 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:34:25.854 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:34:25.875 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:25.875 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:25.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:34:25.887 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:25.887 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:25.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:34:25.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:34:25.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:25.903 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:34:25.903 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:34:25.903 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:34:25.904 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:34:25.948 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:34:25.949 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:34:25.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:25.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:26.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:26.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:34:26.150 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:26.150 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:26.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:34:26.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:26.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:26.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:34:26.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:26.169 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:34:26.169 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:34:26.169 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:34:26.169 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:34:26.181 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:34:26.181 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:34:26.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:26.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:26.281 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:34:26.331 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:34:26.331 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:34:26.331 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:34:26.331 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:34:26.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:26.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:34:26.385 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:26.385 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:26.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:34:26.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:26.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:26.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:34:26.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:26.404 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:34:26.404 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:34:26.404 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:34:26.404 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:34:26.412 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:34:26.412 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:34:26.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:26.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:26.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:26.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:34:26.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:26.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:26.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:26.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:26.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:34:26.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:26.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:26.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:34:26.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:34:26.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:26.643 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:34:26.643 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:34:26.643 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:34:26.643 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:34:26.647 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:34:26.647 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:34:26.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:26.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:26.753 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:34:26.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:26.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:34:26.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:26.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:26.934 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:34:26.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:34:26.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:26.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:26.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:34:26.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:26.952 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:34:26.953 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:34:26.953 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:34:26.953 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:34:26.988 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:34:26.988 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:34:26.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:26.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:27.225 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:34:27.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:27.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:34:27.292 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:27.292 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:27.292 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:34:27.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:34:27.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:27.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:27.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:34:27.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:27.311 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:34:27.311 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:34:27.311 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:34:27.311 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:34:27.313 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:34:27.313 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:34:27.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:27.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:27.331 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:34:27.332 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:34:27.332 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:34:27.332 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:34:27.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:27.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:34:27.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:27.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:27.612 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:34:27.623 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:27.623 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:27.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:34:27.629 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:27.629 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:27.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:34:27.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:34:27.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:27.631 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:34:27.631 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:34:27.631 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:34:27.631 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:34:27.640 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:34:27.641 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:34:27.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:27.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:27.696 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:34:28.167 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:34:28.333 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:34:28.333 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:34:28.333 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:34:28.333 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:34:28.638 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:34:29.111 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:34:29.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:34:29.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:34:29.334 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:34:29.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:34:29.583 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:34:30.055 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:34:30.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:30.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:34:30.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:30.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:30.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:34:30.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:30.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:30.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:34:30.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:30.215 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:34:30.215 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:34:30.215 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:34:30.215 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:34:30.235 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:34:30.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:34:30.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:30.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:30.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:34:30.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:34:30.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:34:30.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:34:30.519 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:34:30.992 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:34:31.465 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:34:31.938 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:34:32.410 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:34:32.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:32.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:34:32.806 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:32.806 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:32.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:34:32.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:32.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:32.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:34:32.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:32.824 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:34:32.824 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:34:32.824 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:34:32.824 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:34:32.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:34:32.827 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:34:32.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:32.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:32.883 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:34:33.354 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:34:33.827 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:34:34.299 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:34:34.772 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:34:35.242 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:34:35.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:35.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:34:35.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:35.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:35.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:35.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:35.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:34:35.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:35.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:35.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:34:35.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:34:35.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:35.418 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:34:35.418 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:34:35.419 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:34:35.419 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:34:35.422 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:34:35.422 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:34:35.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:35.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:35.713 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:34:36.186 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:34:36.659 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:34:37.131 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 05:34:37.603 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 05:34:38.076 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 05:34:38.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:38.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:34:38.164 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:38.164 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:38.164 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:34:38.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:34:38.181 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:38.181 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:38.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:34:38.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:38.183 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:34:38.183 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:34:38.183 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:34:38.183 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:34:38.214 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:34:38.214 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:34:38.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:38.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:38.547 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 05:34:39.019 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 05:34:39.493 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 05:34:39.966 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 05:34:40.438 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 05:34:40.911 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 05:34:40.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:40.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:34:40.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:40.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:40.996 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:34:41.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:34:41.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:41.012 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:41.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:34:41.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:41.015 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:34:41.015 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:34:41.015 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:34:41.015 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:34:41.045 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:34:41.045 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:34:41.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:41.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:41.383 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 05:34:41.856 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 05:34:42.330 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 05:34:42.802 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 05:34:43.275 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 05:34:43.748 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 05:34:43.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:43.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:34:43.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:43.831 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:43.831 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:34:43.843 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:34:43.844 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:34:43.844 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:34:43.844 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:34:43.851 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:34:43.851 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:34:43.851 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:34:43.851 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:34:43.851 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:34:43.851 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:34:43.852 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:34:43.852 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4002 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:34:43.852 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4002 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:34:43.852 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4002 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:34:43.852 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4002 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:34:43.852 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4002 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:34:43.852 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4002 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:34:43.853 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4003 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:34:43.853 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4003 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:34:43.853 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4003 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:34:43.853 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4003 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:34:43.853 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4003 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:34:43.853 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4003 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:34:43.853 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4003 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:34:43.853 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4003 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:34:48.851 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:34:48.851 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:34:48.851 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:34:48.851 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:34:48.851 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:34:48.851 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:34:48.860 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:34:48.861 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:34:48.861 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:34:48.862 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:34:48.862 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:34:48.866 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:34:48.866 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:34:48.867 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:34:48.867 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:34:48.867 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:34:48.867 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:34:48.868 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:34:48.868 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:34:48.870 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:34:48.870 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:34:48.870 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:34:48.870 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:34:48.871 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:34:48.871 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:34:48.871 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:34:48.871 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:34:48.873 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:34:48.873 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:34:48.873 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:34:48.873 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:34:48.873 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:34:48.874 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:34:48.874 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:34:48.874 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:34:48.877 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:34:48.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:34:48.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:34:48.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:34:48.877 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:34:48.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:34:48.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:34:48.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:34:48.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:34:48.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:34:48.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:34:48.877 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:34:48.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:34:48.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:34:48.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:34:48.878 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:34:48.878 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:34:48.878 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:34:48.878 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:34:48.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:34:48.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:34:48.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:34:48.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:34:48.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:34:48.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:34:48.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:34:48.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:34:48.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:34:48.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:34:48.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:34:48.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:34:48.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:34:48.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:34:48.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:34:48.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:34:48.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:34:48.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:34:48.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:34:48.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:34:48.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:34:48.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:34:48.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:34:48.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:34:48.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:34:48.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:34:48.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:34:48.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:34:48.882 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:34:49.359 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:34:49.400 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:34:49.400 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:34:49.401 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:34:49.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:34:49.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:49.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:49.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:34:49.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:49.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:49.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:34:49.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:34:49.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:49.452 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:34:49.452 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:34:49.452 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:34:49.452 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:34:49.498 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:34:49.498 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:34:49.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:49.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:49.832 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:34:49.881 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:34:49.881 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:34:49.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:34:49.882 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:34:50.303 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:34:50.776 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:34:50.883 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:34:50.883 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:34:50.883 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:34:50.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:34:51.249 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:34:51.722 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:34:51.885 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:34:51.885 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:34:51.885 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:34:51.885 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:34:52.195 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:34:52.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:52.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:34:52.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:52.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:52.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:52.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:52.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:34:52.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:52.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:52.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:34:52.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:34:52.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:52.640 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:34:52.640 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:34:52.640 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:34:52.640 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:34:52.660 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:34:52.660 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:34:52.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:52.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:52.667 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:34:52.886 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:34:52.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:34:52.886 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:34:52.886 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:34:53.139 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:34:53.611 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:34:53.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:34:53.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:34:53.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:34:53.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:34:54.085 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:34:54.558 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:34:55.031 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:34:55.504 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:34:55.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:55.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:34:55.871 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:55.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:55.871 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:34:55.885 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:55.885 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:55.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:34:55.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:55.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:55.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:34:55.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:34:55.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:55.893 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:34:55.893 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:34:55.893 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:34:55.893 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:34:55.925 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:34:55.925 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:34:55.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:55.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:55.976 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:34:56.448 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:34:56.921 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:34:57.394 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:34:57.866 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:34:58.337 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:34:58.810 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:34:59.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:59.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:34:59.208 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:59.208 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:59.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:59.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:59.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:34:59.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:34:59.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:34:59.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:34:59.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:34:59.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:59.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:34:59.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:34:59.234 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:34:59.234 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:34:59.276 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:34:59.276 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:34:59.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:59.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:34:59.282 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:34:59.755 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:35:00.227 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:35:00.700 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 05:35:01.172 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 05:35:01.645 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 05:35:02.118 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 05:35:02.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:02.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:35:02.461 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:35:02.461 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:35:02.461 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:35:02.473 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:35:02.473 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:35:02.473 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:35:02.473 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:35:02.475 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:35:02.475 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:35:02.475 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:35:02.475 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:35:02.475 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:35:02.475 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:35:02.475 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:35:02.475 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2934 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:35:02.475 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2934 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:35:02.475 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2935 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:35:02.475 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2935 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:35:02.475 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2935 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:35:02.475 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2935 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:35:02.475 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2935 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:35:02.475 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2935 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:35:02.475 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2935 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:35:02.475 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=2935 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:35:07.480 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:35:07.480 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:35:07.480 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:35:07.480 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:35:07.480 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:35:07.481 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:35:07.492 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:35:07.494 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:35:07.494 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:35:07.495 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:35:07.495 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:35:07.501 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:35:07.501 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:35:07.502 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:35:07.502 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:35:07.502 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:35:07.503 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:35:07.503 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:35:07.503 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:35:07.506 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:35:07.506 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:35:07.507 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:35:07.507 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:35:07.507 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:35:07.508 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:35:07.508 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:35:07.508 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:35:07.511 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:35:07.511 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:35:07.512 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:35:07.512 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:35:07.512 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:35:07.512 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:35:07.512 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:35:07.512 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:35:07.516 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:35:07.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:35:07.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:35:07.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:35:07.516 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:35:07.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:35:07.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:35:07.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:35:07.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:35:07.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:35:07.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:35:07.517 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:35:07.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:35:07.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:35:07.517 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:35:07.517 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:35:07.517 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:35:07.517 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:35:07.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:35:07.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:35:07.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:35:07.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:35:07.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:35:07.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:35:07.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:35:07.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:35:07.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:35:07.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:35:07.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:35:07.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:35:07.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:35:07.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:35:07.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:35:07.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:35:07.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:35:07.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:35:07.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:35:07.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:35:07.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:35:07.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:35:07.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:35:07.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:35:07.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:35:07.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:35:07.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:35:07.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:35:07.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:35:07.522 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:35:08.000 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:35:08.043 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:35:08.045 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:35:08.047 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:35:08.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:35:08.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:35:08.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:35:08.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:35:08.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:35:08.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:35:08.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:35:08.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:35:08.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:08.104 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:35:08.105 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:35:08.105 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:35:08.105 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:35:08.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:35:08.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:35:08.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:08.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:08.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:08.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:35:08.462 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:35:08.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:35:08.471 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:35:08.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:35:08.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:35:08.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:35:08.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:35:08.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:35:08.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:35:08.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:35:08.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:08.494 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:35:08.494 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:35:08.494 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:35:08.494 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:35:08.514 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:35:08.515 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:35:08.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:08.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:08.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:35:08.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:35:08.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:35:08.521 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:35:08.943 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:35:08.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:09.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:35:09.005 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:35:09.005 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:35:09.005 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:35:09.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:35:09.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:35:09.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:35:09.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:35:09.027 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:35:09.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:35:09.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:35:09.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:09.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:35:09.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:35:09.028 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:35:09.028 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:35:09.032 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:35:09.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:35:09.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:09.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:09.415 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:35:09.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:35:09.522 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:35:09.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:35:09.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:35:09.886 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:35:10.357 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:35:10.523 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:35:10.523 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:35:10.523 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:35:10.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:35:10.830 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:35:11.303 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:35:11.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:35:11.524 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:35:11.524 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:35:11.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:35:11.775 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:35:11.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:11.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:35:11.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:35:11.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:35:11.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:35:11.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:35:11.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:35:11.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:35:11.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:35:11.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:35:11.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:35:11.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:11.952 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:35:11.952 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:35:11.952 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:35:11.952 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:35:11.955 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:35:11.955 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:35:11.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:11.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:12.245 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:35:12.525 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:35:12.526 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:35:12.526 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:35:12.526 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:35:12.717 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:35:13.190 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:35:13.663 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:35:14.136 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:35:14.609 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:35:14.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:14.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:35:14.928 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:35:14.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:35:14.929 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:35:14.943 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:35:14.943 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:35:14.943 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:35:14.944 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:35:14.945 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:35:14.945 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:35:14.945 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:35:14.945 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:35:14.945 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:35:14.945 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:35:14.945 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:35:19.950 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:35:19.950 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:35:19.950 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:35:19.950 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:35:19.950 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:35:19.950 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:35:19.958 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:35:19.959 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:35:19.959 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:35:19.959 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:35:19.959 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:35:19.963 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:35:19.963 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:35:19.964 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:35:19.964 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:35:19.964 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:35:19.964 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:35:19.965 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:35:19.965 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:35:19.967 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:35:19.967 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:35:19.967 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:35:19.967 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:35:19.968 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:35:19.968 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:35:19.968 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:35:19.968 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:35:19.970 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:35:19.970 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:35:19.971 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:35:19.971 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:35:19.971 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:35:19.971 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:35:19.971 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:35:19.971 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:35:19.974 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:35:19.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:35:19.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:35:19.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:35:19.974 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:35:19.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:35:19.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:35:19.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:35:19.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:35:19.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:35:19.975 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:35:19.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:35:19.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:35:19.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:35:19.975 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:35:19.975 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:35:19.975 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:35:19.975 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:35:19.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:35:19.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:35:19.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:35:19.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:35:19.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:35:19.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:35:19.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:35:19.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:35:19.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:35:19.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:35:19.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:35:19.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:35:19.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:35:19.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:35:19.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:35:19.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:35:19.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:35:19.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:35:19.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:35:19.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:35:19.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:35:19.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:35:19.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:35:19.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:35:19.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:35:19.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:35:19.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:35:19.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:35:19.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:35:19.980 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:35:20.458 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:35:20.495 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:35:20.496 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:35:20.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:35:20.497 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:35:20.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:35:20.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:35:20.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:35:20.534 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:35:20.534 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:35:20.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:35:20.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:35:20.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:20.549 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:35:20.550 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:35:20.550 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:35:20.550 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:35:20.597 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:35:20.597 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:35:20.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:20.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:20.931 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:35:20.977 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:35:20.978 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:35:20.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:35:20.978 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:35:21.402 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:35:21.873 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:35:21.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:21.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:35:21.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:35:21.898 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:35:21.918 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:35:21.918 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:35:21.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:35:21.924 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:35:21.924 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:35:21.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:35:21.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:35:21.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:21.926 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:35:21.926 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:35:21.926 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:35:21.926 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:35:21.964 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:35:21.965 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:35:21.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:21.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:21.979 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:35:21.979 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:35:21.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:35:21.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:35:22.346 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:35:22.819 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:35:22.980 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:35:22.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:35:22.981 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:35:22.981 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:35:23.292 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:35:23.766 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:35:23.982 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:35:23.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:35:23.982 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:35:23.982 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:35:24.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:24.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:35:24.096 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:35:24.096 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:35:24.096 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:35:24.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:35:24.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:35:24.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:35:24.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:35:24.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:35:24.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:35:24.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:35:24.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:24.125 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:35:24.125 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:35:24.125 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:35:24.125 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:35:24.137 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:35:24.137 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:35:24.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:24.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:24.238 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:35:24.709 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:35:24.984 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:35:24.984 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:35:24.984 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:35:24.984 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:35:25.182 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:35:25.655 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:35:26.127 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:35:26.598 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:35:27.069 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:35:27.542 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:35:28.015 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:35:28.487 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:35:28.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:28.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:35:28.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:35:28.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:35:28.957 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:35:28.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:35:28.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:35:28.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:35:28.978 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:35:28.978 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:35:28.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:35:28.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:35:28.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:28.980 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:35:28.980 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:35:28.980 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:35:28.980 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:35:29.001 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:35:29.001 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:35:29.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:29.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:29.429 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:35:29.899 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:35:30.373 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:35:30.845 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:35:31.317 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:35:31.789 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 05:35:32.262 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 05:35:32.735 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 05:35:33.209 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 05:35:33.682 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 05:35:34.154 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 05:35:34.628 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 05:35:35.100 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 05:35:35.574 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 05:35:36.047 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 05:35:36.519 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 05:35:36.993 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 05:35:37.465 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 05:35:37.938 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 05:35:38.411 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 05:35:38.884 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 05:35:39.356 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 05:35:39.828 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 05:35:40.301 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 05:35:40.773 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 05:35:41.245 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 05:35:41.718 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 05:35:42.190 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 05:35:42.663 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 05:35:43.136 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 05:35:43.609 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 05:35:44.081 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 05:35:44.554 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 05:35:45.027 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 05:35:45.500 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 05:35:45.973 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 05:35:46.445 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 05:35:46.917 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 05:35:47.390 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 05:35:47.864 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 05:35:48.336 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 05:35:48.809 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 05:35:48.976 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:35:48.976 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:35:48.976 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:35:48.982 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:35:48.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:35:48.982 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:35:48.982 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:35:48.983 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:35:48.983 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:35:48.983 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:35:48.983 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:35:48.983 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:35:48.983 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:35:48.983 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:35:48.983 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6261 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:35:48.983 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6261 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:35:48.983 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6261 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:35:48.983 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6261 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:35:48.983 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6261 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:35:48.983 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6262 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:35:48.983 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6262 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:35:48.983 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6262 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:35:48.983 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6262 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:35:48.983 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6262 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:35:48.983 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6262 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:35:48.983 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6262 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:35:48.983 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6262 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:35:53.989 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:35:53.989 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:35:53.989 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:35:53.989 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:35:53.989 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:35:53.989 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:35:53.997 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:35:53.999 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:35:53.999 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:35:54.000 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:35:54.000 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:35:54.004 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:35:54.004 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:35:54.004 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:35:54.004 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:35:54.004 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:35:54.005 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:35:54.005 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:35:54.005 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:35:54.009 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:35:54.009 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:35:54.010 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:35:54.010 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:35:54.010 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:35:54.010 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:35:54.010 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:35:54.010 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:35:54.014 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:35:54.014 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:35:54.014 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:35:54.014 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:35:54.014 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:35:54.014 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:35:54.014 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:35:54.015 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:35:54.020 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:35:54.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:35:54.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:35:54.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:35:54.020 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:35:54.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:35:54.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:35:54.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:35:54.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:35:54.021 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:35:54.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:35:54.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:35:54.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:35:54.021 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:35:54.021 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:35:54.021 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:35:54.021 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:35:54.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:35:54.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:35:54.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:35:54.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:35:54.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:35:54.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:35:54.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:35:54.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:35:54.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:35:54.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:35:54.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:35:54.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:35:54.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:35:54.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:35:54.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:35:54.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:35:54.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:35:54.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:35:54.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:35:54.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:35:54.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:35:54.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:35:54.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:35:54.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:35:54.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:35:54.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:35:54.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:35:54.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:35:54.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:35:54.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:35:54.026 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:35:54.504 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:35:54.554 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:35:54.556 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:35:54.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:35:54.559 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:35:54.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:35:54.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:35:54.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:35:54.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:35:54.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:35:54.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:35:54.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:35:54.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:54.611 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:35:54.611 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:35:54.611 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:35:54.611 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:35:54.643 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:35:54.644 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:35:54.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:54.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:54.977 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:35:55.025 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:35:55.025 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:35:55.025 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:35:55.026 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:35:55.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:55.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:35:55.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:35:55.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:35:55.285 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:35:55.285 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:35:55.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:35:55.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:35:55.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:35:55.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:35:55.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:35:55.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:55.293 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:35:55.293 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:35:55.293 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:35:55.293 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:35:55.300 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:35:55.300 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:35:55.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:55.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:55.448 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:35:55.921 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:35:56.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:35:56.027 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:35:56.027 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:35:56.027 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:35:56.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:56.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:35:56.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:35:56.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:35:56.226 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:35:56.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:35:56.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:35:56.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:35:56.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:35:56.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:35:56.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:35:56.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:35:56.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:56.253 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:35:56.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:35:56.253 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:35:56.253 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:35:56.290 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:35:56.290 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:35:56.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:56.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:56.392 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:35:56.865 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:35:57.028 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:35:57.028 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:35:57.028 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:35:57.029 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:35:57.337 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:35:57.808 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:35:58.029 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:35:58.030 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:35:58.030 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:35:58.030 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:35:58.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:58.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:35:58.202 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:35:58.202 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:35:58.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:35:58.222 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:35:58.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:35:58.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:35:58.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:35:58.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:35:58.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:35:58.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:58.229 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:35:58.229 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:35:58.229 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:35:58.229 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:35:58.277 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:35:58.277 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:35:58.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:58.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:35:58.278 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:35:58.750 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:35:59.031 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:35:59.031 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:35:59.031 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:35:59.031 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:35:59.224 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:35:59.696 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:36:00.169 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:36:00.643 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:36:01.116 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:36:01.589 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:36:02.061 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:36:02.534 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:36:03.007 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:36:03.479 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:36:03.951 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:36:04.424 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:36:04.897 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:36:05.370 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:36:05.842 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 05:36:06.315 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 05:36:06.787 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 05:36:07.260 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 05:36:07.733 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 05:36:08.205 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 05:36:08.678 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 05:36:09.152 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 05:36:09.625 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 05:36:10.098 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 05:36:10.570 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 05:36:11.042 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 05:36:11.513 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 05:36:11.987 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 05:36:12.460 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 05:36:12.932 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 05:36:13.405 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 05:36:13.878 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 05:36:14.351 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 05:36:14.825 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 05:36:15.297 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 05:36:15.770 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 05:36:16.243 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 05:36:16.716 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 05:36:17.188 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 05:36:17.662 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 05:36:18.134 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 05:36:18.225 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:36:18.225 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:36:18.225 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:36:18.231 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:36:18.231 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:36:18.231 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:36:18.231 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:36:18.232 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:36:18.232 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:36:18.232 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:36:18.232 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:36:18.232 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:36:18.232 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:36:18.232 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:36:18.232 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5225 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:36:18.232 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5225 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:36:18.232 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5225 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:36:18.232 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5225 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:36:18.232 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5225 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:36:18.232 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=5225 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:36:23.237 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:36:23.237 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:36:23.237 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:36:23.237 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:36:23.237 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:36:23.237 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:36:23.246 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:36:23.248 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:36:23.248 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:36:23.249 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:36:23.249 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:36:23.254 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:36:23.255 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:36:23.255 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:36:23.255 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:36:23.255 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:36:23.255 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:36:23.255 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:36:23.255 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:36:23.260 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:36:23.260 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:36:23.260 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:36:23.260 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:36:23.260 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:36:23.260 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:36:23.261 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:36:23.261 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:36:23.264 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:36:23.265 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:36:23.265 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:36:23.265 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:36:23.265 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:36:23.265 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:36:23.265 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:36:23.265 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:36:23.270 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:36:23.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:36:23.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:36:23.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:36:23.270 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:36:23.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:36:23.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:36:23.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:36:23.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:36:23.271 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:36:23.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:36:23.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:36:23.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:36:23.271 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:36:23.271 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:36:23.271 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:36:23.271 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:36:23.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:36:23.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:36:23.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:36:23.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:36:23.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:36:23.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:36:23.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:36:23.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:36:23.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:36:23.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:36:23.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:36:23.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:36:23.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:36:23.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:36:23.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:36:23.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:36:23.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:36:23.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:36:23.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:36:23.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:36:23.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:36:23.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:36:23.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:36:23.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:36:23.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:36:23.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:36:23.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:36:23.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:36:23.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:36:23.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:36:23.276 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:36:23.754 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:36:23.796 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:36:23.799 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:36:23.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:36:23.801 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:36:23.827 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:36:23.827 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:36:23.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:36:23.842 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:36:23.842 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:36:23.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:36:23.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:36:23.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:36:23.846 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:36:23.846 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:36:23.846 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:36:23.846 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:36:23.892 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:36:23.892 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:36:23.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:36:23.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:36:24.225 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:36:24.274 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:36:24.275 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:36:24.275 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:36:24.275 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:36:24.698 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:36:25.170 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:36:25.275 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:36:25.276 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:36:25.276 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:36:25.276 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:36:25.641 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:36:26.114 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:36:26.277 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:36:26.277 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:36:26.277 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:36:26.278 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:36:26.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:36:26.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:36:26.334 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:36:26.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:36:26.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:36:26.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:36:26.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:36:26.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:36:26.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:36:26.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:36:26.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:36:26.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:36:26.362 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:36:26.362 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:36:26.362 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:36:26.362 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:36:26.391 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:36:26.391 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:36:26.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:36:26.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:36:26.586 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:36:27.059 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:36:27.278 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:36:27.279 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:36:27.279 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:36:27.279 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:36:27.533 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:36:28.006 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:36:28.280 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:36:28.281 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:36:28.281 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:36:28.281 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:36:28.479 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:36:28.952 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:36:29.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:36:29.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:36:29.096 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:36:29.096 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:36:29.096 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:36:29.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:36:29.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:36:29.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:36:29.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:36:29.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:36:29.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:36:29.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:36:29.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:36:29.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:36:29.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:36:29.123 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:36:29.123 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:36:29.134 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:36:29.135 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:36:29.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:36:29.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:36:29.424 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:36:29.896 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:36:30.366 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:36:30.840 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:36:31.313 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:36:31.784 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:36:32.256 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:36:32.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:36:32.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:36:32.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:36:32.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:36:32.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:36:32.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:36:32.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:36:32.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:36:32.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:36:32.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:36:32.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:36:32.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:36:32.440 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:36:32.440 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:36:32.440 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:36:32.440 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:36:32.489 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:36:32.489 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:36:32.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:36:32.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:36:32.727 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:36:33.199 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:36:33.672 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:36:34.145 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:36:34.618 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:36:35.091 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 05:36:35.563 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 05:36:36.036 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 05:36:36.508 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 05:36:36.981 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 05:36:37.454 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 05:36:37.927 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 05:36:38.399 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 05:36:38.873 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 05:36:39.346 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 05:36:39.819 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 05:36:40.292 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 05:36:40.765 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 05:36:41.238 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 05:36:41.711 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 05:36:42.183 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 05:36:42.657 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 05:36:43.129 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 05:36:43.601 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 05:36:44.073 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 05:36:44.547 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 05:36:45.019 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 05:36:45.493 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 05:36:45.965 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 05:36:46.437 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 05:36:46.909 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 05:36:47.382 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 05:36:47.854 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 05:36:48.327 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 05:36:48.801 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 05:36:49.273 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 05:36:49.747 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 05:36:50.219 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 05:36:50.692 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 05:36:51.165 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 05:36:51.638 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 05:36:52.111 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 05:36:52.437 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:36:52.437 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:36:52.437 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:36:52.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:36:52.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:36:52.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:36:52.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:36:52.442 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:36:52.442 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:36:52.442 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:36:52.442 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:36:52.442 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:36:52.442 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:36:52.442 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:36:52.442 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6296 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:36:52.442 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6296 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:36:52.442 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6296 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:36:52.442 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6296 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:36:52.442 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6296 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:36:52.442 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6296 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:36:52.442 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6296 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:36:52.442 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=6296 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:36:57.449 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:36:57.449 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:36:57.449 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:36:57.449 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:36:57.449 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:36:57.449 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:36:57.460 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:36:57.462 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:36:57.462 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:36:57.462 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:36:57.462 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:36:57.467 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:36:57.467 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:36:57.468 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:36:57.468 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:36:57.468 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:36:57.469 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:36:57.469 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:36:57.469 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:36:57.472 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:36:57.473 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:36:57.473 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:36:57.473 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:36:57.473 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:36:57.474 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:36:57.474 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:36:57.474 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:36:57.477 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:36:57.477 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:36:57.477 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:36:57.477 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:36:57.477 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:36:57.478 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:36:57.478 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:36:57.478 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:36:57.483 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:36:57.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:36:57.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:36:57.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:36:57.483 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:36:57.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:36:57.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:36:57.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:36:57.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:36:57.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:36:57.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:36:57.483 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:36:57.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:36:57.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:36:57.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:36:57.484 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:36:57.484 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:36:57.484 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:36:57.484 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:36:57.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:36:57.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:36:57.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:36:57.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:36:57.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:36:57.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:36:57.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:36:57.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:36:57.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:36:57.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:36:57.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:36:57.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:36:57.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:36:57.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:36:57.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:36:57.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:36:57.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:36:57.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:36:57.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:36:57.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:36:57.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:36:57.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:36:57.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:36:57.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:36:57.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:36:57.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:36:57.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:36:57.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:36:57.489 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:36:57.966 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:36:58.015 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:36:58.017 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:36:58.018 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:36:58.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:36:58.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:36:58.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:36:58.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:36:58.056 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:36:58.056 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:36:58.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:36:58.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:36:58.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:36:58.070 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:36:58.070 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:36:58.070 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:36:58.070 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:36:58.105 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:36:58.106 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:36:58.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:36:58.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:36:58.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:36:58.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:36:58.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:36:58.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:36:58.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:36:58.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:36:58.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:36:58.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:36:58.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:36:58.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:36:58.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:36:58.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:36:58.351 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:36:58.351 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:36:58.351 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:36:58.351 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:36:58.385 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:36:58.385 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:36:58.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:36:58.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:36:58.436 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:36:58.488 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:36:58.488 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:36:58.488 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:36:58.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:36:58.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:36:58.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:36:58.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:36:58.723 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:36:58.723 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:36:58.744 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:36:58.744 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:36:58.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:36:58.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:36:58.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:36:58.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:36:58.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:36:58.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:36:58.752 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:36:58.752 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:36:58.752 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:36:58.752 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:36:58.756 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:36:58.756 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:36:58.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:36:58.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:36:58.908 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:36:59.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:36:59.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:36:59.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:36:59.304 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:36:59.321 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:36:59.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:36:59.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:36:59.327 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:36:59.327 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:36:59.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:36:59.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:36:59.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:36:59.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:36:59.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:36:59.329 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:36:59.329 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:36:59.379 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:36:59.379 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:36:59.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:36:59.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:36:59.380 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:36:59.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:36:59.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:36:59.490 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:36:59.490 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:36:59.852 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:36:59.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:36:59.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:36:59.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:36:59.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:36:59.938 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:36:59.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:36:59.946 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:36:59.946 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:36:59.946 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:36:59.952 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:36:59.953 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:36:59.953 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:36:59.953 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:36:59.953 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:36:59.953 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:36:59.953 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:36:59.954 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=533 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:36:59.954 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=533 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:36:59.954 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=533 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:36:59.954 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=533 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:36:59.954 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=533 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:36:59.954 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=533 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:36:59.954 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=534 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:36:59.954 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=534 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:36:59.955 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=534 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:36:59.955 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=534 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:36:59.955 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=534 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:36:59.955 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=534 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:36:59.955 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=534 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:36:59.955 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=534 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:37:04.954 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:37:04.954 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:37:04.954 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:37:04.954 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:37:04.954 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:37:04.954 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:37:04.963 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:37:04.965 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:37:04.965 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:37:04.965 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:37:04.965 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:37:04.970 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:37:04.970 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:37:04.970 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:37:04.970 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:37:04.970 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:37:04.970 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:37:04.970 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:37:04.970 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:37:04.973 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:37:04.973 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:37:04.973 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:37:04.973 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:37:04.973 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:37:04.974 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:37:04.974 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:37:04.974 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:37:04.976 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:37:04.976 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:37:04.976 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:37:04.976 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:37:04.976 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:37:04.976 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:37:04.976 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:37:04.976 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:37:04.979 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:37:04.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:37:04.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:37:04.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:37:04.980 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:37:04.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:37:04.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:37:04.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:37:04.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:37:04.980 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:37:04.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:37:04.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:37:04.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:37:04.980 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:37:04.980 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:37:04.980 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:37:04.980 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:37:04.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:37:04.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:37:04.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:37:04.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:37:04.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:37:04.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:37:04.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:37:04.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:37:04.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:37:04.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:37:04.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:37:04.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:37:04.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:37:04.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:37:04.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:37:04.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:37:04.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:37:04.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:37:04.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:37:04.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:37:04.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:37:04.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:37:04.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:37:04.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:37:04.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:37:04.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:37:04.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:37:04.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:37:04.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:37:04.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:37:04.985 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:37:05.462 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:37:05.499 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:37:05.500 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:37:05.501 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:37:05.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:37:05.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:37:05.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:37:05.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:37:05.538 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:37:05.538 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:37:05.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:37:05.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:37:05.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:37:05.554 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:37:05.554 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:37:05.554 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:37:05.554 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:37:05.602 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:37:05.603 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:37:05.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:37:05.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:37:05.933 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:37:05.983 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:37:05.983 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:37:05.984 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:37:05.984 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:37:06.406 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:37:06.879 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:37:06.984 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:37:06.985 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:37:06.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:37:06.985 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:37:07.352 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:37:07.825 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:37:07.985 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:37:07.986 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:37:07.986 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:37:07.986 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:37:08.297 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:37:08.771 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:37:08.987 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:37:08.987 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:37:08.987 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:37:08.987 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:37:09.243 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:37:09.716 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:37:09.987 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:37:09.988 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:37:09.988 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:37:09.988 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:37:10.190 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:37:10.662 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:37:11.135 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:37:11.608 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:37:12.081 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:37:12.553 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:37:13.027 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:37:13.500 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:37:13.972 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:37:14.445 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:37:14.918 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:37:15.391 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:37:15.861 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:37:16.335 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:37:16.808 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 05:37:17.279 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 05:37:17.752 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 05:37:18.225 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 05:37:18.698 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 05:37:19.171 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 05:37:19.644 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 05:37:20.116 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 05:37:20.587 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 05:37:21.058 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 05:37:21.529 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 05:37:22.002 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 05:37:22.475 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 05:37:22.946 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 05:37:23.417 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 05:37:23.888 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 05:37:24.361 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 05:37:24.834 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 05:37:25.306 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 05:37:25.779 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 05:37:26.252 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 05:37:26.725 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 05:37:27.198 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 05:37:27.671 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 05:37:28.143 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 05:37:28.614 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 05:37:29.085 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 05:37:29.558 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 05:37:30.031 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 05:37:30.503 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 05:37:30.974 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 05:37:31.445 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 05:37:31.916 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 05:37:32.387 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 05:37:32.857 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 05:37:33.331 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 05:37:33.803 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 05:37:34.276 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-08 05:37:34.749 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-08 05:37:35.222 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-08 05:37:35.695 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-08 05:37:36.168 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-08 05:37:36.641 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-08 05:37:37.114 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-08 05:37:37.584 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-08 05:37:38.057 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-08 05:37:38.530 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-08 05:37:38.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:37:38.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:37:38.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:37:38.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:37:38.608 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:37:38.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:37:38.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:37:38.614 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:37:38.614 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:37:38.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:37:38.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:37:38.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:37:38.616 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:37:38.616 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:37:38.616 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:37:38.616 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:37:38.619 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:37:38.619 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:37:38.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:37:38.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:37:39.003 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-08 05:37:39.474 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-08 05:37:39.947 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-08 05:37:40.419 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-08 05:37:40.893 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-08 05:37:41.363 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-08 05:37:41.836 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-08 05:37:42.308 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-08 05:37:42.779 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-08 05:37:43.252 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-08 05:37:43.725 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-08 05:37:44.196 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-08 05:37:44.667 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-08 05:37:45.140 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-08 05:37:45.610 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-08 05:37:46.083 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-08 05:37:46.555 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-08 05:37:47.028 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-08 05:37:47.500 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-08 05:37:47.973 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-08 05:37:48.447 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-02-08 05:37:48.919 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-02-08 05:37:49.387 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-02-08 05:37:49.861 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-02-08 05:37:50.334 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-02-08 05:37:50.807 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-02-08 05:37:51.280 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-02-08 05:37:51.753 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-02-08 05:37:52.224 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-02-08 05:37:52.698 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-02-08 05:37:53.171 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-02-08 05:37:53.644 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-02-08 05:37:54.117 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-02-08 05:37:54.589 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-02-08 05:37:55.060 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-02-08 05:37:55.531 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-02-08 05:37:56.005 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-02-08 05:37:56.478 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-02-08 05:37:56.950 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-02-08 05:37:57.423 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-02-08 05:37:57.895 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-02-08 05:37:58.367 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-02-08 05:37:58.839 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-02-08 05:37:59.312 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-02-08 05:37:59.786 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-02-08 05:38:00.259 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-02-08 05:38:00.732 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-02-08 05:38:01.205 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-02-08 05:38:01.678 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-02-08 05:38:02.152 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-02-08 05:38:02.625 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-02-08 05:38:03.098 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-02-08 05:38:03.572 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-02-08 05:38:04.044 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-02-08 05:38:04.518 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-02-08 05:38:04.991 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-02-08 05:38:05.465 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-02-08 05:38:05.937 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-02-08 05:38:06.410 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-02-08 05:38:06.883 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-02-08 05:38:07.356 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-02-08 05:38:07.829 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-02-08 05:38:08.302 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-02-08 05:38:08.775 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-02-08 05:38:09.248 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-02-08 05:38:09.722 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-02-08 05:38:10.194 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-02-08 05:38:10.666 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-02-08 05:38:11.140 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-02-08 05:38:11.613 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-02-08 05:38:12.086 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-02-08 05:38:12.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:38:12.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:38:12.161 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:38:12.161 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:38:12.161 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:38:12.173 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:38:12.173 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:38:12.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:38:12.178 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:38:12.178 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:38:12.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:38:12.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:38:12.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:38:12.179 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:38:12.179 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:38:12.179 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:38:12.179 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:38:12.221 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:38:12.222 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:38:12.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:38:12.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:38:12.556 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-02-08 05:38:13.027 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-02-08 05:38:13.498 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-02-08 05:38:13.969 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-02-08 05:38:14.441 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-02-08 05:38:14.914 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-02-08 05:38:15.386 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-02-08 05:38:15.857 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-02-08 05:38:16.331 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-02-08 05:38:16.803 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-02-08 05:38:17.275 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-02-08 05:38:17.746 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-02-08 05:38:18.220 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-02-08 05:38:18.692 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-02-08 05:38:19.165 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-02-08 05:38:19.636 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-02-08 05:38:20.109 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-02-08 05:38:20.581 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-02-08 05:38:21.054 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-02-08 05:38:21.525 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-02-08 05:38:21.998 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-02-08 05:38:22.470 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-02-08 05:38:22.942 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-02-08 05:38:23.414 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-02-08 05:38:23.887 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-02-08 05:38:24.360 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-02-08 05:38:24.832 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-02-08 05:38:25.303 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-02-08 05:38:25.776 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-02-08 05:38:26.248 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-02-08 05:38:26.720 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-02-08 05:38:27.192 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-02-08 05:38:27.662 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-02-08 05:38:28.136 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-02-08 05:38:28.608 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-02-08 05:38:29.081 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-02-08 05:38:29.552 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-02-08 05:38:30.025 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-02-08 05:38:30.498 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-02-08 05:38:30.970 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-02-08 05:38:31.441 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-02-08 05:38:31.914 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-02-08 05:38:32.387 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-02-08 05:38:32.859 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-02-08 05:38:33.330 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-02-08 05:38:33.803 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-02-08 05:38:34.276 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-02-08 05:38:34.748 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-02-08 05:38:35.219 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-02-08 05:38:35.693 [DEBUG] clck_gen.py:113 IND CLOCK 19584
2026-02-08 05:38:36.165 [DEBUG] clck_gen.py:113 IND CLOCK 19686
2026-02-08 05:38:36.637 [DEBUG] clck_gen.py:113 IND CLOCK 19788
2026-02-08 05:38:37.108 [DEBUG] clck_gen.py:113 IND CLOCK 19890
2026-02-08 05:38:37.581 [DEBUG] clck_gen.py:113 IND CLOCK 19992
2026-02-08 05:38:38.054 [DEBUG] clck_gen.py:113 IND CLOCK 20094
2026-02-08 05:38:38.527 [DEBUG] clck_gen.py:113 IND CLOCK 20196
2026-02-08 05:38:38.998 [DEBUG] clck_gen.py:113 IND CLOCK 20298
2026-02-08 05:38:39.468 [DEBUG] clck_gen.py:113 IND CLOCK 20400
2026-02-08 05:38:39.941 [DEBUG] clck_gen.py:113 IND CLOCK 20502
2026-02-08 05:38:40.414 [DEBUG] clck_gen.py:113 IND CLOCK 20604
2026-02-08 05:38:40.887 [DEBUG] clck_gen.py:113 IND CLOCK 20706
2026-02-08 05:38:41.358 [DEBUG] clck_gen.py:113 IND CLOCK 20808
2026-02-08 05:38:41.831 [DEBUG] clck_gen.py:113 IND CLOCK 20910
2026-02-08 05:38:42.303 [DEBUG] clck_gen.py:113 IND CLOCK 21012
2026-02-08 05:38:42.776 [DEBUG] clck_gen.py:113 IND CLOCK 21114
2026-02-08 05:38:43.246 [DEBUG] clck_gen.py:113 IND CLOCK 21216
2026-02-08 05:38:43.717 [DEBUG] clck_gen.py:113 IND CLOCK 21318
2026-02-08 05:38:44.191 [DEBUG] clck_gen.py:113 IND CLOCK 21420
2026-02-08 05:38:44.663 [DEBUG] clck_gen.py:113 IND CLOCK 21522
2026-02-08 05:38:45.135 [DEBUG] clck_gen.py:113 IND CLOCK 21624
2026-02-08 05:38:45.606 [DEBUG] clck_gen.py:113 IND CLOCK 21726
2026-02-08 05:38:46.077 [DEBUG] clck_gen.py:113 IND CLOCK 21828
2026-02-08 05:38:46.548 [DEBUG] clck_gen.py:113 IND CLOCK 21930
2026-02-08 05:38:47.021 [DEBUG] clck_gen.py:113 IND CLOCK 22032
2026-02-08 05:38:47.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:38:47.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:38:47.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:38:47.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:38:47.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:38:47.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:38:47.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:38:47.390 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:38:47.390 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:38:47.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:38:47.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:38:47.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:38:47.392 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:38:47.392 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:38:47.392 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:38:47.392 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:38:47.437 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:38:47.437 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:38:47.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:38:47.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:38:47.493 [DEBUG] clck_gen.py:113 IND CLOCK 22134
2026-02-08 05:38:47.966 [DEBUG] clck_gen.py:113 IND CLOCK 22236
2026-02-08 05:38:48.439 [DEBUG] clck_gen.py:113 IND CLOCK 22338
2026-02-08 05:38:48.912 [DEBUG] clck_gen.py:113 IND CLOCK 22440
2026-02-08 05:38:49.384 [DEBUG] clck_gen.py:113 IND CLOCK 22542
2026-02-08 05:38:49.856 [DEBUG] clck_gen.py:113 IND CLOCK 22644
2026-02-08 05:38:50.329 [DEBUG] clck_gen.py:113 IND CLOCK 22746
2026-02-08 05:38:50.802 [DEBUG] clck_gen.py:113 IND CLOCK 22848
2026-02-08 05:38:51.276 [DEBUG] clck_gen.py:113 IND CLOCK 22950
2026-02-08 05:38:51.748 [DEBUG] clck_gen.py:113 IND CLOCK 23052
2026-02-08 05:38:51.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:38:51.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:38:51.815 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:38:51.818 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:38:51.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:38:51.818 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:38:51.818 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:38:51.819 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:38:51.819 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:38:51.819 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:38:51.819 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:38:51.819 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:38:51.819 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:38:51.819 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:38:56.825 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:38:56.825 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:38:56.825 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:38:56.825 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:38:56.825 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:38:56.825 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:38:56.835 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:38:56.837 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:38:56.837 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:38:56.837 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:38:56.837 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:38:56.843 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:38:56.843 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:38:56.843 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:38:56.843 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:38:56.844 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:38:56.844 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:38:56.844 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:38:56.844 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:38:56.848 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:38:56.848 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:38:56.849 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:38:56.849 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:38:56.849 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:38:56.849 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:38:56.849 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:38:56.849 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:38:56.853 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:38:56.853 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:38:56.853 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:38:56.853 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:38:56.853 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:38:56.853 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:38:56.854 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:38:56.854 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:38:56.858 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:38:56.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:38:56.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:38:56.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:38:56.859 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:38:56.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:38:56.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:38:56.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:38:56.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:38:56.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:38:56.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:38:56.859 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:38:56.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:38:56.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:38:56.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:38:56.859 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:38:56.859 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:38:56.859 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:38:56.859 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:38:56.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:38:56.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:38:56.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:38:56.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:38:56.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:38:56.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:38:56.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:38:56.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:38:56.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:38:56.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:38:56.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:38:56.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:38:56.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:38:56.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:38:56.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:38:56.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:38:56.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:38:56.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:38:56.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:38:56.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:38:56.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:38:56.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:38:56.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:38:56.862 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:38:56.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:38:56.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:38:56.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:38:56.862 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:38:56.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:38:56.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:38:56.862 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:38:56.862 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:38:56.862 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:38:56.862 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:38:56.862 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:39:01.869 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:39:01.869 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:39:01.869 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:39:01.869 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:39:01.869 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:39:01.869 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:39:01.878 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:39:01.879 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:39:01.879 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:39:01.879 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:39:01.879 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:39:01.882 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:39:01.883 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:39:01.883 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:39:01.883 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:39:01.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:39:01.883 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:39:01.883 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:39:01.883 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:39:01.886 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:39:01.887 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:39:01.887 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:39:01.887 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:39:01.887 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:39:01.887 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:39:01.887 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:39:01.887 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:39:01.891 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:39:01.891 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:39:01.891 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:39:01.891 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:39:01.891 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:39:01.892 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:39:01.892 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:39:01.892 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:39:01.897 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:39:01.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:39:01.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:39:01.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:39:01.898 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:39:01.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:39:01.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:39:01.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:39:01.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:39:01.898 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:39:01.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:39:01.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:39:01.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:39:01.898 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:39:01.898 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:39:01.898 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:39:01.899 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:39:01.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:39:01.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:39:01.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:39:01.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:39:01.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:39:01.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:39:01.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:39:01.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:39:01.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:39:01.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:39:01.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:39:01.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:39:01.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:39:01.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:39:01.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:39:01.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:39:01.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:39:01.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:39:01.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:39:01.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:39:01.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:39:01.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:39:01.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:39:01.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:39:01.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:39:01.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:39:01.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:39:01.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:39:01.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:39:01.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:39:01.903 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:39:02.382 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:39:02.431 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:39:02.433 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:39:02.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:39:02.435 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:39:02.461 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:39:02.461 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:39:02.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:39:02.484 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:39:02.484 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:39:02.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:39:02.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:39:02.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:39:02.490 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:39:02.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:39:02.490 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:39:02.490 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:39:02.520 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:39:02.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:39:02.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:39:02.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:39:02.854 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:39:02.904 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:39:02.905 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:39:02.909 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:39:02.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:39:03.325 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:39:03.799 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:39:03.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:39:03.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:39:03.910 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:39:03.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:39:03.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:39:03.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:39:03.965 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:39:03.965 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:39:03.985 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:39:03.985 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:39:03.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:39:03.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:39:03.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:39:03.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:39:03.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:39:03.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:39:03.994 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:39:03.994 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:39:03.994 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:39:03.994 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:39:04.031 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:39:04.031 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:39:04.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:39:04.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:39:04.270 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:39:04.743 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:39:04.907 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:39:04.907 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:39:04.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:39:04.912 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:39:05.217 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:39:05.690 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:39:05.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:39:05.908 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:39:05.912 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:39:05.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:39:06.163 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:39:06.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:39:06.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:39:06.316 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:39:06.316 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:39:06.316 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:39:06.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:39:06.333 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:39:06.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:39:06.339 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:39:06.339 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:39:06.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:39:06.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:39:06.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:39:06.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:39:06.340 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:39:06.340 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:39:06.340 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:39:06.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:39:06.394 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:39:06.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:39:06.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:39:06.636 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:39:06.909 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:39:06.910 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:39:06.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:39:06.914 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:39:07.108 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:39:07.581 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:39:08.054 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:39:08.526 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:39:08.997 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:39:09.468 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:39:09.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:39:09.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:39:09.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:39:09.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:39:09.875 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:39:09.875 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:39:09.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:39:09.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:39:09.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:39:09.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:39:09.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:39:09.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:39:09.883 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:39:09.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:39:09.883 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:39:09.883 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:39:09.938 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:39:09.938 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:39:09.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:39:09.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:39:09.940 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:39:10.413 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:39:10.886 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:39:10.967 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:39:10.967 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:39:10.967 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:39:10.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:39:10.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:39:10.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:39:10.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:39:10.972 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:39:10.973 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:39:10.973 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:39:10.973 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:39:10.973 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:39:10.973 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:39:10.973 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:39:10.973 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1959 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:39:10.973 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1959 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:39:10.973 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1959 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:39:10.973 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1959 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:39:10.973 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1959 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:39:10.973 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1959 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:39:15.980 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:39:15.980 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:39:15.980 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:39:15.980 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:39:15.980 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:39:15.980 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:39:15.989 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:39:15.991 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:39:15.991 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:39:15.991 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:39:15.991 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:39:15.995 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:39:15.995 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:39:15.995 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:39:15.995 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:39:15.995 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:39:15.996 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:39:15.996 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:39:15.996 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:39:16.000 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:39:16.000 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:39:16.000 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:39:16.000 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:39:16.000 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:39:16.000 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:39:16.000 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:39:16.000 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:39:16.004 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:39:16.004 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:39:16.004 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:39:16.004 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:39:16.004 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:39:16.004 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:39:16.004 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:39:16.004 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:39:16.009 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:39:16.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:39:16.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:39:16.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:39:16.009 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:39:16.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:39:16.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:39:16.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:39:16.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:39:16.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:39:16.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:39:16.010 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:39:16.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:39:16.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:39:16.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:39:16.010 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:39:16.010 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:39:16.010 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:39:16.010 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:39:16.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:39:16.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:39:16.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:39:16.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:39:16.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:39:16.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:39:16.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:39:16.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:39:16.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:39:16.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:39:16.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:39:16.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:39:16.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:39:16.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:39:16.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:39:16.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:39:16.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:39:16.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:39:16.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:39:16.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:39:16.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:39:16.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:39:16.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:39:16.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:39:16.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:39:16.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:39:16.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:39:16.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:39:16.015 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:39:16.493 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:39:16.531 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:39:16.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:39:16.534 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:39:16.536 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:39:16.552 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:39:16.552 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:39:16.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:39:16.566 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:39:16.566 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:39:16.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:39:16.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:39:16.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:39:16.583 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:39:16.584 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:39:16.584 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:39:16.584 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:39:16.635 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:39:16.636 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:39:16.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:39:16.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:39:16.965 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:39:17.012 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:39:17.027 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:39:17.027 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:39:17.028 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:39:17.437 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:39:17.908 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:39:18.028 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:39:18.028 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:39:18.028 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:39:18.028 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:39:18.379 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:39:18.852 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:39:19.029 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:39:19.030 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:39:19.030 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:39:19.030 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:39:19.324 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:39:19.797 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:39:20.031 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:39:20.031 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:39:20.031 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:39:20.031 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:39:20.268 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:39:20.739 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:39:21.032 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:39:21.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:39:21.032 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:39:21.032 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:39:21.209 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:39:21.683 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:39:22.156 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:39:22.628 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:39:23.099 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:39:23.570 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:39:24.040 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:39:24.511 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:39:24.982 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:39:25.453 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:39:25.926 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:39:26.399 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:39:26.871 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:39:27.342 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:39:27.813 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 05:39:28.287 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 05:39:28.760 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 05:39:29.230 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 05:39:29.701 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 05:39:30.172 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 05:39:30.643 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 05:39:31.114 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 05:39:31.584 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 05:39:31.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:39:31.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:39:31.882 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:39:31.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:39:31.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:39:31.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:39:31.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:39:31.902 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:39:31.902 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:39:31.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:39:31.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:39:31.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:39:31.904 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:39:31.904 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:39:31.904 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:39:31.904 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:39:31.906 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:39:31.906 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:39:31.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:39:31.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:39:32.054 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 05:39:32.526 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 05:39:32.999 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 05:39:33.470 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 05:39:33.942 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 05:39:34.415 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 05:39:34.886 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 05:39:35.359 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 05:39:35.832 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 05:39:36.304 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 05:39:36.777 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 05:39:37.250 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 05:39:37.723 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 05:39:38.197 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 05:39:38.670 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 05:39:39.143 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 05:39:39.617 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 05:39:40.091 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 05:39:40.564 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 05:39:41.037 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 05:39:41.510 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 05:39:41.983 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 05:39:42.457 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 05:39:42.930 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 05:39:43.403 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 05:39:43.876 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 05:39:44.350 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 05:39:44.823 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 05:39:45.296 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-08 05:39:45.768 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-08 05:39:46.240 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-08 05:39:46.713 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-08 05:39:47.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:39:47.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:39:47.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:39:47.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:39:47.066 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:39:47.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:39:47.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:39:47.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:39:47.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:39:47.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:39:47.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:39:47.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:39:47.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:39:47.093 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:39:47.093 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:39:47.093 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:39:47.093 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:39:47.129 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:39:47.130 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:39:47.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:39:47.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:39:47.186 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-08 05:39:47.658 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-08 05:39:48.129 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-08 05:39:48.603 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-08 05:39:49.075 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-08 05:39:49.547 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-08 05:39:50.018 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-08 05:39:50.489 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-08 05:39:50.962 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-08 05:39:51.435 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-08 05:39:51.907 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-08 05:39:52.378 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-08 05:39:52.852 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-08 05:39:53.324 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-08 05:39:53.796 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-08 05:39:54.267 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-08 05:39:54.738 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-08 05:39:55.208 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-08 05:39:55.682 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-08 05:39:56.154 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-08 05:39:56.627 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-08 05:39:57.098 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-08 05:39:57.568 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-08 05:39:58.042 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-08 05:39:58.514 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-08 05:39:58.986 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-08 05:39:59.457 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-02-08 05:39:59.928 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-02-08 05:40:00.399 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-02-08 05:40:00.870 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-02-08 05:40:01.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:40:01.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:40:01.311 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:40:01.311 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:40:01.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:40:01.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:40:01.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:40:01.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:40:01.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:40:01.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:40:01.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:40:01.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:40:01.338 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:40:01.338 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:40:01.338 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:40:01.338 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:40:01.340 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-02-08 05:40:01.384 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:40:01.385 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:40:01.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:40:01.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:40:01.811 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-02-08 05:40:02.283 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-02-08 05:40:02.756 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-02-08 05:40:03.229 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-02-08 05:40:03.702 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-02-08 05:40:04.092 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:40:04.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:40:04.092 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:40:04.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:40:04.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:40:04.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:40:04.094 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:40:04.097 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:40:04.097 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:40:04.098 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:40:04.098 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:40:04.098 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:40:04.098 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:40:04.098 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:40:04.098 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=10390 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:40:04.098 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=10390 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:40:04.098 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=10390 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:40:04.098 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=10390 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:40:04.098 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=10390 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:40:04.098 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=10390 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:40:09.102 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:40:09.102 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:40:09.102 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:40:09.102 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:40:09.102 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:40:09.102 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:40:09.115 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:40:09.115 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:40:09.115 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:40:09.116 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:40:09.116 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:40:09.118 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:40:09.118 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:40:09.118 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:40:09.119 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:40:09.119 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:40:09.119 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:40:09.119 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:40:09.119 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:40:09.121 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:40:09.121 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:40:09.121 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:40:09.121 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:40:09.122 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:40:09.122 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:40:09.122 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:40:09.122 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:40:09.124 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:40:09.124 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:40:09.124 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:40:09.124 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:40:09.124 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:40:09.124 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:40:09.124 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:40:09.124 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:40:09.128 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:40:09.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:40:09.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:40:09.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:40:09.128 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:40:09.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:40:09.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:40:09.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:40:09.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:40:09.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:40:09.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:40:09.128 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:40:09.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:40:09.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:40:09.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:40:09.128 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:40:09.128 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:40:09.128 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:40:09.128 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:40:09.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:40:09.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:40:09.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:40:09.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:40:09.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:40:09.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:40:09.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:40:09.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:40:09.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:40:09.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:40:09.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:40:09.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:40:09.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:40:09.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:40:09.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:40:09.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:40:09.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:40:09.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:40:09.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:40:09.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:40:09.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:40:09.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:40:09.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:40:09.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:40:09.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:40:09.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:40:09.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:40:09.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:40:09.133 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:40:09.611 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:40:09.651 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:40:09.653 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:40:09.655 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:40:09.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:40:09.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:40:09.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:40:09.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:40:09.696 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:40:09.696 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:40:09.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:40:09.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:40:09.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:40:09.705 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:40:09.705 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:40:09.705 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:40:09.705 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:40:09.749 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:40:09.749 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:40:09.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:40:09.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:40:10.082 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:40:10.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:40:10.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:40:10.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:40:10.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:40:10.555 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:40:11.027 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:40:11.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:40:11.133 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:40:11.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:40:11.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:40:11.498 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:40:11.969 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:40:12.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:40:12.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:40:12.135 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:40:12.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:40:12.443 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:40:12.915 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:40:13.135 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:40:13.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:40:13.135 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:40:13.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:40:13.386 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:40:13.860 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:40:14.135 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:40:14.136 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:40:14.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:40:14.137 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:40:14.332 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:40:14.805 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:40:15.276 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:40:15.749 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:40:16.221 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:40:16.694 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:40:17.165 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:40:17.638 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:40:18.111 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:40:18.583 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:40:19.054 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:40:19.525 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:40:19.998 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:40:20.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:40:20.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:40:20.203 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:40:20.203 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:40:20.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:40:20.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:40:20.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:40:20.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:40:20.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:40:20.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:40:20.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:40:20.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:40:20.230 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:40:20.230 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:40:20.230 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:40:20.230 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:40:20.277 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:40:20.277 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:40:20.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:40:20.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:40:20.471 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:40:20.944 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 05:40:21.418 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 05:40:21.891 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 05:40:22.364 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 05:40:22.837 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 05:40:23.311 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 05:40:23.784 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 05:40:24.257 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 05:40:24.728 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 05:40:25.202 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 05:40:25.674 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 05:40:26.146 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 05:40:26.616 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 05:40:27.086 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 05:40:27.558 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 05:40:28.031 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 05:40:28.504 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 05:40:28.977 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 05:40:29.449 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 05:40:29.921 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 05:40:30.394 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 05:40:30.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:40:30.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:40:30.568 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:40:30.569 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:40:30.569 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:40:30.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:40:30.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:40:30.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:40:30.595 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:40:30.595 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:40:30.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:40:30.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:40:30.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:40:30.597 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:40:30.597 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:40:30.597 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:40:30.597 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:40:30.628 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:40:30.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:40:30.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:40:30.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:40:30.867 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 05:40:31.335 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 05:40:31.806 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 05:40:32.277 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-08 05:40:32.748 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-08 05:40:33.221 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-08 05:40:33.694 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-08 05:40:34.166 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-08 05:40:34.637 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-08 05:40:35.111 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-08 05:40:35.583 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-08 05:40:36.055 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-08 05:40:36.526 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-08 05:40:36.997 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-08 05:40:37.470 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-08 05:40:37.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:40:37.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:40:37.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:40:37.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:40:37.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:40:37.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:40:37.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:40:37.534 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:40:37.534 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:40:37.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:40:37.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:40:37.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:40:37.536 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:40:37.536 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:40:37.536 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:40:37.536 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:40:37.556 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:40:37.556 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:40:37.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:40:37.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:40:37.942 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-08 05:40:38.415 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-08 05:40:38.888 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-08 05:40:39.361 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-08 05:40:39.833 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-08 05:40:40.305 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-08 05:40:40.778 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-08 05:40:41.251 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-08 05:40:41.722 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-08 05:40:42.196 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-08 05:40:42.669 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-08 05:40:43.142 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-08 05:40:43.615 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-08 05:40:44.089 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-08 05:40:44.561 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-08 05:40:45.033 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-08 05:40:45.504 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-08 05:40:45.978 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-08 05:40:46.450 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-08 05:40:46.923 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-08 05:40:47.396 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-08 05:40:47.869 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-08 05:40:48.341 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-08 05:40:48.814 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-08 05:40:48.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:40:48.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:40:48.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:40:48.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:40:48.901 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:40:48.917 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:40:48.917 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:40:48.917 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:40:48.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:40:48.918 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:40:48.918 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:40:48.918 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:40:48.918 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:40:48.918 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:40:48.918 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:40:48.918 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:40:53.926 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:40:53.926 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:40:53.926 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:40:53.926 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:40:53.926 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:40:53.926 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:40:53.934 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:40:53.934 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:40:53.935 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:40:53.935 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:40:53.935 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:40:53.937 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:40:53.937 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:40:53.937 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:40:53.937 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:40:53.938 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:40:53.938 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:40:53.938 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:40:53.938 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:40:53.940 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:40:53.940 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:40:53.940 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:40:53.940 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:40:53.941 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:40:53.941 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:40:53.941 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:40:53.941 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:40:53.943 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:40:53.943 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:40:53.943 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:40:53.943 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:40:53.943 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:40:53.943 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:40:53.943 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:40:53.943 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:40:53.947 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:40:53.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:40:53.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:40:53.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:40:53.947 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:40:53.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:40:53.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:40:53.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:40:53.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:40:53.947 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:40:53.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:40:53.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:40:53.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:40:53.948 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:40:53.948 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:40:53.948 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:40:53.948 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:40:53.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:40:53.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:40:53.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:40:53.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:40:53.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:40:53.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:40:53.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:40:53.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:40:53.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:40:53.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:40:53.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:40:53.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:40:53.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:40:53.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:40:53.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:40:53.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:40:53.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:40:53.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:40:53.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:40:53.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:40:53.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:40:53.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:40:53.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:40:53.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:40:53.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:40:53.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:40:53.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:40:53.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:40:53.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:40:53.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:40:53.952 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:40:54.431 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:40:54.472 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:40:54.474 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:40:54.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:40:54.476 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:40:54.486 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:40:54.486 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:40:54.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:40:54.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:40:54.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:40:54.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:40:54.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:40:54.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:40:54.528 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:40:54.528 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:40:54.528 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:40:54.528 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:40:54.569 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:40:54.569 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:40:54.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:40:54.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:40:54.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:40:54.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:40:54.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:40:54.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:40:54.899 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:40:54.910 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:40:54.910 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:40:54.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:40:54.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:40:54.916 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:40:54.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:40:54.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:40:54.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:40:54.918 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:40:54.918 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:40:54.918 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:40:54.918 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:40:54.943 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:40:54.943 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:40:54.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:40:54.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:40:54.951 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:40:54.951 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:40:54.951 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:40:54.951 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:40:55.369 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:40:55.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:40:55.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:40:55.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:40:55.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:40:55.428 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:40:55.447 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:40:55.447 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:40:55.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:40:55.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:40:55.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:40:55.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:40:55.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:40:55.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:40:55.454 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:40:55.454 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:40:55.454 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:40:55.454 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:40:55.457 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:40:55.457 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:40:55.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:40:55.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:40:55.840 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:40:55.953 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:40:55.953 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:40:55.953 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:40:55.953 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:40:56.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:40:56.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:40:56.238 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:40:56.238 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:40:56.253 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:40:56.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:40:56.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:40:56.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:40:56.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:40:56.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:40:56.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:40:56.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:40:56.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:40:56.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:40:56.261 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:40:56.261 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:40:56.309 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:40:56.309 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:40:56.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:40:56.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:40:56.310 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:40:56.781 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:40:56.954 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:40:56.954 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:40:56.955 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:40:56.955 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:40:57.253 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:40:57.726 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:40:57.956 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:40:57.956 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:40:57.956 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:40:57.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:40:58.198 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:40:58.671 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:40:58.957 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:40:58.957 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:40:58.957 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:40:58.957 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:40:59.144 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:40:59.617 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:41:00.090 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:41:00.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:00.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:41:00.340 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:41:00.340 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:41:00.340 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:41:00.352 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:41:00.352 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:41:00.352 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:41:00.352 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:41:00.353 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:41:00.354 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:41:00.354 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:41:00.354 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:41:00.354 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:41:00.354 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:41:00.354 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:41:00.354 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1385 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:41:00.354 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1385 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:41:00.354 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1385 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:41:00.354 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=1385 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:41:05.371 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:41:05.371 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:41:05.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:41:05.372 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:41:05.372 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:41:05.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:41:05.382 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:41:05.382 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:41:05.382 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:41:05.382 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:41:05.382 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:41:05.384 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:41:05.384 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:41:05.384 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:41:05.384 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:41:05.384 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:41:05.384 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:41:05.385 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:41:05.385 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:41:05.387 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:41:05.387 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:41:05.387 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:41:05.387 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:41:05.387 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:41:05.387 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:41:05.387 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:41:05.387 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:41:05.388 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:41:05.388 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:41:05.388 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:41:05.388 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:41:05.388 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:41:05.389 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:41:05.389 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:41:05.389 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:41:05.391 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:41:05.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:41:05.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:41:05.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:41:05.391 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:41:05.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:41:05.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:41:05.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:41:05.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:41:05.391 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:41:05.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:41:05.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:41:05.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:41:05.391 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:41:05.391 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:41:05.391 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:41:05.391 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:41:05.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:41:05.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:41:05.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:41:05.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:41:05.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:41:05.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:41:05.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:41:05.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:41:05.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:41:05.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:41:05.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:41:05.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:41:05.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:41:05.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:41:05.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:41:05.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:41:05.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:41:05.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:41:05.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:41:05.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:41:05.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:41:05.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:41:05.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:41:05.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:41:05.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:41:05.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:41:05.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:41:05.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:41:05.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:41:05.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:41:05.396 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:41:05.873 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:41:05.915 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:41:05.918 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:41:05.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:41:05.920 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:41:05.943 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:41:05.943 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:41:05.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:41:05.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:41:05.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:41:05.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:41:05.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:41:05.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:05.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:41:05.971 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:41:05.971 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:41:05.971 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:41:06.011 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:41:06.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:41:06.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:06.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:06.343 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:41:06.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:41:06.394 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:41:06.395 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:41:06.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:41:06.817 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:41:07.289 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:41:07.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:41:07.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:41:07.395 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:41:07.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:41:07.760 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:41:08.244 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:41:08.396 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:41:08.397 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:41:08.397 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:41:08.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:41:08.716 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:41:09.187 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:41:09.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:09.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:41:09.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:41:09.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:41:09.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:41:09.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:41:09.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:41:09.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:41:09.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:41:09.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:41:09.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:41:09.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:09.277 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:41:09.277 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:41:09.278 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:41:09.278 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:41:09.325 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:41:09.325 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:41:09.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:09.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:09.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:41:09.398 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:41:09.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:41:09.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:41:09.658 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:41:10.130 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:41:10.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:41:10.400 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:41:10.400 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:41:10.400 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:41:10.604 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:41:11.075 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:41:11.547 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:41:12.020 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:41:12.493 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:41:12.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:12.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:41:12.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:41:12.665 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:41:12.665 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:41:12.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:41:12.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:41:12.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:41:12.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:41:12.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:41:12.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:41:12.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:41:12.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:12.692 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:41:12.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:41:12.692 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:41:12.692 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:41:12.728 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:41:12.728 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:41:12.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:12.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:12.964 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:41:13.445 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:41:13.917 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:41:14.388 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:41:14.859 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:41:15.330 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:41:15.801 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:41:16.274 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:41:16.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:16.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:41:16.432 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:41:16.432 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:41:16.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:41:16.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:41:16.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:41:16.459 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:41:16.459 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:41:16.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:41:16.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:41:16.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:16.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:41:16.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:41:16.461 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:41:16.461 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:41:16.505 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:41:16.506 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:41:16.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:16.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:16.747 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:41:17.219 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 05:41:17.691 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 05:41:18.164 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 05:41:18.637 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 05:41:19.110 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 05:41:19.583 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 05:41:20.055 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 05:41:20.528 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 05:41:20.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:20.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:41:20.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:41:20.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:41:20.611 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:41:20.627 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:41:20.627 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:41:20.627 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:41:20.627 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:41:20.628 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:41:20.628 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:41:20.628 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:41:20.628 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:41:20.628 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:41:20.628 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:41:20.628 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:41:20.628 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3287 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:41:20.628 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3287 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:41:20.628 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3287 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:41:20.628 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3287 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:41:20.628 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3287 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:41:20.628 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3288 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:41:20.628 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3288 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:41:20.628 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3288 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:41:20.629 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3288 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:41:20.629 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3288 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:41:20.629 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3288 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:41:20.629 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3288 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:41:20.629 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3288 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:41:25.633 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:41:25.633 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:41:25.633 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:41:25.633 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:41:25.633 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:41:25.634 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:41:25.642 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:41:25.644 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:41:25.644 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:41:25.644 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:41:25.644 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:41:25.650 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:41:25.650 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:41:25.650 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:41:25.650 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:41:25.650 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:41:25.650 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:41:25.651 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:41:25.651 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:41:25.655 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:41:25.655 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:41:25.656 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:41:25.656 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:41:25.656 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:41:25.656 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:41:25.656 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:41:25.656 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:41:25.660 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:41:25.660 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:41:25.661 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:41:25.661 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:41:25.661 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:41:25.661 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:41:25.661 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:41:25.661 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:41:25.667 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:41:25.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:41:25.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:41:25.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:41:25.667 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:41:25.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:41:25.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:41:25.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:41:25.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:41:25.667 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:41:25.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:41:25.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:41:25.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:41:25.668 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:41:25.668 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:41:25.668 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:41:25.668 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:41:25.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:41:25.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:41:25.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:41:25.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:41:25.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:41:25.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:41:25.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:41:25.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:41:25.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:41:25.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:41:25.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:41:25.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:41:25.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:41:25.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:41:25.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:41:25.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:41:25.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:41:25.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:41:25.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:41:25.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:41:25.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:41:25.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:41:25.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:41:25.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:41:25.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:41:25.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:41:25.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:41:25.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:41:25.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:41:25.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:41:25.672 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:41:26.148 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:41:26.183 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:41:26.184 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:41:26.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:41:26.184 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:41:26.190 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:41:26.190 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:41:26.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:41:26.196 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:41:26.196 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:41:26.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:41:26.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:41:26.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:26.240 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:41:26.240 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:41:26.240 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:41:26.240 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:41:26.286 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:41:26.286 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:41:26.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:26.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:26.617 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:41:26.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:26.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:41:26.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:41:26.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:41:26.671 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:41:26.671 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:41:26.672 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:41:26.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:41:26.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:41:26.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:41:26.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:41:26.689 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:41:26.689 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:41:26.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:41:26.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:41:26.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:26.692 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:41:26.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:41:26.692 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:41:26.692 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:41:26.705 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:41:26.705 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:41:26.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:26.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:27.088 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:41:27.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:27.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:41:27.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:41:27.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:41:27.309 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:41:27.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:41:27.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:41:27.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:41:27.330 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:41:27.330 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:41:27.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:41:27.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:41:27.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:27.332 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:41:27.332 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:41:27.333 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:41:27.333 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:41:27.366 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:41:27.367 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:41:27.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:27.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:27.556 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:41:27.672 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:41:27.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:41:27.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:41:27.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:41:28.029 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:41:28.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:28.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:41:28.426 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:41:28.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:41:28.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:41:28.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:41:28.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:41:28.451 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:41:28.451 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:41:28.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:41:28.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:41:28.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:28.453 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:41:28.453 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:41:28.453 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:41:28.453 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:41:28.500 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:41:28.501 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:41:28.501 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:41:28.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:28.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:28.673 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:41:28.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:41:28.674 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:41:28.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:41:28.972 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:41:29.446 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:41:29.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:41:29.676 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:41:29.676 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:41:29.676 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:41:29.918 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:41:30.390 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:41:30.677 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:41:30.677 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:41:30.677 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:41:30.677 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:41:30.864 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:41:31.336 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:41:31.809 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:41:32.281 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:41:32.755 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:41:33.227 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:41:33.698 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:41:34.172 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:41:34.644 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:41:35.116 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:41:35.589 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:41:36.062 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:41:36.536 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:41:37.008 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:41:37.481 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 05:41:37.955 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 05:41:38.427 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 05:41:38.900 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 05:41:39.373 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 05:41:39.845 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 05:41:40.318 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 05:41:40.791 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 05:41:41.263 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 05:41:41.735 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-08 05:41:42.208 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-08 05:41:42.681 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-08 05:41:43.154 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-08 05:41:43.627 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-08 05:41:44.099 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-08 05:41:44.573 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-08 05:41:45.045 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-08 05:41:45.518 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-08 05:41:45.990 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-08 05:41:46.463 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-08 05:41:46.936 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-08 05:41:47.410 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-08 05:41:47.882 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-08 05:41:48.355 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-08 05:41:48.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:41:48.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:41:48.449 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:41:48.453 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:41:48.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:41:48.453 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:41:48.453 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:41:48.454 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:41:48.454 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:41:48.454 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:41:48.454 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:41:48.454 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:41:48.454 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:41:48.454 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:41:48.455 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4920 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:41:48.455 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4920 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:41:48.455 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4920 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:41:48.455 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4920 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:41:48.455 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4920 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:41:48.455 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4920 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:41:48.455 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4920 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:41:48.455 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=4920 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:41:53.461 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:41:53.461 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:41:53.461 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:41:53.461 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:41:53.461 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:41:53.461 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:41:53.469 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:41:53.470 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:41:53.470 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:41:53.470 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:41:53.470 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:41:53.472 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:41:53.473 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:41:53.473 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:41:53.473 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:41:53.473 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:41:53.473 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:41:53.474 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:41:53.474 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:41:53.475 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:41:53.475 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:41:53.476 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:41:53.476 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:41:53.476 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:41:53.476 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:41:53.476 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:41:53.476 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:41:53.478 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:41:53.478 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:41:53.478 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:41:53.478 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:41:53.478 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:41:53.478 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:41:53.478 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:41:53.478 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:41:53.480 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:41:53.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:41:53.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:41:53.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:41:53.481 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:41:53.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:41:53.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:41:53.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:41:53.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:41:53.481 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:41:53.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:41:53.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:41:53.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:41:53.481 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:41:53.481 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:41:53.481 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:41:53.481 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:41:53.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:41:53.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:41:53.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:41:53.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:41:53.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:41:53.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:41:53.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:41:53.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:41:53.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:41:53.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:41:53.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:41:53.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:41:53.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:41:53.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:41:53.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:41:53.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:41:53.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:41:53.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:41:53.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:41:53.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:41:53.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:41:53.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:41:53.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:41:53.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:41:53.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:41:53.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:41:53.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:41:53.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:41:53.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:41:53.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:41:53.486 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:41:53.963 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:41:53.999 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:41:54.000 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:41:54.001 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:41:54.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:41:54.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:41:54.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:41:54.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:41:54.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:41:54.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:41:54.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:41:54.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:41:54.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:54.055 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:41:54.055 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:41:54.055 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:41:54.055 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:41:54.102 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:41:54.102 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:41:54.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:54.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:54.434 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:41:54.484 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:41:54.484 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:41:54.484 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:41:54.484 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:41:54.907 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:41:55.380 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:41:55.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:41:55.485 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:41:55.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:41:55.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:41:55.853 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:41:56.325 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:41:56.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:41:56.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:41:56.487 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:41:56.487 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:41:56.796 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:41:56.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:56.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:41:56.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:41:56.951 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:41:56.970 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:41:56.970 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:41:56.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:41:56.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:41:56.977 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:41:56.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:41:56.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:41:56.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:56.979 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:41:56.979 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:41:56.979 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:41:56.979 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:41:57.029 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:41:57.029 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:41:57.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:57.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:41:57.267 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:41:57.488 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:41:57.488 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:41:57.488 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:41:57.488 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:41:57.740 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:41:58.213 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:41:58.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:41:58.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:41:58.490 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:41:58.490 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:41:58.686 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:41:59.159 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:41:59.631 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:42:00.105 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:42:00.579 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:42:01.052 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:42:01.526 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:42:01.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:42:01.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:01.595 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:42:01.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:42:01.596 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:42:01.616 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:42:01.616 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:42:01.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:42:01.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:42:01.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:42:01.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:01.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:42:01.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:42:01.624 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:42:01.624 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:42:01.624 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:42:01.624 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:42:01.664 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:42:01.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:42:01.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:42:01.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:42:01.998 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:42:02.469 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:42:02.942 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:42:03.415 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:42:03.888 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:42:04.359 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:42:04.832 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:42:05.304 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 05:42:05.776 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 05:42:06.247 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 05:42:06.721 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 05:42:07.194 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 05:42:07.666 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 05:42:08.137 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 05:42:08.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:42:08.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:08.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:42:08.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:42:08.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:42:08.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:42:08.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:42:08.318 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:42:08.318 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:42:08.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:42:08.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:08.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:42:08.320 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:42:08.320 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:42:08.320 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:42:08.320 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:42:08.370 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:42:08.370 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:42:08.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:42:08.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:42:08.608 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 05:42:09.081 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 05:42:09.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:42:09.166 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:42:09.166 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:42:09.169 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:42:09.169 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:42:09.169 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:42:09.169 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:42:09.170 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:42:09.170 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:42:09.170 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:42:09.170 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:42:09.170 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:42:09.170 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:42:09.170 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:42:09.170 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3387 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:42:09.170 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3387 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:42:09.170 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3387 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:42:09.170 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3387 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:42:09.170 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3387 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:42:09.171 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3387 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:42:14.178 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:42:14.178 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:42:14.178 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:42:14.178 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:42:14.178 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:42:14.178 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:42:14.186 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:42:14.187 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:42:14.187 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:42:14.187 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:42:14.187 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:42:14.193 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:42:14.193 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:42:14.193 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:42:14.193 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:42:14.194 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:42:14.194 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:42:14.194 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:42:14.194 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:42:14.196 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:42:14.196 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:42:14.196 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:42:14.197 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:42:14.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:42:14.197 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:42:14.197 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:42:14.197 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:42:14.200 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:42:14.200 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:42:14.200 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:42:14.200 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:42:14.200 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:42:14.200 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:42:14.200 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:42:14.200 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:42:14.205 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:42:14.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:42:14.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:42:14.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:42:14.205 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:42:14.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:42:14.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:42:14.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:42:14.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:42:14.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:14.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:14.205 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:42:14.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:14.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:14.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:14.206 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:42:14.206 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:42:14.206 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:42:14.206 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:42:14.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:14.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:14.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:14.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:42:14.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:14.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:14.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:14.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:14.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:14.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:14.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:14.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:14.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:14.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:14.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:14.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:14.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:14.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:14.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:14.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:14.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:14.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:14.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:14.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:14.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:14.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:14.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:14.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:14.210 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:42:14.688 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:42:14.734 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:42:14.737 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:42:14.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:14.737 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:42:14.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:42:14.756 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:42:14.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:42:14.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:14.782 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:42:14.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:42:14.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:42:14.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:42:14.786 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:42:14.786 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:42:14.787 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:42:14.787 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:42:14.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:42:14.827 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:42:14.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:42:14.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:42:15.161 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:42:15.210 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:42:15.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:42:15.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:42:15.212 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:42:15.632 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:42:16.103 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:42:16.212 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:42:16.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:42:16.212 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:42:16.212 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:42:16.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:42:16.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:16.571 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:42:16.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:42:16.576 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:42:16.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:42:16.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:42:16.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:42:16.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:42:16.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:42:16.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:42:16.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:16.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:42:16.598 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:42:16.598 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:42:16.598 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:42:16.598 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:42:16.616 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:42:16.616 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-08 05:42:16.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:42:16.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:42:17.048 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:42:17.213 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:42:17.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:42:17.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:42:17.214 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:42:17.521 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:42:17.995 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:42:18.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:42:18.216 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:42:18.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:42:18.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:42:18.468 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:42:18.939 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:42:19.217 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:42:19.217 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:42:19.218 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:42:19.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:42:19.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:42:19.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:19.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:42:19.381 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:42:19.381 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:42:19.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:42:19.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:42:19.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:42:19.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:42:19.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:42:19.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:42:19.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:19.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:42:19.405 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:42:19.405 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:42:19.405 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:42:19.405 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:42:19.411 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:42:19.453 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:42:19.453 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:42:19.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:42:19.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:42:19.883 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:42:20.355 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:42:20.827 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:42:21.301 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:42:21.773 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:42:22.245 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:42:22.717 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:42:23.187 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:42:23.661 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:42:23.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:42:23.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:23.817 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:42:23.817 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:42:23.836 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:42:23.836 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:42:23.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:42:23.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:42:23.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:42:23.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:42:23.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:23.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:42:23.844 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:42:23.844 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:42:23.844 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:42:23.844 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:42:23.893 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.152.22:6700) Recv SETFH cmd
2026-02-08 05:42:23.893 [INFO] transceiver.py:201 (MS@172.18.152.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-08 05:42:23.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:42:23.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:42:24.133 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:42:24.606 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:42:25.077 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:42:25.551 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:42:26.023 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 05:42:26.106 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:42:26.106 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:42:26.107 [INFO] transceiver.py:205 (MS@172.18.152.22:6700) Frequency hopping disabled
2026-02-08 05:42:26.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:42:26.111 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:42:26.111 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:42:26.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:42:26.111 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:42:26.112 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:42:26.112 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:42:26.112 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:42:26.112 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:42:26.112 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:42:26.112 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:42:31.117 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:42:31.117 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:42:31.117 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:42:31.117 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:42:31.117 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:42:31.117 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:42:31.126 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:42:31.128 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:42:31.128 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:42:31.128 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:42:31.128 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:42:31.131 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:42:31.131 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:42:31.132 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:42:31.132 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:42:31.132 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:42:31.132 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:42:31.132 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:42:31.132 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:42:31.135 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:42:31.135 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:42:31.135 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:42:31.135 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:42:31.135 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:42:31.136 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:42:31.136 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:42:31.136 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:42:31.138 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:42:31.138 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:42:31.138 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:42:31.138 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:42:31.139 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:42:31.139 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:42:31.139 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:42:31.139 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:42:31.142 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:42:31.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:42:31.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:42:31.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:42:31.142 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:42:31.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:42:31.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:42:31.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:42:31.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:42:31.143 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:42:31.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:31.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:31.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:31.143 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:42:31.143 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:42:31.143 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:42:31.143 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:42:31.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:31.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:31.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:31.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:42:31.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:31.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:31.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:31.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:31.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:31.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:31.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:31.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:31.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:31.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:31.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:31.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:31.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:31.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:31.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:31.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:31.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:31.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:31.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:31.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:31.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:31.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:31.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:31.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:31.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:31.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:31.148 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:42:31.624 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:42:31.671 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:42:31.673 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:42:31.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:31.676 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:42:31.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:32.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:32.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:32.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:32.095 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:42:32.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:42:32.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:42:32.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:42:32.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:42:32.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:32.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:32.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:32.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:32.567 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:42:32.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:32.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:32.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:32.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:32.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:32.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:32.990 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:42:32.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:42:32.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:42:32.990 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:42:32.991 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:42:32.991 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:42:32.991 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:42:32.991 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:42:32.991 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:42:32.991 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:42:32.991 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:42:37.998 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:42:37.998 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:42:37.998 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:42:37.998 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:42:37.998 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:42:37.998 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:42:38.006 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:42:38.007 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:42:38.007 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:42:38.008 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:42:38.008 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:42:38.012 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:42:38.012 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:42:38.012 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:42:38.012 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:42:38.012 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:42:38.013 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:42:38.013 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:42:38.013 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:42:38.015 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:42:38.015 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:42:38.015 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:42:38.015 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:42:38.015 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:42:38.016 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:42:38.016 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:42:38.016 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:42:38.018 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:42:38.018 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:42:38.018 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:42:38.018 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:42:38.018 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:42:38.018 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:42:38.018 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:42:38.018 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:42:38.022 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:42:38.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:42:38.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:42:38.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:42:38.022 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:42:38.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:42:38.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:42:38.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:42:38.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:42:38.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:38.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:38.022 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:42:38.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:38.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:38.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:38.022 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:42:38.022 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:42:38.022 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:42:38.022 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:42:38.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:38.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:38.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:38.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:42:38.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:38.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:38.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:38.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:38.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:38.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:38.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:38.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:38.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:38.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:38.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:38.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:38.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:38.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:38.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:38.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:38.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:38.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:38.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:38.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:38.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:38.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:38.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:38.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:38.027 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:42:38.505 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:42:38.542 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:42:38.543 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:42:38.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:38.545 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:42:38.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:38.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:38.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:38.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:38.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:38.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:38.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:38.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:38.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:38.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:38.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:38.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:38.972 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:42:39.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:42:39.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:42:39.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:42:39.026 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:42:39.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:39.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:39.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:39.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:39.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:39.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:39.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:39.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:39.443 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:42:39.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:39.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:39.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:39.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:39.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:39.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:39.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:39.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:39.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:39.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:39.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:39.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:39.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:42:39.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:42:39.894 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:42:39.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:42:39.895 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:42:39.895 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:42:39.895 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:42:39.895 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:42:39.895 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:42:39.895 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:42:39.895 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:42:39.895 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=406 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:42:39.895 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=406 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:42:39.895 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=406 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:42:39.895 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=406 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:42:39.895 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=406 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:42:39.895 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=406 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:42:44.903 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:42:44.904 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:42:44.904 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:42:44.904 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:42:44.904 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:42:44.905 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:42:44.915 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:42:44.915 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:42:44.916 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:42:44.916 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:42:44.916 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:42:44.918 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:42:44.918 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:42:44.918 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:42:44.918 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:42:44.918 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:42:44.918 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:42:44.918 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:42:44.918 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:42:44.920 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:42:44.920 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:42:44.920 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:42:44.920 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:42:44.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:42:44.920 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:42:44.920 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:42:44.920 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:42:44.922 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:42:44.922 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:42:44.922 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:42:44.922 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:42:44.922 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:42:44.922 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:42:44.922 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:42:44.922 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:42:44.925 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:42:44.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:42:44.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:42:44.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:42:44.925 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:42:44.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:42:44.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:42:44.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:42:44.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:42:44.925 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:42:44.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:44.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:44.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:44.925 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:42:44.925 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:42:44.925 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:42:44.925 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:42:44.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:44.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:44.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:44.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:42:44.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:44.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:44.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:44.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:44.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:44.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:44.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:44.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:44.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:44.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:44.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:44.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:44.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:44.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:44.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:44.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:44.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:44.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:44.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:44.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:44.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:44.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:44.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:44.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:44.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:44.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:44.930 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:42:45.406 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:42:45.450 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:42:45.452 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:42:45.454 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:42:45.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:45.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:45.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:45.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:45.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:45.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:45.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:45.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:45.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:45.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:45.874 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:42:45.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:42:45.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:42:45.928 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:42:45.929 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:42:46.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:46.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:46.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:46.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:46.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:46.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:46.346 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:42:46.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:46.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:46.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:46.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:46.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:46.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:46.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:46.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:46.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:46.785 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:42:46.785 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:42:46.785 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:42:46.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:42:46.786 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:42:46.786 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:42:46.786 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:42:46.786 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:42:46.786 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:42:46.786 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:42:46.786 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:42:51.795 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:42:51.795 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:42:51.795 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:42:51.795 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:42:51.795 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:42:51.795 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:42:51.806 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:42:51.808 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:42:51.808 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:42:51.809 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:42:51.809 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:42:51.814 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:42:51.814 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:42:51.814 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:42:51.814 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:42:51.815 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:42:51.815 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:42:51.815 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:42:51.815 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:42:51.819 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:42:51.819 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:42:51.819 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:42:51.819 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:42:51.819 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:42:51.820 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:42:51.820 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:42:51.820 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:42:51.822 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:42:51.823 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:42:51.823 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:42:51.823 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:42:51.823 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:42:51.823 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:42:51.823 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:42:51.823 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:42:51.826 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:42:51.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:42:51.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:42:51.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:42:51.827 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:42:51.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:42:51.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:42:51.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:42:51.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:51.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:42:51.827 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:42:51.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:51.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:51.827 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:42:51.827 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:42:51.827 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:42:51.827 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:42:51.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:51.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:51.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:51.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:42:51.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:51.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:51.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:51.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:51.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:51.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:51.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:51.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:51.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:51.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:51.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:51.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:51.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:51.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:51.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:51.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:51.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:51.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:51.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:51.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:51.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:51.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:51.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:51.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:51.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:51.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:51.832 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:42:52.310 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:42:52.356 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:42:52.358 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:42:52.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:52.361 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:42:52.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:52.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:52.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:52.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:52.777 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:42:52.831 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:42:52.831 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:42:52.831 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:42:52.832 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:42:53.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:53.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:53.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:53.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:53.248 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:42:53.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:53.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:53.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:53.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:53.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:53.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:53.705 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:42:53.705 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:42:53.705 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:42:53.705 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:42:53.706 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:42:53.706 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:42:53.706 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:42:53.706 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:42:53.706 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:42:53.706 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:42:53.706 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:42:53.706 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=407 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:42:53.706 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=407 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:42:53.706 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=407 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:42:53.706 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=407 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:42:53.706 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=407 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:42:53.706 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=407 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:42:58.714 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:42:58.714 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:42:58.714 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:42:58.714 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:42:58.714 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:42:58.714 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:42:58.722 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:42:58.723 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:42:58.723 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:42:58.723 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:42:58.723 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:42:58.726 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:42:58.726 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:42:58.726 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:42:58.726 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:42:58.727 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:42:58.727 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:42:58.727 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:42:58.727 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:42:58.730 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:42:58.730 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:42:58.730 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:42:58.730 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:42:58.730 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:42:58.730 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:42:58.731 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:42:58.731 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:42:58.733 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:42:58.733 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:42:58.733 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:42:58.733 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:42:58.734 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:42:58.734 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:42:58.734 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:42:58.734 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:42:58.738 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:42:58.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:42:58.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:42:58.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:42:58.738 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:42:58.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:42:58.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:42:58.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:42:58.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:42:58.739 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:42:58.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:58.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:58.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:58.739 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:42:58.739 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:42:58.739 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:42:58.739 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:42:58.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:58.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:58.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:58.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:42:58.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:58.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:58.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:58.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:58.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:58.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:58.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:58.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:58.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:58.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:58.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:58.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:58.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:58.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:58.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:58.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:58.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:58.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:58.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:58.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:58.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:58.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:42:58.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:42:58.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:58.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:42:58.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:58.744 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:42:59.221 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:42:59.264 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:42:59.265 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:42:59.268 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:42:59.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:59.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:42:59.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:59.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:59.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:59.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:59.692 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:42:59.743 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:42:59.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:42:59.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:42:59.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:42:59.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:59.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:59.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:42:59.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:00.162 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:43:00.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:00.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:00.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:00.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:00.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:00.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:00.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:43:00.598 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:43:00.598 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:43:00.598 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:43:00.603 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:43:00.603 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:43:00.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:43:00.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:43:00.603 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:43:00.603 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:43:00.603 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:43:00.603 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=402 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:00.603 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=402 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:00.603 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=402 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:00.603 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=402 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:00.603 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=402 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:00.603 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=403 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:00.603 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=403 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:00.603 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=403 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:00.603 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=403 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:00.603 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=403 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:00.603 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=403 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:00.603 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=403 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:00.603 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=403 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:00.603 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=404 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:00.603 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=404 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:00.603 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=404 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:00.603 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=404 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:00.603 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=404 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:00.603 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=404 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:00.603 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=404 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:00.604 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=404 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:05.606 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:43:05.611 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:43:05.611 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:43:05.611 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:43:05.612 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:43:05.612 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:43:05.614 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:43:05.615 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:43:05.615 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:05.616 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:43:05.616 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:43:05.620 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:43:05.620 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:43:05.620 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:43:05.620 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:05.620 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:43:05.620 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:43:05.620 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:43:05.620 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:43:05.625 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:43:05.625 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:43:05.625 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:43:05.625 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:05.625 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:43:05.625 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:43:05.625 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:43:05.625 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:43:05.629 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:43:05.629 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:43:05.629 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:43:05.629 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:05.629 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:43:05.629 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:43:05.629 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:43:05.629 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:43:05.635 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:43:05.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:43:05.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:43:05.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:43:05.635 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:43:05.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:43:05.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:43:05.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:43:05.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:43:05.635 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:43:05.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:05.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:05.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:05.635 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:43:05.636 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:43:05.636 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:43:05.636 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:43:05.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:05.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:05.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:05.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:43:05.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:05.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:05.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:05.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:05.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:05.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:05.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:05.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:05.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:05.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:05.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:05.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:05.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:05.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:05.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:05.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:05.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:05.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:05.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:05.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:05.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:05.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:05.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:05.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:05.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:05.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:05.640 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:43:06.117 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:43:06.166 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:43:06.169 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:43:06.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:06.171 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:43:06.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:06.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:06.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:06.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:06.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:06.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:06.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:06.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:06.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:06.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:06.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:06.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:06.584 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:43:06.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:43:06.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:43:06.640 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:43:06.640 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:43:06.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:06.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:06.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:06.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:06.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:06.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:06.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:06.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:07.053 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:43:07.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:07.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:07.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:07.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:07.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:07.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:07.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:07.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:07.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:07.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:07.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:07.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:07.521 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:43:07.528 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:43:07.529 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:43:07.529 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:43:07.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:43:07.534 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:43:07.535 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:43:07.536 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:43:07.536 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:43:07.536 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:43:07.536 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:43:07.536 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:43:07.536 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=411 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:07.537 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=411 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:07.537 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=411 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:07.537 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=411 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:07.537 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=412 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:07.537 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=412 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:07.537 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=412 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:07.537 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=412 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:07.537 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=412 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:07.537 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=412 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:07.537 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=412 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:07.538 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=412 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:07.538 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=413 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:07.538 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=413 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:07.538 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=413 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:07.538 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=413 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:07.538 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=413 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:07.538 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=413 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:07.538 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=413 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:07.538 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=413 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:12.537 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:43:12.537 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:43:12.537 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:43:12.537 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:43:12.537 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:43:12.537 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:43:12.553 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:43:12.553 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:43:12.553 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:12.554 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:43:12.554 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:43:12.556 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:43:12.556 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:43:12.556 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:43:12.556 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:12.556 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:43:12.556 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:43:12.556 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:43:12.556 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:43:12.558 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:43:12.558 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:43:12.558 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:43:12.558 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:12.558 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:43:12.559 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:43:12.559 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:43:12.559 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:43:12.561 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:43:12.561 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:43:12.561 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:43:12.561 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:12.561 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:43:12.561 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:43:12.561 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:43:12.561 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:43:12.565 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:43:12.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:43:12.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:43:12.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:43:12.565 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:43:12.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:43:12.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:43:12.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:43:12.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:43:12.565 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:43:12.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:12.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:12.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:12.565 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:43:12.565 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:43:12.565 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:43:12.565 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:43:12.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:12.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:12.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:12.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:43:12.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:12.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:12.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:12.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:12.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:12.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:12.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:12.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:12.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:12.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:12.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:12.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:12.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:12.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:12.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:12.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:12.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:12.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:12.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:12.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:12.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:12.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:12.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:12.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:12.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:12.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:12.570 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:43:13.049 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:43:13.093 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:43:13.095 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:43:13.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:13.097 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:43:13.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:13.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:13.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:13.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:13.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:13.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:13.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:13.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:13.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:13.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:13.516 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:43:13.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:43:13.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:43:13.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:43:13.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:43:13.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:13.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:13.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:13.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:13.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:13.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:13.987 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:43:14.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:14.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:14.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:14.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:14.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:14.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:14.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:14.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:14.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:14.452 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:43:14.452 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:43:14.452 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:43:14.452 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:43:14.453 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:43:14.458 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:43:14.459 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:43:14.459 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:43:14.459 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:43:14.459 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:43:14.459 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:43:14.460 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:43:14.460 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=408 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:14.460 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=408 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:14.460 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=408 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:14.460 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=408 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:14.460 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=409 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:14.460 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=409 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:14.460 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=409 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:14.460 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=409 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:14.460 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=409 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:14.461 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=409 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:14.461 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=409 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:14.461 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=409 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:14.461 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=410 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:14.461 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=410 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:14.461 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=410 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:14.461 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=410 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:14.461 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=410 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:14.461 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=410 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:14.461 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=410 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:14.461 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=410 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:19.461 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:43:19.461 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:43:19.461 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:43:19.461 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:43:19.461 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:43:19.461 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:43:19.470 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:43:19.472 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:43:19.472 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:19.473 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:43:19.473 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:43:19.478 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:43:19.478 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:43:19.479 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:43:19.479 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:19.479 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:43:19.479 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:43:19.479 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:43:19.479 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:43:19.485 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:43:19.485 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:43:19.486 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:43:19.486 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:19.486 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:43:19.486 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:43:19.486 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:43:19.486 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:43:19.491 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:43:19.491 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:43:19.491 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:43:19.491 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:19.491 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:43:19.491 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:43:19.491 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:43:19.491 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:43:19.497 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:43:19.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:43:19.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:43:19.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:43:19.498 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:43:19.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:43:19.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:43:19.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:43:19.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:43:19.498 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:43:19.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:19.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:19.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:19.498 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:43:19.498 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:43:19.498 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:43:19.498 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:43:19.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:19.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:19.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:19.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:43:19.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:19.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:19.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:19.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:19.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:19.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:19.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:19.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:19.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:19.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:19.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:19.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:19.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:19.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:19.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:19.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:19.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:19.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:19.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:19.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:19.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:19.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:19.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:19.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:19.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:19.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:19.503 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:43:19.981 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:43:20.028 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:43:20.030 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:43:20.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:20.032 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:43:20.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:20.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:20.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:20.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:20.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:20.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:20.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:20.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:20.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:20.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:20.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:20.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:20.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:20.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:20.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:20.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:20.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:20.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:20.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:20.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:20.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:20.124 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:43:20.125 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:43:20.125 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:43:20.125 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:43:20.126 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:43:20.126 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:43:20.126 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:43:20.126 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:43:20.126 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:43:20.126 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:43:20.126 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:43:20.126 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=135 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:20.126 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=135 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:20.126 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=135 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:25.134 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:43:25.134 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:43:25.134 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:43:25.134 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:43:25.134 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:43:25.134 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:43:25.142 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:43:25.144 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:43:25.144 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:25.144 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:43:25.144 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:43:25.148 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:43:25.148 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:43:25.149 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:43:25.149 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:25.149 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:43:25.149 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:43:25.149 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:43:25.149 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:43:25.152 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:43:25.152 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:43:25.152 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:43:25.152 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:25.152 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:43:25.152 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:43:25.152 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:43:25.152 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:43:25.156 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:43:25.156 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:43:25.156 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:43:25.156 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:25.156 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:43:25.156 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:43:25.156 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:43:25.156 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:43:25.160 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:43:25.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:43:25.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:43:25.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:43:25.160 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:43:25.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:43:25.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:43:25.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:43:25.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:43:25.161 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:43:25.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:25.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:25.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:25.161 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:43:25.161 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:43:25.161 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:43:25.161 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:43:25.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:25.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:25.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:25.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:43:25.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:25.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:25.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:25.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:25.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:25.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:25.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:25.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:25.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:25.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:25.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:25.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:25.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:25.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:25.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:25.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:25.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:25.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:25.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:25.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:25.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:25.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:25.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:25.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:25.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:25.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:25.166 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:43:25.643 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:43:25.685 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:43:25.686 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:43:25.686 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:43:25.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:25.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:43:25.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:43:25.820 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:43:25.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:43:25.821 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:43:25.821 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:43:25.821 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:43:25.821 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:43:25.821 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:43:25.821 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:43:25.821 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:43:30.830 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:43:30.830 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:43:30.830 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:43:30.830 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:43:30.830 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:43:30.830 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:43:30.839 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:43:30.839 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:43:30.840 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:30.840 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:43:30.840 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:43:30.843 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:43:30.843 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:43:30.843 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:43:30.843 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:30.843 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:43:30.844 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:43:30.844 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:43:30.844 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:43:30.846 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:43:30.846 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:43:30.846 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:43:30.846 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:30.846 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:43:30.847 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:43:30.847 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:43:30.847 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:43:30.849 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:43:30.849 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:43:30.849 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:43:30.849 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:30.849 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:43:30.849 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:43:30.849 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:43:30.849 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:43:30.852 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:43:30.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:43:30.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:43:30.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:43:30.852 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:43:30.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:43:30.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:43:30.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:43:30.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:43:30.852 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:43:30.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:30.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:30.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:30.852 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:43:30.853 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:43:30.853 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:43:30.853 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:43:30.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:30.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:30.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:30.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:43:30.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:30.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:30.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:30.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:30.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:30.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:30.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:30.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:30.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:30.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:30.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:30.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:30.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:30.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:30.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:30.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:30.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:30.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:30.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:30.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:30.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:30.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:30.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:30.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:30.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:30.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:30.857 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:43:31.336 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:43:31.378 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:43:31.380 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:43:31.383 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:43:31.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:31.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:43:31.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:43:31.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:43:31.467 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:43:31.468 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:43:31.468 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:43:31.468 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:43:31.468 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:43:31.468 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:43:31.468 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:43:31.468 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:43:36.476 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:43:36.476 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:43:36.476 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:43:36.476 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:43:36.476 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:43:36.476 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:43:36.488 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:43:36.488 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:43:36.488 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:36.489 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:43:36.489 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:43:36.490 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:43:36.491 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:43:36.491 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:43:36.491 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:36.491 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:43:36.491 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:43:36.491 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:43:36.491 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:43:36.493 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:43:36.493 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:43:36.493 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:43:36.493 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:36.493 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:43:36.493 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:43:36.493 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:43:36.493 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:43:36.494 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:43:36.494 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:43:36.495 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:43:36.495 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:36.495 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:43:36.495 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:43:36.495 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:43:36.495 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:43:36.497 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:43:36.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:43:36.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:43:36.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:43:36.498 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:43:36.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:43:36.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:43:36.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:43:36.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:43:36.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:36.498 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:43:36.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:36.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:36.498 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:43:36.498 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:43:36.498 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:43:36.498 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:43:36.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:36.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:36.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:36.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:43:36.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:36.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:36.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:36.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:36.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:36.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:36.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:36.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:36.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:36.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:36.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:36.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:36.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:36.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:36.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:36.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:36.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:36.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:36.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:36.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:36.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:36.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:36.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:36.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:36.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:36.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:36.503 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:43:36.979 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:43:37.026 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:43:37.028 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:43:37.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:37.031 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:43:37.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:37.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:37.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:37.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:37.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:37.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:37.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:37.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:37.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:37.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:37.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:37.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:37.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:37.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:37.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:37.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:37.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:37.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:37.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:37.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:37.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:37.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:37.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:43:37.137 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:43:37.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:43:37.137 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:43:37.139 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:43:37.139 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:43:37.139 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:43:37.139 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:43:37.139 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:43:37.139 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:43:37.139 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:43:37.139 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=138 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:37.139 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=138 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:37.139 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=138 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:37.139 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=138 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:42.148 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:43:42.148 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:43:42.148 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:43:42.148 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:43:42.148 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:43:42.148 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:43:42.157 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:43:42.158 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:43:42.158 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:42.158 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:43:42.158 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:43:42.162 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:43:42.163 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:43:42.163 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:43:42.163 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:42.163 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:43:42.163 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:43:42.164 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:43:42.164 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:43:42.166 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:43:42.166 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:43:42.166 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:43:42.166 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:42.166 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:43:42.166 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:43:42.166 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:43:42.166 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:43:42.169 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:43:42.169 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:43:42.169 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:43:42.169 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:42.169 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:43:42.169 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:43:42.169 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:43:42.169 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:43:42.173 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:43:42.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:43:42.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:43:42.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:43:42.173 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:43:42.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:43:42.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:43:42.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:43:42.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:43:42.173 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:43:42.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:42.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:42.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:42.173 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:43:42.173 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:43:42.173 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:43:42.174 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:43:42.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:42.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:42.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:42.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:43:42.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:42.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:42.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:42.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:42.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:42.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:42.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:42.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:42.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:42.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:42.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:42.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:42.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:42.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:42.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:42.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:42.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:42.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:42.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:42.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:42.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:42.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:42.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:42.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:42.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:42.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:42.178 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:43:42.656 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:43:42.702 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:43:42.704 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:43:42.705 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:43:42.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:42.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:42.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:42.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:42.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:42.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:42.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:42.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:42.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:42.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:42.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:42.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:42.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:42.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:42.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:42.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:42.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:42.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:42.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:42.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:42.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:42.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:42.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:42.806 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:43:42.806 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:43:42.806 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:43:42.806 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:43:42.808 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:43:42.808 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:43:42.808 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:43:42.808 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:43:42.808 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:43:42.808 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:43:42.808 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:43:42.808 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=136 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:42.808 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=136 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:42.808 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=136 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:47.815 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:43:47.815 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:43:47.816 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:43:47.816 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:43:47.816 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:43:47.816 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:43:47.824 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:43:47.825 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:43:47.825 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:47.826 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:43:47.826 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:43:47.830 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:43:47.830 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:43:47.830 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:43:47.830 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:47.831 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:43:47.831 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:43:47.831 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:43:47.831 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:43:47.833 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:43:47.833 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:43:47.833 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:43:47.833 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:47.833 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:43:47.833 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:43:47.834 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:43:47.834 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:43:47.836 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:43:47.836 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:43:47.836 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:43:47.836 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:47.836 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:43:47.836 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:43:47.836 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:43:47.836 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:43:47.839 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:43:47.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:43:47.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:43:47.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:43:47.839 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:43:47.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:43:47.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:43:47.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:43:47.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:43:47.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:47.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:47.840 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:43:47.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:47.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:47.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:47.840 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:43:47.840 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:43:47.840 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:43:47.840 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:43:47.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:47.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:47.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:47.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:43:47.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:47.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:47.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:47.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:47.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:47.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:47.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:47.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:47.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:47.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:47.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:47.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:47.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:47.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:47.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:47.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:47.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:47.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:47.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:47.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:47.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:47.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:47.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:47.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:47.845 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:43:48.322 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:43:48.365 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:43:48.367 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:43:48.369 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:43:48.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:48.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:48.499 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:43:48.499 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:43:48.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:43:48.499 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:43:48.500 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:43:48.500 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:43:48.500 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:43:48.500 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:43:48.500 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:43:48.501 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:43:48.501 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:43:53.509 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:43:53.509 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:43:53.509 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:43:53.509 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:43:53.509 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:43:53.510 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:43:53.514 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:43:53.514 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:43:53.514 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:53.514 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:43:53.515 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:43:53.519 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:43:53.519 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:43:53.519 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:43:53.519 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:53.519 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:43:53.519 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:43:53.519 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:43:53.519 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:43:53.520 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:43:53.520 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:43:53.520 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:43:53.520 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:53.521 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:43:53.521 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:43:53.521 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:43:53.521 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:43:53.522 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:43:53.522 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:43:53.522 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:43:53.522 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:53.522 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:43:53.522 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:43:53.522 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:43:53.522 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:43:53.525 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:43:53.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:43:53.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:43:53.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:43:53.525 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:43:53.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:43:53.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:43:53.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:43:53.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:43:53.525 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:43:53.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:53.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:53.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:53.525 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:43:53.525 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:43:53.525 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:43:53.525 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:43:53.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:53.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:53.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:53.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:43:53.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:53.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:53.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:53.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:53.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:53.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:53.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:53.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:53.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:53.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:53.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:53.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:53.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:53.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:53.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:53.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:53.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:53.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:53.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:53.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:53.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:53.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:53.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:53.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:53.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:53.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:53.530 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:43:54.007 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:43:54.050 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:43:54.053 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:43:54.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.055 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:43:54.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:54.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:54.165 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:43:54.165 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:43:54.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:43:54.165 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:43:54.166 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:43:54.166 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:43:54.166 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:43:54.166 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:43:54.166 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:43:54.166 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:43:54.166 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:43:54.166 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=138 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:54.166 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=138 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:54.166 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=138 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:54.166 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=138 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:43:59.174 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:43:59.174 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:43:59.174 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:43:59.174 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:43:59.174 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:43:59.175 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:43:59.182 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:43:59.183 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:43:59.183 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:59.183 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:43:59.183 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:43:59.187 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:43:59.188 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:43:59.188 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:43:59.188 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:59.188 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:43:59.189 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:43:59.189 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:43:59.189 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:43:59.191 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:43:59.191 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:43:59.192 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:43:59.192 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:59.192 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:43:59.192 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:43:59.192 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:43:59.192 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:43:59.194 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:43:59.194 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:43:59.195 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:43:59.195 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:43:59.195 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:43:59.195 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:43:59.195 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:43:59.195 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:43:59.198 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:43:59.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:43:59.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:43:59.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:43:59.198 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:43:59.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:43:59.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:43:59.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:43:59.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:43:59.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:59.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:59.199 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:43:59.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:59.199 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:43:59.199 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:43:59.199 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:43:59.199 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:43:59.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:59.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:59.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:59.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:43:59.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:59.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:59.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:59.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:59.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:59.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:59.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:59.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:59.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:59.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:59.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:59.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:59.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:59.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:59.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:59.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:59.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:59.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:59.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:59.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:43:59.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:59.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:59.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:59.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:43:59.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:43:59.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:43:59.204 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:43:59.682 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:43:59.722 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:43:59.725 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:43:59.726 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:43:59.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:43:59.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:43:59.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:43:59.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:43:59.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:43:59.731 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:43:59.731 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:43:59.731 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:43:59.731 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:44:00.155 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:44:00.201 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:44:00.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:44:00.202 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:44:00.203 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:44:00.626 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:44:01.099 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:44:01.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:44:01.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:44:01.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:44:01.203 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:44:01.572 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:44:02.044 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:44:02.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:44:02.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:44:02.212 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:44:02.212 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:44:02.515 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:44:02.986 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:44:03.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:44:03.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:44:03.194 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:44:03.194 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:44:03.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:44:03.194 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:44:03.195 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:44:03.195 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:44:03.195 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:44:03.195 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:44:03.195 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:44:03.195 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:44:03.196 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:44:08.203 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:44:08.203 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:44:08.204 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:44:08.204 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:44:08.204 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:44:08.204 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:44:08.211 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:44:08.212 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:44:08.212 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:44:08.212 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:44:08.212 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:44:08.219 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:44:08.220 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:44:08.220 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:44:08.220 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:44:08.220 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:44:08.220 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:44:08.221 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:44:08.221 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:44:08.222 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:44:08.222 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:44:08.223 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:44:08.223 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:44:08.223 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:44:08.223 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:44:08.223 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:44:08.223 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:44:08.225 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:44:08.225 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:44:08.225 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:44:08.225 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:44:08.225 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:44:08.225 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:44:08.225 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:44:08.225 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:44:08.229 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:44:08.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:44:08.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:44:08.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:44:08.229 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:44:08.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:44:08.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:44:08.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:44:08.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:44:08.230 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:44:08.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:08.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:08.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:08.230 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:44:08.230 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:44:08.230 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:44:08.230 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:44:08.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:08.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:08.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:08.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:44:08.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:08.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:08.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:08.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:08.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:08.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:08.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:08.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:08.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:08.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:08.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:08.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:08.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:08.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:08.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:08.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:08.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:08.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:08.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:08.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:08.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:08.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:08.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:08.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:08.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:08.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:08.235 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:44:08.712 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:44:08.759 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:44:08.762 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:44:08.764 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:44:08.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:44:08.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:44:08.789 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:44:08.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:44:08.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:44:08.794 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:44:08.794 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:44:08.795 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:44:08.795 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:44:08.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 05:44:08.818 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:44:08.818 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:44:08.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:44:08.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:44:09.185 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:44:09.233 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:44:09.233 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:44:09.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:44:09.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:44:09.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:44:09.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:44:09.329 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:44:09.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:44:09.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:44:09.330 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:44:09.330 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:44:09.330 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:44:09.331 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:44:09.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:44:09.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:44:09.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:44:09.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:44:09.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:44:09.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:44:09.382 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:44:09.383 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:44:09.383 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:44:09.383 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:44:09.384 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:44:09.384 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:44:09.384 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:44:09.384 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:44:09.384 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=248 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:44:09.384 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=249 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:44:09.384 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=249 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:44:09.384 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=249 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:44:09.384 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=249 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:44:09.384 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=249 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:44:09.384 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=249 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:44:09.384 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=249 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:44:09.384 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=249 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:44:14.389 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:44:14.389 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:44:14.389 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:44:14.389 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:44:14.389 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:44:14.389 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:44:14.406 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:44:14.407 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:44:14.407 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:44:14.408 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:44:14.408 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:44:14.413 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:44:14.413 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:44:14.413 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:44:14.413 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:44:14.414 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:44:14.414 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:44:14.414 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:44:14.414 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:44:14.416 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:44:14.416 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:44:14.416 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:44:14.416 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:44:14.416 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:44:14.416 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:44:14.416 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:44:14.416 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:44:14.418 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:44:14.418 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:44:14.418 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:44:14.418 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:44:14.418 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:44:14.418 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:44:14.418 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:44:14.418 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:44:14.421 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:44:14.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:44:14.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:44:14.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:44:14.421 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:44:14.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:44:14.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:44:14.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:44:14.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:44:14.421 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:44:14.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:14.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:14.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:14.421 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:44:14.421 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:44:14.421 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:44:14.421 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:44:14.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:14.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:14.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:14.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:44:14.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:14.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:14.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:14.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:14.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:14.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:14.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:14.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:14.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:14.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:14.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:14.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:14.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:14.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:14.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:14.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:14.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:14.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:14.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:14.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:14.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:14.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:14.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:14.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:14.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:14.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:14.426 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:44:14.904 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:44:14.940 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:44:14.940 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:44:14.941 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:44:14.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:44:14.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:44:14.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:44:14.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:44:14.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:44:14.961 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:44:14.961 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:44:14.961 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:44:14.961 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:44:15.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 05:44:15.007 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:44:15.007 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:44:15.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:44:15.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:44:15.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:44:15.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:44:15.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:44:15.120 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:44:15.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:44:15.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:44:15.120 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:44:15.121 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:44:15.122 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:44:15.122 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:44:15.376 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:44:15.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:44:15.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:44:15.425 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:44:15.425 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:44:15.847 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:44:16.318 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:44:16.426 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:44:16.426 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:44:16.426 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:44:16.426 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:44:16.789 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:44:17.262 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-08 05:44:17.427 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:44:17.427 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:44:17.428 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:44:17.428 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:44:17.735 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-08 05:44:18.207 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-08 05:44:18.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:44:18.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:44:18.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:44:18.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:44:18.678 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-08 05:44:19.151 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-08 05:44:19.430 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:44:19.430 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:44:19.430 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:44:19.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:44:19.624 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-08 05:44:20.097 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-08 05:44:20.570 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-08 05:44:21.042 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-08 05:44:21.515 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-08 05:44:21.986 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-08 05:44:22.459 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-08 05:44:22.932 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-08 05:44:23.404 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-08 05:44:23.875 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-08 05:44:24.346 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-08 05:44:24.816 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-08 05:44:25.287 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-08 05:44:25.761 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-08 05:44:26.233 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-08 05:44:26.706 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-08 05:44:27.179 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-08 05:44:27.652 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-08 05:44:28.124 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-08 05:44:28.598 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-08 05:44:29.070 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-08 05:44:29.543 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-08 05:44:30.014 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-08 05:44:30.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:44:30.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:44:30.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:44:30.309 [WARNING] transceiver.py:257 (MS@172.18.152.22:6700) RX TRXD message (fn=3432 tn=6 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:44:30.309 [WARNING] transceiver.py:257 (MS@172.18.152.22:6700) RX TRXD message (fn=3432 tn=7 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:44:30.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:44:30.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:44:30.318 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:44:30.318 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:44:30.318 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:44:30.318 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:44:30.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:44:30.341 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:44:30.341 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:44:30.354 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:44:30.354 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:44:30.354 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:44:30.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:44:30.356 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:44:30.356 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:44:30.356 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:44:30.356 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:44:30.356 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:44:30.356 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:44:30.356 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:44:30.356 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3441 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:44:30.356 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3441 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:44:30.356 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3441 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:44:30.357 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3441 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:44:30.357 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3442 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:44:30.357 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3442 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:44:30.357 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3442 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:44:30.357 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3442 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:44:30.357 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3442 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:44:30.357 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3442 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:44:30.357 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3442 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:44:30.357 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=3442 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:44:35.361 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:44:35.361 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:44:35.361 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:44:35.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:44:35.361 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:44:35.361 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:44:35.370 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:44:35.371 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:44:35.371 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:44:35.371 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:44:35.371 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:44:35.374 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:44:35.375 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:44:35.375 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:44:35.375 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:44:35.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:44:35.376 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:44:35.376 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:44:35.377 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:44:35.380 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:44:35.380 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:44:35.380 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:44:35.380 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:44:35.381 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:44:35.381 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:44:35.381 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:44:35.382 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:44:35.384 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:44:35.384 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:44:35.385 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:44:35.385 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:44:35.385 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:44:35.385 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:44:35.385 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:44:35.385 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:44:35.390 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:44:35.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:44:35.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:44:35.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:44:35.390 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:44:35.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:44:35.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:44:35.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:44:35.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:35.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:44:35.391 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:44:35.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:35.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:35.391 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:44:35.391 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:44:35.391 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:44:35.391 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:44:35.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:35.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:35.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:35.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:44:35.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:35.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:35.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:35.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:35.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:35.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:35.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:35.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:35.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:35.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:35.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:35.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:35.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:35.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:35.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:35.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:35.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:35.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:35.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:35.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:35.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:35.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:35.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:35.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:35.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:35.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:35.396 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:44:35.873 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:44:35.917 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:44:35.919 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:44:35.921 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:44:35.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:44:35.947 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:44:35.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:44:35.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:44:35.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:44:35.953 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:44:35.954 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:44:35.954 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:44:35.954 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:44:35.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 05:44:35.974 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:44:35.975 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:44:35.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:44:35.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:44:36.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:44:36.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 05:44:36.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:44:36.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:44:36.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:44:36.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:44:36.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:44:36.269 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:44:36.269 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:44:36.269 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:44:36.269 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:44:36.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:44:36.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:44:36.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:44:36.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:44:36.302 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:44:36.302 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:44:36.302 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:44:36.303 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:44:36.303 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:44:36.303 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:44:36.303 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:44:36.303 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:44:36.303 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:44:36.303 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:44:36.303 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=197 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:44:36.303 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=197 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:44:36.303 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=197 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:44:36.303 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=197 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:44:36.303 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=197 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:44:36.303 [WARNING] transceiver.py:257 (BTS@172.18.152.20:5700) RX TRXD message (ver=1 fn=197 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-08 05:44:41.310 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:44:41.310 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:44:41.310 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:44:41.310 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:44:41.310 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:44:41.310 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:44:41.319 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:44:41.320 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:44:41.320 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:44:41.321 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:44:41.321 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:44:41.324 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:44:41.325 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:44:41.325 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:44:41.325 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:44:41.325 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:44:41.325 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:44:41.325 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:44:41.325 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:44:41.329 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:44:41.330 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:44:41.330 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:44:41.330 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:44:41.330 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:44:41.330 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:44:41.330 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:44:41.330 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:44:41.333 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:44:41.333 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:44:41.333 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:44:41.333 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:44:41.333 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:44:41.333 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:44:41.333 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:44:41.333 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:44:41.337 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:44:41.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:44:41.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:44:41.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:44:41.337 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:44:41.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:44:41.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:44:41.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:44:41.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:44:41.337 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:44:41.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:41.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:41.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:41.337 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:44:41.337 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:44:41.337 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:44:41.337 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:44:41.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:41.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:41.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:41.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:44:41.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:41.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:41.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:41.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:41.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:41.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:41.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:41.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:41.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:41.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:41.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:41.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:41.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:41.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:41.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:41.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:41.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:41.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:41.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:41.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:41.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:41.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:41.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:41.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:41.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:41.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:41.342 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-08 05:44:41.820 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-08 05:44:41.865 [DEBUG] fake_trx.py:278 (BTS@172.18.152.20:5700) Recv FAKE_TOA cmd
2026-02-08 05:44:41.867 [DEBUG] fake_trx.py:297 (BTS@172.18.152.20:5700) Recv FAKE_RSSI cmd
2026-02-08 05:44:41.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:44:41.869 [DEBUG] fake_trx.py:322 (BTS@172.18.152.20:5700) Recv FAKE_CI cmd
2026-02-08 05:44:41.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:44:41.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:44:41.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:44:41.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:44:41.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:44:41.897 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:44:41.898 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:44:41.898 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:44:41.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD HANDOVER
2026-02-08 05:44:41.921 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:44:41.921 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:44:41.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:44:41.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:44:42.291 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-08 05:44:42.341 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:44:42.341 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:44:42.341 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:44:42.341 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:44:42.764 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-08 05:44:43.237 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-08 05:44:43.342 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:44:43.342 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:44:43.343 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:44:43.343 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:44:43.710 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-08 05:44:43.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:44:43.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:44:43.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:44:43.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD ECHO
2026-02-08 05:44:43.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.152.22:6700) Ignore CMD SETSLOT
2026-02-08 05:44:43.937 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.152.22:6700) Recv RXTUNE cmd
2026-02-08 05:44:43.937 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.152.22:6700) Recv TXTUNE cmd
2026-02-08 05:44:43.937 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.152.22:6700) Recv POWERON CMD
2026-02-08 05:44:43.937 [INFO] ctrl_if_trx.py:109 (MS@172.18.152.22:6700) Starting transceiver...
2026-02-08 05:44:43.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD NOHANDOVER
2026-02-08 05:44:43.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.152.22:6700) Recv POWEROFF cmd
2026-02-08 05:44:43.946 [INFO] ctrl_if_trx.py:117 (MS@172.18.152.22:6700) Stopping transceiver...
2026-02-08 05:44:43.952 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.152.20:5700) Recv SETPOWER cmd
2026-02-08 05:44:43.952 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.152.20:5700/1) Recv SETPOWER cmd
2026-02-08 05:44:43.952 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.152.20:5700/2) Recv SETPOWER cmd
2026-02-08 05:44:43.952 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.152.20:5700/3) Recv SETPOWER cmd
2026-02-08 05:44:43.953 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:44:43.953 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:44:43.953 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:44:43.953 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:44:43.953 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:44:43.953 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:44:43.953 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:44:48.958 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:44:48.958 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:44:48.958 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:44:48.958 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:44:48.958 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:44:48.958 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:44:48.963 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:44:48.963 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:44:48.964 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:44:48.964 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:44:48.964 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:44:48.965 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:44:48.965 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:44:48.965 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:44:48.965 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:44:48.965 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:44:48.965 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:44:48.965 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:44:48.965 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:44:48.966 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:44:48.967 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:44:48.967 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:44:48.967 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:44:48.967 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:44:48.967 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:44:48.967 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:44:48.967 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:44:48.968 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:44:48.968 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:44:48.968 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:44:48.968 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:44:48.968 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:44:48.968 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:44:48.968 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:44:48.968 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:44:48.971 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:44:48.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:44:48.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:44:48.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:44:48.971 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:44:48.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:44:48.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:44:48.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:48.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:44:48.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:44:48.971 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:44:48.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:48.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:48.972 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:44:48.972 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:44:48.972 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:44:48.972 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:44:48.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:48.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:48.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:48.972 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:44:48.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:48.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:48.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:48.972 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:44:48.972 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:44:48.972 [INFO] transceiver.py:246 Stopping clock generator
2026-02-08 05:44:48.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:48.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:48.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:53.977 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:44:53.977 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:44:53.977 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:44:53.977 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:44:53.978 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:44:53.978 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:44:53.982 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:44:53.982 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:44:53.982 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.152.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:44:53.982 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.152.20:5700) Recv SETFORMAT cmd
2026-02-08 05:44:53.982 [INFO] ctrl_if_trx.py:201 (BTS@172.18.152.20:5700) TRXD header version 1 -> 1
2026-02-08 05:44:53.986 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.152.20:5700/1) Recv RXTUNE cmd
2026-02-08 05:44:53.986 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.152.20:5700/1) Recv TXTUNE cmd
2026-02-08 05:44:53.986 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:44:53.986 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.152.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:44:53.986 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:44:53.986 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.152.20:5700/1) Recv NOMTXPOWER cmd
2026-02-08 05:44:53.987 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.152.20:5700/1) Recv SETFORMAT cmd
2026-02-08 05:44:53.987 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.152.20:5700/1) TRXD header version 1 -> 1
2026-02-08 05:44:53.987 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.152.20:5700/2) Recv RXTUNE cmd
2026-02-08 05:44:53.987 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.152.20:5700/2) Recv TXTUNE cmd
2026-02-08 05:44:53.987 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:44:53.987 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.152.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:44:53.988 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:44:53.988 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.152.20:5700/2) Recv NOMTXPOWER cmd
2026-02-08 05:44:53.988 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.152.20:5700/2) Recv SETFORMAT cmd
2026-02-08 05:44:53.988 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.152.20:5700/2) TRXD header version 1 -> 1
2026-02-08 05:44:53.989 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.152.20:5700/3) Recv RXTUNE cmd
2026-02-08 05:44:53.989 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.152.20:5700/3) Recv TXTUNE cmd
2026-02-08 05:44:53.989 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:44:53.989 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.152.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-08 05:44:53.989 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:44:53.989 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.152.20:5700/3) Recv NOMTXPOWER cmd
2026-02-08 05:44:53.989 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.152.20:5700/3) Recv SETFORMAT cmd
2026-02-08 05:44:53.989 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.152.20:5700/3) TRXD header version 1 -> 1
2026-02-08 05:44:53.991 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.152.20:5700) Recv RXTUNE cmd
2026-02-08 05:44:53.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETTSC
2026-02-08 05:44:53.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETTSC
2026-02-08 05:44:53.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETTSC
2026-02-08 05:44:53.991 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.152.20:5700) Recv TXTUNE cmd
2026-02-08 05:44:53.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETRXGAIN
2026-02-08 05:44:53.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETTSC
2026-02-08 05:44:53.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETRXGAIN
2026-02-08 05:44:53.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETRXGAIN
2026-02-08 05:44:53.992 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.152.20:5700) Recv NOMTXPOWER cmd
2026-02-08 05:44:53.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:53.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:53.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:53.992 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.152.20:5700) Recv POWERON CMD
2026-02-08 05:44:53.992 [INFO] ctrl_if_trx.py:109 (BTS@172.18.152.20:5700) Starting transceiver...
2026-02-08 05:44:53.992 [INFO] transceiver.py:243 Starting clock generator
2026-02-08 05:44:53.992 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-08 05:44:53.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:53.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:53.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:53.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETRXGAIN
2026-02-08 05:44:53.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:53.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:53.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:53.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:53.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:53.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:53.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:53.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:53.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:53.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:53.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:53.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:53.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:53.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:53.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:53.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:53.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:53.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:53.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:53.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.152.20:5700/1) Ignore CMD SETSLOT
2026-02-08 05:44:53.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:53.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:53.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:53.993 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.152.20:5700/1) Recv RFMUTE cmd
2026-02-08 05:44:53.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.152.20:5700) Ignore CMD SETSLOT
2026-02-08 05:44:53.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.152.20:5700/2) Ignore CMD SETSLOT
2026-02-08 05:44:53.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.152.20:5700/3) Ignore CMD SETSLOT
2026-02-08 05:44:53.993 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.152.20:5700) Recv RFMUTE cmd
2026-02-08 05:44:53.993 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.152.20:5700/2) Recv RFMUTE cmd
2026-02-08 05:44:53.993 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.152.20:5700/3) Recv RFMUTE cmd
2026-02-08 05:44:53.993 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.152.20:5700) Recv POWEROFF cmd
2026-02-08 05:44:53.993 [INFO] ctrl_if_trx.py:117 (BTS@172.18.152.20:5700) Stopping transceiver...
2026-02-08 05:44:53.993 [INFO] transceiver.py:246 Stopping clock generator